15 Dec, 2012
1 commit
-
Pull ARM SoC updates for Marvell mvebu/kirkwood from Olof Johansson:
"This is a branch with updates for Marvell's mvebu/kirkwood platforms.
They came in late-ish, and were heavily interdependent such that it
didn't make sense to split them up across the cross-platform topic
branches. So here they are (for the second release in a row) in a
branch on their own."* tag 'mvebu' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (88 commits)
arm: l2x0: add aurora related properties to OF binding
arm: mvebu: add Aurora L2 Cache Controller to the DT
arm: mvebu: add L2 cache support
dma: mv_xor: fix error handling path
dma: mv_xor: fix error checking of irq_of_parse_and_map()
dma: mv_xor: use request_irq() instead of devm_request_irq()
dma: mv_xor: clear the window override control registers
arm: mvebu: fix address decoding armada_cfg_base() function
ARM: mvebu: update defconfig with I2C and RTC support
ARM: mvebu: Add SATA support for OpenBlocks AX3-4
ARM: mvebu: Add support for the RTC in OpenBlocks AX3-4
ARM: mvebu: Add support for I2C on OpenBlocks AX3-4
ARM: mvebu: Add support for I2C controllers in Armada 370/XP
arm: mvebu: Add hardware I/O Coherency support
arm: plat-orion: Add coherency attribute when setup mbus target
arm: dma mapping: Export a dma ops function arm_dma_set_mask
arm: mvebu: Add SMP support for Armada XP
arm: mm: Add support for PJ4B cpu and init routines
arm: mvebu: Add IPI support via doorbells
arm: mvebu: Add initial support for power managmement service unit
...
14 Dec, 2012
1 commit
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Pull ARM SoC multiplatform conversion patches from Olof Johansson:
"Here are more patches in the progression towards multiplatform, sparse
irq conversions in particular.Tegra has a handful of cleanups and general groundwork, but is not
quite there yet on full enablement.Platforms that are enabled through this branch are VT8500 and Zynq.
Note that i.MX was converted in one of the earlier cleanup branches as
well (before we started a separate topic for multiplatform). And both
new platforms for this merge window, sunxi and bcm, were merged with
multiplatform support enabled."Fix up conflicts mostly as per Olof.
* tag 'multiplatform' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (29 commits)
ARM: zynq: Remove all unused mach headers
ARM: zynq: add support for ARCH_MULTIPLATFORM
ARM: zynq: make use of debug_ll_io_init()
ARM: zynq: remove TTC early mapping
ARM: tegra: move debug-macro.S to include/debug
ARM: tegra: don't include iomap.h from debug-macro.S
ARM: tegra: decouple uncompress.h and debug-macro.S
ARM: tegra: simplify DEBUG_LL UART selection options
ARM: tegra: select SPARSE_IRQ
ARM: tegra: enhance timer.c to get IO address from device tree
ARM: tegra: enhance timer.c to get IRQ info from device tree
ARM: timer: fix checkpatch warnings
ARM: tegra: add TWD to device tree
ARM: tegra: define DT bindings for and instantiate RTC
ARM: tegra: define DT bindings for and instantiate timer
clocksource/mtu-nomadik: use apb_pclk
clk: ux500: Register mtu apb_pclocks
ARM: plat-nomadik: convert platforms to SPARSE_IRQ
mfd/db8500-prcmu: use the irq_domain_add_simple()
mfd/ab8500-core: use irq_domain_add_simple()
...
13 Dec, 2012
1 commit
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Pull ARM SoC updates from Olof Johansson:
"This contains the bulk of new SoC development for this merge window.Two new platforms have been added, the sunxi platforms (Allwinner A1x
SoCs) by Maxime Ripard, and a generic Broadcom platform for a new
series of ARMv7 platforms from them, where the hope is that we can
keep the platform code generic enough to have them all share one mach
directory. The new Broadcom platform is contributed by Christian
Daudt.Highbank has grown support for Calxeda's next generation of hardware,
ECX-2000.clps711x has seen a lot of cleanup from Alexander Shiyan, and he's
also taken on maintainership of the platform.Beyond this there has been a bunch of work from a number of people on
converting more platforms to IRQ domains, pinctrl conversion, cleanup
and general feature enablement across most of the active platforms."Fix up trivial conflicts as per Olof.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (174 commits)
mfd: vexpress-sysreg: Remove LEDs code
irqchip: irq-sunxi: Add terminating entry for sunxi_irq_dt_ids
clocksource: sunxi_timer: Add terminating entry for sunxi_timer_dt_ids
irq: versatile: delete dangling variable
ARM: sunxi: add missing include for mdelay()
ARM: EXYNOS: Avoid early use of of_machine_is_compatible()
ARM: dts: add node for PL330 MDMA1 controller for exynos4
ARM: EXYNOS: Add support for secondary CPU bring-up on Exynos4412
ARM: EXYNOS: add UART3 to DEBUG_LL ports
ARM: S3C24XX: Add clkdev entry for camif-upll clock
ARM: SAMSUNG: Add s3c24xx/s3c64xx CAMIF GPIO setup helpers
ARM: sunxi: Add missing sun4i.dtsi file
pinctrl: samsung: Do not initialise statics to 0
ARM i.MX6: remove gate_mask from pllv3
ARM i.MX6: Fix ethernet PLL clocks
ARM i.MX6: rename PLLs according to datasheet
ARM i.MX6: Add pwm support
ARM i.MX51: Add pwm support
ARM i.MX53: Add pwm support
ARM: mx5: Replace clk_register_clkdev with clock DT lookup
...
12 Dec, 2012
1 commit
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Pull ARM64 updates from Catalin Marinas:
- Generic execve, kernel_thread, fork/vfork/clone.
- Preparatory patches for KVM support (initialising EL2 mode for later
installing KVM support, hypervisor stub).- Signal handling corner case fix (alternative signal stack set up for
a SEGV handler, which is raised in response to RLIMIT_STACK being
reached).- Sub-nanosecond timer error fix.
* tag 'arm64-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64: (30 commits)
arm64: Update the MAINTAINERS entry
arm64: compat for clock_adjtime(2) is miswired
arm64: move FP-SIMD save/restore code to a macro
arm64: hyp: initialize vttbr_el2 to zero
arm64: add hypervisor stub
arm64: record boot mode when entering the kernel
arm64: move vector entry macro to assembler.h
arm64: add AArch32 execution modes to ptrace.h
arm64: expand register mapping between AArch32 and AArch64
arm64: generic timer: use virtual counter instead of physical at EL0
arm64: vdso: defer shifting of nanosecond component of timespec
arm64: vdso: rework __do_get_tspec register allocation and return shift
arm64: vdso: check sequence counter even for coarse realtime operations
arm64: vdso: fix clocksource mask when extracting bottom 56 bits
ARM64: Remove incorrect Kconfig symbol HAVE_SPARSE_IRQ
Documentation: Fixes a word in Documentation/arm64/memory.txt
arm64: Make !dirty ptes read-only
arm64: Convert empty flush_cache_{mm,page} functions to static inline
arm64: signal: let the compiler inline compat_get_sigframe
arm64: signal: return struct rt_sigframe from get_sigframe
...Conflicts:
arch/arm64/include/asm/unistd32.h
05 Dec, 2012
1 commit
-
We want to use the virtual counter at EL0, as the physical counter
may not track the current clocksource for guests running under a
hypervisor.This patch updates the vdso and generic timer driver to use the virtual
counter. The kernel EL2 entry code is also updated to ensure that the
virtual offset is initialised to zero.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
04 Dec, 2012
1 commit
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The of_device_id table is supposed to be zero-terminated.
Signed-off-by: Axel Lin
Signed-off-by: Maxime Ripard
20 Nov, 2012
1 commit
-
Signed-off-by: Gregory CLEMENT
Tested-by Gregory CLEMENT
17 Nov, 2012
1 commit
-
Signed-off-by: Maxime Ripard
CC: Thomas Gleixner
CC: John Stultz
16 Nov, 2012
1 commit
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After improving the clock tree we need to make sure the the
MTU timer explicitly grabs and enables it silicon clock
(pclk).Signed-off-by: Ulf Hansson
Acked-by: Mike Turquette
Signed-off-by: Linus Walleij
14 Nov, 2012
4 commits
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Now that timekeeping is protected by its own locks, rename
the xtime_lock to jifffies_lock to better describe what it
protects.CC: Thomas Gleixner
CC: Eric Dumazet
CC: Richard Cochran
Signed-off-by: John Stultz -
Utilize this_cpu_ptr() instead of per_cpu_ptr(...,smp_processor_id())
Signed-off-by: Shan Wei
Reviewed-by: Christoph Lameter
Signed-off-by: John Stultz -
This will make the two crucial integer divisions in the generic
ARM arch timer used for ARMv8 use the kernel DIV_ROUND_CLOSEST()
helper inline from so they get more precise.Cc: Marc Zyngier
Cc: Catalin Marinas
Signed-off-by: Linus Walleij
Signed-off-by: John Stultz -
I changed the strict_strtoul() to kstrtouint(). That has the check
for UINT_MAX built in to it so the ifdefs can be removed. Also
I changed a printk() to pr_info().Signed-off-by: Dan Carpenter
Signed-off-by: John Stultz
05 Nov, 2012
1 commit
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This moves the MTU timer driver from arch/arm/plat-nomadik
to drivers/clocksource and moves the header file to the
platform_data directory.As this moves the last file being compiled to an object out
of arch/arm/plat-nomadik, we have to "turn off the light"
and delete the plat-nomadik directory, because it is not
allowed to have an empty Makefile in a plat-* directory.
This is probably also a desired side effect of depopulating
the arch/arm directory of drivers. Luckily we have just
deleted all the include files prior to this so
by moving the last one we may delete the directory.After this all the Ux500 and Nomadik device drivers live
outside of the arch/arm hierarchy.Cc: Alessandro Rubini
Acked-by: Arnd Bergmann
Signed-off-by: Linus Walleij
03 Oct, 2012
1 commit
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Pull power management updates from Rafael J Wysocki:
- Improved system suspend/resume and runtime PM handling for the SH
TMU, CMT and MTU2 clock event devices (also used by ARM/shmobile).- Generic PM domains framework extensions related to cpuidle support
and domain objects lookup using names.- ARM/shmobile power management updates including improved support for
the SH7372's A4S power domain containing the CPU core.- cpufreq changes related to AMD CPUs support from Matthew Garrett,
Andre Przywara and Borislav Petkov.- cpu0 cpufreq driver from Shawn Guo.
- cpufreq governor fixes related to the relaxing of limit from Michal
Pecio.- OMAP cpufreq updates from Axel Lin and Richard Zhao.
- cpuidle ladder governor fixes related to the disabling of states from
Carsten Emde and me.- Runtime PM core updates related to the interactions with the system
suspend core from Alan Stern and Kevin Hilman.- Wakeup sources modification allowing more helper functions to be
called from interrupt context from John Stultz and additional
diagnostic code from Todd Poynor.- System suspend error code path fix from Feng Hong.
Fixed up conflicts in cpufreq/powernow-k8 that stemmed from the
workqueue fixes conflicting fairly badly with the removal of support for
hardware P-state chips. The changes were independent but somewhat
intertwined.* tag 'pm-for-3.7-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm: (76 commits)
Revert "PM QoS: Use spinlock in the per-device PM QoS constraints code"
PM / Runtime: let rpm_resume() succeed if RPM_ACTIVE, even when disabled, v2
cpuidle: rename function name "__cpuidle_register_driver", v2
cpufreq: OMAP: Check IS_ERR() instead of NULL for omap_device_get_by_hwmod_name
cpuidle: remove some empty lines
PM: Prevent runtime suspend during system resume
PM QoS: Use spinlock in the per-device PM QoS constraints code
PM / Sleep: use resume event when call dpm_resume_early
cpuidle / ACPI : move cpuidle_device field out of the acpi_processor_power structure
ACPI / processor: remove pointless variable initialization
ACPI / processor: remove unused function parameter
cpufreq: OMAP: remove loops_per_jiffy recalculate for smp
sections: fix section conflicts in drivers/cpufreq
cpufreq: conservative: update frequency when limits are relaxed
cpufreq / ondemand: update frequency when limits are relaxed
properly __init-annotate pm_sysrq_init()
cpufreq: Add a generic cpufreq-cpu0 driver
PM / OPP: Initialize OPP table from device tree
ARM: add cpufreq transiton notifier to adjust loops_per_jiffy for smp
cpufreq: Remove support for hardware P-state chips from powernow-k8
...
02 Oct, 2012
1 commit
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Pull ARM soc-specific updates from Olof Johansson:
"Most notable here is probably the addition of basic support for the
BCM2835, an SoC used in some of the Roku 2 players as well as the
much-hyped Raspberry Pi, cleaned up and contributed by Stephen Warren.
It's still early days on mainline support, with just the basics
working. But it has to start somewhere!Beyond that there's some conversions of clock infrastructure on tegra
to common clock, misc updates for several other platforms, and OMAP
now has its own bus (under drivers/bus) to manage its devices through.This branch adds two new directories outside of arch/arm:
drivers/irqchip for new irq controllers, and drivers/bus for the above
OMAP bus. It's expected that some of the other platforms will migrate
parts of their platforms to those directories over time as well."Fix up trivial conflicts with the clk infrastructure changes.
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (62 commits)
ARM: shmobile: add new __iomem annotation for new code
ARM: LPC32xx: Support GPI 28
ARM: LPC32xx: Platform update for devicetree completion of spi-pl022
ARM: LPC32xx: Board cleanup
irqchip: fill in empty Kconfig
ARM: SAMSUNG: Add check for NULL in clock interface
ARM: EXYNOS: Put PCM, Slimbus, Spdif clocks to off state
ARM: EXYNOS: Add bus clock for FIMD
ARM: SAMSUNG: Fix HDMI related warnings
ARM: S3C24XX: Add .get_rate callback for "camif-upll" clock
ARM: EXYNOS: Fix incorrect help text
ARM: EXYNOS: Turn off clocks for NAND, OneNAND and TSI controllers
ARM: OMAP: AM33xx hwmod: fixup SPI after platform_data move
MAINTAINERS: add an entry for the BCM2835 ARM sub-architecture
ARM: bcm2835: instantiate console UART
ARM: bcm2835: add stub clock driver
ARM: bcm2835: add system timer
ARM: bcm2835: add interrupt controller driver
ARM: add infra-structure for BCM2835 and Raspberry Pi
ARM: tegra20: add CPU hotplug support
...
20 Sep, 2012
1 commit
-
The System Timer peripheral provides four 32-bit timer channels and a
single 64-bit free running counter. Each channel has an output compare
register, which is compared against the 32 least significant bits of the
free running counter values, and generates an interrupt.Timer 3 is used as the Linux timer.
The BCM2835 also contains an SP804-based timer module. However, it
apparently has significant differences from the standard SP804 IP block,
and Broadcom's documentation recommends using the system timer instead.This patch was extracted from git://github.com/lp0/linux.git branch
rpi-split as of 2012/09/08, and modified as follows:* s/bcm2708/bcm2835/.
* Modified device tree vendor prefix.
* Moved to drivers/clocksource/. This looks like the desired location for
such code now.
* Added DT binding docs.
* Moved struct sys_timer bcm2835_timer into time.c to encapsulate it more.
* Simplified bcm2835_time_init() to find one matching node and operate on
it, rather than looping over all matching nodes. This seems more
consistent with other clocksource code.
* Simplified bcm2835_time_init() using of_iomap().
* Renamed struct bcm2835_timer.index to match_mask to better represent its
purpose.
* s/printk(PR_INFO/pr_info(/Signed-off-by: Chris Boot
Signed-off-by: Simon Arlott
Signed-off-by: Dom Cobley
Signed-off-by: Dom Cobley
Signed-off-by: Stephen Warren
Acked-by: Arnd Bergmann
17 Sep, 2012
1 commit
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This patch adds support for the ARM generic timers with A64 instructions
for accessing the timer registers. It uses the physical counter as the
clock source and the virtual counter as sched_clock.The timer frequency can be specified via DT or read from the CNTFRQ_EL0
register. The physical counter is also accessible from user space
allowing fast gettimeofday() implementation.Signed-off-by: Marc Zyngier
Signed-off-by: Will Deacon
Signed-off-by: Catalin Marinas
Acked-by: Tony Lindgren
Acked-by: Nicolas Pitre
Acked-by: Olof Johansson
Acked-by: Santosh Shilimkar
Acked-by: Arnd Bergmann
04 Sep, 2012
8 commits
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Modify the SH MTU2 clock event device driver to support runtime PM at
a basic level (i.e. device clocks can be disabled and enabled, but
domain power must be on, because the device has to be marked as
"irq safe").Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
Modify the SH CMT clock source/clock event device driver to support
runtime PM at a basic level (i.e. device clocks can be disabled and
enabled, but domain power must be on, because the devices have to
be marked as "irq safe").Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
Modify the SH TMU clock source/clock event device driver to support
runtime PM at a basic level (i.e. device clocks can be disabled and
enabled, but domain power must be on, because the devices have to
be marked as "irq safe").Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
The syscore device PM flag is used to mark the devices (belonging to
a PM domain) that should never be turned off, except for the system
core (syscore) suspend/hibernation and resume stages. That flag is
stored in the device's struct pm_subsys_data object whose address is
available from struct device. However, in some situations it may be
convenient to set that flag before the device is added to a PM
domain, so it is better to move it directly to the "power" member of
struct device. Then, it can be checked by the routines in
drivers/base/power/runtime.c and drivers/base/power/main.c, which is
more straightforward.This also reduces the number of dev_gpd_data() invocations in the
generic PM domains framework, so the overhead related to the syscore
flag is slightly smaller.Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
The always_on device flag is used to mark the devices (belonging to
a PM domain) that should never be turned off, except for the system
core (syscore) suspend/hibernation and resume stages. Change name
of that flag to "syscore" to better reflect its purpose.Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
Introduce suspend/resume routines for SH MTU2 clock event devices
such that if those devices belong to a PM domain, the generic PM
domains framework will be notified that the given domain may be
turned off (during system suspend) or that it has to be turned on
(during system resume).Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
Introduce suspend/resume routines for SH CMT clock event devices and
modify the suspend/resume routines for SH CMT clock sources such that
if those devices belong to a PM domain, the generic PM domains
framework will be notified that the given domain may be turned off
(during system suspend) or that it has to be turned on (during system
resume).Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm -
Introduce suspend/resume routines for SH TMU clock source and
clock event device such that if those devices belong to a PM domain,
the generic PM domains framework will be notified that the given
domain may be turned off (during system suspend) or that it has to
be turned on (during system resume).This change allows the A4R domain on SH7372 to be turned off during
system suspend (tested on the Mackerel board) if the TMU clock source
and/or clock event device is in use.Signed-off-by: Rafael J. Wysocki
Acked-by: Magnus Damm
22 Aug, 2012
1 commit
-
Signed-off-by: Jens Rottmann
Cc: Thomas Gleixner
Cc: John Stultz
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds
24 Jul, 2012
1 commit
-
Pull support for three new arm SoC types from Arnd Bergmann:
- The mvebu platform includes Marvell's Armada XP and Armada 370 chips,
made by the mvebu business unit inside of Marvell. Since the same
group also made the older but similar platforms we call "orion5x",
"kirkwood", "mv78xx0" and "dove", we plan to move all of them into
the mach-mvebu directory in the future.- socfpga is Altera's platform based on Cortex-A9 cores and a lot of
FPGA space. This is similar to the Xilinx zynq platform we already
support. The code is particularly clean, which is helped by the fact
that the hardware doesn't do much besides the parts that are expected
to get added in the FPGA.- The OMAP subarchitecture gains support for the latest generation, the
OMAP5 based on the new Cortex-A15 core. Support is rather
rudimentary for now, but will be extended in the future.* tag 'newsoc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (25 commits)
ARM: socfpga: initial support for Altera's SOCFPGA platform
arm: mvebu: generate DTBs for supported SoCs
ARM: mvebu: MPIC: read number of interrupts from control register
arm: mach-mvebu: add entry to MAINTAINERS
arm: mach-mvebu: add compilation/configuration change
arm: mach-mvebu: add defconfig
arm: mach-mvebu: add documentation for new device tree bindings
arm: mach-mvebu: add support for Armada 370 and Armada XP with DT
arm: mach-mvebu: add source files
arm: mach-mvebu: add header
clocksource: time-armada-370-xp: Marvell Armada 370/XP SoC timer driver
ARM: Kconfig update to support additional GPIOs in OMAP5
ARM: OMAP5: Add the build support
arm/dts: OMAP5: Add omap5 dts files
ARM: OMAP5: board-generic: Add device tree support
ARM: omap2+: board-generic: clean up the irq data from board file
ARM: OMAP5: Add SMP support
ARM: OMAP5: Add the WakeupGen IP updates
ARM: OMAP5: l3: Add l3 error handler support for omap5
ARM: OMAP5: gpmc: Update gpmc_init()
...Conflicts:
Documentation/devicetree/bindings/arm/omap/omap.txt
arch/arm/mach-omap2/Makefile
drivers/clocksource/Kconfig
drivers/clocksource/Makefile
12 Jul, 2012
1 commit
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Make a common device tree glue for clocksource/dw_apb_timer.
Move mach-picoxcell/time.c to be a generic device tree application
of the dw_apb_timer.Configure mach-picoxcell to use the dw_apb_timer_of device tree
implementation in drivers/clocksource.Signed-off-by: Pavel Machek
Signed-off-by: Dinh Nguyen
Acked-by: Jamie Iles
Acked-by: Thomas Gleixner
Signed-off-by: Arnd Bergmann
10 Jul, 2012
1 commit
-
Timer 0 is used as free-running clocksource, while timer 1 is used as
clock_event_device.Signed-off-by: Gregory CLEMENT
Signed-off-by: Thomas Petazzoni
Signed-off-by: Lior Amsalem
Reviewed-by: Thomas Gleixner
Tested-by: Yehuda Yitschak
Tested-by: Lior Amsalem
Acked-by: Andrew Lunn
CC: Thomas Gleixner
CC: John Stultz
11 Jun, 2012
4 commits
-
This switches over to the now exported clockevents_config() and
clockevents_config_and_register() helpers. This knocks off a
long-standing TMU TODO item.Signed-off-by: Paul Mundt
-
Signed-off-by: Paul Mundt
-
Signed-off-by: Paul Mundt
-
Signed-off-by: Paul Mundt
25 May, 2012
2 commits
-
Update the em-sti driver to support DT.
Signed-off-by: Magnus Damm
Cc: arnd@arndb.de
Cc: horms@verge.net.au
Cc: johnstul@us.ibm.com
Cc: rjw@sisk.pl
Cc: lethal@linux-sh.org
Cc: gregkh@linuxfoundation.org
Cc: olof@lixom.net
Link: http://lkml.kernel.org/r/20120509143950.27521.7949.sendpatchset@w520
Signed-off-by: Thomas Gleixner -
The STI hardware is based on a single 48-bit 32kHz
counter that together with two individual compare
registers can generate interrupts. There are no
timer operating modes selectable which means that
the timer can not clear on match.This driver is providing clocksource support for the
48-bit counter. Clockevents are also supported using
the same timer in oneshot mode.Signed-off-by: Magnus Damm
Cc: horms@verge.net.au
Cc: arnd@arndb.de
Cc: johnstul@us.ibm.com
Cc: rjw@sisk.pl
Cc: lethal@linux-sh.org
Cc: gregkh@linuxfoundation.org
Cc: olof@lixom.net
Link: http://lkml.kernel.org/r/20120525070344.23443.69756.sendpatchset@w520
Signed-off-by: Thomas Gleixner
02 May, 2012
1 commit
-
This platform has been obsoleted and was only available inside of
ST-Ericsson, no users of this code are left in the world. This
deletes the core U5500 support entirely in the same manner as the
obsoleted U8500 silicon was previously deleted.The cpu_is_u5500() macros that can read out the CPU ID is left
until the next kernel cycle, this makes it possible to merge
deletion of dependent drivers without breakage.This also has the upside of removing the mailbox driver which was
our only driver that was outside the drivers/* hiearchy, now the
machine directory only handles machines and nothing else.Cc: Srinidhi Kasagar
Cc: Rabin Vincent
Cc: Jonas Aberg
Cc: Per Forlin
Cc: Ulf Hansson
Signed-off-by: Linus Walleij
12 Apr, 2012
1 commit
-
This reverts commit b519508298e0292e1771eecf14aaf67755adc39d.
The reason for this revert is that making the frequency verification
preemptible and interruptible is not working reliably. Michaels
machine failed to use PM-timer with the message:PM-Timer running at invalid rate: 113% of normal - aborting.
That's not a surprise as the frequency verification does rely on
interrupts being disabled. With a async scheduled thread there is no
guarantee to achieve the same result. Also some driver might fiddle
with the CTC channel 2 during the verification period, which makes the
result even more random and unpredictable.This can be solved by using the same mechanism as we use in the
deferred TSC validation code, but that only will work if we verified a
working HPET _BEFORE_ trying to do the PM-Timer lazy validation.So for now reverting is the safe option.
Bisected-by: Michael Witten
Cc: Arjan van de Ven
Cc: Arjan van de Ven
Cc: John Stultz
Cc: Len Brown
LKML-Reference:
Signed-off-by: Thomas Gleixner
30 Mar, 2012
1 commit
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Pull more ARM updates from Russell King.
This got a fair number of conflicts with the split, but
also with some other sparse-irq and header file include cleanups. They
all looked pretty trivial, though.* 'for-linus' of git://git.linaro.org/people/rmk/linux-arm: (59 commits)
ARM: fix Kconfig warning for HAVE_BPF_JIT
ARM: 7361/1: provide XIP_VIRT_ADDR for no-MMU builds
ARM: 7349/1: integrator: convert to sparse irqs
ARM: 7259/3: net: JIT compiler for packet filters
ARM: 7334/1: add jump label support
ARM: 7333/2: jump label: detect %c support for ARM
ARM: 7338/1: add support for early console output via semihosting
ARM: use set_current_blocked() and block_sigmask()
ARM: exec: remove redundant set_fs(USER_DS)
ARM: 7332/1: extract out code patch function from kprobes
ARM: 7331/1: extract out insn generation code from ftrace
ARM: 7330/1: ftrace: use canonical Thumb-2 wide instruction format
ARM: 7351/1: ftrace: remove useless memory checks
ARM: 7316/1: kexec: EOI active and mask all interrupts in kexec crash path
ARM: Versatile Express: add NO_IOPORT
ARM: get rid of asm/irq.h in asm/prom.h
ARM: 7319/1: Print debug info for SIGBUS in user faults
ARM: 7318/1: gic: refactor irq_start assignment
ARM: 7317/1: irq: avoid NULL check in for_each_irq_desc loop
ARM: 7315/1: perf: add support for the Cortex-A7 PMU
...
28 Mar, 2012
1 commit
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Pull "ARM: device tree work" from Arnd Bergmann:
"Most of these patches convert code from using static platform data to
describing the hardware in the device tree. This is only the first
half of the changes for v3.4 because a lot of patches for this topic
came in the last week before the merge window.Signed-off-by: Arnd Bergmann "
Fix up trivial conflicts in arch/arm/mach-vexpress/{Kconfig,core.h}
* tag 'dt' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (86 commits)
Document: devicetree: add OF documents for arch-mmp
ARM: dts: append DTS file of pxa168
ARM: mmp: append OF support on pxa168
ARM: mmp: enable rtc clk in pxa168
i2c: pxa: add OF support
serial: pxa: add OF support
arm/dts: mt_ventoux: very basic support for TeeJet Mt.Ventoux board
ARM: OMAP2+: Remove extra ifdefs for board-generic
ARM: OMAP2+: Fix build error when only ARCH_OMAP2/3 or 4 is selected
ASoC: DT: Add digital microphone binding to PAZ00 board.
ARM: dt: Add ARM PMU to tegra*.dtsi
ARM: at91: at91sam9x5cm/dt: add leds support
ARM: at91: usb_a9g20/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add gpio-keys support
ARM: at91: at91sam9m10g45ek/dt: add leds support
ARM: at91: usb_a9g20/dt: add leds support
ARM: at91/pio: add new PIO3 features
ARM: at91: add sam9_smc.o to at91sam9x5 build
ARM: at91/tc/clocksource: Add 32 bit variant to Timer Counter
ARM: at91/tc: add device tree support to atmel_tclib
...