17 Feb, 2010
2 commits
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Both the store queue API and the PMB remapping take unsigned long for
their pgprot flags, which cuts off the extended protection bits. In the
case of the PMB this isn't really a problem since the cache attribute
bits that we care about are all in the lower 32-bits, but we do it just
to be safe. The store queue remapping on the other hand depends on the
extended prot bits for enabling userspace access to the mappings.Signed-off-by: Paul Mundt
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vmemmap and the vmsplit code amongst others need to be able to take page
faults much earlier than trap_init() time, so move this in to the early
CPU initialization. VBR setup for secondary CPUs is already handled
through start_secondary(), so we only need to do this for the boot CPU.Signed-off-by: Paul Mundt
16 Feb, 2010
1 commit
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Update the sh7724 INTC tables with force_enable support
to mask out pending unsupported SDHI interrupt sources.Without this patch the kernel locks up due to a pending
SDHI interrupt that the tmio_mmc driver cannot handle.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
09 Feb, 2010
4 commits
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Break out sh7723 div4 clocks for SIU and IRDA as
reparent / enable clocks. Similar to the SIU clock
patch for sh7722 by Guennadi.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
Merge the SDHI vectors in the sh7724 INTC table
and update the SDHI platform data for Ecovec24,
KFR2R09 and MS7724SE.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
Merge the SDHI vectors in the sh7723 INTC table
and update the SDHI platform data for AP325.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
Merge the SDHI vectors in the sh7722 INTC table
and update the SDHI platform data for Migo-R.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt
08 Feb, 2010
3 commits
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There's no need to setup the frame pointer again in
call_handle_tlbmiss. The frame pointer will already have been setup in
handle_interrupt.Signed-off-by: Matt Fleming
Signed-off-by: Paul Mundt -
In order to allow the DWARF unwinder to unwind through exceptions we
need to setup the frame pointer register (r14).Signed-off-by: Matt Fleming
Signed-off-by: Paul Mundt
02 Feb, 2010
3 commits
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This improves power management for the SIUA controller on sh7722. Similar
patches might be desired for other SIU-enabled SH platforms.Signed-off-by: Guennadi Liakhovetski
Acked-by: Magnus Damm
Signed-off-by: Paul Mundt -
Signed-off-by: Marek Skuczynski
Signed-off-by: Paul Mundt
26 Jan, 2010
1 commit
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The old ctrl in/out routines are non-portable and unsuitable for
cross-platform use. While drivers/sh has already been sanitized, there
is still quite a lot of code that is not. This converts the arch/sh/ bits
over, which permits us to flag the routines as deprecated whilst still
building with -Werror for the architecture code, and to ensure that
future users are not added.Signed-off-by: Paul Mundt
21 Jan, 2010
1 commit
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Now that cached_to_uncached works as advertized in 32-bit mode and we're
never going to be able to map < 16MB anyways, there's no need for the
special uncached section. Kill it off.Signed-off-by: Paul Mundt
20 Jan, 2010
1 commit
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Usually we can look to the CVR to work out whether we have an FPU or not.
Unfortunately not all parts comply with this, so just set the flag
manually for all SH-4 parts and clear it on the only SH-4 that doesn't
have one (SH4-501).Signed-off-by: Paul Mundt
19 Jan, 2010
5 commits
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Implement .set_rate() for all SH "div4 clocks," .enable(), .disable(), and
.set_parent() for those, that support them. This allows, among other uses,
reparenting of SIU clocks to the external source, and enabling and
disabling of the IrDA clock on sh7722.Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Paul Mundt -
This rewrites the SH7786 clock framework support completely. It's
reworked to provide all of the DIV4 and MSTP function clocks. This brings
it in line with the current clock framework code and lets us drop SH7786
from the list of CPUs that require legacy CPG handling.Signed-off-by: Paul Mundt
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The breakpoint handler was renamed on sh32, but sh64 was overlooked in
the conversion. Fix it up now.Signed-off-by: Paul Mundt
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This kills off the sh64-specific state restorer and switches over to
the generic one.Signed-off-by: Paul Mundt
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This updates the sh64 processor info with the sh32 changes in order to
tie in to the generic task_xstate management code.Signed-off-by: Paul Mundt
18 Jan, 2010
1 commit
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This tosses in a local_irq_enable()/disable() pair around the init_fpu()
callsite in the FPU state restore exception handler. Fixes up a slab BUG
triggered by making a slab cache allocation that can sleep whilst
irqs_disabled(). This follows the behaviour undertaken by the x86
implementation.Signed-off-by: Paul Mundt
15 Jan, 2010
1 commit
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Presently the secondary CPU entry point is only aimed at 29bit phys mode,
causing it to point to a stray virtual address in 32bit mode. Fix it up
after consulting with our shiny new __in_29bit_mode().Signed-off-by: Paul Mundt
13 Jan, 2010
4 commits
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Valid sizes include 256kB, not 258kB.
Signed-off-by: Paul Mundt
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The mass produced cuts use an updated PVR value, add them to the list.
Signed-off-by: Matt Fleming
Signed-off-by: Paul Mundt -
This follows the x86 xstate changes and implements a task_xstate slab
cache that is dynamically sized to match one of hard FP/soft FP/FPU-less.This also tidies up and consolidates some of the SH-2A/SH-4 FPU
fragmentation. Now fpu state restorers are commonly defined, with the
init_fpu()/fpu_init() mess reworked to follow the x86 convention.
The fpu_init() register initialization has been replaced by xstate setup
followed by writing out to hardware via the standard restore path.As init_fpu() now performs a slab allocation a secondary lighterweight
restorer is also introduced for the context switch.In the future the DSP state will be rolled in here, too.
More work remains for math emulation and the SH-5 FPU, which presently
uses its own special (UP-only) interfaces.Signed-off-by: Paul Mundt
05 Jan, 2010
2 commits
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Nothing is using these now, so kill them all off.
Signed-off-by: Paul Mundt
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This is the next big chunk of hw_breakpoint support. This decouples
the SH-4A support from the core and moves it out in to its own stub,
following many of the conventions established with the perf events
layering.In addition to extending SH-4A support to encapsulate the remainder
of the UBC channels, clock framework support for handling the UBC
interface clock is added as well, allowing for dynamic clock gating.This also fixes up a regression introduced by the SIGTRAP handling that
broke the ksym_tracer, to the extent that the current support works well
with all of the ksym_tracer/ptrace/kgdb. The kprobes singlestep code will
follow in turn.With this in place, the remaining UBC variants (SH-2A and SH-4) can now
be trivially plugged in.Signed-off-by: Paul Mundt
21 Dec, 2009
1 commit
17 Dec, 2009
2 commits
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Add dmaengine platform device to SH7785.
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Paul Mundt -
Add a dmaengine platform device to sh7724, fix DMA channel interrupt numbers.
Signed-off-by: Guennadi Liakhovetski
Signed-off-by: Nobuhiro Iwamatsu
Signed-off-by: Paul Mundt
15 Dec, 2009
8 commits
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After the recent FPU optimisation commit the signature of save_fpu()
changed. "regs" wasn't used in the implementation of save_fpu() anyway.Signed-off-by: Matt Fleming
Signed-off-by: Paul Mundt -
This patch breaks out the sh5 scif serial port platform
data from a shared platform device to one platform
device per port. Also, move the serial port to the list
of early platform devices.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh4a scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.All sh4a except SuperH Mobile processors are modified by
this patch.While at it, sh7757 gets early platform device support.
Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh4a scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.Only sh4a SuperH Mobile processors are modified by this
patch.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh4 scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.While at it, get rid of the R2D ifdef in the processor
code and adjust the defconfigs to use ttySC1.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh3 scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh2a scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt -
This patch breaks out the sh2 scif serial port platform
data from a shared platform device to one platform
device per port. Also, add serial ports to the list of
early platform devices.Signed-off-by: Magnus Damm
Signed-off-by: Paul Mundt