29 Mar, 2009
1 commit
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Conflicts:
sound/soc/pxa/pxa2xx-i2s.c
26 Mar, 2009
1 commit
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…linux-omap-2.6 into devel
25 Mar, 2009
1 commit
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Cc: drzeus-mmc@drzeus.cx
Acked-by: Greg Kroah-Hartman
Signed-off-by: Kay Sievers
19 Mar, 2009
1 commit
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Conflicts:
arch/arm/mach-omap2/clock.c
14 Mar, 2009
1 commit
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Conflicts:
arch/arm/mach-at91/gpio.c
13 Mar, 2009
4 commits
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Rename driver from imx-mmc to mxc-mmc to avoid conflicts with the
mx1 mmc driver.Signed-off-by: Sascha Hauer
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Signed-off-by: Sascha Hauer
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The s3cmci driver is calling s3c2410_dma_config with incorrect data for
the DCON register. The S3C2410_DCON_HWTRIG is implicit in the channel
configuration and the device selection of S3C2410_DCON_CH0_SDI is
incorrect as the DMA system may not select channel 0.Signed-off-by: Ben Dooks
Acked-by: Pierre Ossman
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
This adds __devinit and __devexit macros to the module probe and
remove functions in MMCI. Now includes the __devexit_p() thing too.Signed-off-by: Linus Walleij
Signed-off-by: Russell King
09 Mar, 2009
1 commit
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1. Driver code where pxa_request_dma() is called will most likely
reference DMA registers as well, and it is really unnecessary
to include pxa-regs.h just for this. Move the definitions into
and make relevant drivers include it instead of
.2. Introduce DMAC_REGS_VIRT as the virtual address base for these
DMA registers. This allows later processors to re-use the same
IP while registers may start at different I/O address.Signed-off-by: Eric Miao
08 Mar, 2009
1 commit
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Commit 0d3e0460f307e84904968aad6cff97bd688583d8
"MMC: CSD and CID timeout values" inadvertently broke
the timeout for the MMC command SEND_EXT_CSD.This patch puts it back again.
Depending on the characteristics of the controller,
this bug may prevent the use of MMC cards.Signed-off-by: Adrian Hunter
Signed-off-by: Pierre Ossman
03 Mar, 2009
2 commits
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As described here: http://lkml.org/lkml/2009/2/20/265
The CAFE chip is broken due to commit e809517f6fa5803a5a1cd5602.
Anton added a quirk here: http://lkml.org/lkml/2009/2/20/279 that fixes
CAFE's problem. This adds the quirk for CAFE.Signed-off-by: Andres Salomon
Signed-off-by: Pierre Ossman -
The Samsung SDHCI (and FSL eSDHC) controller block seems to fail
to generate an INT_DATA_END after the transfer has completed and
the bus busy state finished.Changes in e809517f6fa5803a5a1cd56026f0e2190fc13d5c to use the
new busy method are the cause of the behaviour change.Signed-off-by: Ben Dooks
Signed-off-by: Anton Vorontsov
Signed-off-by: Pierre Ossman
19 Feb, 2009
9 commits
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* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/drzeus/mmc:
omap_hsmmc: Change while(); loops with finite version
omap_hsmmc: recover from transfer failures
omap_hsmmc: only MMC1 allows HCTL.SDVS != 1.8V
omap_hsmmc: card detect irq bugfix
sdhci: fix led naming
mmc_test: fix basic read test
s3cmci: Fix hangup in do_pio_write()
Revert "sdhci: force high speed capability on some controllers"
MMC: fix bug - SDHC card capacity not correct -
The conversion of atmel-mci to dma_request_channel missed the
initialization of the channel dma_slave information. The filter_fn passed
to dma_request_channel is responsible for initializing the channel's
private data. This implementation has the additional benefit of enabling
a generic client-channel data passing mechanism.Reviewed-by: Atsushi Nemoto
Signed-off-by: Dan Williams
Acked-by: Haavard Skinnemoen
Signed-off-by: Andrew Morton
Signed-off-by: Linus Torvalds -
Replace the infinite 'while() ;' loops
with a finite loop version.Signed-off-by: Jean Pihet
Acked-by: Tony Lindgren
Signed-off-by: Pierre Ossman -
Timeouts during a command that has a data phase can result in the next
command issued after the command that failed not being processed, i.e. no
interrupt ever occurs to indicate the command has completed. This failure
can result in a deadlock.This patch resets the data state machine to clear the error in case of a
command timeout.Tested on OMAP3430 chip and intensive MMC/SD device removal while
transferring data.Signed-off-by: Andy Lowe
Signed-off-by: Jean Pihet
Signed-off-by: Adrian Hunter
Signed-off-by: Andrew Morton
Acked-by: Tony Lindgren
Signed-off-by: Pierre Ossman -
Based on a patch from Tony Lindgren ... after initialization,
never change HCTL.SDVS except for MMC1. The other controller
instances only support 1.8V in that field, although they can
suport other card/SDIO/eMMC/... voltages with level shifting
solutions such as external transceivers.MMC2 behavior sanity tested on Overo/WLAN, OMAP3430 SDP, and
custom hardware. MMC1 also sanity tested on those platforms
plus Beagle. This also fixes a bug preventing MMC2 (and also
presumably MMC3) from powering down when requested.Signed-off-by: David Brownell
Acked-by: Tony Lindgren
Signed-off-by: Pierre Ossman -
Work around lockdep issue when card detect IRQ handlers run in
thread context ... it forces IRQF_DISABLED, which prevents all
access to twl4030 card detect signals.Signed-off-by: David Brownell
Acked-by: Tony Lindgren
Signed-off-by: Pierre Ossman -
Fix the led device naming for the sdhci driver.
The led class documentation defines the led name to have the
form "devicename:colour:function" while not applicable sections
should be left blank.To comply with the documentation the led device name is changed
from "mmc*" to "mmc*::".Signed-off-by: Helmut Schaa
Signed-off-by: Pierre Ossman -
Due to a typo in the Basic Read test, it's currently identical to the
Basic Write test. Fix this.Signed-off-by: Rabin Vincent
Signed-off-by: Pierre Ossman -
This commit fixes the regression what was added by commit
088a78af978d0c8e339071a9b2bca1f4cb368f30 "s3cmci: Support transfers
which are not multiple of 32 bits."fifo_free() now returns amount of available space in FIFO buffer in
bytes. But do_pio_write() writes to FIFO 32-bit words. Condition for
return from cycle is (fifo_free() == 0), but when fifo has 1..3 bytes
of free space then this condition will never be true and system hangs.This patch changes condition in the while() to (fifo_free() > 3).
Signed-off-by: Yauhen Kharuzhy
Signed-off-by: Andrew Morton
Signed-off-by: Pierre Ossman
18 Feb, 2009
2 commits
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This reverts commit a4b76193774b463b922cab2f92450efb20d29ef0.
It turned out that the controller had problem running at the
higher speed, so go back to trusting the hardware capability
bits.Signed-off-by: Pierre Ossman
-
Signed-off-by: Yi Li
Signed-off-by: Bryan Wu
Signed-off-by: Pierre Ossman
09 Feb, 2009
3 commits
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... rather than the clock names themselves.
Signed-off-by: Russell King
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Eliminate the OMAP1 vs OMAP2 clock knowledge in the MMC driver.
Signed-off-by: Russell King
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Convert OMAP MMC driver to match clocks using the device ID and a
connection ID rather than a clock name. This allows us to eliminate
the OMAP1/OMAP2 differences for the function clock.Signed-off-by: Russell King
03 Feb, 2009
5 commits
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With the PXA270 MMC hardware, there seems to be an issue of
data corruption on writes where a 4KB data block is offset
by one byte.If we delay enabling the DMA for writes until after the CMD/RESP
has finished, the problem seems to be fixed.related to PXA270 Erratum #91
Tested-by: Vernon Sauder
Signed-off-by: Cliff Brake
Acked-by: Eric Miao
Signed-off-by: Pierre Ossman -
Signed-off-by: Cliff Brake
Acked-by: Eric Miao
Signed-off-by: Pierre Ossman -
If ricoh_mmc suspends before sdhci_pci, it will pull the card
out from under the controller, which could leave the system in
a very confused state.Using suspend_late/resume_early ensures that sdhci_pci suspends first
and resumes second.Signed-off-by: Philip Langdale
Signed-off-by: Pierre Ossman -
This patch adds support for the ST Microelectronics version of
the PL180 PrimeCell. They use designer ID 0x80 and have a few
alterations/bugfixes related to open drain and HW flow control.
They also add some SDIO registers, I am unsure if these are
in ST HW only or if this is things also added in later ARM
revisions, but they are included in the mmci.h file for
completeness.Signed-off-by: Linus Walleij
Signed-off-by: Pierre Ossman -
This patch adds a MX2/MX3 specific SDHC driver. The hardware is basically
the same as in the MX1, but unlike the MX1 controller the MX2
controller just works as expected. Since the MX1 driver has more
workarounds for bugs than anything else I had no success with supporting
MX1 and MX2 in a sane way in one driver.Signed-off-by: Sascha Hauer
Signed-off-by: Pierre Ossman
24 Jan, 2009
2 commits
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Add omap hsmmc controller for 2430 and 34xx.
Note that this controller has different registers compared to
the earlier omap MMC controller, so sharing code currently is
not possible.Various updates and fixes from linux-omap list have been
merged into this patch.Signed-off-by: Madhusudhan Chikkature
Acked-by: Pierre Ossman
Signed-off-by: Tony Lindgren
Signed-off-by: Russell King -
Since dma.h has been moved to arch/arm/mach-s3c2410/include/mach,
use the new include path.Signed-off-by: Ramax Lo
Acked-by: Ben Dooks
Signed-off-by: Russell King
10 Jan, 2009
1 commit
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* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/async_tx: (22 commits)
ioat: fix self test for multi-channel case
dmaengine: bump initcall level to arch_initcall
dmaengine: advertise all channels on a device to dma_filter_fn
dmaengine: use idr for registering dma device numbers
dmaengine: add a release for dma class devices and dependent infrastructure
ioat: do not perform removal actions at shutdown
iop-adma: enable module removal
iop-adma: kill debug BUG_ON
iop-adma: let devm do its job, don't duplicate free
dmaengine: kill enum dma_state_client
dmaengine: remove 'bigref' infrastructure
dmaengine: kill struct dma_client and supporting infrastructure
dmaengine: replace dma_async_client_register with dmaengine_get
atmel-mci: convert to dma_request_channel and down-level dma_slave
dmatest: convert to dma_request_channel
dmaengine: introduce dma_request_channel and private channels
net_dma: convert to dma_find_channel
dmaengine: provide a common 'issue_pending_all' implementation
dmaengine: centralize channel allocation, introduce dma_find_channel
dmaengine: up-level reference counting to the module level
...
07 Jan, 2009
5 commits
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DMA_NAK is now useless. We can just use a bool instead.
Reviewed-by: Andrew Morton
Signed-off-by: Dan Williams -
All users have been converted to either the general-purpose allocator,
dma_find_channel, or dma_request_channel.Reviewed-by: Andrew Morton
Signed-off-by: Dan Williams -
dma_request_channel provides an exclusive channel, so we no longer need to
pass slave data through dmaengine.Cc: Haavard Skinnemoen
Reviewed-by: Andrew Morton
Signed-off-by: Dan Williams -
Simply, if a client wants any dmaengine channel then prevent all dmaengine
modules from being removed. Once the clients are done re-enable module
removal.Why?, beyond reducing complication:
1/ Tracking reference counts per-transaction in an efficient manner, as
is currently done, requires a complicated scheme to avoid cache-line
bouncing effects.
2/ Per-transaction ref-counting gives the false impression that a
dma-driver can be gracefully removed ahead of its user (net, md, or
dma-slave)
3/ None of the in-tree dma-drivers talk to hot pluggable hardware, but
if such an engine were built one day we still would not need to notify
clients of remove events. The driver can simply return NULL to a
->prep() request, something that is much easier for a client to handle.Reviewed-by: Andrew Morton
Acked-by: Maciej Sosnowski
Signed-off-by: Dan Williams
