03 Nov, 2005

6 commits


02 Nov, 2005

17 commits

  • 3016/1 changed the map_desc structure to take a PFN instead of a
    physical address. Fixup Realview machine support for this change.

    Signed-off-by: Russell King

    Russell King
     
  • It seems that without the extra tlb flush, we may end up faulting
    during the early kernel initialisation because the TLB can't see
    the updated page tables.

    Signed-off-by: Russell King

    Russell King
     
  • Signed-off-by: Al Viro
    Signed-off-by: Linus Torvalds

    Al Viro
     
  • This section of code calls .audit_syscal_exit, but is inside CONFIG_AUDIT,
    so it will fail to build if CONFIG_AUDITSYSCALL is not defined.

    After discussion with David Woodhouse, change the ifdef to
    CONFIG_AUDITSYSCALL

    Signed-off-by: Horms
    Acked-by: David Woodhouse
    Signed-off-by: Andrew Morton
    Signed-off-by: Linus Torvalds

    Horms
     
  • Updated m68knommu defconfig. Part of changing the "Motorola" names
    to their new name "Freescale".

    Signed-off-by: Greg Ungerer
    Signed-off-by: Linus Torvalds

    Greg Ungerer
     
  • Linus Torvalds
     
  • I don't really understand why gcc gives the error it does, but without
    this patch, when building with CONFIG_HOTPLUG=n, I get errors like:

    CC arch/x86_64/pci/../../i386/pci/fixup.o
    arch/x86_64/pci/../../i386/pci/fixup.c: In function `pci_fixup_i450nx':
    arch/x86_64/pci/../../i386/pci/fixup.c:13: error: pci_fixup_i450nx causes a section type conflict

    The change is obviously correct: an array should be declared
    __devinitdata rather that __devinit.

    Signed-off-by: Roland Dreier
    Acked-by: Martin J. Bligh
    Signed-off-by: Linus Torvalds

    Roland Dreier
     
  • Patch from Deepak Saxena

    CONFIG_MACH_GTWX5715 hardcodes the machine type in head-xscale.S so we
    can no longer boot on any other machine types. The proper fix would be
    to remove the hardcoding, but that machine is an off-the-shelf system
    and most users won't have access to the bootloader. :(

    Signed-off-by: Deepak Saxena
    Signed-off-by: Russell King

    Deepak Saxena
     
  • Patch from Lennert Buytenhek

    This patch adds a microcode loader for the ixp2000 architecture.

    The ixp2000 is an xscale-based CPU with a number of additional small
    CPUs ('microengines') on die that can be programmed to do various
    things. Depending on the ixp2000 model, there are between 2 and 16
    microengines.

    This code provides an API that allows configuring the microengines,
    loading code into them, and starting and stopping them and reading
    out a number of status registers, and is used by the microengine
    network driver that was recently announced to netdev.

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: Deepak Saxena
    Signed-off-by: Russell King

    Lennert Buytenhek
     
  • Patch from Nicolas Pitre

    This patch provides a preemption safe implementation of copy_to_user
    and copy_from_user based on the copy template also used for memcpy.
    It is enabled unconditionally when CONFIG_PREEMPT=y. Otherwise if the
    configured architecture is not ARMv3 then it is enabled as well as it
    gives better performances at least on StrongARM and XScale cores. If
    ARMv3 is not too affected or if it doesn't matter too much then
    uaccess.S could be removed altogether.

    Signed-off-by: Nicolas Pitre
    Signed-off-by: Russell King

    Nicolas Pitre
     
  • Patch from Nicolas Pitre

    This patch provides a new implementation for optimized memory copy
    functions on ARM. It is made of two levels: a template that consists of
    the core copy code and separate files that define macros to be used with
    the core code depending on the type of copy needed. This allows for best
    performances while sharing the same core for implementing memcpy(),
    copy_from_user() and copy_to_user() for instance.

    Two reasons for this work:

    1) the current copy_to_user/copy_from_user implementation assumes no
    task switch will ever occur in the middle of each copied page making
    it completely unsafe with CONFIG_PREEMPT=y.

    2) current copy implementations are measurably suboptimal and optimizing
    different implementations separately is a pain and more opportunities
    for bugs.

    The reason for (1) is the fact that copy inside user pages are performed
    with the ldm instruction which has no mean for testing user protections
    and could possibly race with process preemption bypassing the COW mechanism
    for example. This is a longstanding issue that we said ought to be fixed
    for about two years now. The solution is to substitute those ldm insns
    with a series of ldrt or strt insns to enforce user memory protection.
    At least on StrongARM and XScale cores the ldm is not faster than the
    equivalent ldr/str insns with a warm i-cache so there is no measurable
    performance degradation with that change. The fact that the copy code is
    a template makes it pretty easy to reuse the same core code as for memcpy
    and benefit from the same performance optimizations.

    Now (2) is best demonstrated with actual throughput measurements.
    First, here is a summary of memcopy tests performed on a StrongARM core:

    PTR alignment buffer size kernel version this version
    ------------------------------------------------------------
    aligned 32 59.73 107.43
    unaligned 32 61.31 74.72
    aligned 100 132.47 136.15
    unaligned 100 103.84 123.76
    aligned 4096 130.67 130.80
    unaligned 4096 130.68 130.64
    aligned 1048576 68.03 68.18
    unaligned 1048576 68.03 68.18

    The buffer size is in bytes and the measured speed in MB/s. The copy
    was performed repeatedly with given buffer and throughput averaged over
    3 seconds.

    Here we can see that the current kernel version has a higher entry cost
    that shows up with small buffers. As buffer size grows both implementation
    converge to the same throughput.

    Now here's the exact same test performed on an XScale core (PXA255):

    PTR alignment buffer size kernel version this version
    ------------------------------------------------------------
    aligned 32 46.99 77.58
    unaligned 32 53.61 59.59
    aligned 100 107.19 136.59
    unaligned 100 83.61 97.58
    aligned 4096 129.13 129.98
    unaligned 4096 128.36 128.53
    aligned 1048576 53.76 59.41
    unaligned 1048576 33.67 56.96

    Again we can see the entry setup cost being higher for the current kernel
    before getting to the main copy loop. Then throughput results converge
    as long as the buffer remains in the cache. Then the 1MB case shows more
    differences probably due to better pld placement and/or less instruction
    interlocks in this proposed implementation.

    Disclaimer: The PXA system was running with slower clocks than the
    StrongARM system so trying to infer any conclusion by comparing those
    separate sets of results side by side would be completely inappropriate.

    So... What this patch does is to replace both memcpy and memmove with
    an implementation based on the provided copy code template. The memmove
    code is kept separate since it is used only if the memory areas involved
    do overlap in which case the code is a transposition of the template but
    with the copy occurring in the opposite direction (trying to fit that
    mode into the template turned it into a mess not worth it for memmove
    alone). And obviously both memcpy and memmove were tested with all kinds
    of pointer alignments and buffer sizes to exercise all code paths for
    correctness.

    The next patch will provide the now trivial replacement implementation
    copy_to_user and copy_from_user.

    Signed-off-by: Nicolas Pitre
    Signed-off-by: Russell King

    Nicolas Pitre
     
  • Patch from Nicolas Pitre

    Required for future enhancement patches.

    Signed-off-by: Nicolas Pitre
    Signed-off-by: Russell King

    Nicolas Pitre
     
  • Patch from David Brownell

    Lubbock updates:

    * Provide an address for the SMC91x chip that doesn't generate
    a boot-time warning (matching the EEPROM).

    * Update MMC support to (a) detect card insert/remove, and
    (b) report the readonly switch setting for SD cards.

    Previously, MMC/SD cards had to be present at boot time else they
    couldn't be detected.

    Signed-off-by: David Brownell
    Signed-off-by: Russell King

    David Brownell
     
  • Patch from Ben Dooks

    Platform data for the LCD/framebuffer driver for
    the RX3715 LCD panel.

    Signed-off-by: Ben Dooks
    Signed-off-by: Russell King

    Ben Dooks
     
  • Patch from Lennert Buytenhek

    Misc ixp2000 typo and whitespace fixes.

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: Deepak Saxena
    Signed-off-by: Russell King

    Lennert Buytenhek
     
  • Patch from Lennert Buytenhek

    Switch the users of ixp2000_reg_write that depend on writes being
    flushed out of the write buffer by the time that function returns
    over to ixp2000_reg_wrb.

    When using XCB=101, writes to the same functional unit are still
    guaranteed to complete in order, so we only need to protect against:
    - reordering of writes to different functional units
    - masking an interrupt and then reenabling the IRQ bit in CPSR

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: Deepak Saxena
    Signed-off-by: Russell King

    Lennert Buytenhek
     
  • Patch from Lennert Buytenhek

    The enp2611 version of the ixp2000 netdev driver needs to be able to
    access a number of on-board peripherals. ioremap() is not suitable
    for this, as that will cause XCB=000 mappings to be done, which will
    make the cpu susceptible to crashing on ixp2400 erratum #66. Properly
    aligned iotable mappings with MT_IXP2000_DEVICE will cause section
    mappings with XCB=101 to be done, which is safe.

    Signed-off-by: Lennert Buytenhek
    Signed-off-by: Deepak Saxena
    Signed-off-by: Russell King

    Lennert Buytenhek
     

01 Nov, 2005

5 commits


31 Oct, 2005

12 commits