27 Feb, 2013
1 commit
-
Pull slave-dmaengine updates from Vinod Koul:
"This is fairly big pull by my standards as I had missed last merge
window. So we have the support for device tree for slave-dmaengine,
large updates to dw_dmac driver from Andy for reusing on different
architectures. Along with this we have fixes on bunch of the drivers"Fix up trivial conflicts, usually due to #include line movement next to
each other.* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (111 commits)
Revert "ARM: SPEAr13xx: Pass DW DMAC platform data from DT"
ARM: dts: pl330: Add #dma-cells for generic dma binding support
DMA: PL330: Register the DMA controller with the generic DMA helpers
DMA: PL330: Add xlate function
DMA: PL330: Add new pl330 filter for DT case.
dma: tegra20-apb-dma: remove unnecessary assignment
edma: do not waste memory for dma_mask
dma: coh901318: set residue only if dma is in progress
dma: coh901318: avoid unbalanced locking
dmaengine.h: remove redundant else keyword
dma: of-dma: protect list write operation by spin_lock
dmaengine: ste_dma40: do not remove descriptors for cyclic transfers
dma: of-dma.c: fix memory leakage
dw_dmac: apply default dma_mask if needed
dmaengine: ioat - fix spare sparse complain
dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.c
ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDING
dw_dmac: add support for Lynxpoint DMA controllers
dw_dmac: return proper residue value
dw_dmac: fill individual length of descriptor
...
07 Jan, 2013
1 commit
-
Use the module_pci_driver() macro to make the code simpler
by eliminating module_init and module_exit calls.dpatch engine is used to auto generate this patch.
(https://github.com/weiyj/dpatch)Signed-off-by: Wei Yongjun
Signed-off-by: Vinod Koul
04 Jan, 2013
1 commit
-
CONFIG_HOTPLUG is going away as an option. As a result, the __dev*
markings need to be removed.This change removes the use of __devinit, __devexit_p, __devinitconst,
and __devexit from these drivers.Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.Cc: Bill Pemberton
Cc: Viresh Kumar
Cc: Dan Williams
Cc: Vinod Koul
Cc: Barry Song
Cc: Jeff Kirsher
Cc: Alexander Duyck
Cc: Russell King
Cc: Linus Walleij
Cc: Jassi Brar
Cc: Dave Jiang
Cc: Bill Pemberton
Cc: Guennadi Liakhovetski
Signed-off-by: Greg Kroah-Hartman
29 Nov, 2012
2 commits
-
CONFIG_HOTPLUG is going away as an option so __devinit is no longer
needed.Signed-off-by: Bill Pemberton
Cc: Li Yang
Cc: Zhang Wei
Cc: Barry Song
Acked-by: Viresh Kumar
Signed-off-by: Greg Kroah-Hartman -
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.Signed-off-by: Bill Pemberton
Acked-by: Barry Song
Acked-by: Viresh Kumar
Acked-by: Russell King
Signed-off-by: Greg Kroah-Hartman
11 May, 2012
1 commit
-
dmaengine drivers should always use sg_dma_address instead of sg_phys to get the
addresses for the transfer from a sg element.To quote Russel King:
sg_phys(sg) of course has nothing to do with DMA addresses. It's the
physical address _to the CPU_ of the memory associated with the scatterlist
entry. That may, or may not have the same value for the DMA engine,
particularly if IOMMUs are involved.And if these drivers are used on ARM, they must be fixed, sooner rather
than later. There's patches in the works which will mean we will end up
with IOMMU support in the DMA mapping later, which means everything I've
said above will become reality.The patch has been generated using the following coccinelle patch:
@@
struct scatterlist *sg;
@@
-sg_phys(sg)
+sg_dma_address(sg)Signed-off-by: Lars-Peter Clausen
Acked-by: Linus Walleij
Signed-off-by: Vinod Koul
21 Mar, 2012
1 commit
-
Add context parameter to device_prep_slave_sg() and device_prep_dma_cyclic()
interfaces to allow passing client/target specific information associated
with the data transfer.
Modify all affected DMA engine drivers.Signed-off-by: Alexandre Bounine
Acked-by: Linus Walleij
Acked-by: Felipe Balbi
Signed-off-by: Vinod Koul
13 Mar, 2012
5 commits
-
Provide a common function to initialize a channels cookie values.
Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul -
Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status. We also provide
a separate helper to set the residue for cookies which are still in
progress.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul -
Everyone deals with assigning DMA cookies in the same way (it's part of
the API so they should be), so lets consolidate the common code into a
helper function to avoid this duplication.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul -
Add a local private header file to contain definitions and declarations
which should only be used by DMA engine drivers.We also fix linux/dmaengine.h to use LINUX_DMAENGINE_H to guard against
multiple inclusion.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul -
Every DMA engine implementation declares a last completed dma cookie
in their private dma channel structures. This is pointless, and
forces driver specific code. Move this out into the common dma_chan
structure.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul
17 Nov, 2011
3 commits
-
resolved conflicts:
drivers/media/video/mx3_camera.c -
ML7831 is companion chip for Intel Atom E6xx series.
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
On October 1 in 2011,
OKI SEMICONDUCTOR Co., Ltd. changed the company name in to LAPIS Semiconductor
Co., Ltd.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
27 Oct, 2011
1 commit
-
fixup usage of dma direction by introducing dma_transfer_direction,
this patch moves dma/drivers/* to use new enumCc: Jassi Brar
Cc: Russell King
Cc: Viresh Kumar
Cc: Linus Walleij
Cc: Nicolas Ferre
Cc: Mika Westerberg
Cc: H Hartley Sweeten
Cc: Li Yang
Cc: Zhang Wei
Cc: Sascha Hauer
Cc: Guennadi Liakhovetski
Cc: Shawn Guo
Cc: Yong Wang
Cc: Tomoya MORINAGA
Cc: Boojin Kim
Cc: Barry Song
Acked-by: Mika Westerberg
Acked-by: Linus Walleij
Acked-by: Viresh Kumar
Acked-by: Nicolas Ferre
Signed-off-by: Vinod Koul
12 Oct, 2011
2 commits
-
nr_channels is defined in "struct pch_dma".
and struct pch_dma_chan is defined in "struct pch_dma".
So, "sizeof(struct pch_dma_chan) * nr_channels" is unnecessary.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Currently, executing suspend/hibernation,
memory access violation occurs.In pch_dma_save_regs() called by suspend(),
you can see the following code.static void pch_dma_save_regs(struct pch_dma *pd)
{
snip...
list_for_each_entry_safe(chan, _c, &pd->dma.channels, device_node) {
pd_chan = to_pd_chan(chan);pd->ch_regs[i].dev_addr = channel_readl(pd_chan, DEV_ADDR);
pd->ch_regs[i].mem_addr = channel_readl(pd_chan, MEM_ADDR);
pd->ch_regs[i].size = channel_readl(pd_chan, SIZE);
pd->ch_regs[i].next = channel_readl(pd_chan, NEXT);i++;
}
}Max loop count is 12 defined at pci_table.
So, this caused memory access violation.This patch fixes the issue
- Modify array size (MAX_CHAN_NR)Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
20 Sep, 2011
1 commit
-
dma_async_device_register will re-init chan_id and chancnt,
so whatever chan_id and chancnt are set in drivers, they will
be re-written by dma_async_device_register.Cc: Nicolas Ferre
Cc: Viresh Kumar
Cc: Vinod Koul
Cc: Piotr Ziecik
Cc: Yong Wang
Cc: Jaswinder Singh
Cc: Pelagicore AB
Signed-off-by: Barry Song
Acked-by: Viresh Kumar
Signed-off-by: Vinod Koul
25 Jul, 2011
1 commit
-
Currently, Mode-Control register is accessed by read-modify-write.
According to DMA hardware specifications datasheet, prohibits this method.
Because this register resets to 0 by DMA HW after DMA transfer completes.
Thus, current read-modify-write processing can cause unexpected behavior.The datasheet says in case of writing Mode-Control register, set the value for only target channel, the others must set '11b'.
e.g. Set DMA0=01b DMA11=10b
CTL0=33333331h
CTL2=00002333hNOTE:
CTL0 includes DMA0~7 Mode-Control register.
CTL2 includes DMA8~11 Mode-Control register.This patch modifies the issue.
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
14 Jul, 2011
1 commit
-
Fix for the following INFO message
=================================
[ INFO: inconsistent lock state ]
2.6.39+ #89
---------------------------------
inconsistent {HARDIRQ-ON-W} -> {IN-HARDIRQ-W} usage.
rs232/822 [HC1[1]:SC0[0]:HE0:SE1] takes:
(&(&pd_chan->lock)->rlock){?.....}, at: [] pdc_desc_get+0x16/0xab
{HARDIRQ-ON-W} state was registered at:
[] mark_irqflags+0xbd/0x11a
[] __lock_acquire+0x501/0x6bb
[] lock_acquire+0x63/0x7b
[] _raw_spin_lock_bh+0x43/0x51
[] pd_alloc_chan_resources+0x92/0x11e
[] dma_chan_get+0x9b/0x107
[] __dma_request_channel+0x61/0xdc
[] pch_request_dma+0x61/0x19e
[] pch_uart_startup+0x16a/0x1a2
[] uart_startup+0x87/0x147
[] uart_open+0x117/0x13e
[] tty_open+0x23c/0x34c
[] chrdev_open+0x140/0x15f
[] __dentry_open.clone.14+0x14a/0x22b
[] nameidata_to_filp+0x36/0x40
[] do_last+0x513/0x635
[] path_openat+0x9c/0x2aa
[] do_filp_open+0x27/0x69
[] do_sys_open+0xfd/0x184
[] sys_open+0x24/0x2a
[] sysenter_do_call+0x12/0x32
irq event stamp: 2522
hardirqs last enabled at (2521): [] _raw_spin_unlock_irqrestore+0x36/0x52
hardirqs last disabled at (2522): [] common_interrupt+0x27/0x34
softirqs last enabled at (2354): [] __do_softirq+0x10a/0x11a
softirqs last disabled at (2299): [] do_softirq+0x57/0xa4other info that might help us debug this:
2 locks held by rs232/822:
#0: (&tty->atomic_write_lock){+.+.+.}, at: [] tty_write_lock+0x14/0x3c
#1: (&port_lock_key){-.....}, at: [] pch_uart_interrupt+0x17/0x1e9stack backtrace:
Pid: 822, comm: rs232 Not tainted 2.6.39+ #89
Call Trace:
[] ? printk+0x19/0x1b
[] print_usage_bug+0x184/0x18f
[] ? print_irq_inversion_bug+0x10e/0x10e
[] mark_lock_irq+0xa5/0x1f6
[] mark_lock+0x208/0x2d7
[] mark_irqflags+0x55/0x11a
[] __lock_acquire+0x501/0x6bb
[] ? dump_trace+0x92/0xb6
[] lock_acquire+0x63/0x7b
[] ? pdc_desc_get+0x16/0xab
[] _raw_spin_lock+0x3e/0x4c
[] ? pdc_desc_get+0x16/0xab
[] pdc_desc_get+0x16/0xab
[] ? __lock_acquire+0x653/0x6bb
[] pd_prep_slave_sg+0x7c/0x1cb
[] ? nommu_map_sg+0x6e/0x81
[] dma_handle_tx+0x2cf/0x344
[] ? pch_uart_interrupt+0x17/0x1e9
[] pch_uart_interrupt+0x160/0x1e9
[] handle_irq_event_percpu+0x25/0x127
[] handle_irq_event+0x2c/0x43
[] ? handle_fasteoi_irq+0x84/0x84
[] handle_edge_irq+0xac/0xce
[] ? do_IRQ+0x38/0x9d
[] ? common_interrupt+0x2e/0x34
[] ? __lock_acquire+0x1f6/0x6bb
[] ? _raw_spin_unlock_irqrestore+0x38/0x52
[] ? uart_start+0x2d/0x32
[] ? uart_flush_chars+0x8/0xa
[] ? n_tty_write+0x12c/0x1c6
[] ? try_to_wake_up+0x251/0x251
[] ? tty_write+0x169/0x1dc
[] ? n_tty_ioctl+0xb7/0xb7
[] ? vfs_write+0x91/0x10d
[] ? tty_write_lock+0x3c/0x3c
[] ? sys_write+0x3e/0x63
[] ? sysenter_do_call+0x12/0x32Signed-off-by: Alexander Stein
Tested-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
01 Jun, 2011
1 commit
-
ISSUE: In case PCH_DMA with I2S communications with ch8~ch11, sometimes I2S data
is not send correctly.
CAUSE: The following patch I submitted before was not enough modification for
supporting DMA ch8~ch11. The modification for status register of ch8~11 was not
enough.pch_dma: Support I2S for ML7213 IOH
author Tomoya MORINAGA
Mon, 9 May 2011 07:09:38 +0000 (16:09 +0900)
committer Vinod Koul
Mon, 9 May 2011 11:42:23 +0000 (16:42 +0530)
commit 194f5f2706c7472f9c6bb2d17fa788993606581f
tree c9d4903ea02b18939a4f390956a48be1a3734517
parent 60092d0bde4c8741198da4a69b693d3709385bf1This patch fixes the issue.
We can confirm PCH_DMA with I2S communications with ch8~ch11 works well.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
09 May, 2011
6 commits
-
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Support new device OKI SEMICONDUCTOR ML7223 IOH(Input/Output Hub).
The ML7223 IOH is for MP(Media Phone) use.
The ML7223 is companion chip for Intel Atom E6xx series.
The ML7223 is completely compatible for Intel EG20T PCH.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Support I2S device for ML7213 IOH
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Currently, Direct-Start mode(*) is enabled.
Our IOH's devices must not use this mode.
This causes unexpected behavior.
This patch deletes Direct-Start setting.
(*) This mode is used in order for CPU to generate the DMA request.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Fix checkpatch warnings.
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
Currently, even-channel number is set as tx direction and odd is set as rx.
However, though video-in uses ch6, the direction is not tx but rx.
This patch sets video-in's DMA direction correctly.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
06 Apr, 2011
1 commit
-
In the function pdc_desc_get(), var 'i' is not
initialized before use. This patch fixes it.Signed-off-by: Liu Yuan
Signed-off-by: Vinod Koul
07 Mar, 2011
1 commit
-
When CONFIG_PM=n, we get the following warning:
drivers/dma/pch_dma.c:741: warning: ‘pch_dma_suspend’ defined but not used
drivers/dma/pch_dma.c:755: warning: ‘pch_dma_resume’ defined but not usedTo fix it, wrap pch_dma_{suspend,resume} and
pch_dma_{save,restore}_regs functions with CONFIG_PM.Signed-off-by: Rakib Mullick
Signed-off-by: Vinod Koul
26 Feb, 2011
2 commits
-
set the number of array correctly.
Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul -
fix the following kernel error
------------[ cut here ]------------
WARNING: at kernel/softirq.c:159 _local_bh_enable_ip.clone.5+0x35/0x71()
Hardware name: To be filled by O.E.M.
Modules linked in: pch_uart pch_dma fuse mga drm cpufreq_ondemand acpi_cpufreq mperf ip6t_REJECT nf_conntrack_ipv6 nf_defrag_ipv6 ip6table_filter ip6_tables ipv6 uinput snd_hda_codec_realtek snd_hda_intel snd_hda_codec matroxfb_base snd_hwdep 8250_pnp snd_seq snd_seq_device matroxfb_DAC1064 snd_pcm joydev 8250 matroxfb_accel snd_timer matroxfb_Ti3026 ppdev pegasus parport_pc snd parport matroxfb_g450 g450_pll serial_core video output matroxfb_misc soundcore snd_page_alloc serio_raw pcspkr ext4 jbd2 crc16 sdhci_pci sdhci mmc_core floppy [last unloaded: scsi_wait_scan]
Pid: 0, comm: swapper Not tainted 2.6.37.upstream_check+ #8
Call Trace:
[] warn_slowpath_common+0x65/0x7a
[] ? _local_bh_enable_ip.clone.5+0x35/0x71
[] warn_slowpath_null+0xf/0x13
[] _local_bh_enable_ip.clone.5+0x35/0x71
[] local_bh_enable_ip+0x8/0xa
[] _raw_spin_unlock_bh+0x10/0x12
[] pd_prep_slave_sg+0xba/0x200 [pch_dma]
[] pch_uart_interrupt+0x44d/0x6aa [pch_uart]
[] handle_IRQ_event+0x1d/0x9e
[] handle_fasteoi_irq+0x90/0xc7
[] ? handle_fasteoi_irq+0x0/0xc7
[] ? do_IRQ+0x3e/0x89
[] ? common_interrupt+0x29/0x30
[] ? sys_getpriority+0x12d/0x1a2
[] ? arch_local_irq_enable+0x5/0xb
[] ? acpi_idle_enter_bm+0x22a/0x261
[] ? cpuidle_idle_call+0x70/0xa1
[] ? cpu_idle+0x49/0x6a
[] ? rest_init+0x58/0x5a
[] ? start_kernel+0x2d0/0x2d5
[] ? i386_start_kernel+0xce/0xd5Signed-off-by: Tomoya MORINAGA
Signed-off-by: Vinod Koul
15 Jan, 2011
1 commit
-
Support new device OKI SEMICONDUCTOR's ML7213 IOH(Input/Output Hub) which is for
IVI(In-Vehicle Infotainment) use.
The ML7213 is companion chip for Intel Atom E6xx series.
The ML7213 is completely compatible for Intel EG20T PCH.Signed-off-by: Tomoya MORINAGA
Signed-off-by: Dan Williams
08 Dec, 2010
1 commit
-
Currently, in case of using scatter/gather mode, head of data is not sent to
destination. The cause is second descriptor address is set to NEXT.
The NEXT must have head of descriptor address.
This patch sets head of descriptor address to the NEXT.
Acked-by: Yong Wang
Signed-off-by: Tomoya MORINAGA
[dan.j.williams@intel.com: fixed up usage of virt_to_phys()]
Signed-off-by: Dan Williams
27 Oct, 2010
1 commit
-
NULL-terminating pci_device_id in pch_dma.c and scx200_acb.c
for appying MODULE_DEVICE_TABLE (to publish modalias-es).Signed-off-by: Dzianis Kahanovich
Signed-off-by: Rusty Russell
05 Aug, 2010
2 commits
-
Use {read|write}l instead of __raw_{read|write}l since PCH DMA
controller is PCI device.Signed-off-by: Yong Wang
Signed-off-by: Dan Williams -
Topcliff PCH is the platform controller hub that is going to
be used in Intel's upcoming general embedded platforms. This
adds the driver for Topcliff PCH DMA controller. The DMA
channels are strictly for device to host or host to device
transfers and cannot be used for generic memcpy.Signed-off-by: Yong Wang
[kill GFP_ATOMIC, kill __raw_{read|write}l, locking fixlet]
Signed-off-by: Dan Williams
