12 Jun, 2008

2 commits


08 May, 2008

1 commit

  • Move the scattered checks for PAT support to a single function. Its
    moved to addon_cpuid_features.c as this file is shared between 32 and
    64 bit.

    Remove the manipulation of the PAT feature bit and just disable PAT in
    the PAT layer, based on the PAT bit provided by the CPU and the
    current CPU version/model white list.

    Change the boot CPU check so it works on Voyager somewhere in the
    future as well :) Also panic, when a secondary has PAT disabled but
    the primary one has alrady switched to PAT. We have no way to undo
    that.

    The white list is kept for now to ensure that we can rely on known to
    work CPU types and concentrate on the software induced problems
    instead of fighthing CPU erratas and subtle wreckage caused by not yet
    verified CPUs. Once the PAT code has stabilized enough, we can remove
    the white list and open the can of worms.

    Signed-off-by: Thomas Gleixner
    Signed-off-by: Ingo Molnar

    Thomas Gleixner
     

17 Apr, 2008

1 commit

  • Sets up pat_init() infrastructure.

    PAT MSR has following setting.
    PAT
    |PCD
    ||PWT
    |||
    000 WB _PAGE_CACHE_WB
    001 WC _PAGE_CACHE_WC
    010 UC- _PAGE_CACHE_UC_MINUS
    011 UC _PAGE_CACHE_UC

    We are effectively changing WT from boot time setting to WC.
    UC_MINUS is used to provide backward compatibility to existing /dev/mem
    users(X).

    reserve_memtype and free_memtype are new interfaces for maintaining alias-free
    mapping. It is currently implemented in a simple way with a linked list and
    not optimized. reserve and free tracks the effective memory type, as a result
    of PAT and MTRR setting rather than what is actually requested in PAT.

    pat_init piggy backs on mtrr_init as the rules for setting both pat and mtrr
    are same.

    Signed-off-by: Venkatesh Pallipadi
    Signed-off-by: Suresh Siddha
    Signed-off-by: Ingo Molnar

    venkatesh.pallipadi@intel.com