10 May, 2013
1 commit
-
Pull slave-dmaengine updates from Vinod Koul:
"This time we have dmatest improvements from Andy along with dw_dmac
fixes. He has also done support for acpi for dmanegine.Also we have bunch of fixes going in DT support for dmanegine for
various folks. Then Haswell and other ioat changes from Dave and
SUDMAC support from Shimoda."* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (53 commits)
dma: tegra: implement suspend/resume callbacks
dma:of: Use a mutex to protect the of_dma_list
dma: of: Fix of_node reference leak
dmaengine: sirf: move driver init from module_init to subsys_initcall
sudmac: add support for SUDMAC
dma: sh: add Kconfig
at_hdmac: move to generic DMA binding
ioatdma: ioat3_alloc_sed can be static
ioatdma: Adding write back descriptor error status support for ioatdma 3.3
ioatdma: S1200 platforms ioatdma channel 2 and 3 falsely advertise RAID cap
ioatdma: Adding support for 16 src PQ ops and super extended descriptors
ioatdma: Removing hw bug workaround for CB3.x .2 and earlier
dw_dmac: add ACPI support
dmaengine: call acpi_dma_request_slave_channel as well
dma: acpi-dma: introduce ACPI DMA helpers
dma: of: Remove unnecessary list_empty check
DMA: OF: Check properties value before running be32_to_cpup() on it
DMA: of: Constant names
ioatdma: skip silicon bug workaround for pq_align for cb3.3
ioatdma: Removing PQ val disable for cb3.3
...
16 Apr, 2013
5 commits
-
Reported-by: Fengguang Wu
Signed-off-by: Fengguang Wu
Acked-by: Dave Jiang
Signed-off-by: Vinod Koul -
v3.3 provides support for write back descriptor error status. This allows
reporting of errors in a descriptor field. In supporting this, certain
errors such as P/Q validation errors no longer halts the channel. The DMA
engine can continue to execute until the end of the chain and allow software
to report the "errors" up the stack. We are also going to mask those error
interrupts and handle them when the "chain" has completed at the end.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
This workaround checks for channel 2&3 and remove RAID cap.
Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
v3.3 introduced 16 sources PQ operations. This also introduced super extended
descriptors to support the 16 srcs operations. This patch adds support for
the 16 sources ops and in turn adds the super extended descriptors for those
ops.5 SED pools are created depending on the descriptor sizes. An SED can be a 64
bytes sized descriptor or larger and must be physically contiguous. A kmem
cache pool is created for allocating the software descriptor that manages the
hardware descriptor. The super extended descriptor will take place of extended
descriptor under certain operations and be "attached" to the op descriptor
during operation. This is a new feature for ioatdma v3.3.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
CB3.2 and earlier hardware has silicon bugs that are no longer needed with
the new hardware. We don't have to use a NULL op to signal interrupt for
RAID ops any longer. This code make sure the legacy workarounds only happen on
legacy hardware.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul
15 Apr, 2013
9 commits
-
The alignment workaround is only necessary for cb3.2 or earlier platforms.
Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
The PQ Val ops work on the newer hardware so we should actually provide support
for it and remove the disabling bits.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
Make it so only 3.2 and earlier platform need the PCI config register
clearings since this implementation does not have the registers.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
The Intel Atom S1200 family ioatdma changed the channel reset behavior.
It does a reset similar to PCI FLR by resetting all the MSIX
registers. We have to re-init msix interrupts because of this. This
workaround is only specific to this platform and is not expected to carry
over to the later generations.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
The channel status register for v3.3 is now 64bit. Use readq if available
on v3.3 platforms.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
These should be good for the IOAT DMA devices on the Intel Atom S1269,
S1279, and S1289 platforms. We are also adding IOAT v3.3 definition for
the new DMA engine.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
Adding Haswell PCI device IDs for ioatdma and simplify the detection of
certain Xeon CPUs that has alignment bugs so that modifications can be
changed at a single place going forward.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
Looks like only the RAID channels are allowed to have irq coalescing support
in the existing code. Fixing that. The ioat3 cleanup code can handle memcpy
ops anywaysSigned-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul -
Making OP field a hex instead of integer to make it more readable. Also add
the dump out of the NEXT field.Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul
23 Mar, 2013
1 commit
-
This patch is meant to be a follow-up for a patch originally submitted under
the title "ioat: Do not enable DCA if tag map is invalid". It was brought to
my attention that the preferred approach for BIOS workarounds is to set the
taint flag for TAINT_FIRMWARE_WORKAROUND for systems that require BIOS
workarounds.This change makes it so that the DCA workarounds for broken BIOSes will now
use WARN_TAINT_ONCE(1, TAINT_FIRMWARE_WORKAROUND, ...) instead of just
printing a message via dev_err.Signed-off-by: Alexander Duyck
Signed-off-by: David S. Miller
27 Feb, 2013
1 commit
-
Pull slave-dmaengine updates from Vinod Koul:
"This is fairly big pull by my standards as I had missed last merge
window. So we have the support for device tree for slave-dmaengine,
large updates to dw_dmac driver from Andy for reusing on different
architectures. Along with this we have fixes on bunch of the drivers"Fix up trivial conflicts, usually due to #include line movement next to
each other.* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (111 commits)
Revert "ARM: SPEAr13xx: Pass DW DMAC platform data from DT"
ARM: dts: pl330: Add #dma-cells for generic dma binding support
DMA: PL330: Register the DMA controller with the generic DMA helpers
DMA: PL330: Add xlate function
DMA: PL330: Add new pl330 filter for DT case.
dma: tegra20-apb-dma: remove unnecessary assignment
edma: do not waste memory for dma_mask
dma: coh901318: set residue only if dma is in progress
dma: coh901318: avoid unbalanced locking
dmaengine.h: remove redundant else keyword
dma: of-dma: protect list write operation by spin_lock
dmaengine: ste_dma40: do not remove descriptors for cyclic transfers
dma: of-dma.c: fix memory leakage
dw_dmac: apply default dma_mask if needed
dmaengine: ioat - fix spare sparse complain
dmaengine: move drivers/of/dma.c -> drivers/dma/of-dma.c
ioatdma: fix race between updating ioat->head and IOAT_COMPLETION_PENDING
dw_dmac: add support for Lynxpoint DMA controllers
dw_dmac: return proper residue value
dw_dmac: fill individual length of descriptor
...
14 Feb, 2013
1 commit
-
>> drivers/dma/ioat/dma_v3.c:371:6: sparse: symbol 'ioat3_timer_event' was not declared.
Reported-by: Fengguang Wu
Signed-off-by: Fengguang Wu
Acked-by: Dave Jiang
Signed-off-by: Vinod Koul
13 Feb, 2013
1 commit
-
There is a race that can hit during __cleanup() when the ioat->head pointer is
incremented during descriptor submission. The __cleanup() can clear the
PENDING flag when it does not see any active descriptors. This causes new
submitted descriptors to be ignored because the COMPLETION_PENDING flag is
cleared. This was introduced when code was adapted from ioatdma v1 to ioatdma
v2. For v2 and v3, IOAT_COMPLETION_PENDING flag will be abandoned and a new
flag IOAT_CHAN_ACTIVE will be utilized. This flag will also be protected under
the prep_lock when being modified in order to avoid the race.Signed-off-by: Dave Jiang
Reviewed-by: Dan Williams
Signed-off-by: Vinod Koul
25 Jan, 2013
1 commit
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Pull slave-dmaengine fixes from Vinod Koul:
"A few fixes on slave dmanengine. There are trivial fixes in imx-dma,
tegra-dma & ioat driver"* 'fixes' of git://git.infradead.org/users/vkoul/slave-dma:
dma: tegra: implement flags parameters for cyclic transfer
dmaengine: imx-dma: Disable use of hw_chain to fix sg_dma transfers.
ioat: Fix DMA memory sync direction correct flag
08 Jan, 2013
4 commits
-
The existing code set a value in the PCI_CHANERRMSK_INT register
for a workaround to address a pre-silicon bug on the Intel 5520 IO hub that
has been fixed when the hardware was released. There is no need for this
code.Signed-off-by: Dave Jiang
Signed-off-by: Dan Williams -
The PCI IDs for IvyBridge IOAT DMA needs to go into a header file since
dma_v3.c looks them up for certain hardware workarounds. Need to add to the
alignment workaround for IOAT 3.2 since it wasn't fixed in IVB.Signed-off-by: Dave Jiang
Signed-off-by: Dan Williams -
Make ioat_xor_val_self_test() do DMA unmapping itself and fix handling
of failure cases.Cc: Dan Williams
Cc: Tomasz Figa
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
Signed-off-by: Dan Williams -
Make ioat_dma_self_test() do DMA unmapping itself and fix handling
of failure cases.Cc: Dan Williams
Cc: Tomasz Figa
Signed-off-by: Bartlomiej Zolnierkiewicz
Signed-off-by: Kyungmin Park
Signed-off-by: Dan Williams
07 Jan, 2013
1 commit
-
ioat does DMA memory sync with DMA_TO_DEVICE direction on a buffer allocated
for DMA_FROM_DEVICE dma, resulting in the following warning from dma debug.
Fixed the dma_sync_single_for_device() call to use the correct direction.[ 226.288947] WARNING: at lib/dma-debug.c:990 check_sync+0x132/0x550()
[ 226.288948] Hardware name: ProLiant DL380p Gen8
[ 226.288951] ioatdma 0000:00:04.0: DMA-API: device driver syncs DMA memory with different direction [device address=0x00000000ffff7000] [size=4096 bytes] [mapped with DMA_FROM_DEVICE] [synced with DMA_TO_DEVICE]
[ 226.288953] Modules linked in: iTCO_wdt(+) sb_edac(+) ioatdma(+) microcode serio_raw pcspkr edac_core hpwdt(+) iTCO_vendor_support hpilo(+) dca acpi_power_meter ata_generic pata_acpi sd_mod crc_t10dif ata_piix libata hpsa tg3 netxen_nic(+) sunrpc dm_mirror dm_region_hash dm_log dm_mod
[ 226.288967] Pid: 1055, comm: work_for_cpu Tainted: G W 3.3.0-0.20.el7.x86_64 #1
[ 226.288968] Call Trace:
[ 226.288974] [] warn_slowpath_common+0x7f/0xc0
[ 226.288977] [] warn_slowpath_fmt+0x46/0x50
[ 226.288980] [] check_sync+0x132/0x550
[ 226.288983] [] debug_dma_sync_single_for_device+0x3f/0x50
[ 226.288988] [] ? wait_for_common+0x72/0x180
[ 226.288995] [] ioat_xor_val_self_test+0x3e5/0x832 [ioatdma]
[ 226.288999] [] ? kfree+0x259/0x270
[ 226.289004] [] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[ 226.289008] [] ioat_probe+0x2f8/0x348 [ioatdma]
[ 226.289011] [] ioat3_dma_probe+0x1d5/0x2aa [ioatdma]
[ 226.289016] [] ioat_pci_probe+0x139/0x17c [ioatdma]
[ 226.289020] [] local_pci_probe+0x5c/0xd0
[ 226.289023] [] ? destroy_work_on_stack+0x20/0x20
[ 226.289025] [] do_work_for_cpu+0x18/0x30
[ 226.289029] [] kthread+0xb7/0xc0
[ 226.289033] [] kernel_thread_helper+0x4/0x10
[ 226.289036] [] ? _raw_spin_unlock_irq+0x30/0x50
[ 226.289038] [] ? retint_restore_args+0x13/0x13
[ 226.289041] [] ? kthread_worker_fn+0x1a0/0x1a0
[ 226.289044] [] ? gs_change+0x13/0x13
[ 226.289045] ---[ end trace e1618afc7a606089 ]---
[ 226.289047] Mapped at:
[ 226.289048] [] debug_dma_map_page+0x87/0x150
[ 226.289050] [] dma_map_page.constprop.18+0x70/0xb34 [ioatdma]
[ 226.289054] [] ioat_xor_val_self_test+0x1d8/0x832 [ioatdma]
[ 226.289058] [] ioat3_dma_self_test+0x1b/0x20 [ioatdma]
[ 226.289061] [] ioat_probe+0x2f8/0x348 [ioatdma]Signed-off-by: Shuah Khan
CC:
Signed-off-by: Vinod Koul
04 Jan, 2013
1 commit
-
CONFIG_HOTPLUG is going away as an option. As a result, the __dev*
markings need to be removed.This change removes the use of __devinit, __devexit_p, __devinitconst,
and __devexit from these drivers.Based on patches originally written by Bill Pemberton, but redone by me
in order to handle some of the coding style issues better, by hand.Cc: Bill Pemberton
Cc: Viresh Kumar
Cc: Dan Williams
Cc: Vinod Koul
Cc: Barry Song
Cc: Jeff Kirsher
Cc: Alexander Duyck
Cc: Russell King
Cc: Linus Walleij
Cc: Jassi Brar
Cc: Dave Jiang
Cc: Bill Pemberton
Cc: Guennadi Liakhovetski
Signed-off-by: Greg Kroah-Hartman
13 Dec, 2012
1 commit
-
Pull networking changes from David Miller:
1) Allow to dump, monitor, and change the bridge multicast database
using netlink. From Cong Wang.2) RFC 5961 TCP blind data injection attack mitigation, from Eric
Dumazet.3) Networking user namespace support from Eric W. Biederman.
4) tuntap/virtio-net multiqueue support by Jason Wang.
5) Support for checksum offload of encapsulated packets (basically,
tunneled traffic can still be checksummed by HW). From Joseph
Gasparakis.6) Allow BPF filter access to VLAN tags, from Eric Dumazet and
Daniel Borkmann.7) Bridge port parameters over netlink and BPDU blocking support
from Stephen Hemminger.8) Improve data access patterns during inet socket demux by rearranging
socket layout, from Eric Dumazet.9) TIPC protocol updates and cleanups from Ying Xue, Paul Gortmaker, and
Jon Maloy.10) Update TCP socket hash sizing to be more in line with current day
realities. The existing heurstics were choosen a decade ago.
From Eric Dumazet.11) Fix races, queue bloat, and excessive wakeups in ATM and
associated drivers, from Krzysztof Mazur and David Woodhouse.12) Support DOVE (Distributed Overlay Virtual Ethernet) extensions
in VXLAN driver, from David Stevens.13) Add "oops_only" mode to netconsole, from Amerigo Wang.
14) Support set and query of VEB/VEPA bridge mode via PF_BRIDGE, also
allow DCB netlink to work on namespaces other than the initial
namespace. From John Fastabend.15) Support PTP in the Tigon3 driver, from Matt Carlson.
16) tun/vhost zero copy fixes and improvements, plus turn it on
by default, from Michael S. Tsirkin.17) Support per-association statistics in SCTP, from Michele
Baldessari.And many, many, driver updates, cleanups, and improvements. Too
numerous to mention individually.* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1722 commits)
net/mlx4_en: Add support for destination MAC in steering rules
net/mlx4_en: Use generic etherdevice.h functions.
net: ethtool: Add destination MAC address to flow steering API
bridge: add support of adding and deleting mdb entries
bridge: notify mdb changes via netlink
ndisc: Unexport ndisc_{build,send}_skb().
uapi: add missing netconf.h to export list
pkt_sched: avoid requeues if possible
solos-pci: fix double-free of TX skb in DMA mode
bnx2: Fix accidental reversions.
bna: Driver Version Updated to 3.1.2.1
bna: Firmware update
bna: Add RX State
bna: Rx Page Based Allocation
bna: TX Intr Coalescing Fix
bna: Tx and Rx Optimizations
bna: Code Cleanup and Enhancements
ath9k: check pdata variable before dereferencing it
ath5k: RX timestamp is reported at end of frame
ath9k_htc: RX timestamp is reported at end of frame
...
29 Nov, 2012
1 commit
-
CONFIG_HOTPLUG is going away as an option so __devexit_p is no longer
needed.Signed-off-by: Bill Pemberton
Acked-by: Barry Song
Acked-by: Viresh Kumar
Acked-by: Russell King
Signed-off-by: Greg Kroah-Hartman
15 Nov, 2012
1 commit
-
I have encountered several systems that have an invalid tag map. This
invalid tag map results in only two tags being generated 0x1F which is
usually applied to the first core in a Hyper-threaded pair and 0x00 which
is applied to the second core in a Hyper-threaded pair. The net result of
all this is that DCA causes significant cache thrash because the 0x1F tag
will send traffic to the second socket, which the 0x00 tag will not DCA tag
the frame resulting in no benefit.For now the best solution from the driver's perspective is to just disable
DCA if the tag map is invalid. The correct solution for this would be to
have the BIOS on affected systems updated so that the correct tags are
generated for a given APIC ID.Signed-off-by: Alexander Duyck
Tested-by: Stephen Ko
Signed-off-by: Jeff Kirsher
10 Oct, 2012
1 commit
-
Pull slave-dmaengine updates from Vinod Koul:
"This time we have Andy updates on dw_dmac which is attempting to make
this IP block available as PCI and platform device though not fully
complete this time.We also have TI EDMA moving the dma driver to use dmaengine APIs, also
have a new driver for mmp-tdma, along with bunch of small updates.Now for your excitement the merge is little unusual here, while
merging the auto merge on linux-next picks wrong choice for pl330
(drivers/dma/pl330.c) and this causes build failure. The correct
resolution is in linux-next. (DMA: PL330: Fix build error) I didn't
back merge your tree this time as you are better than me so no point
in doing that for me :)"Fixed the pl330 conflict as in linux-next, along with trivial header
file conflicts due to changed includes.* 'next' of git://git.infradead.org/users/vkoul/slave-dma: (29 commits)
dma: tegra: fix interrupt name issue with apb dma.
dw_dmac: fix a regression in dwc_prep_dma_memcpy
dw_dmac: introduce software emulation of LLP transfers
dw_dmac: autoconfigure data_width or get it via platform data
dw_dmac: autoconfigure block_size or use platform data
dw_dmac: get number of channels from hardware if possible
dw_dmac: fill optional encoded parameters in register structure
dw_dmac: mark dwc_dump_chan_regs as inline
DMA: PL330: return ENOMEM instead of 0 from pl330_alloc_chan_resources
DMA: PL330: Remove redundant runtime_suspend/resume functions
DMA: PL330: Remove controller clock enable/disable
dmaengine: use kmem_cache_zalloc instead of kmem_cache_alloc/memset
DMA: PL330: Set the capability of pdm0 and pdm1 as DMA_PRIVATE
ARM: EXYNOS: Set the capability of pdm0 and pdm1 as DMA_PRIVATE
dma: tegra: use list_move_tail instead of list_del/list_add_tail
mxs/dma: Enlarge the CCW descriptor area to 4 pages
dw_dmac: utilize slave_id to pass request line
dmaengine: mmp_tdma: add dt support
dmaengine: mmp-pdma support
spi: davici - make davinci select edma
...
18 Sep, 2012
1 commit
-
Using kmem_cache_zalloc() instead of kmem_cache_alloc() and memset().
spatch with a semantic match is used to found this problem.
(http://coccinelle.lip6.fr/)Signed-off-by: Wei Yongjun
Signed-off-by: Vinod Koul
01 Sep, 2012
1 commit
-
IOAT has a redefine of PCI Vendor, PCI Subvendor, etc for
PCI_VENDOR_ID_INTEL but they are never used. Remove them.Signed-off-by: Jon Mason
Cc: Dan Williams
Signed-off-by: Jiri Kosina
31 Aug, 2012
1 commit
-
Signed-off-by: Dave Jiang
Acked-by: Dan Williams
Signed-off-by: Vinod Koul
11 Apr, 2012
1 commit
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Pull dmaengine fixes from Dan Williams:
1/ regression fix for Xen as it now trips over a broken assumption
about the dma address size on 32-bit builds2/ new quirk for netdma to ignore dma channels that cannot meet
netdma alignment requirements3/ fixes for two long standing issues in ioatdma (ring size overflow)
and iop-adma (potential stack corruption)* tag 'dmaengine-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine:
netdma: adding alignment check for NETDMA ops
ioatdma: DMA copy alignment needed to address IOAT DMA silicon errata
ioat: ring size variables need to be 32bit to avoid overflow
iop-adma: Corrected array overflow in RAID6 Xscale(R) test.
ioat: fix size of 'completion' for Xen
06 Apr, 2012
2 commits
-
Silicon errata where when RAID and legacy descriptors are mixed, the legacy
(memcpy and friends) operation must have alignment of 64 bytes to avoid
hanging. This effects Intel Xeon C55xx, C35xx, E5-2600.Signed-off-by: Dave Jiang
Signed-off-by: Dan Williams -
The alloc order can be up to 16 and 1 << 16 will over flow the 16bit
integer. Change the appropriate variables to 16bit to avoid overflow.Reported-by: Jim Harris
Signed-off-by: Dave Jiang
Signed-off-by: Dan Williams
24 Mar, 2012
1 commit
-
Starting with v3.2 Jonathan reports that Xen crashes loading the ioatdma
driver. A debug run shows:ioatdma 0000:00:16.4: desc[0]: (0x300cc7000->0x300cc7040) cookie: 0 flags: 0x2 ctl: 0x29 (op: 0 int_en: 1 compl: 1)
...
ioatdma 0000:00:16.4: ioat_get_current_completion: phys_complete: 0xcc7000...which shows that in this environment GFP_KERNEL memory may be backed
by a 64-bit dma address. This breaks the driver's assumption that an
unsigned long should be able to contain the physical address for
descriptor memory. Switch to dma_addr_t which beyond being the right
size, is the true type for the data i.e. an io-virtual address
inidicating the engine's last processed descriptor.[stable: 3.2+]
Cc:
Reported-by: Jonathan Nieder
Reported-by: William Dauchy
Tested-by: William Dauchy
Tested-by: Dave Jiang
Signed-off-by: Dan Williams
13 Mar, 2012
3 commits
-
Fixed trivial issues in drivers:
drivers/dma/imx-sdma.c
drivers/dma/intel_mid_dma.c
drivers/dma/ioat/dma_v3.c
drivers/dma/iop-adma.c
drivers/dma/sirf-dma.c
drivers/dma/timb_dma.cSigned-off-by: Vinod Koul
-
Ensure all DMA engine drivers initialize their cookies in the same way,
so that they all behave in a similar fashion. This means their first
issued cookie will be 2 rather than 1, and will increment to INT_MAX
before returning 1 and starting over.In connection with this, Dan Williams said:
> Russell King wrote:
> > Secondly, some DMA engine drivers initialize the dma_chan cookie to 0,
> > others to 1. Is there a reason for this, or are these all buggy?
>
> I know that ioat and iop-adma expect 0 to mean "I have cleaned up this
> descriptor and it is idle", and would break if zero was an in-flight
> cookie value. The reserved usage of zero is an driver internal
> concern, but I have no problem formalizing it as a reserved value.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul -
Now that we have the completed cookie in the dma_chan structure, we
can consolidate the tx_status functions by providing a function to set
the txstate structure and returning the DMA status. We also provide
a separate helper to set the residue for cookies which are still in
progress.Signed-off-by: Russell King
Tested-by: Linus Walleij
Reviewed-by: Linus Walleij
Acked-by: Jassi Brar
[imx-sdma.c & mxs-dma.c]
Tested-by: Shawn Guo
Signed-off-by: Vinod Koul
