11 Jul, 2012
1 commit
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Implement the attribute for the Tegra IOMMU drivers.
Signed-off-by: Hiroshi DOYU
Signed-off-by: Joerg Roedel
11 May, 2012
1 commit
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DT passes the exact GART register ranges without any overlapping with
MC register ranges. GART register offset needs to be adjusted by one
passed by DT correctly.Signed-off-by: Hiroshi DOYU
Acked-by: Stephen Warren
Signed-off-by: Joerg Roedel
16 Apr, 2012
2 commits
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This commit adds device tree support for the GART hardware available on
NVIDIA Tegra 20 SoCs.Signed-off-by: Thierry Reding
Acked-by: Stephen Warren
Signed-off-by: Joerg Roedel -
Pass the correct gart device pointer.
Reviewed-by: Vandana Salve
Tested-by: Vandana Salve
Reviewed-by: Hiroshi Doyu
Reviewed-by: Bharat Nihalani
Signed-off-by: Hiroshi DOYU
Signed-off-by: Joerg Roedel
13 Mar, 2012
1 commit
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This must have been messed up while merging, the intention was
clearly to unlock there.Signed-off-by: Lucas Stach
Signed-off-by: Joerg Roedel
26 Jan, 2012
1 commit
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Tegra 20 IOMMU H/W, GART (Graphics Address Relocation Table). This
patch implements struct iommu_ops for GART for the upper IOMMU API.This H/W module supports only single virtual address space(domain),
and manages a single level 1-to-1 mapping H/W translation page table.[With small fixes by Joerg Roedel]
Signed-off-by: Hiroshi DOYU
Signed-off-by: Joerg Roedel