08 Jun, 2013
1 commit
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Add a new error signature for Family 15h, models 30h-3fh. Patch has been
tested on Fam15h using mce_amd_inj facility and has been verified to
work correctly.Signed-off-by: Aravind Gopalakrishnan
[ cleanup commit message and error string ]
Signed-off-by: Borislav Petkov
23 Jan, 2013
3 commits
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Initially, those strings describing different parts of an MCE message
were shared with amd64_edac and were therefore exported to modules.
However, all except pp_msgs are used only in one place right now so hide
them and make them static.No functionality change.
Reported-by: Fengguang Wu
Signed-off-by: Borislav Petkov -
Add MCE decoding logic for AMD Family 16h processors.
Boris:
- drop unneeded uu_msgs export
- exit early in cat_mc1_mce and save us an indentation levelSigned-off-by: Jacob Shin
Signed-off-by: Borislav Petkov -
Currently only AMD Family 15h processors have special handling for MC2
errors. Since upcoming Family 16h will also need unique handling, let's
make MC2 handling part of amd_decoder_ops.Signed-off-by: Jacob Shin
Signed-off-by: Borislav Petkov
28 Nov, 2012
4 commits
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Dump error status after decoding the error which describes the error
disposition.Signed-off-by: Borislav Petkov
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Instead of starting with the error details, report the decoded, readable
error type first.Signed-off-by: Borislav Petkov
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It is very useful to have the family/model/stepping with the reported
error so dump it. This saves us asking the bug reporter about it.Signed-off-by: Borislav Petkov
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Having the functional unit names in each bank decode is only misleading
as this code supports multiple families and there's no guarantee the
mapping between FUs and MCE banks will stay the same.And also, knowing the functional unit name doesn't help much since you
end up looking at the respective BKDG anyway.So drop all FU references and use the MC bank numbers instead.
Signed-off-by: Borislav Petkov
04 Apr, 2012
1 commit
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MCA details seldom change inbetween the models of a family so don't
be too conservative and enable decoding on everything starting from
K8 onwards. Minor adjustments can come in later but most importantly,
we have some decoding infrastructure in place for upcoming models by
default.Signed-off-by: Borislav Petkov
19 Mar, 2012
6 commits
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... so that checkpatch can chill out.
Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann -
... and remove superfluous ErrorCodeExt check.
Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann -
Correct their formulation, replace per-family functions with a single,
unified lookup table.Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann -
Sync with latest BKDG error types.
Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann -
This MC1 error signature is called differently now, fix it.
Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann -
Use "System Read Data Error" as a more general name for MC0 bus errors
on F15h and update some error definitions.Signed-off-by: Borislav Petkov
Reviewed-by: Andreas Herrmann
14 Dec, 2011
1 commit
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No functionality change, this is done so that in a follow-on patch all
queued-up MCEs can be decoded after registering on the chain.Signed-off-by: Borislav Petkov
06 Oct, 2011
4 commits
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Drop third nbcfg argument which is old remains and not required anymore.
No functionality change.
Signed-off-by: Borislav Petkov
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MCE decoding code is reporting the core which encountered the error
unconditionally now so drop this piece. Besides, it reported the
coreid in the local processor package which is not that valuable as a
datapoint.Signed-off-by: Borislav Petkov
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The MCi_STATUS bank has a AddrV bit which, when set, denotes that the
corresponding MCi_ADDR MSR contains a valid address belonging to the
MCE currently being reported. Dump it since it is definitely relevant
information.Signed-off-by: Borislav Petkov
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Currently, correctable ECCs go through mcelog and do not print the scary
MCE banner. In that case, however, reporting the core where the CECC
happened is important information so dump it along with the decoded
string albeit at risk of having a minor redundancy.Signed-off-by: Borislav Petkov
17 Mar, 2011
2 commits
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Add the PCI device ids required for driver registration. Remove
pvt->ctl_name and use the family descriptor directly, instead. Then,
bump driver version and fixup its format. Finally, enable DRAM ECC
decoding on F15h.Signed-off-by: Borislav Petkov
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Remove reporting of errors with UC bit set - this is done by the MCE
decoding code anyway and this driver deals with DRAM ECC errors only. UC
(NB uncorrectable error) doesn't necessarily mean it is a DRAM error.
Remove unused macros while at it.Signed-off-by: Borislav Petkov
07 Jan, 2011
13 commits
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Minor formatting fixup since the information which core was associated
with the MCE is not always valid.Signed-off-by: Borislav Petkov
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Building for X86_32 produces shift count warnings, so use BIT_64() to
eliminate the warnings.drivers/edac/mce_amd.c:778: warning: left shift count >= width of type
drivers/edac/mce_amd.c:778: warning: left shift count >= width of typeSigned-off-by: Randy Dunlap
Cc: Doug Thompson
Cc: bluesmoke-devel@lists.sourceforge.net
Signed-off-by: Borislav Petkov -
Now that everything is inplace, enable MCE decoding on F15h. Make
initcall routine a bit more readable.Signed-off-by: Borislav Petkov
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Shorten up MCi_STATUS flags and add BD's new deferred and poison types.
Also, simplify formatting.Signed-off-by: Borislav Petkov
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Make macro names shorter thus making code shorter and more clear.
Signed-off-by: Borislav Petkov
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Add decoder for FP MCEs.
Signed-off-by: Borislav Petkov
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Integrate the single FIROB signature into an expanded table along with
the new BD MCE types.Signed-off-by: Borislav Petkov
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by (almost) reusing the F10h one since the signatures are the same.
Signed-off-by: Borislav Petkov
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F15h BD doesn't generate LS MCEs so warn about it.
Signed-off-by: Borislav Petkov
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MCE bank 2 is redefined from a BU to a CU (Combined Unit) bank on F15h.
Add a decoder function for CU MCEs.Signed-off-by: Borislav Petkov
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Add support for decoding F15h IC MCEs.
Signed-off-by: Borislav Petkov
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Add a decoder for F15h DC MCEs to support the new types of DC MCEs
introduced by the BD microarchitecture.Signed-off-by: Borislav Petkov
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F15h enlarges the extended error code of an MCE to a 5-bit field
(MCi_STATUS[20:16]). Add a mask variable which default 0xf is overridden
on F15h.Signed-off-by: Borislav Petkov
21 Oct, 2010
5 commits
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Fix
drivers/edac/mce_amd.c:262: warning: left shift count >= width of type
on 32-bit builds.
Reported-by: Randy Dunlap
Signed-off-by: Borislav Petkov -
Turn on MCE decoding on F12h.
Signed-off-by: Borislav Petkov
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F12h is completely covered by the generic path.
Signed-off-by: Borislav Petkov
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... which is the same as for K8 and F10h.
Signed-off-by: Borislav Petkov
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F12h DC MCE signatures are a subset of F10h's so reuse them.
Signed-off-by: Borislav Petkov