25 Jun, 2013
1 commit
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Drivers that want to get the trigger edge/level type flags for a given
interrupt have to call irq_get_irq_data(irq) to get the struct
irq_data and then irqd_get_trigger_type(irq_data) to obtain the IRQ
flags.This is not only error prone but also unnecessary exposes the struct
irq_data to callers.It's better to have an irq_get_trigger_type() function to obtain the
edge/level flags for an IRQ.Signed-off-by: Javier Martinez Canillas
Acked-by: Grant Likely
Cc: Linus Walleij
Cc: Samuel Ortiz
Cc: Jason Cooper
Cc: Andrew Lunn
Cc: Russell King
Cc: Ralf Baechle
Cc: Benjamin Herrenschmidt
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-mips@linux-mips.org
Link: http://lkml.kernel.org/r/1371228049-27080-2-git-send-email-javier.martinez@collabora.co.uk
Signed-off-by: Thomas Gleixner
29 May, 2013
6 commits
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Some controllers have irqs that aren't wired up and must never be used.
For the generic chip attached to an irq_domain this provides a mask that
can be used to block out particular irqs so that they never get mapped.Signed-off-by: Grant Likely
Link: http://lkml.kernel.org/r/1369793454-19197-2-git-send-email-grant.likely@linaro.org
Signed-off-by: Thomas Gleixner -
Provide infrastructure for irq chip implementations which work on
linear irq domains.- Interface to allocate multiple generic chips which are associated to
the irq domain.- Interface to get the generic chip pointer for a particular hardware
interrupt in the domain.- irq domain mapping function to install the chip for a particular
interrupt.Note: This lacks a removal function for now.
[ Sebastian Hesselbarth: Mask cache and pointer math fixups ]
Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.450634298@linutronix.de
Signed-off-by: Thomas Gleixner -
Some chips have weird bit mask access patterns instead of the linear
you expect. Allow them to calculate the cached mask themself.Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.302898834@linutronix.de
Signed-off-by: Thomas Gleixner -
Cache the per irq bit mask instead of recalculating it over and over.
Signed-off-by: Thomas Gleixner
Cc: Thomas Petazzoni
Cc: Andrew Lunn
Cc: Russell King - ARM Linux
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: Jean-Francois Moine
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Jason Gunthorpe
Cc: Gregory Clement
Cc: Gerlando Falauto
Cc: Rob Landley
Acked-by: Grant Likely
Cc: Maxime Ripard
Cc: Ezequiel Garcia
Cc: linux-arm-kernel@lists.infradead.org
Cc: Sebastian Hesselbarth
Link: http://lkml.kernel.org/r/20130506142539.227119865@linutronix.de
Signed-off-by: Thomas Gleixner -
There are cases where all irq_chip_type instances have separate mask
registers, making a shared mask register cache unsuitable for the
purpose.Introduce a new flag IRQ_GC_MASK_CACHE_PER_TYPE. If set, point the per
chip mask pointer to the per chip private mask cache instead.[ tglx: Simplified code, renamed flag and massaged changelog ]
Signed-off-by: Gerlando Falauto
Cc: Andrew Lunn
Cc: Joey Oravec
Cc: Lennert Buytenhek
Cc: Russell King - ARM Linux
Cc: Jason Gunthorpe
Cc: Holger Brunck
Cc: Ezequiel Garcia
Acked-by: Grant Likely
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Ben Dooks
Cc: Gregory Clement
Cc: Simon Guinot
Cc: linux-arm-kernel@lists.infradead.org
Cc: Thomas Petazzoni
Cc: Jean-Francois Moine
Cc: Nicolas Pitre
Cc: Rob Landley
Cc: Maxime Ripard
Link: http://lkml.kernel.org/r/20130506142539.152569748@linutronix.de
Signed-off-by: Thomas Gleixner -
Today the same interrupt mask cache (stored within struct irq_chip_generic)
is shared between all the irq_chip_type instances. As there are instances
where each irq_chip_type uses a distinct mask register (as it is the case
for Orion SoCs), sharing a single mask cache may be incorrect.
So add a distinct pointer for each irq_chip_type, which for now
points to the original mask register within irq_chip_generic.
So no functional changes here.[ tglx: Minor cosmetic tweaks ]
Reported-by: Joey Oravec
Signed-off-by: Simon Guinot
Signed-off-by: Holger Brunck
Signed-off-by: Gerlando Falauto
Cc: Andrew Lunn
Cc: Lennert Buytenhek
Cc: Russell King - ARM Linux
Cc: Jason Gunthorpe
Cc: Holger Brunck
Cc: Ezequiel Garcia
Acked-by: Grant Likely
Cc: Sebastian Hesselbarth
Cc: Jason Cooper
Cc: Arnd Bergmann
Cc: devicetree-discuss@lists.ozlabs.org
Cc: Rob Herring
Cc: Ben Dooks
Cc: Gregory Clement
Cc: Simon Guinot
Cc: linux-arm-kernel@lists.infradead.org
Cc: Thomas Petazzoni
Cc: Jean-Francois Moine
Cc: Nicolas Pitre
Cc: Rob Landley
Cc: Maxime Ripard
Link: http://lkml.kernel.org/r/20130506142539.082226607@linutronix.de
Signed-off-by: Thomas Gleixner
28 Jan, 2013
1 commit
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Use seperate routines to setup MSI IRQs for both
irq_remapping_enabled cases.Signed-off-by: Joerg Roedel
Acked-by: Sebastian Andrzej Siewior
Reviewed-by: Konrad Rzeszutek Wilk
25 Jan, 2013
1 commit
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The MSI specification has several constraints in comparison with
MSI-X, most notable of them is the inability to configure MSIs
independently. As a result, it is impossible to dispatch
interrupts from different queues to different CPUs. This is
largely devalues the support of multiple MSIs in SMP systems.Also, a necessity to allocate a contiguous block of vector
numbers for devices capable of multiple MSIs might cause a
considerable pressure on x86 interrupt vector allocator and
could lead to fragmentation of the interrupt vectors space.This patch overcomes both drawbacks in presense of IRQ remapping
and lets devices take advantage of multiple queues and per-IRQ
affinity assignments.Signed-off-by: Alexander Gordeev
Cc: Bjorn Helgaas
Cc: Suresh Siddha
Cc: Yinghai Lu
Cc: Matthew Wilcox
Cc: Jeff Garzik
Cc: Linus Torvalds
Cc: Andrew Morton
Cc: Peter Zijlstra
Cc: Thomas Gleixner
Link: http://lkml.kernel.org/r/c8bd86ff56b5fc118257436768aaa04489ac0a4c.1353324359.git.agordeev@redhat.com
Signed-off-by: Ingo Molnar
14 Dec, 2012
1 commit
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Pull s390 update from Martin Schwidefsky:
"Add support to generate code for the latest machine zEC12, MOD and XOR
instruction support for the BPF jit compiler, the dasd safe offline
feature and the big one: the s390 architecture gets PCI support!!
Right before the world ends on the 21st ;-)"* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/s390/linux: (41 commits)
s390/qdio: rename the misleading PCI flag of qdio devices
s390/pci: remove obsolete email addresses
s390/pci: speed up __iowrite64_copy by using pci store block insn
s390/pci: enable NEED_DMA_MAP_STATE
s390/pci: no msleep in potential IRQ context
s390/pci: fix potential NULL pointer dereference in dma_free_seg_table()
s390/pci: use kmem_cache_zalloc instead of kmem_cache_alloc/memset
s390/bpf,jit: add support for XOR instruction
s390/bpf,jit: add support MOD instruction
s390/cio: fix pgid reserved check
vga: compile fix, disable vga for s390
s390/pci: add PCI Kconfig options
s390/pci: s390 specific PCI sysfs attributes
s390/pci: PCI hotplug support via SCLP
s390/pci: CHSC PCI support for error and availability events
s390/pci: DMA support
s390/pci: PCI adapter interrupts for MSI/MSI-X
s390/bitops: find leftmost bit instruction support
s390/pci: CLP interface
s390/pci: base support
...
01 Dec, 2012
1 commit
-
Support PCI adapter interrupts using the Single-IRQ-mode. Single-IRQ-mode
disables an adapter IRQ automatically after delivering it until the SIC
instruction enables it again. This is used to reduce the number of IRQs
for streaming workloads.Up to 64 MSI handlers can be registered per PCI function.
A hash table is used to map interrupt numbers to MSI descriptors.
The interrupt vector is scanned using the flogr instruction.
Only MSI/MSI-X interrupts are supported, no legacy INTs.Signed-off-by: Jan Glauber
Signed-off-by: Martin Schwidefsky
01 Nov, 2012
1 commit
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Attempts to retrigger nested threaded IRQs currently fail because they
have no primary handler. In order to support retrigger of nested
IRQs, the parent IRQ needs to be retriggered.To fix, when an IRQ needs to be resent, if the interrupt has a parent
IRQ and runs in the context of the parent IRQ, then resend the parent.Also, handle_nested_irq() needs to clear the replay flag like the
other handlers, otherwise check_irq_resend() will set it and it will
never be cleared. Without clearing, it results in the first resend
working fine, but check_irq_resend() returning early on subsequent
resends because the replay flag is still set.Problem discovered on ARM/OMAP platforms where a nested IRQ that's
also a wakeup IRQ happens late in suspend and needed to be retriggered
during the resume process.[khilman@ti.com: changelog edits, clear IRQS_REPLAY in handle_nested_irq()]
Reported-by: Kevin Hilman
Tested-by: Kevin Hilman
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1350425269-11489-1-git-send-email-khilman@deeprootsystems.com
Signed-off-by: Thomas Gleixner
25 Jul, 2012
1 commit
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Some interrupt chips like MSI are oneshot safe by implementation. For
those interrupts we can avoid the mask/unmask sequence for threaded
interrupt handlers.Signed-off-by: Thomas Gleixner
Link: http://lkml.kernel.org/r/alpine.LFD.2.02.1207132056540.32033@ionos
Cc: Linus Torvalds
Cc: Avi Kivity
Cc: Marcelo Tosatti
Cc: Jan Kiszka
23 Jul, 2012
1 commit
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Pull x86 platform changes from Ingo Molnar:
"This tree mostly involves various APIC driver cleanups/robustization,
and vSMP motivated platform callback improvements/cleanups"Fix up trivial conflict due to printk cleanup right next to return value
change.* 'x86-platform-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip: (29 commits)
Revert "x86/early_printk: Replace obsolete simple_strtoul() usage with kstrtoint()"
x86/apic/x2apic: Use multiple cluster members for the irq destination only with the explicit affinity
x86/apic/x2apic: Limit the vector reservation to the user specified mask
x86/apic: Optimize cpu traversal in __assign_irq_vector() using domain membership
x86/vsmp: Fix vector_allocation_domain's return value
irq/apic: Use config_enabled(CONFIG_SMP) checks to clean up irq_set_affinity() for UP
x86/vsmp: Fix linker error when CONFIG_PROC_FS is not set
x86/apic/es7000: Make apicid of a cluster (not CPU) from a cpumask
x86/apic/es7000+summit: Always make valid apicid from a cpumask
x86/apic/es7000+summit: Fix compile warning in cpu_mask_to_apicid()
x86/apic: Fix ugly casting and branching in cpu_mask_to_apicid_and()
x86/apic: Eliminate cpu_mask_to_apicid() operation
x86/x2apic/cluster: Vector_allocation_domain() should return a value
x86/apic/irq_remap: Silence a bogus pr_err()
x86/vsmp: Ignore IOAPIC IRQ affinity if possible
x86/apic: Make cpu_mask_to_apicid() operations check cpu_online_mask
x86/apic: Make cpu_mask_to_apicid() operations return error code
x86/apic: Avoid useless scanning thru a cpumask in assign_irq_vector()
x86/apic: Try to spread IRQ vectors to different priority levels
x86/apic: Factor out default vector_allocation_domain() operation
...
01 Jul, 2012
1 commit
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Fix kernel-doc warning. This struct member was removed in commit
875682648b89 ("irq: Remove irq_chip->release()") so remove its
associated kernel-doc entry also.Warning(include/linux/irq.h:338): Excess struct/union/enum/typedef member 'release' description in 'irq_chip'
Signed-off-by: Randy Dunlap
Cc: Richard Weinberger
Cc: Thomas Gleixner
Signed-off-by: Linus Torvalds
15 Jun, 2012
1 commit
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Move the ->irq_set_affinity() routines out of the #ifdef CONFIG_SMP
sections and use config_enabled(CONFIG_SMP) checks inside those
routines. Thus making those routines simple null stubs for
!CONFIG_SMP and retaining those routines with no additional
runtime overhead for CONFIG_SMP kernels.Cleans up the ifdef CONFIG_SMP in and around routines related to
irq_set_affinity in io_apic and irq_remapping subsystems.Signed-off-by: Suresh Siddha
Cc: torvalds@linux-foundation.org
Cc: joerg.roedel@amd.com
Cc: Sam Ravnborg
Cc: Paul Gortmaker
Link: http://lkml.kernel.org/r/1339723729.3475.63.camel@sbsiddha-desk.sc.intel.com
Signed-off-by: Ingo Molnar
22 May, 2012
1 commit
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As it's only user (UML) does no longer need it we can get
rid of it.Signed-off-by: Richard Weinberger
Reviewed-by: Thomas Gleixner
23 Apr, 2012
1 commit
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This is meant typically to allow a PIC driver's irq domain map() callback
to establish sane defaults for the interrupt (and make sure that the HW
and the irq_desc are in sync as far as the trigger is concerned).The irq core may not call the set_trigger callback if it thinks the
trigger is already set to the right setting, so we need to ensure new
descriptors are properly synchronized with the hardware.Signed-off-by: Benjamin Herrenschmidt
11 Apr, 2012
1 commit
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It makes no sense to export this trivial function. Make it a static inline
instead.This patch also drops virq_to_hw from arch/c6x since it is unused by that
architecture.v2: Move irq_hw_number_t into types.h to fix ARM build failure
Signed-off-by: Grant Likely
Acked-by: Thomas Gleixner
Cc: Benjamin Herrenschmidt
01 Nov, 2011
1 commit
-
Recent commit "irq: Track the owner of irq descriptor" in
commit ID b6873807a7143b7 placed module.h into linux/irq.h
but we are trying to limit module.h inclusion to just C files
that really need it, due to its size and number of children
includes. This targets just reversing that include.Add in the basic "struct module" since that is all we really need
to ensure things compile. In theory, b687380 should have added the
module.h include to the irqdesc.h header as well, but the implicit
module.h everywhere presence masked this from showing up. So give
it the "struct module" as well.As for the C files, irqdesc.c is only using THIS_MODULE, so it
does not need module.h - give it export.h instead. The C file
irq/manage.c is now (as of b687380) using try_module_get and
module_put and so it needs module.h (which it already has).Also convert the irq_alloc_descs variants to macros, since all
they really do is is call the __irq_alloc_descs primitive.
This avoids including export.h and no debug info is lost.Signed-off-by: Paul Gortmaker
03 Oct, 2011
1 commit
-
The ARM GIC interrupt controller offers per CPU interrupts (PPIs),
which are usually used to connect local timers to each core. Each CPU
has its own private interface to the GIC, and only sees the PPIs that
are directly connect to it.While these timers are separate devices and have a separate interrupt
line to a core, they all use the same IRQ number.For these devices, request_irq() is not the right API as it assumes
that an IRQ number is visible by a number of CPUs (through the
affinity setting), but makes it very awkward to express that an IRQ
number can be handled by all CPUs, and yet be a different interrupt
line on each CPU, requiring a different dev_id cookie to be passed
back to the handler.The *_percpu_irq() functions is designed to overcome these
limitations, by providing a per-cpu dev_id vector:int request_percpu_irq(unsigned int irq, irq_handler_t handler,
const char *devname, void __percpu *percpu_dev_id);
void free_percpu_irq(unsigned int, void __percpu *);
int setup_percpu_irq(unsigned int irq, struct irqaction *new);
void remove_percpu_irq(unsigned int irq, struct irqaction *act);
void enable_percpu_irq(unsigned int irq);
void disable_percpu_irq(unsigned int irq);The API has a number of limitations:
- no interrupt sharing
- no threading
- common handler across all the CPUsOnce the interrupt is requested using setup_percpu_irq() or
request_percpu_irq(), it must be enabled by each core that wishes its
local interrupt to be delivered.Based on an initial patch by Thomas Gleixner.
Signed-off-by: Marc Zyngier
Cc: linux-arm-kernel@lists.infradead.org
Link: http://lkml.kernel.org/r/1316793788-14500-2-git-send-email-marc.zyngier@arm.com
Signed-off-by: Thomas Gleixner
12 Sep, 2011
1 commit
-
Some irq chips need the irq_set_wake() functionality, but do not
require a irq_set_wake() callback. Instead of forcing an empty
callback to be implemented add a flag which notes this fact. Check for
the flag in set_irq_wake_real() and return success when set.Signed-off-by: Santosh Shilimkar
Cc: Thomas Gleixner
18 Aug, 2011
1 commit
-
…/git/tip/linux-2.6-tip
* 'irq-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
irq: Track the owner of irq descriptor
irq: Always set IRQF_ONESHOT if no primary handler is specified
genirq: Fix wrong bit operation
28 Jul, 2011
2 commits
-
Interrupt descriptors can be allocated from modules. The interrupts
are used by other modules, but we have no refcount on the module which
provides the interrupts and there is no way to establish one on the
device level as the interrupt using module is agnostic to the fact
that the interrupt is provided by a module rather than by some builtin
interrupt controller.To prevent removal of the interrupt providing module, we can track the
owner of the interrupt descriptor, which also provides the relevant
irq chip functions in the irq descriptor.request/setup_irq() can now acquire a refcount on the owner module to
prevent unloading. free_irq() drops the refcount.Signed-off-by: Sebastian Andrzej Siewior
Link: http://lkml.kernel.org/r/20110711101731.GA13804@Chamillionaire.breakpoint.cc
Signed-off-by: Thomas Gleixner -
This patch adds irq_domain infrastructure for translating from
hardware irq numbers to linux irqs. This is particularly important
for architectures adding device tree support because the current
implementation (excluding PowerPC and SPARC) cannot handle
translation for more than a single interrupt controller. irq_domain
supports device tree translation for any number of interrupt
controllers.This patch converts x86, Microblaze, ARM and MIPS to use irq_domain
for device tree irq translation. x86 is untested beyond compiling it,
irq_domain is enabled for MIPS and Microblaze, but the old behaviour is
preserved until the core code is modified to actually register an
irq_domain yet. On ARM it works and is required for much of the new
ARM device tree board support.PowerPC has /not/ been converted to use this new infrastructure. It
is still missing some features before it can replace the virq
infrastructure already in powerpc (see documentation on
irq_domain_map/unmap for details). Followup patches will add the
missing pieces and migrate PowerPC to use irq_domain.SPARC has its own method of managing interrupts from the device tree
and is unaffected by this change.Acked-by: Ralf Baechle
Signed-off-by: Grant Likely
24 Jul, 2011
1 commit
-
…us' and 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip
* 'x86-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
um: Make rwsem.S depend on CONFIG_RWSEM_XCHGADD_ALGORITHM* 'core-debug-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
debug: Make CONFIG_EXPERT select CONFIG_DEBUG_KERNEL to unhide debug options* 'irq-core-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
genirq: Remove unused CHECK_IRQ_PER_CPU()* 'perf-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/linux-2.6-tip:
perf tools, x86: Fix 32-bit compile on 64-bit system
08 Jul, 2011
1 commit
-
This fixes a regression introduced by e59347a "arm: orion:
Use generic irq chip".Depending on the device, interrupts acknowledgement is done by setting
or by clearing a dedicated register. Replace irq_gc_ack() with some
{set,clr}_bit variants allows to handle both cases.Note that this patch affects the following SoCs: Davinci, Samsung and
Orion. Except for this last, the change is minor: irq_gc_ack() is just
renamed into irq_gc_ack_set_bit().For the Orion SoCs, the edge GPIO interrupts support is currently
broken. irq_gc_ack() try to acknowledge a such interrupt by setting
the corresponding cause register bit. The Orion GPIO device expect the
opposite. To fix this issue, the irq_gc_ack_clr_bit() variant is used.Tested on Network Space v2.
Reported-by: Joey Oravec
Signed-off-by: Simon Guinot
Signed-off-by: Arnd Bergmann
23 Jun, 2011
1 commit
-
No more users. Kill it.
Signed-off-by: Thomas Gleixner
23 Apr, 2011
4 commits
-
These callbacks are only called in the syscore suspend/resume code on
interrupt chips which have been registered via the generic irq chip
mechanism. Calling those callbacks per irq would be rather icky, but
with the generic irq chip mechanism we can call this per registered
chip.Signed-off-by: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org -
Implement a generic interrupt chip, which is configurable and is able
to handle the most common irq chip implementations.Signed-off-by: Thomas Gleixner
Cc: linux-arm-kernel@lists.infradead.org
Tested-by: H Hartley Sweeten
Tested-by: Tony Lindgren
Tested-by; Kevin Hilman -
This adds support for disabling threading on a per-IRQ basis via the IRQ
status instead of the IRQ flow, which is necessary for interrupts that
don't follow the natural IRQ flow channels, such as those that are
virtually created.The new APIs added are simply:
irq_set_thread()
irq_set_nothread()which follow the rest of the IRQ status routines.
Chained handlers also have IRQ_NOTHREAD set on them automatically, making
the lack of threading explicit rather than implicit. Subsequently, the
nothread flag can be viewed through the standard genirq debugging
facilities.[ tglx: Fixed cleanup fallout ]
Signed-off-by: Paul Mundt
Link: http://lkml.kernel.org/r/%3C20110406210135.GF18426%40linux-sh.org%3E
Signed-off-by: Thomas Gleixner -
commit 0c6f8a8b917ad361319c8ace3e9f28e69bfdb4c1 ("genirq: Remove compat code")
removed the compat code, but forgot to update some references in comments and
delete some of its documentation.Signed-off-by: Geert Uytterhoeven
Link: http://lkml.kernel.org/r/%3C1302426113-13808-1-git-send-email-geert%40linux-m68k.org%3E
Signed-off-by: Thomas Gleixner
30 Mar, 2011
1 commit
-
Signed-off-by: Thomas Gleixner
29 Mar, 2011
3 commits
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All users converted to new interface.
Signed-off-by: Thomas Gleixner
-
Signed-off-by: Thomas Gleixner
-
Fix new irq-related kernel-doc warnings in 2.6.38:
Warning(kernel/irq/manage.c:149): No description found for parameter 'mask'
Warning(kernel/irq/manage.c:149): Excess function parameter 'cpumask' description in 'irq_set_affinity'
Warning(include/linux/irq.h:161): No description found for parameter 'state_use_accessors'
Warning(include/linux/irq.h:161): Excess struct/union/enum/typedef member 'state_use_accessor' description in 'irq_data'Signed-off-by: Randy Dunlap
LKML-Reference:
Signed-off-by: Thomas Gleixner
28 Mar, 2011
4 commits
-
Some archs want to prevent the default affinity being set on their
chips in the reqeust_irq() path.Signed-off-by: Thomas Gleixner
-
Special function for demultiplexing handlers which can be disabled via
disable_irq().Signed-off-by: Thomas Gleixner
-
Last user gone.
Signed-off-by: Thomas Gleixner
-
This is a replacment for the cell flow handler which is in the way of
cleanups. Must be selected to avoid general bloat.Signed-off-by: Thomas Gleixner