01 Nov, 2015
3 commits
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…ux-kernel into smarc-l5.0.0_1.0.0-ga
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…i_dev->irq before actually allocating IRQ number for the PCI device
26 Oct, 2015
2 commits
13 Aug, 2015
2 commits
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…ux-kernel into smarc-l5.0.0_1.0.0-ga
06 Aug, 2015
1 commit
05 Aug, 2015
1 commit
04 Aug, 2015
1 commit
29 Apr, 2015
1 commit
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For android without shell environment, do suspend/resume test, uart port has
no output message.In common code, cons->cflag is cleared to zero in .uart_port_startup(), but
after resume back, use the cons->cflag to set termios.
......................
uart_resume_port()->
termios.c_cflga = uport->cons->cflag;
...
uport->ops->set_termios(uport, &termios, NULL);uart_port_startup->
uport->cons->cflag = 0;
......................So the patch save the console cflag.
Signed-off-by: Fugang Duan
27 Apr, 2015
1 commit
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Set the IPU channel priority to high for the second CSI
capture channel.Signed-off-by: Oliver Brown
23 Apr, 2015
1 commit
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SB: gadget: mtp: Fix hang in ioctl(MTP_RECEIVE_FILE) for
WritePartialObjectIn receive_file_work, we now queue reads with length rounded up to
max packet size rather than mtp_rx_req_len.
Otherwise the read request will never complete.Bug: 12195339
Cherry-picked from 0373636d110d37aedfc5d71ea56af61f6bb3b65e
Mike LockwoodSigned-off-by: Haoran Wang
17 Apr, 2015
2 commits
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In megafix power off, the driver save necessary registers in suspend, and resotre the
registers in resume, but access registers need ipg clock gate on, so the patch make sure
ipg clock gate is on before save/restore the uart registers.Signed-off-by: Fugang Duan
(cherry picked and merge from commit 1c3f8b2e199b8aadedf87b55c585c697bae3033f) -
When uart port (non-console port) in dma mode and use uart as remote wakeup
source, after resume back, the AWAKE bit is not cleared most of interrupts
are disabled. And then let system suspend state, system resume back immediately
without any wake up action. So we need to clear the AWAKE bit after resume
back in DMA mode.Signed-off-by: Fugang Duan
(cherry picked from commit 940e204f8dc4f620a1b6b90f3ccd2d22da1e4beb)
06 Apr, 2015
1 commit
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Adding a second CSI to memory instance to allow two simultaneous captures to memory.
Signed-off-by: Oliver Brown
05 Apr, 2015
1 commit
04 Apr, 2015
1 commit
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Apply errata based on PL310 version instead of compile
time. Also set Prefetch offset to 15, since it improves
memcpy performance by 35%. Don't enable Incr double
Linefill enable since it adversely affects memcpy
performance by about 32MB/s and reads by 90MB/s. Tested
with 4K to 16MB sized src and dst aligned buffer.Signed-off-by: Nitin Garg
03 Apr, 2015
3 commits
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Random hang may occur if module clock gating is enabled for TX module,
The software workaround is to disable clock gating for the TX moduleDate: Apr 01, 2015
Signed-off-by: Xianzhong -
Random hang may occur if module clock gating is enabled for TX module,
The software workaround is to disable clock gating for the TX moduleDate: Apr 01, 2015
Signed-off-by: Xianzhong
(cherry picked from commit 3bc16575406c239c0ad37cad73d2d8aa1d223c79)
18 Mar, 2015
1 commit
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The class android.permission.cts.FileSystemPermissionTest in cts will check whether
/sys/class/xt_idletimer exits. This patch enable xt_idletimer.
Idletimer Xtables target is used to identify when interfaces have been idle for a certain period of time.
It main be used in netfilter.Signed-off-by: Zhang Sanshan
17 Mar, 2015
1 commit
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Seccomp filtering provides a means for a process to specify a filter for
incoming system calls.
It should be enable to pass the class android.os.cts.SeccompTest in cts test.Signed-off-by: Zhang Sanshan
16 Mar, 2015
1 commit
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If we use a invalid cmd to reboot system,such as "reboot 112233"
The console will show:"Restarting system with command '112233'."
Actually it only execute command "reboot"Signed-off-by: zhang sanshan
07 Mar, 2015
1 commit
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Upgrade RTL8821AS driver to v4.3.17_13587.20150303.
Signed-off-by: Haoran Wang
04 Mar, 2015
1 commit
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When ssi is inactive, the pm runtime should be disabled for save power
Signed-off-by: Shengjiu Wang
02 Mar, 2015
1 commit
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request BUS_FREQ_AUDIO for SAI.
Signed-off-by: Fabio Estevam
Signed-off-by: Shengjiu Wang
(cherry picked from commit 7089a66a93383bacc1707da4bd01bd54192066c2)
27 Feb, 2015
6 commits
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This reverts commit 890bc74cfd007938a3bd2334f7dd0c31d18f4099.
Signed-off-by: Peter Chen
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This reverts commit 98ed9b2455ae8691d9cf673c711b2fa01be267be.
Signed-off-by: Peter Chen
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Adjust tx-d-cal according to board level setting.
Signed-off-by: Peter Chen
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Add tx-d-cal property
Signed-off-by: Peter Chen
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It is used to improve signal quality for board.
Signed-off-by: Peter Chen
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Per IC engineer request, we need to keep USBPHY2's clk always on,
in this way, the USBPHY2 (PLL7) power can be controlled by
hardware suspend signal totally. It is benefit of USB remote wakeup
case which needs the resume signal be sent out as soon as
possible (without software interfere).It is intended to fix the issue which this ticket describes, the
reason for this issue is the host does not send resume in time.Signed-off-by: Peter Chen
26 Feb, 2015
1 commit
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Normally we don't support 12kHz, 24kHz in audio driver, alsa didn't
have formal definition of 12kHz, 24kHz, but alsa supply a way to
support these sample rates.Signed-off-by: Shengjiu Wang
(cherry picked from commit 01ab2369fa7c9819633391b987529ac9d8dd39bb)
24 Feb, 2015
1 commit
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Add ECSPI5 and WDOG3 IP information to imx6sx device tree.
Signed-off-by: Nitin Garg
19 Feb, 2015
2 commits
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Set enet pll rate to 125Mhz for RGMII tx refrence clock to
support i.MX6q sabreauto cpu2 board.Signed-off-by: Fugang Duan
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SDb WP pin is not connected by default on MX6Q CPU2 board, so we removed it
in DTS file. BTW, SDb slot is designed for WiFi slot, it is ok to disable WP
for old CPU board also.Signed-off-by: Dong Aisheng
(cherry picked from commit 2efa09eb28d7404933725bc25b528641a9dc10f9)
11 Feb, 2015
1 commit
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Support memory keyblob encryption and decryption
Signed-off-by: guoyin.chen
06 Feb, 2015
2 commits
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Conflicts:
arch/arm/boot/dts/imx6sx-sdb.dts
arch/arm/mach-imx/clk-imx6sx.c -
We've got a race condition bewteen the interrupt handler mxsfb_irq_handler()
and the function mxsfb_wait_for_vsync() on the flag host->wait4vsync.
If a CUR_FRAME_DONE interrupt comes and we just finish setting host->wait4vsync
to be 1 in mxsfb_wait_for_vsync() before we go to the interrupt handler, we are
likely to see the VSYNC_EDGE interrupt status bit asserted in the interrupt
handler for the CUR_FRAME_DONE interrupt, disable the not yet enabled VSYNC_EDGE
interrupt and finally clear host->wait4vsync.
Then, we go back to mxsfb_wait_for_vsync() and enable the VSYNC_EDGE interrupt
with host->wait4vsync=0. This may leave the VSYNC_EDGE interrupt enabled all
the time and never get a chance to be disabled in the interrupt handler.
So, we are deemed to hang up because the uncleared VSYNC_EDGE interrupt status
bit will cause the CPU to be trapped forever, according to SoC designer's words.
This patch corrects the interrupt handling to handle only the interrupts which
are acknowledged by checking both the interrupt enablement bits and the status
bits but not the status bits only. This may avoid any bogus interrupt from
being handled.Signed-off-by: Liu Ying
(cherry picked from commit 24e1e55076b624f9dc93c1f23e14dd024bdff1c7)
