Commit 2404a847db796cd17a9189d7ac2b73fe22446ebf

Authored by Russ Dill
Committed by Vaibhav Hiremath
1 parent de871da920

IIO: ti_adc: Print error and handle short FIFO events

In the case that the FIFO threshold handler gets called when the
FIFO has not actually reached the threshold, the driver will pass
uninitialized memory to the IIO subsystem.

In the past, this would occur due to bugs in the driver, those bugs
have been fixed. However, it is still a good idea to close this just
in case additional bugs in hardware or software exist.

Signed-off-by: Russ Dill <Russ.Dill@ti.com>

Showing 1 changed file with 7 additions and 0 deletions Inline Diff

drivers/staging/iio/adc/ti_adc.c
1 /* 1 /*
2 * TI ADC MFD driver 2 * TI ADC MFD driver
3 * 3 *
4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/
5 * 5 *
6 * This program is free software; you can redistribute it and/or 6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as 7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation version 2. 8 * published by the Free Software Foundation version 2.
9 * 9 *
10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
11 * kind, whether express or implied; without even the implied warranty 11 * kind, whether express or implied; without even the implied warranty
12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details. 13 * GNU General Public License for more details.
14 */ 14 */
15 15
16 #include <linux/init.h> 16 #include <linux/init.h>
17 #include <linux/kernel.h> 17 #include <linux/kernel.h>
18 #include <linux/err.h> 18 #include <linux/err.h>
19 #include <linux/module.h> 19 #include <linux/module.h>
20 #include <linux/slab.h> 20 #include <linux/slab.h>
21 #include <linux/interrupt.h> 21 #include <linux/interrupt.h>
22 #include <linux/platform_device.h> 22 #include <linux/platform_device.h>
23 #include <linux/io.h> 23 #include <linux/io.h>
24 #include <linux/sched.h> 24 #include <linux/sched.h>
25 #include <linux/delay.h> 25 #include <linux/delay.h>
26 26
27 #include "../iio.h" 27 #include "../iio.h"
28 #include "../sysfs.h" 28 #include "../sysfs.h"
29 #include "../buffer_generic.h" 29 #include "../buffer_generic.h"
30 #include "../ring_sw.h" 30 #include "../ring_sw.h"
31 31
32 #include <linux/mfd/ti_tscadc.h> 32 #include <linux/mfd/ti_tscadc.h>
33 #include <linux/platform_data/ti_adc.h> 33 #include <linux/platform_data/ti_adc.h>
34 34
35 struct adc_device { 35 struct adc_device {
36 struct ti_tscadc_dev *mfd_tscadc; 36 struct ti_tscadc_dev *mfd_tscadc;
37 struct iio_dev *idev; 37 struct iio_dev *idev;
38 struct work_struct poll_work; 38 struct work_struct poll_work;
39 wait_queue_head_t wq_data_avail; 39 wait_queue_head_t wq_data_avail;
40 int channels; 40 int channels;
41 int irq; 41 int irq;
42 bool is_continuous_mode; 42 bool is_continuous_mode;
43 u16 *buffer; 43 u16 *buffer;
44 }; 44 };
45 45
46 static unsigned int adc_readl(struct adc_device *adc, unsigned int reg) 46 static unsigned int adc_readl(struct adc_device *adc, unsigned int reg)
47 { 47 {
48 return readl(adc->mfd_tscadc->tscadc_base + reg); 48 return readl(adc->mfd_tscadc->tscadc_base + reg);
49 } 49 }
50 50
51 static void adc_writel(struct adc_device *adc, unsigned int reg, 51 static void adc_writel(struct adc_device *adc, unsigned int reg,
52 unsigned int val) 52 unsigned int val)
53 { 53 {
54 writel(val, adc->mfd_tscadc->tscadc_base + reg); 54 writel(val, adc->mfd_tscadc->tscadc_base + reg);
55 } 55 }
56 56
57 static void adc_step_config(struct adc_device *adc_dev, bool mode) 57 static void adc_step_config(struct adc_device *adc_dev, bool mode)
58 { 58 {
59 unsigned int stepconfig; 59 unsigned int stepconfig;
60 int i, channels = 0, steps; 60 int i, channels = 0, steps;
61 61
62 /* 62 /*
63 * There are 16 configurable steps and 8 analog input 63 * There are 16 configurable steps and 8 analog input
64 * lines available which are shared between Touchscreen and ADC. 64 * lines available which are shared between Touchscreen and ADC.
65 * 65 *
66 * Steps backwards i.e. from 16 towards 0 are used by ADC 66 * Steps backwards i.e. from 16 towards 0 are used by ADC
67 * depending on number of input lines needed. 67 * depending on number of input lines needed.
68 * Channel would represent which analog input 68 * Channel would represent which analog input
69 * needs to be given to ADC to digitalize data. 69 * needs to be given to ADC to digitalize data.
70 */ 70 */
71 71
72 steps = TOTAL_STEPS - adc_dev->channels; 72 steps = TOTAL_STEPS - adc_dev->channels;
73 channels = TOTAL_CHANNELS - adc_dev->channels; 73 channels = TOTAL_CHANNELS - adc_dev->channels;
74 74
75 if (mode == 0) 75 if (mode == 0)
76 stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1; 76 stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1;
77 else 77 else
78 stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1 78 stepconfig = TSCADC_STEPCONFIG_AVG_16 | TSCADC_STEPCONFIG_FIFO1
79 | TSCADC_STEPCONFIG_MODE_SWCNT; 79 | TSCADC_STEPCONFIG_MODE_SWCNT;
80 80
81 for (i = (steps + 1); i <= TOTAL_STEPS; i++) { 81 for (i = (steps + 1); i <= TOTAL_STEPS; i++) {
82 adc_writel(adc_dev, TSCADC_REG_STEPCONFIG(i), 82 adc_writel(adc_dev, TSCADC_REG_STEPCONFIG(i),
83 stepconfig | TSCADC_STEPCONFIG_INP(channels)); 83 stepconfig | TSCADC_STEPCONFIG_INP(channels));
84 adc_writel(adc_dev, TSCADC_REG_STEPDELAY(i), 84 adc_writel(adc_dev, TSCADC_REG_STEPDELAY(i),
85 TSCADC_STEPCONFIG_OPENDLY); 85 TSCADC_STEPCONFIG_OPENDLY);
86 channels++; 86 channels++;
87 } 87 }
88 } 88 }
89 89
90 static ssize_t tiadc_show_mode(struct device *dev, 90 static ssize_t tiadc_show_mode(struct device *dev,
91 struct device_attribute *attr, char *buf) 91 struct device_attribute *attr, char *buf)
92 { 92 {
93 struct iio_dev *indio_dev = dev_get_drvdata(dev); 93 struct iio_dev *indio_dev = dev_get_drvdata(dev);
94 struct adc_device *adc_dev = iio_priv(indio_dev); 94 struct adc_device *adc_dev = iio_priv(indio_dev);
95 unsigned int tmp; 95 unsigned int tmp;
96 96
97 tmp = adc_readl(adc_dev, TSCADC_REG_STEPCONFIG(TOTAL_STEPS)); 97 tmp = adc_readl(adc_dev, TSCADC_REG_STEPCONFIG(TOTAL_STEPS));
98 tmp &= TSCADC_STEPCONFIG_MODE(1); 98 tmp &= TSCADC_STEPCONFIG_MODE(1);
99 99
100 if (tmp == 0x00) 100 if (tmp == 0x00)
101 return sprintf(buf, "oneshot\n"); 101 return sprintf(buf, "oneshot\n");
102 else if (tmp == 0x01) 102 else if (tmp == 0x01)
103 return sprintf(buf, "continuous\n"); 103 return sprintf(buf, "continuous\n");
104 else 104 else
105 return sprintf(buf, "Operation mode unknown\n"); 105 return sprintf(buf, "Operation mode unknown\n");
106 } 106 }
107 107
108 static ssize_t tiadc_set_mode(struct device *dev, 108 static ssize_t tiadc_set_mode(struct device *dev,
109 struct device_attribute *attr, const char *buf, size_t count) 109 struct device_attribute *attr, const char *buf, size_t count)
110 { 110 {
111 struct iio_dev *indio_dev = dev_get_drvdata(dev); 111 struct iio_dev *indio_dev = dev_get_drvdata(dev);
112 struct adc_device *adc_dev = iio_priv(indio_dev); 112 struct adc_device *adc_dev = iio_priv(indio_dev);
113 unsigned int config; 113 unsigned int config;
114 114
115 config = adc_readl(adc_dev, TSCADC_REG_CTRL); 115 config = adc_readl(adc_dev, TSCADC_REG_CTRL);
116 config &= ~(TSCADC_CNTRLREG_TSCSSENB); 116 config &= ~(TSCADC_CNTRLREG_TSCSSENB);
117 adc_writel(adc_dev, TSCADC_REG_CTRL, config); 117 adc_writel(adc_dev, TSCADC_REG_CTRL, config);
118 118
119 if (!strncmp(buf, "oneshot", 7)) 119 if (!strncmp(buf, "oneshot", 7))
120 adc_dev->is_continuous_mode = false; 120 adc_dev->is_continuous_mode = false;
121 else if (!strncmp(buf, "continuous", 10)) 121 else if (!strncmp(buf, "continuous", 10))
122 adc_dev->is_continuous_mode = true; 122 adc_dev->is_continuous_mode = true;
123 else { 123 else {
124 dev_err(dev, "Operational mode unknown\n"); 124 dev_err(dev, "Operational mode unknown\n");
125 return -EINVAL; 125 return -EINVAL;
126 } 126 }
127 127
128 adc_step_config(adc_dev, adc_dev->is_continuous_mode); 128 adc_step_config(adc_dev, adc_dev->is_continuous_mode);
129 129
130 config = adc_readl(adc_dev, TSCADC_REG_CTRL); 130 config = adc_readl(adc_dev, TSCADC_REG_CTRL);
131 adc_writel(adc_dev, TSCADC_REG_CTRL, 131 adc_writel(adc_dev, TSCADC_REG_CTRL,
132 (config | TSCADC_CNTRLREG_TSCSSENB)); 132 (config | TSCADC_CNTRLREG_TSCSSENB));
133 return count; 133 return count;
134 } 134 }
135 135
136 static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, tiadc_show_mode, 136 static IIO_DEVICE_ATTR(mode, S_IRUGO | S_IWUSR, tiadc_show_mode,
137 tiadc_set_mode, 0); 137 tiadc_set_mode, 0);
138 138
139 static struct attribute *tiadc_attributes[] = { 139 static struct attribute *tiadc_attributes[] = {
140 &iio_dev_attr_mode.dev_attr.attr, 140 &iio_dev_attr_mode.dev_attr.attr,
141 NULL, 141 NULL,
142 }; 142 };
143 143
144 static const struct attribute_group tiadc_attribute_group = { 144 static const struct attribute_group tiadc_attribute_group = {
145 .attrs = tiadc_attributes, 145 .attrs = tiadc_attributes,
146 }; 146 };
147 147
148 static irqreturn_t tiadc_irq(int irq, void *private) 148 static irqreturn_t tiadc_irq(int irq, void *private)
149 { 149 {
150 struct iio_dev *idev = private; 150 struct iio_dev *idev = private;
151 struct adc_device *adc_dev = iio_priv(idev); 151 struct adc_device *adc_dev = iio_priv(idev);
152 unsigned int status, config; 152 unsigned int status, config;
153 153
154 status = adc_readl(adc_dev, TSCADC_REG_IRQSTATUS); 154 status = adc_readl(adc_dev, TSCADC_REG_IRQSTATUS);
155 if (status & TSCADC_IRQENB_FIFO1OVRRUN) { 155 if (status & TSCADC_IRQENB_FIFO1OVRRUN) {
156 config = adc_readl(adc_dev, TSCADC_REG_CTRL); 156 config = adc_readl(adc_dev, TSCADC_REG_CTRL);
157 config &= ~(TSCADC_CNTRLREG_TSCSSENB); 157 config &= ~(TSCADC_CNTRLREG_TSCSSENB);
158 adc_writel(adc_dev, TSCADC_REG_CTRL, config); 158 adc_writel(adc_dev, TSCADC_REG_CTRL, config);
159 159
160 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, 160 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS,
161 TSCADC_IRQENB_FIFO1OVRRUN | 161 TSCADC_IRQENB_FIFO1OVRRUN |
162 TSCADC_IRQENB_FIFO1UNDRFLW | 162 TSCADC_IRQENB_FIFO1UNDRFLW |
163 TSCADC_IRQENB_FIFO1THRES); 163 TSCADC_IRQENB_FIFO1THRES);
164 164
165 adc_writel(adc_dev, TSCADC_REG_CTRL, 165 adc_writel(adc_dev, TSCADC_REG_CTRL,
166 (config | TSCADC_CNTRLREG_TSCSSENB)); 166 (config | TSCADC_CNTRLREG_TSCSSENB));
167 return IRQ_HANDLED; 167 return IRQ_HANDLED;
168 } else if (status & TSCADC_IRQENB_FIFO1THRES) { 168 } else if (status & TSCADC_IRQENB_FIFO1THRES) {
169 adc_writel(adc_dev, TSCADC_REG_IRQCLR, 169 adc_writel(adc_dev, TSCADC_REG_IRQCLR,
170 TSCADC_IRQENB_FIFO1THRES); 170 TSCADC_IRQENB_FIFO1THRES);
171 171
172 if (iio_buffer_enabled(idev)) { 172 if (iio_buffer_enabled(idev)) {
173 if (!work_pending(&adc_dev->poll_work)) 173 if (!work_pending(&adc_dev->poll_work))
174 schedule_work(&adc_dev->poll_work); 174 schedule_work(&adc_dev->poll_work);
175 } else { 175 } else {
176 wake_up_interruptible(&adc_dev->wq_data_avail); 176 wake_up_interruptible(&adc_dev->wq_data_avail);
177 } 177 }
178 return IRQ_HANDLED; 178 return IRQ_HANDLED;
179 } else { 179 } else {
180 return IRQ_NONE; 180 return IRQ_NONE;
181 } 181 }
182 } 182 }
183 183
184 static void tiadc_poll_handler(struct work_struct *work_s) 184 static void tiadc_poll_handler(struct work_struct *work_s)
185 { 185 {
186 struct adc_device *adc_dev = 186 struct adc_device *adc_dev =
187 container_of(work_s, struct adc_device, poll_work); 187 container_of(work_s, struct adc_device, poll_work);
188 struct iio_dev *idev = iio_priv_to_dev(adc_dev); 188 struct iio_dev *idev = iio_priv_to_dev(adc_dev);
189 struct iio_buffer *buffer = idev->buffer; 189 struct iio_buffer *buffer = idev->buffer;
190 unsigned int fifo1count, readx1; 190 unsigned int fifo1count, readx1;
191 int i; 191 int i;
192 u32 *iBuf; 192 u32 *iBuf;
193 193
194 fifo1count = adc_readl(adc_dev, TSCADC_REG_FIFO1CNT); 194 fifo1count = adc_readl(adc_dev, TSCADC_REG_FIFO1CNT);
195 if (fifo1count * sizeof(u32) <
196 buffer->access->get_bytes_per_datum(buffer)) {
197 dev_err(adc_dev->mfd_tscadc->dev, "%s: Short FIFO event\n",
198 __func__);
199 goto out;
200 }
201
195 iBuf = kmalloc((fifo1count + 1) * sizeof(u32), GFP_KERNEL); 202 iBuf = kmalloc((fifo1count + 1) * sizeof(u32), GFP_KERNEL);
196 if (iBuf == NULL) 203 if (iBuf == NULL)
197 goto out; 204 goto out;
198 205
199 /* 206 /*
200 * Wait for ADC sequencer to settle down. 207 * Wait for ADC sequencer to settle down.
201 * There could be a scenario where in we 208 * There could be a scenario where in we
202 * try to read data from ADC before 209 * try to read data from ADC before
203 * it is available. 210 * it is available.
204 */ 211 */
205 udelay(500); 212 udelay(500);
206 213
207 for (i = 0; i < fifo1count; i++) { 214 for (i = 0; i < fifo1count; i++) {
208 readx1 = adc_readl(adc_dev, TSCADC_REG_FIFO1); 215 readx1 = adc_readl(adc_dev, TSCADC_REG_FIFO1);
209 readx1 &= TSCADC_FIFOREAD_DATA_MASK; 216 readx1 &= TSCADC_FIFOREAD_DATA_MASK;
210 iBuf[i] = readx1; 217 iBuf[i] = readx1;
211 } 218 }
212 219
213 buffer->access->store_to(buffer, (u8 *) iBuf, iio_get_time_ns()); 220 buffer->access->store_to(buffer, (u8 *) iBuf, iio_get_time_ns());
214 kfree(iBuf); 221 kfree(iBuf);
215 222
216 out: 223 out:
217 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, 224 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS,
218 TSCADC_IRQENB_FIFO1THRES); 225 TSCADC_IRQENB_FIFO1THRES);
219 adc_writel(adc_dev, TSCADC_REG_IRQENABLE, 226 adc_writel(adc_dev, TSCADC_REG_IRQENABLE,
220 TSCADC_IRQENB_FIFO1THRES); 227 TSCADC_IRQENB_FIFO1THRES);
221 } 228 }
222 229
223 static int tiadc_buffer_preenable(struct iio_dev *idev) 230 static int tiadc_buffer_preenable(struct iio_dev *idev)
224 { 231 {
225 struct iio_buffer *buffer = idev->buffer; 232 struct iio_buffer *buffer = idev->buffer;
226 233
227 buffer->access->set_bytes_per_datum(buffer, 16); 234 buffer->access->set_bytes_per_datum(buffer, 16);
228 return 0; 235 return 0;
229 } 236 }
230 237
231 static int tiadc_buffer_postenable(struct iio_dev *idev) 238 static int tiadc_buffer_postenable(struct iio_dev *idev)
232 { 239 {
233 struct adc_device *adc_dev = iio_priv(idev); 240 struct adc_device *adc_dev = iio_priv(idev);
234 struct iio_buffer *buffer = idev->buffer; 241 struct iio_buffer *buffer = idev->buffer;
235 unsigned int enb, config; 242 unsigned int enb, config;
236 int stepnum; 243 int stepnum;
237 u8 bit; 244 u8 bit;
238 245
239 if (!adc_dev->is_continuous_mode) { 246 if (!adc_dev->is_continuous_mode) {
240 pr_info("Data cannot be read continuously in one shot mode\n"); 247 pr_info("Data cannot be read continuously in one shot mode\n");
241 return -EINVAL; 248 return -EINVAL;
242 } else { 249 } else {
243 250
244 config = adc_readl(adc_dev, TSCADC_REG_CTRL); 251 config = adc_readl(adc_dev, TSCADC_REG_CTRL);
245 adc_writel(adc_dev, TSCADC_REG_CTRL, 252 adc_writel(adc_dev, TSCADC_REG_CTRL,
246 config & ~TSCADC_CNTRLREG_TSCSSENB); 253 config & ~TSCADC_CNTRLREG_TSCSSENB);
247 adc_writel(adc_dev, TSCADC_REG_CTRL, 254 adc_writel(adc_dev, TSCADC_REG_CTRL,
248 config | TSCADC_CNTRLREG_TSCSSENB); 255 config | TSCADC_CNTRLREG_TSCSSENB);
249 256
250 257
251 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS, 258 adc_writel(adc_dev, TSCADC_REG_IRQSTATUS,
252 TSCADC_IRQENB_FIFO1THRES | 259 TSCADC_IRQENB_FIFO1THRES |
253 TSCADC_IRQENB_FIFO1OVRRUN | 260 TSCADC_IRQENB_FIFO1OVRRUN |
254 TSCADC_IRQENB_FIFO1UNDRFLW); 261 TSCADC_IRQENB_FIFO1UNDRFLW);
255 adc_writel(adc_dev, TSCADC_REG_IRQENABLE, 262 adc_writel(adc_dev, TSCADC_REG_IRQENABLE,
256 TSCADC_IRQENB_FIFO1THRES | 263 TSCADC_IRQENB_FIFO1THRES |
257 TSCADC_IRQENB_FIFO1OVRRUN); 264 TSCADC_IRQENB_FIFO1OVRRUN);
258 265
259 adc_writel(adc_dev, TSCADC_REG_SE, 0x00); 266 adc_writel(adc_dev, TSCADC_REG_SE, 0x00);
260 for_each_set_bit(bit, buffer->scan_mask, 267 for_each_set_bit(bit, buffer->scan_mask,
261 adc_dev->channels) { 268 adc_dev->channels) {
262 struct iio_chan_spec const *chan = idev->channels + bit; 269 struct iio_chan_spec const *chan = idev->channels + bit;
263 /* 270 /*
264 * There are a total of 16 steps available 271 * There are a total of 16 steps available
265 * that are shared between ADC and touchscreen. 272 * that are shared between ADC and touchscreen.
266 * We start configuring from step 16 to 0 incase of 273 * We start configuring from step 16 to 0 incase of
267 * ADC. Hence the relation between input channel 274 * ADC. Hence the relation between input channel
268 * and step for ADC would be as below. 275 * and step for ADC would be as below.
269 */ 276 */
270 stepnum = chan->channel + 9; 277 stepnum = chan->channel + 9;
271 enb = adc_readl(adc_dev, TSCADC_REG_SE); 278 enb = adc_readl(adc_dev, TSCADC_REG_SE);
272 enb |= (1 << stepnum); 279 enb |= (1 << stepnum);
273 adc_writel(adc_dev, TSCADC_REG_SE, enb); 280 adc_writel(adc_dev, TSCADC_REG_SE, enb);
274 } 281 }
275 return 0; 282 return 0;
276 } 283 }
277 } 284 }
278 285
279 static int tiadc_buffer_postdisable(struct iio_dev *idev) 286 static int tiadc_buffer_postdisable(struct iio_dev *idev)
280 { 287 {
281 struct adc_device *adc_dev = iio_priv(idev); 288 struct adc_device *adc_dev = iio_priv(idev);
282 289
283 adc_writel(adc_dev, TSCADC_REG_IRQCLR, (TSCADC_IRQENB_FIFO1THRES | 290 adc_writel(adc_dev, TSCADC_REG_IRQCLR, (TSCADC_IRQENB_FIFO1THRES |
284 TSCADC_IRQENB_FIFO1OVRRUN | 291 TSCADC_IRQENB_FIFO1OVRRUN |
285 TSCADC_IRQENB_FIFO1UNDRFLW)); 292 TSCADC_IRQENB_FIFO1UNDRFLW));
286 adc_writel(adc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB_TC); 293 adc_writel(adc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB_TC);
287 return 0; 294 return 0;
288 } 295 }
289 296
290 static const struct iio_buffer_setup_ops tiadc_swring_setup_ops = { 297 static const struct iio_buffer_setup_ops tiadc_swring_setup_ops = {
291 .preenable = &tiadc_buffer_preenable, 298 .preenable = &tiadc_buffer_preenable,
292 .postenable = &tiadc_buffer_postenable, 299 .postenable = &tiadc_buffer_postenable,
293 .postdisable = &tiadc_buffer_postdisable, 300 .postdisable = &tiadc_buffer_postdisable,
294 }; 301 };
295 302
296 static int tiadc_config_sw_ring(struct iio_dev *idev) 303 static int tiadc_config_sw_ring(struct iio_dev *idev)
297 { 304 {
298 struct adc_device *adc_dev = iio_priv(idev); 305 struct adc_device *adc_dev = iio_priv(idev);
299 int ret; 306 int ret;
300 307
301 idev->buffer = iio_sw_rb_allocate(idev); 308 idev->buffer = iio_sw_rb_allocate(idev);
302 if (!idev->buffer) 309 if (!idev->buffer)
303 ret = -ENOMEM; 310 ret = -ENOMEM;
304 311
305 idev->buffer->access = &ring_sw_access_funcs; 312 idev->buffer->access = &ring_sw_access_funcs;
306 idev->buffer->setup_ops = &tiadc_swring_setup_ops; 313 idev->buffer->setup_ops = &tiadc_swring_setup_ops;
307 314
308 INIT_WORK(&adc_dev->poll_work, &tiadc_poll_handler); 315 INIT_WORK(&adc_dev->poll_work, &tiadc_poll_handler);
309 316
310 idev->modes |= INDIO_BUFFER_HARDWARE; 317 idev->modes |= INDIO_BUFFER_HARDWARE;
311 return 0; 318 return 0;
312 } 319 }
313 320
314 static int tiadc_channel_init(struct iio_dev *idev, struct adc_device *adc_dev) 321 static int tiadc_channel_init(struct iio_dev *idev, struct adc_device *adc_dev)
315 { 322 {
316 struct iio_chan_spec *chan_array; 323 struct iio_chan_spec *chan_array;
317 int i, channels; 324 int i, channels;
318 325
319 idev->num_channels = adc_dev->channels; 326 idev->num_channels = adc_dev->channels;
320 chan_array = kcalloc(idev->num_channels, sizeof(struct iio_chan_spec), 327 chan_array = kcalloc(idev->num_channels, sizeof(struct iio_chan_spec),
321 GFP_KERNEL); 328 GFP_KERNEL);
322 329
323 if (chan_array == NULL) 330 if (chan_array == NULL)
324 return -ENOMEM; 331 return -ENOMEM;
325 332
326 channels = TOTAL_CHANNELS - adc_dev->channels; 333 channels = TOTAL_CHANNELS - adc_dev->channels;
327 for (i = 0; i < (idev->num_channels); i++) { 334 for (i = 0; i < (idev->num_channels); i++) {
328 struct iio_chan_spec *chan = chan_array + i; 335 struct iio_chan_spec *chan = chan_array + i;
329 chan->type = IIO_VOLTAGE; 336 chan->type = IIO_VOLTAGE;
330 chan->indexed = 1; 337 chan->indexed = 1;
331 chan->channel = channels; 338 chan->channel = channels;
332 chan->scan_index = i; 339 chan->scan_index = i;
333 chan->scan_type.sign = 'u'; 340 chan->scan_type.sign = 'u';
334 chan->scan_type.realbits = 12; 341 chan->scan_type.realbits = 12;
335 chan->scan_type.storagebits = 32; 342 chan->scan_type.storagebits = 32;
336 chan->scan_type.shift = 0; 343 chan->scan_type.shift = 0;
337 channels++; 344 channels++;
338 } 345 }
339 346
340 idev->channels = chan_array; 347 idev->channels = chan_array;
341 return idev->num_channels; 348 return idev->num_channels;
342 } 349 }
343 350
344 static void tiadc_channel_remove(struct iio_dev *idev) 351 static void tiadc_channel_remove(struct iio_dev *idev)
345 { 352 {
346 kfree(idev->channels); 353 kfree(idev->channels);
347 } 354 }
348 355
349 static int tiadc_read_raw(struct iio_dev *idev, 356 static int tiadc_read_raw(struct iio_dev *idev,
350 struct iio_chan_spec const *chan, 357 struct iio_chan_spec const *chan,
351 int *val, int *val2, long mask) 358 int *val, int *val2, long mask)
352 { 359 {
353 struct adc_device *adc_dev = iio_priv(idev); 360 struct adc_device *adc_dev = iio_priv(idev);
354 int i, map_val; 361 int i, map_val;
355 unsigned int fifo1count, readx1, stepid; 362 unsigned int fifo1count, readx1, stepid;
356 unsigned long timeout = jiffies + usecs_to_jiffies 363 unsigned long timeout = jiffies + usecs_to_jiffies
357 (IDLE_TIMEOUT * adc_dev->channels); 364 (IDLE_TIMEOUT * adc_dev->channels);
358 365
359 if (adc_dev->is_continuous_mode) { 366 if (adc_dev->is_continuous_mode) {
360 pr_info("One shot mode not enabled\n"); 367 pr_info("One shot mode not enabled\n");
361 return -EINVAL; 368 return -EINVAL;
362 } else { 369 } else {
363 adc_writel(adc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB); 370 adc_writel(adc_dev, TSCADC_REG_SE, TSCADC_STPENB_STEPENB);
364 371
365 /* Wait for ADC sequencer to complete sampling */ 372 /* Wait for ADC sequencer to complete sampling */
366 while (adc_readl(adc_dev, TSCADC_REG_ADCFSM) & 373 while (adc_readl(adc_dev, TSCADC_REG_ADCFSM) &
367 TSCADC_SEQ_STATUS) { 374 TSCADC_SEQ_STATUS) {
368 if (time_after(jiffies, timeout)) 375 if (time_after(jiffies, timeout))
369 return -EAGAIN; 376 return -EAGAIN;
370 } 377 }
371 378
372 map_val = chan->channel + TOTAL_CHANNELS; 379 map_val = chan->channel + TOTAL_CHANNELS;
373 fifo1count = adc_readl(adc_dev, TSCADC_REG_FIFO1CNT); 380 fifo1count = adc_readl(adc_dev, TSCADC_REG_FIFO1CNT);
374 for (i = 0; i < fifo1count; i++) { 381 for (i = 0; i < fifo1count; i++) {
375 readx1 = adc_readl(adc_dev, TSCADC_REG_FIFO1); 382 readx1 = adc_readl(adc_dev, TSCADC_REG_FIFO1);
376 stepid = readx1 & TSCADC_FIFOREAD_CHNLID_MASK; 383 stepid = readx1 & TSCADC_FIFOREAD_CHNLID_MASK;
377 stepid = stepid >> 0x10; 384 stepid = stepid >> 0x10;
378 385
379 if (stepid == map_val) { 386 if (stepid == map_val) {
380 readx1 = readx1 & TSCADC_FIFOREAD_DATA_MASK; 387 readx1 = readx1 & TSCADC_FIFOREAD_DATA_MASK;
381 *val = readx1; 388 *val = readx1;
382 } 389 }
383 } 390 }
384 return IIO_VAL_INT; 391 return IIO_VAL_INT;
385 } 392 }
386 } 393 }
387 394
388 static const struct iio_info tiadc_info = { 395 static const struct iio_info tiadc_info = {
389 .read_raw = &tiadc_read_raw, 396 .read_raw = &tiadc_read_raw,
390 .attrs = &tiadc_attribute_group, 397 .attrs = &tiadc_attribute_group,
391 }; 398 };
392 399
393 static int __devinit tiadc_probe(struct platform_device *pdev) 400 static int __devinit tiadc_probe(struct platform_device *pdev)
394 { 401 {
395 struct iio_dev *idev; 402 struct iio_dev *idev;
396 struct adc_device *adc_dev = NULL; 403 struct adc_device *adc_dev = NULL;
397 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data; 404 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
398 struct mfd_tscadc_board *pdata; 405 struct mfd_tscadc_board *pdata;
399 int err; 406 int err;
400 407
401 pdata = (struct mfd_tscadc_board *)tscadc_dev->dev->platform_data; 408 pdata = (struct mfd_tscadc_board *)tscadc_dev->dev->platform_data;
402 if (!pdata || !pdata->adc_init) { 409 if (!pdata || !pdata->adc_init) {
403 dev_err(tscadc_dev->dev, "Could not find platform data\n"); 410 dev_err(tscadc_dev->dev, "Could not find platform data\n");
404 return -EINVAL; 411 return -EINVAL;
405 } 412 }
406 413
407 idev = iio_allocate_device(sizeof(struct adc_device)); 414 idev = iio_allocate_device(sizeof(struct adc_device));
408 if (idev == NULL) { 415 if (idev == NULL) {
409 dev_err(&pdev->dev, "failed to allocate iio device.\n"); 416 dev_err(&pdev->dev, "failed to allocate iio device.\n");
410 err = -ENOMEM; 417 err = -ENOMEM;
411 goto err_ret; 418 goto err_ret;
412 } 419 }
413 adc_dev = iio_priv(idev); 420 adc_dev = iio_priv(idev);
414 421
415 tscadc_dev->adc = adc_dev; 422 tscadc_dev->adc = adc_dev;
416 adc_dev->mfd_tscadc = tscadc_dev; 423 adc_dev->mfd_tscadc = tscadc_dev;
417 adc_dev->idev = idev; 424 adc_dev->idev = idev;
418 adc_dev->channels = pdata->adc_init->adc_channels; 425 adc_dev->channels = pdata->adc_init->adc_channels;
419 adc_dev->irq = tscadc_dev->irq; 426 adc_dev->irq = tscadc_dev->irq;
420 427
421 idev->dev.parent = &pdev->dev; 428 idev->dev.parent = &pdev->dev;
422 idev->name = dev_name(&pdev->dev); 429 idev->name = dev_name(&pdev->dev);
423 idev->modes = INDIO_DIRECT_MODE; 430 idev->modes = INDIO_DIRECT_MODE;
424 idev->info = &tiadc_info; 431 idev->info = &tiadc_info;
425 432
426 /* by default driver comes up with oneshot mode */ 433 /* by default driver comes up with oneshot mode */
427 adc_step_config(adc_dev, adc_dev->is_continuous_mode); 434 adc_step_config(adc_dev, adc_dev->is_continuous_mode);
428 435
429 /* program FIFO threshold to value minus 1 */ 436 /* program FIFO threshold to value minus 1 */
430 adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD); 437 adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD);
431 438
432 err = tiadc_channel_init(idev, adc_dev); 439 err = tiadc_channel_init(idev, adc_dev);
433 if (err < 0) 440 if (err < 0)
434 goto err_free_device; 441 goto err_free_device;
435 442
436 init_waitqueue_head(&adc_dev->wq_data_avail); 443 init_waitqueue_head(&adc_dev->wq_data_avail);
437 444
438 err = request_irq(adc_dev->irq, tiadc_irq, IRQF_SHARED, 445 err = request_irq(adc_dev->irq, tiadc_irq, IRQF_SHARED,
439 idev->name, idev); 446 idev->name, idev);
440 if (err) 447 if (err)
441 goto err_cleanup_channels; 448 goto err_cleanup_channels;
442 449
443 err = tiadc_config_sw_ring(idev); 450 err = tiadc_config_sw_ring(idev);
444 if (err) 451 if (err)
445 goto err_free_irq; 452 goto err_free_irq;
446 453
447 err = iio_buffer_register(idev, 454 err = iio_buffer_register(idev,
448 idev->channels, idev->num_channels); 455 idev->channels, idev->num_channels);
449 if (err < 0) 456 if (err < 0)
450 goto err_free_sw_rb; 457 goto err_free_sw_rb;
451 458
452 err = iio_device_register(idev); 459 err = iio_device_register(idev);
453 if (err) 460 if (err)
454 goto err_unregister; 461 goto err_unregister;
455 462
456 dev_info(&pdev->dev, "attached adc driver\n"); 463 dev_info(&pdev->dev, "attached adc driver\n");
457 platform_set_drvdata(pdev, idev); 464 platform_set_drvdata(pdev, idev);
458 465
459 return 0; 466 return 0;
460 467
461 err_unregister: 468 err_unregister:
462 iio_buffer_unregister(idev); 469 iio_buffer_unregister(idev);
463 err_free_sw_rb: 470 err_free_sw_rb:
464 iio_sw_rb_free(idev->buffer); 471 iio_sw_rb_free(idev->buffer);
465 err_free_irq: 472 err_free_irq:
466 free_irq(adc_dev->irq, idev); 473 free_irq(adc_dev->irq, idev);
467 err_cleanup_channels: 474 err_cleanup_channels:
468 tiadc_channel_remove(idev); 475 tiadc_channel_remove(idev);
469 err_free_device: 476 err_free_device:
470 iio_free_device(idev); 477 iio_free_device(idev);
471 err_ret: 478 err_ret:
472 return err; 479 return err;
473 } 480 }
474 481
475 static int __devexit tiadc_remove(struct platform_device *pdev) 482 static int __devexit tiadc_remove(struct platform_device *pdev)
476 { 483 {
477 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data; 484 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
478 struct adc_device *adc_dev = tscadc_dev->adc; 485 struct adc_device *adc_dev = tscadc_dev->adc;
479 struct iio_dev *idev = adc_dev->idev; 486 struct iio_dev *idev = adc_dev->idev;
480 487
481 free_irq(adc_dev->irq, idev); 488 free_irq(adc_dev->irq, idev);
482 iio_device_unregister(idev); 489 iio_device_unregister(idev);
483 iio_buffer_unregister(idev); 490 iio_buffer_unregister(idev);
484 iio_sw_rb_free(idev->buffer); 491 iio_sw_rb_free(idev->buffer);
485 tiadc_channel_remove(idev); 492 tiadc_channel_remove(idev);
486 493
487 tscadc_dev->adc = NULL; 494 tscadc_dev->adc = NULL;
488 iio_free_device(idev); 495 iio_free_device(idev);
489 496
490 platform_set_drvdata(pdev, NULL); 497 platform_set_drvdata(pdev, NULL);
491 return 0; 498 return 0;
492 } 499 }
493 500
494 static int adc_suspend(struct platform_device *pdev, pm_message_t state) 501 static int adc_suspend(struct platform_device *pdev, pm_message_t state)
495 { 502 {
496 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data; 503 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
497 struct adc_device *adc_dev = tscadc_dev->adc; 504 struct adc_device *adc_dev = tscadc_dev->adc;
498 unsigned int idle; 505 unsigned int idle;
499 506
500 if (!device_may_wakeup(tscadc_dev->dev)) { 507 if (!device_may_wakeup(tscadc_dev->dev)) {
501 idle = adc_readl(adc_dev, TSCADC_REG_CTRL); 508 idle = adc_readl(adc_dev, TSCADC_REG_CTRL);
502 idle &= ~(TSCADC_CNTRLREG_TSCSSENB); 509 idle &= ~(TSCADC_CNTRLREG_TSCSSENB);
503 adc_writel(adc_dev, TSCADC_REG_CTRL, (idle | 510 adc_writel(adc_dev, TSCADC_REG_CTRL, (idle |
504 TSCADC_CNTRLREG_POWERDOWN)); 511 TSCADC_CNTRLREG_POWERDOWN));
505 } 512 }
506 return 0; 513 return 0;
507 } 514 }
508 515
509 static int adc_resume(struct platform_device *pdev) 516 static int adc_resume(struct platform_device *pdev)
510 { 517 {
511 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data; 518 struct ti_tscadc_dev *tscadc_dev = pdev->dev.platform_data;
512 struct adc_device *adc_dev = tscadc_dev->adc; 519 struct adc_device *adc_dev = tscadc_dev->adc;
513 unsigned int restore; 520 unsigned int restore;
514 521
515 adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD); 522 adc_writel(adc_dev, TSCADC_REG_FIFO1THR, FIFO1_THRESHOLD);
516 adc_step_config(adc_dev, adc_dev->is_continuous_mode); 523 adc_step_config(adc_dev, adc_dev->is_continuous_mode);
517 524
518 /* Make sure ADC is powered up */ 525 /* Make sure ADC is powered up */
519 restore = adc_readl(adc_dev, TSCADC_REG_CTRL); 526 restore = adc_readl(adc_dev, TSCADC_REG_CTRL);
520 restore &= ~(TSCADC_CNTRLREG_POWERDOWN); 527 restore &= ~(TSCADC_CNTRLREG_POWERDOWN);
521 adc_writel(adc_dev, TSCADC_REG_CTRL, restore); 528 adc_writel(adc_dev, TSCADC_REG_CTRL, restore);
522 return 0; 529 return 0;
523 } 530 }
524 531
525 static struct platform_driver tiadc_driver = { 532 static struct platform_driver tiadc_driver = {
526 .driver = { 533 .driver = {
527 .name = "tiadc", 534 .name = "tiadc",
528 .owner = THIS_MODULE, 535 .owner = THIS_MODULE,
529 }, 536 },
530 .probe = tiadc_probe, 537 .probe = tiadc_probe,
531 .remove = __devexit_p(tiadc_remove), 538 .remove = __devexit_p(tiadc_remove),
532 .suspend = adc_suspend, 539 .suspend = adc_suspend,
533 .resume = adc_resume, 540 .resume = adc_resume,
534 }; 541 };
535 542
536 module_platform_driver(tiadc_driver); 543 module_platform_driver(tiadc_driver);
537 544
538 MODULE_DESCRIPTION("TI ADC controller driver"); 545 MODULE_DESCRIPTION("TI ADC controller driver");
539 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 546 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>");
540 MODULE_LICENSE("GPL"); 547 MODULE_LICENSE("GPL");
541 548