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Commit 733ea869e5756e0fd0333728cc1ed7c42e6ddfc0

Authored by Thomas Gleixner
Committed by Linus Torvalds
1 parent f40298fddc
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

[PATCH] irq-flags: PARISC: Use the new IRQF_ constants 

Use the new IRQF_ constants and remove the SA_INTERRUPT define

Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: Ingo Molnar <mingo@elte.hu>
Cc: "David S. Miller" <davem@davemloft.net>
Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Cc: Kyle McMartin <kyle@mcmartin.ca>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 3 changed files with 6 additions and 8 deletions Inline Diff

arch/parisc/kernel/irq.c
Diff comments   View file @ 733ea86
1 /* 1 /*
2 * Code to handle x86 style IRQs plus some generic interrupt stuff. 2 * Code to handle x86 style IRQs plus some generic interrupt stuff.
3 * 3 *
4 * Copyright (C) 1992 Linus Torvalds 4 * Copyright (C) 1992 Linus Torvalds
5 * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle 5 * Copyright (C) 1994, 1995, 1996, 1997, 1998 Ralf Baechle
6 * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org) 6 * Copyright (C) 1999 SuSE GmbH (Philipp Rumpf, prumpf@tux.org)
7 * Copyright (C) 1999-2000 Grant Grundler 7 * Copyright (C) 1999-2000 Grant Grundler
8 * Copyright (c) 2005 Matthew Wilcox 8 * Copyright (c) 2005 Matthew Wilcox
9 * 9 *
10 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by 11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2, or (at your option) 12 * the Free Software Foundation; either version 2, or (at your option)
13 * any later version. 13 * any later version.
14 * 14 *
15 * This program is distributed in the hope that it will be useful, 15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of 16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details. 18 * GNU General Public License for more details.
19 * 19 *
20 * You should have received a copy of the GNU General Public License 20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software 21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 22 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 */ 23 */
24 #include <linux/bitops.h> 24 #include <linux/bitops.h>
25 #include <linux/errno.h> 25 #include <linux/errno.h>
26 #include <linux/init.h> 26 #include <linux/init.h>
27 #include <linux/interrupt.h> 27 #include <linux/interrupt.h>
28 #include <linux/kernel_stat.h> 28 #include <linux/kernel_stat.h>
29 #include <linux/seq_file.h> 29 #include <linux/seq_file.h>
30 #include <linux/spinlock.h> 30 #include <linux/spinlock.h>
31 #include <linux/types.h> 31 #include <linux/types.h>
32 #include <asm/io.h> 32 #include <asm/io.h>
33 33
34 #include <asm/smp.h> 34 #include <asm/smp.h>
35 35
36 #undef PARISC_IRQ_CR16_COUNTS 36 #undef PARISC_IRQ_CR16_COUNTS
37 37
38 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *); 38 extern irqreturn_t timer_interrupt(int, void *, struct pt_regs *);
39 extern irqreturn_t ipi_interrupt(int, void *, struct pt_regs *); 39 extern irqreturn_t ipi_interrupt(int, void *, struct pt_regs *);
40 40
41 #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq)) 41 #define EIEM_MASK(irq) (1UL<<(CPU_IRQ_MAX - irq))
42 42
43 /* Bits in EIEM correlate with cpu_irq_action[]. 43 /* Bits in EIEM correlate with cpu_irq_action[].
44 ** Numbered *Big Endian*! (ie bit 0 is MSB) 44 ** Numbered *Big Endian*! (ie bit 0 is MSB)
45 */ 45 */
46 static volatile unsigned long cpu_eiem = 0; 46 static volatile unsigned long cpu_eiem = 0;
47 47
48 static void cpu_disable_irq(unsigned int irq) 48 static void cpu_disable_irq(unsigned int irq)
49 { 49 {
50 unsigned long eirr_bit = EIEM_MASK(irq); 50 unsigned long eirr_bit = EIEM_MASK(irq);
51 51
52 cpu_eiem &= ~eirr_bit; 52 cpu_eiem &= ~eirr_bit;
53 /* Do nothing on the other CPUs. If they get this interrupt, 53 /* Do nothing on the other CPUs. If they get this interrupt,
54 * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't 54 * The & cpu_eiem in the do_cpu_irq_mask() ensures they won't
55 * handle it, and the set_eiem() at the bottom will ensure it 55 * handle it, and the set_eiem() at the bottom will ensure it
56 * then gets disabled */ 56 * then gets disabled */
57 } 57 }
58 58
59 static void cpu_enable_irq(unsigned int irq) 59 static void cpu_enable_irq(unsigned int irq)
60 { 60 {
61 unsigned long eirr_bit = EIEM_MASK(irq); 61 unsigned long eirr_bit = EIEM_MASK(irq);
62 62
63 cpu_eiem |= eirr_bit; 63 cpu_eiem |= eirr_bit;
64 64
65 /* FIXME: while our interrupts aren't nested, we cannot reset 65 /* FIXME: while our interrupts aren't nested, we cannot reset
66 * the eiem mask if we're already in an interrupt. Once we 66 * the eiem mask if we're already in an interrupt. Once we
67 * implement nested interrupts, this can go away 67 * implement nested interrupts, this can go away
68 */ 68 */
69 if (!in_interrupt()) 69 if (!in_interrupt())
70 set_eiem(cpu_eiem); 70 set_eiem(cpu_eiem);
71 71
72 /* This is just a simple NOP IPI. But what it does is cause 72 /* This is just a simple NOP IPI. But what it does is cause
73 * all the other CPUs to do a set_eiem(cpu_eiem) at the end 73 * all the other CPUs to do a set_eiem(cpu_eiem) at the end
74 * of the interrupt handler */ 74 * of the interrupt handler */
75 smp_send_all_nop(); 75 smp_send_all_nop();
76 } 76 }
77 77
78 static unsigned int cpu_startup_irq(unsigned int irq) 78 static unsigned int cpu_startup_irq(unsigned int irq)
79 { 79 {
80 cpu_enable_irq(irq); 80 cpu_enable_irq(irq);
81 return 0; 81 return 0;
82 } 82 }
83 83
84 void no_ack_irq(unsigned int irq) { } 84 void no_ack_irq(unsigned int irq) { }
85 void no_end_irq(unsigned int irq) { } 85 void no_end_irq(unsigned int irq) { }
86 86
87 #ifdef CONFIG_SMP 87 #ifdef CONFIG_SMP
88 int cpu_check_affinity(unsigned int irq, cpumask_t *dest) 88 int cpu_check_affinity(unsigned int irq, cpumask_t *dest)
89 { 89 {
90 int cpu_dest; 90 int cpu_dest;
91 91
92 /* timer and ipi have to always be received on all CPUs */ 92 /* timer and ipi have to always be received on all CPUs */
93 if (irq == TIMER_IRQ || irq == IPI_IRQ) { 93 if (irq == TIMER_IRQ || irq == IPI_IRQ) {
94 /* Bad linux design decision. The mask has already 94 /* Bad linux design decision. The mask has already
95 * been set; we must reset it */ 95 * been set; we must reset it */
96 irq_desc[irq].affinity = CPU_MASK_ALL; 96 irq_desc[irq].affinity = CPU_MASK_ALL;
97 return -EINVAL; 97 return -EINVAL;
98 } 98 }
99 99
100 /* whatever mask they set, we just allow one CPU */ 100 /* whatever mask they set, we just allow one CPU */
101 cpu_dest = first_cpu(*dest); 101 cpu_dest = first_cpu(*dest);
102 *dest = cpumask_of_cpu(cpu_dest); 102 *dest = cpumask_of_cpu(cpu_dest);
103 103
104 return 0; 104 return 0;
105 } 105 }
106 106
107 static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest) 107 static void cpu_set_affinity_irq(unsigned int irq, cpumask_t dest)
108 { 108 {
109 if (cpu_check_affinity(irq, &dest)) 109 if (cpu_check_affinity(irq, &dest))
110 return; 110 return;
111 111
112 irq_desc[irq].affinity = dest; 112 irq_desc[irq].affinity = dest;
113 } 113 }
114 #endif 114 #endif
115 115
116 static struct hw_interrupt_type cpu_interrupt_type = { 116 static struct hw_interrupt_type cpu_interrupt_type = {
117 .typename = "CPU", 117 .typename = "CPU",
118 .startup = cpu_startup_irq, 118 .startup = cpu_startup_irq,
119 .shutdown = cpu_disable_irq, 119 .shutdown = cpu_disable_irq,
120 .enable = cpu_enable_irq, 120 .enable = cpu_enable_irq,
121 .disable = cpu_disable_irq, 121 .disable = cpu_disable_irq,
122 .ack = no_ack_irq, 122 .ack = no_ack_irq,
123 .end = no_end_irq, 123 .end = no_end_irq,
124 #ifdef CONFIG_SMP 124 #ifdef CONFIG_SMP
125 .set_affinity = cpu_set_affinity_irq, 125 .set_affinity = cpu_set_affinity_irq,
126 #endif 126 #endif
127 /* XXX: Needs to be written. We managed without it so far, but 127 /* XXX: Needs to be written. We managed without it so far, but
128 * we really ought to write it. 128 * we really ought to write it.
129 */ 129 */
130 .retrigger = NULL, 130 .retrigger = NULL,
131 }; 131 };
132 132
133 int show_interrupts(struct seq_file *p, void *v) 133 int show_interrupts(struct seq_file *p, void *v)
134 { 134 {
135 int i = *(loff_t *) v, j; 135 int i = *(loff_t *) v, j;
136 unsigned long flags; 136 unsigned long flags;
137 137
138 if (i == 0) { 138 if (i == 0) {
139 seq_puts(p, " "); 139 seq_puts(p, " ");
140 for_each_online_cpu(j) 140 for_each_online_cpu(j)
141 seq_printf(p, " CPU%d", j); 141 seq_printf(p, " CPU%d", j);
142 142
143 #ifdef PARISC_IRQ_CR16_COUNTS 143 #ifdef PARISC_IRQ_CR16_COUNTS
144 seq_printf(p, " [min/avg/max] (CPU cycle counts)"); 144 seq_printf(p, " [min/avg/max] (CPU cycle counts)");
145 #endif 145 #endif
146 seq_putc(p, '\n'); 146 seq_putc(p, '\n');
147 } 147 }
148 148
149 if (i < NR_IRQS) { 149 if (i < NR_IRQS) {
150 struct irqaction *action; 150 struct irqaction *action;
151 151
152 spin_lock_irqsave(&irq_desc[i].lock, flags); 152 spin_lock_irqsave(&irq_desc[i].lock, flags);
153 action = irq_desc[i].action; 153 action = irq_desc[i].action;
154 if (!action) 154 if (!action)
155 goto skip; 155 goto skip;
156 seq_printf(p, "%3d: ", i); 156 seq_printf(p, "%3d: ", i);
157 #ifdef CONFIG_SMP 157 #ifdef CONFIG_SMP
158 for_each_online_cpu(j) 158 for_each_online_cpu(j)
159 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]); 159 seq_printf(p, "%10u ", kstat_cpu(j).irqs[i]);
160 #else 160 #else
161 seq_printf(p, "%10u ", kstat_irqs(i)); 161 seq_printf(p, "%10u ", kstat_irqs(i));
162 #endif 162 #endif
163 163
164 seq_printf(p, " %14s", irq_desc[i].chip->typename); 164 seq_printf(p, " %14s", irq_desc[i].chip->typename);
165 #ifndef PARISC_IRQ_CR16_COUNTS 165 #ifndef PARISC_IRQ_CR16_COUNTS
166 seq_printf(p, " %s", action->name); 166 seq_printf(p, " %s", action->name);
167 167
168 while ((action = action->next)) 168 while ((action = action->next))
169 seq_printf(p, ", %s", action->name); 169 seq_printf(p, ", %s", action->name);
170 #else 170 #else
171 for ( ;action; action = action->next) { 171 for ( ;action; action = action->next) {
172 unsigned int k, avg, min, max; 172 unsigned int k, avg, min, max;
173 173
174 min = max = action->cr16_hist[0]; 174 min = max = action->cr16_hist[0];
175 175
176 for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) { 176 for (avg = k = 0; k < PARISC_CR16_HIST_SIZE; k++) {
177 int hist = action->cr16_hist[k]; 177 int hist = action->cr16_hist[k];
178 178
179 if (hist) { 179 if (hist) {
180 avg += hist; 180 avg += hist;
181 } else 181 } else
182 break; 182 break;
183 183
184 if (hist > max) max = hist; 184 if (hist > max) max = hist;
185 if (hist < min) min = hist; 185 if (hist < min) min = hist;
186 } 186 }
187 187
188 avg /= k; 188 avg /= k;
189 seq_printf(p, " %s[%d/%d/%d]", action->name, 189 seq_printf(p, " %s[%d/%d/%d]", action->name,
190 min,avg,max); 190 min,avg,max);
191 } 191 }
192 #endif 192 #endif
193 193
194 seq_putc(p, '\n'); 194 seq_putc(p, '\n');
195 skip: 195 skip:
196 spin_unlock_irqrestore(&irq_desc[i].lock, flags); 196 spin_unlock_irqrestore(&irq_desc[i].lock, flags);
197 } 197 }
198 198
199 return 0; 199 return 0;
200 } 200 }
201 201
202 202
203 203
204 /* 204 /*
205 ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data. 205 ** The following form a "set": Virtual IRQ, Transaction Address, Trans Data.
206 ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit. 206 ** Respectively, these map to IRQ region+EIRR, Processor HPA, EIRR bit.
207 ** 207 **
208 ** To use txn_XXX() interfaces, get a Virtual IRQ first. 208 ** To use txn_XXX() interfaces, get a Virtual IRQ first.
209 ** Then use that to get the Transaction address and data. 209 ** Then use that to get the Transaction address and data.
210 */ 210 */
211 211
212 int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data) 212 int cpu_claim_irq(unsigned int irq, struct hw_interrupt_type *type, void *data)
213 { 213 {
214 if (irq_desc[irq].action) 214 if (irq_desc[irq].action)
215 return -EBUSY; 215 return -EBUSY;
216 if (irq_desc[irq].chip != &cpu_interrupt_type) 216 if (irq_desc[irq].chip != &cpu_interrupt_type)
217 return -EBUSY; 217 return -EBUSY;
218 218
219 if (type) { 219 if (type) {
220 irq_desc[irq].chip = type; 220 irq_desc[irq].chip = type;
221 irq_desc[irq].chip_data = data; 221 irq_desc[irq].chip_data = data;
222 cpu_interrupt_type.enable(irq); 222 cpu_interrupt_type.enable(irq);
223 } 223 }
224 return 0; 224 return 0;
225 } 225 }
226 226
227 int txn_claim_irq(int irq) 227 int txn_claim_irq(int irq)
228 { 228 {
229 return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq; 229 return cpu_claim_irq(irq, NULL, NULL) ? -1 : irq;
230 } 230 }
231 231
232 /* 232 /*
233 * The bits_wide parameter accommodates the limitations of the HW/SW which 233 * The bits_wide parameter accommodates the limitations of the HW/SW which
234 * use these bits: 234 * use these bits:
235 * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register) 235 * Legacy PA I/O (GSC/NIO): 5 bits (architected EIM register)
236 * V-class (EPIC): 6 bits 236 * V-class (EPIC): 6 bits
237 * N/L/A-class (iosapic): 8 bits 237 * N/L/A-class (iosapic): 8 bits
238 * PCI 2.2 MSI: 16 bits 238 * PCI 2.2 MSI: 16 bits
239 * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric) 239 * Some PCI devices: 32 bits (Symbios SCSI/ATM/HyperFabric)
240 * 240 *
241 * On the service provider side: 241 * On the service provider side:
242 * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register) 242 * o PA 1.1 (and PA2.0 narrow mode) 5-bits (width of EIR register)
243 * o PA 2.0 wide mode 6-bits (per processor) 243 * o PA 2.0 wide mode 6-bits (per processor)
244 * o IA64 8-bits (0-256 total) 244 * o IA64 8-bits (0-256 total)
245 * 245 *
246 * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported 246 * So a Legacy PA I/O device on a PA 2.0 box can't use all the bits supported
247 * by the processor...and the N/L-class I/O subsystem supports more bits than 247 * by the processor...and the N/L-class I/O subsystem supports more bits than
248 * PA2.0 has. The first case is the problem. 248 * PA2.0 has. The first case is the problem.
249 */ 249 */
250 int txn_alloc_irq(unsigned int bits_wide) 250 int txn_alloc_irq(unsigned int bits_wide)
251 { 251 {
252 int irq; 252 int irq;
253 253
254 /* never return irq 0 cause that's the interval timer */ 254 /* never return irq 0 cause that's the interval timer */
255 for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) { 255 for (irq = CPU_IRQ_BASE + 1; irq <= CPU_IRQ_MAX; irq++) {
256 if (cpu_claim_irq(irq, NULL, NULL) < 0) 256 if (cpu_claim_irq(irq, NULL, NULL) < 0)
257 continue; 257 continue;
258 if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide)) 258 if ((irq - CPU_IRQ_BASE) >= (1 << bits_wide))
259 continue; 259 continue;
260 return irq; 260 return irq;
261 } 261 }
262 262
263 /* unlikely, but be prepared */ 263 /* unlikely, but be prepared */
264 return -1; 264 return -1;
265 } 265 }
266 266
267 267
268 unsigned long txn_affinity_addr(unsigned int irq, int cpu) 268 unsigned long txn_affinity_addr(unsigned int irq, int cpu)
269 { 269 {
270 #ifdef CONFIG_SMP 270 #ifdef CONFIG_SMP
271 irq_desc[irq].affinity = cpumask_of_cpu(cpu); 271 irq_desc[irq].affinity = cpumask_of_cpu(cpu);
272 #endif 272 #endif
273 273
274 return cpu_data[cpu].txn_addr; 274 return cpu_data[cpu].txn_addr;
275 } 275 }
276 276
277 277
278 unsigned long txn_alloc_addr(unsigned int virt_irq) 278 unsigned long txn_alloc_addr(unsigned int virt_irq)
279 { 279 {
280 static int next_cpu = -1; 280 static int next_cpu = -1;
281 281
282 next_cpu++; /* assign to "next" CPU we want this bugger on */ 282 next_cpu++; /* assign to "next" CPU we want this bugger on */
283 283
284 /* validate entry */ 284 /* validate entry */
285 while ((next_cpu < NR_CPUS) && (!cpu_data[next_cpu].txn_addr || 285 while ((next_cpu < NR_CPUS) && (!cpu_data[next_cpu].txn_addr ||
286 !cpu_online(next_cpu))) 286 !cpu_online(next_cpu)))
287 next_cpu++; 287 next_cpu++;
288 288
289 if (next_cpu >= NR_CPUS) 289 if (next_cpu >= NR_CPUS)
290 next_cpu = 0; /* nothing else, assign monarch */ 290 next_cpu = 0; /* nothing else, assign monarch */
291 291
292 return txn_affinity_addr(virt_irq, next_cpu); 292 return txn_affinity_addr(virt_irq, next_cpu);
293 } 293 }
294 294
295 295
296 unsigned int txn_alloc_data(unsigned int virt_irq) 296 unsigned int txn_alloc_data(unsigned int virt_irq)
297 { 297 {
298 return virt_irq - CPU_IRQ_BASE; 298 return virt_irq - CPU_IRQ_BASE;
299 } 299 }
300 300
301 /* ONLY called from entry.S:intr_extint() */ 301 /* ONLY called from entry.S:intr_extint() */
302 void do_cpu_irq_mask(struct pt_regs *regs) 302 void do_cpu_irq_mask(struct pt_regs *regs)
303 { 303 {
304 unsigned long eirr_val; 304 unsigned long eirr_val;
305 305
306 irq_enter(); 306 irq_enter();
307 307
308 /* 308 /*
309 * Don't allow TIMER or IPI nested interrupts. 309 * Don't allow TIMER or IPI nested interrupts.
310 * Allowing any single interrupt to nest can lead to that CPU 310 * Allowing any single interrupt to nest can lead to that CPU
311 * handling interrupts with all enabled interrupts unmasked. 311 * handling interrupts with all enabled interrupts unmasked.
312 */ 312 */
313 set_eiem(0UL); 313 set_eiem(0UL);
314 314
315 /* 1) only process IRQs that are enabled/unmasked (cpu_eiem) 315 /* 1) only process IRQs that are enabled/unmasked (cpu_eiem)
316 * 2) We loop here on EIRR contents in order to avoid 316 * 2) We loop here on EIRR contents in order to avoid
317 * nested interrupts or having to take another interrupt 317 * nested interrupts or having to take another interrupt
318 * when we could have just handled it right away. 318 * when we could have just handled it right away.
319 */ 319 */
320 for (;;) { 320 for (;;) {
321 unsigned long bit = (1UL << (BITS_PER_LONG - 1)); 321 unsigned long bit = (1UL << (BITS_PER_LONG - 1));
322 unsigned int irq; 322 unsigned int irq;
323 eirr_val = mfctl(23) & cpu_eiem; 323 eirr_val = mfctl(23) & cpu_eiem;
324 if (!eirr_val) 324 if (!eirr_val)
325 break; 325 break;
326 326
327 mtctl(eirr_val, 23); /* reset bits we are going to process */ 327 mtctl(eirr_val, 23); /* reset bits we are going to process */
328 328
329 /* Work our way from MSb to LSb...same order we alloc EIRs */ 329 /* Work our way from MSb to LSb...same order we alloc EIRs */
330 for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) { 330 for (irq = TIMER_IRQ; eirr_val && bit; bit>>=1, irq++) {
331 #ifdef CONFIG_SMP 331 #ifdef CONFIG_SMP
332 cpumask_t dest = irq_desc[irq].affinity; 332 cpumask_t dest = irq_desc[irq].affinity;
333 #endif 333 #endif
334 if (!(bit & eirr_val)) 334 if (!(bit & eirr_val))
335 continue; 335 continue;
336 336
337 /* clear bit in mask - can exit loop sooner */ 337 /* clear bit in mask - can exit loop sooner */
338 eirr_val &= ~bit; 338 eirr_val &= ~bit;
339 339
340 #ifdef CONFIG_SMP 340 #ifdef CONFIG_SMP
341 /* FIXME: because generic set affinity mucks 341 /* FIXME: because generic set affinity mucks
342 * with the affinity before sending it to us 342 * with the affinity before sending it to us
343 * we can get the situation where the affinity is 343 * we can get the situation where the affinity is
344 * wrong for our CPU type interrupts */ 344 * wrong for our CPU type interrupts */
345 if (irq != TIMER_IRQ && irq != IPI_IRQ && 345 if (irq != TIMER_IRQ && irq != IPI_IRQ &&
346 !cpu_isset(smp_processor_id(), dest)) { 346 !cpu_isset(smp_processor_id(), dest)) {
347 int cpu = first_cpu(dest); 347 int cpu = first_cpu(dest);
348 348
349 printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n", 349 printk(KERN_DEBUG "redirecting irq %d from CPU %d to %d\n",
350 irq, smp_processor_id(), cpu); 350 irq, smp_processor_id(), cpu);
351 gsc_writel(irq + CPU_IRQ_BASE, 351 gsc_writel(irq + CPU_IRQ_BASE,
352 cpu_data[cpu].hpa); 352 cpu_data[cpu].hpa);
353 continue; 353 continue;
354 } 354 }
355 #endif 355 #endif
356 356
357 __do_IRQ(irq, regs); 357 __do_IRQ(irq, regs);
358 } 358 }
359 } 359 }
360 360
361 set_eiem(cpu_eiem); /* restore original mask */ 361 set_eiem(cpu_eiem); /* restore original mask */
362 irq_exit(); 362 irq_exit();
363 } 363 }
364 364
365 365
366 static struct irqaction timer_action = { 366 static struct irqaction timer_action = {
367 .handler = timer_interrupt, 367 .handler = timer_interrupt,
368 .name = "timer", 368 .name = "timer",
369 .flags = SA_INTERRUPT, 369 .flags = IRQF_DISABLED,
370 }; 370 };
371 371
372 #ifdef CONFIG_SMP 372 #ifdef CONFIG_SMP
373 static struct irqaction ipi_action = { 373 static struct irqaction ipi_action = {
374 .handler = ipi_interrupt, 374 .handler = ipi_interrupt,
375 .name = "IPI", 375 .name = "IPI",
376 .flags = SA_INTERRUPT, 376 .flags = IRQF_DISABLED,
377 }; 377 };
378 #endif 378 #endif
379 379
380 static void claim_cpu_irqs(void) 380 static void claim_cpu_irqs(void)
381 { 381 {
382 int i; 382 int i;
383 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) { 383 for (i = CPU_IRQ_BASE; i <= CPU_IRQ_MAX; i++) {
384 irq_desc[i].chip = &cpu_interrupt_type; 384 irq_desc[i].chip = &cpu_interrupt_type;
385 } 385 }
386 386
387 irq_desc[TIMER_IRQ].action = &timer_action; 387 irq_desc[TIMER_IRQ].action = &timer_action;
388 irq_desc[TIMER_IRQ].status |= IRQ_PER_CPU; 388 irq_desc[TIMER_IRQ].status |= IRQ_PER_CPU;
389 #ifdef CONFIG_SMP 389 #ifdef CONFIG_SMP
390 irq_desc[IPI_IRQ].action = &ipi_action; 390 irq_desc[IPI_IRQ].action = &ipi_action;
391 irq_desc[IPI_IRQ].status = IRQ_PER_CPU; 391 irq_desc[IPI_IRQ].status = IRQ_PER_CPU;
392 #endif 392 #endif
393 } 393 }
394 394
395 void __init init_IRQ(void) 395 void __init init_IRQ(void)
396 { 396 {
397 local_irq_disable(); /* PARANOID - should already be disabled */ 397 local_irq_disable(); /* PARANOID - should already be disabled */
398 mtctl(~0UL, 23); /* EIRR : clear all pending external intr */ 398 mtctl(~0UL, 23); /* EIRR : clear all pending external intr */
399 claim_cpu_irqs(); 399 claim_cpu_irqs();
400 #ifdef CONFIG_SMP 400 #ifdef CONFIG_SMP
401 if (!cpu_eiem) 401 if (!cpu_eiem)
402 cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ); 402 cpu_eiem = EIEM_MASK(IPI_IRQ) | EIEM_MASK(TIMER_IRQ);
403 #else 403 #else
404 cpu_eiem = EIEM_MASK(TIMER_IRQ); 404 cpu_eiem = EIEM_MASK(TIMER_IRQ);
405 #endif 405 #endif
406 set_eiem(cpu_eiem); /* EIEM : enable all external intr */ 406 set_eiem(cpu_eiem); /* EIEM : enable all external intr */
407 407
408 } 408 }
409 409
410 void ack_bad_irq(unsigned int irq) 410 void ack_bad_irq(unsigned int irq)
411 { 411 {
412 printk("unexpected IRQ %d\n", irq); 412 printk("unexpected IRQ %d\n", irq);
413 } 413 }
414 414
include/asm-parisc/floppy.h
Diff comments   View file @ 733ea86
1 /* Architecture specific parts of the Floppy driver 1 /* Architecture specific parts of the Floppy driver
2 * 2 *
3 * Linux/PA-RISC Project (http://www.parisc-linux.org/) 3 * Linux/PA-RISC Project (http://www.parisc-linux.org/)
4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org) 4 * Copyright (C) 2000 Matthew Wilcox (willy a debian . org)
5 * Copyright (C) 2000 Dave Kennedy 5 * Copyright (C) 2000 Dave Kennedy
6 * 6 *
7 * This program is free software; you can redistribute it and/or modify 7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by 8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or 9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version. 10 * (at your option) any later version.
11 * 11 *
12 * This program is distributed in the hope that it will be useful, 12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of 13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details. 15 * GNU General Public License for more details.
16 * 16 *
17 * You should have received a copy of the GNU General Public License 17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software 18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
20 */ 20 */
21 #ifndef __ASM_PARISC_FLOPPY_H 21 #ifndef __ASM_PARISC_FLOPPY_H
22 #define __ASM_PARISC_FLOPPY_H 22 #define __ASM_PARISC_FLOPPY_H
23 23
24 #include <linux/vmalloc.h> 24 #include <linux/vmalloc.h>
25 25
26 26
27 /* 27 /*
28 * The DMA channel used by the floppy controller cannot access data at 28 * The DMA channel used by the floppy controller cannot access data at
29 * addresses >= 16MB 29 * addresses >= 16MB
30 * 30 *
31 * Went back to the 1MB limit, as some people had problems with the floppy 31 * Went back to the 1MB limit, as some people had problems with the floppy
32 * driver otherwise. It doesn't matter much for performance anyway, as most 32 * driver otherwise. It doesn't matter much for performance anyway, as most
33 * floppy accesses go through the track buffer. 33 * floppy accesses go through the track buffer.
34 */ 34 */
35 #define _CROSS_64KB(a,s,vdma) \ 35 #define _CROSS_64KB(a,s,vdma) \
36 (!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64)) 36 (!vdma && ((unsigned long)(a)/K_64 != ((unsigned long)(a) + (s) - 1) / K_64))
37 37
38 #define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1) 38 #define CROSS_64KB(a,s) _CROSS_64KB(a,s,use_virtual_dma & 1)
39 39
40 40
41 #define SW fd_routine[use_virtual_dma&1] 41 #define SW fd_routine[use_virtual_dma&1]
42 #define CSW fd_routine[can_use_virtual_dma & 1] 42 #define CSW fd_routine[can_use_virtual_dma & 1]
43 43
44 44
45 #define fd_inb(port) readb(port) 45 #define fd_inb(port) readb(port)
46 #define fd_outb(value, port) writeb(value, port) 46 #define fd_outb(value, port) writeb(value, port)
47 47
48 #define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy") 48 #define fd_request_dma() CSW._request_dma(FLOPPY_DMA,"floppy")
49 #define fd_free_dma() CSW._free_dma(FLOPPY_DMA) 49 #define fd_free_dma() CSW._free_dma(FLOPPY_DMA)
50 #define fd_enable_irq() enable_irq(FLOPPY_IRQ) 50 #define fd_enable_irq() enable_irq(FLOPPY_IRQ)
51 #define fd_disable_irq() disable_irq(FLOPPY_IRQ) 51 #define fd_disable_irq() disable_irq(FLOPPY_IRQ)
52 #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL) 52 #define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
53 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA) 53 #define fd_get_dma_residue() SW._get_dma_residue(FLOPPY_DMA)
54 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size) 54 #define fd_dma_mem_alloc(size) SW._dma_mem_alloc(size)
55 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io) 55 #define fd_dma_setup(addr, size, mode, io) SW._dma_setup(addr, size, mode, io)
56 56
57 #define FLOPPY_CAN_FALLBACK_ON_NODMA 57 #define FLOPPY_CAN_FALLBACK_ON_NODMA
58 58
59 static int virtual_dma_count=0; 59 static int virtual_dma_count=0;
60 static int virtual_dma_residue=0; 60 static int virtual_dma_residue=0;
61 static char *virtual_dma_addr=0; 61 static char *virtual_dma_addr=0;
62 static int virtual_dma_mode=0; 62 static int virtual_dma_mode=0;
63 static int doing_pdma=0; 63 static int doing_pdma=0;
64 64
65 static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs) 65 static void floppy_hardint(int irq, void *dev_id, struct pt_regs * regs)
66 { 66 {
67 register unsigned char st; 67 register unsigned char st;
68 68
69 #undef TRACE_FLPY_INT 69 #undef TRACE_FLPY_INT
70 70
71 #ifdef TRACE_FLPY_INT 71 #ifdef TRACE_FLPY_INT
72 static int calls=0; 72 static int calls=0;
73 static int bytes=0; 73 static int bytes=0;
74 static int dma_wait=0; 74 static int dma_wait=0;
75 #endif 75 #endif
76 if (!doing_pdma) { 76 if (!doing_pdma) {
77 floppy_interrupt(irq, dev_id, regs); 77 floppy_interrupt(irq, dev_id, regs);
78 return; 78 return;
79 } 79 }
80 80
81 #ifdef TRACE_FLPY_INT 81 #ifdef TRACE_FLPY_INT
82 if(!calls) 82 if(!calls)
83 bytes = virtual_dma_count; 83 bytes = virtual_dma_count;
84 #endif 84 #endif
85 85
86 { 86 {
87 register int lcount; 87 register int lcount;
88 register char *lptr = virtual_dma_addr; 88 register char *lptr = virtual_dma_addr;
89 89
90 for (lcount = virtual_dma_count; lcount; lcount--) { 90 for (lcount = virtual_dma_count; lcount; lcount--) {
91 st = fd_inb(virtual_dma_port+4) & 0xa0 ; 91 st = fd_inb(virtual_dma_port+4) & 0xa0 ;
92 if (st != 0xa0) 92 if (st != 0xa0)
93 break; 93 break;
94 if (virtual_dma_mode) { 94 if (virtual_dma_mode) {
95 fd_outb(*lptr, virtual_dma_port+5); 95 fd_outb(*lptr, virtual_dma_port+5);
96 } else { 96 } else {
97 *lptr = fd_inb(virtual_dma_port+5); 97 *lptr = fd_inb(virtual_dma_port+5);
98 } 98 }
99 lptr++; 99 lptr++;
100 } 100 }
101 virtual_dma_count = lcount; 101 virtual_dma_count = lcount;
102 virtual_dma_addr = lptr; 102 virtual_dma_addr = lptr;
103 st = fd_inb(virtual_dma_port+4); 103 st = fd_inb(virtual_dma_port+4);
104 } 104 }
105 105
106 #ifdef TRACE_FLPY_INT 106 #ifdef TRACE_FLPY_INT
107 calls++; 107 calls++;
108 #endif 108 #endif
109 if (st == 0x20) 109 if (st == 0x20)
110 return; 110 return;
111 if (!(st & 0x20)) { 111 if (!(st & 0x20)) {
112 virtual_dma_residue += virtual_dma_count; 112 virtual_dma_residue += virtual_dma_count;
113 virtual_dma_count = 0; 113 virtual_dma_count = 0;
114 #ifdef TRACE_FLPY_INT 114 #ifdef TRACE_FLPY_INT
115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n", 115 printk("count=%x, residue=%x calls=%d bytes=%d dma_wait=%d\n",
116 virtual_dma_count, virtual_dma_residue, calls, bytes, 116 virtual_dma_count, virtual_dma_residue, calls, bytes,
117 dma_wait); 117 dma_wait);
118 calls = 0; 118 calls = 0;
119 dma_wait=0; 119 dma_wait=0;
120 #endif 120 #endif
121 doing_pdma = 0; 121 doing_pdma = 0;
122 floppy_interrupt(irq, dev_id, regs); 122 floppy_interrupt(irq, dev_id, regs);
123 return; 123 return;
124 } 124 }
125 #ifdef TRACE_FLPY_INT 125 #ifdef TRACE_FLPY_INT
126 if (!virtual_dma_count) 126 if (!virtual_dma_count)
127 dma_wait++; 127 dma_wait++;
128 #endif 128 #endif
129 } 129 }
130 130
131 static void fd_disable_dma(void) 131 static void fd_disable_dma(void)
132 { 132 {
133 if(! (can_use_virtual_dma & 1)) 133 if(! (can_use_virtual_dma & 1))
134 disable_dma(FLOPPY_DMA); 134 disable_dma(FLOPPY_DMA);
135 doing_pdma = 0; 135 doing_pdma = 0;
136 virtual_dma_residue += virtual_dma_count; 136 virtual_dma_residue += virtual_dma_count;
137 virtual_dma_count=0; 137 virtual_dma_count=0;
138 } 138 }
139 139
140 static int vdma_request_dma(unsigned int dmanr, const char * device_id) 140 static int vdma_request_dma(unsigned int dmanr, const char * device_id)
141 { 141 {
142 return 0; 142 return 0;
143 } 143 }
144 144
145 static void vdma_nop(unsigned int dummy) 145 static void vdma_nop(unsigned int dummy)
146 { 146 {
147 } 147 }
148 148
149 149
150 static int vdma_get_dma_residue(unsigned int dummy) 150 static int vdma_get_dma_residue(unsigned int dummy)
151 { 151 {
152 return virtual_dma_count + virtual_dma_residue; 152 return virtual_dma_count + virtual_dma_residue;
153 } 153 }
154 154
155 155
156 static int fd_request_irq(void) 156 static int fd_request_irq(void)
157 { 157 {
158 if(can_use_virtual_dma) 158 if(can_use_virtual_dma)
159 return request_irq(FLOPPY_IRQ, floppy_hardint,SA_INTERRUPT, 159 return request_irq(FLOPPY_IRQ, floppy_hardint,
160 "floppy", NULL); 160 IRQF_DISABLED, "floppy", NULL);
161 else 161 else
162 return request_irq(FLOPPY_IRQ, floppy_interrupt, SA_INTERRUPT, 162 return request_irq(FLOPPY_IRQ, floppy_interrupt,
163 "floppy", NULL); 163 IRQF_DISABLED, "floppy", NULL);
164 } 164 }
165 165
166 static unsigned long dma_mem_alloc(unsigned long size) 166 static unsigned long dma_mem_alloc(unsigned long size)
167 { 167 {
168 return __get_dma_pages(GFP_KERNEL, get_order(size)); 168 return __get_dma_pages(GFP_KERNEL, get_order(size));
169 } 169 }
170 170
171 171
172 static unsigned long vdma_mem_alloc(unsigned long size) 172 static unsigned long vdma_mem_alloc(unsigned long size)
173 { 173 {
174 return (unsigned long) vmalloc(size); 174 return (unsigned long) vmalloc(size);
175 175
176 } 176 }
177 177
178 #define nodma_mem_alloc(size) vdma_mem_alloc(size) 178 #define nodma_mem_alloc(size) vdma_mem_alloc(size)
179 179
180 static void _fd_dma_mem_free(unsigned long addr, unsigned long size) 180 static void _fd_dma_mem_free(unsigned long addr, unsigned long size)
181 { 181 {
182 if((unsigned int) addr >= (unsigned int) high_memory) 182 if((unsigned int) addr >= (unsigned int) high_memory)
183 return vfree((void *)addr); 183 return vfree((void *)addr);
184 else 184 else
185 free_pages(addr, get_order(size)); 185 free_pages(addr, get_order(size));
186 } 186 }
187 187
188 #define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size) 188 #define fd_dma_mem_free(addr, size) _fd_dma_mem_free(addr, size)
189 189
190 static void _fd_chose_dma_mode(char *addr, unsigned long size) 190 static void _fd_chose_dma_mode(char *addr, unsigned long size)
191 { 191 {
192 if(can_use_virtual_dma == 2) { 192 if(can_use_virtual_dma == 2) {
193 if((unsigned int) addr >= (unsigned int) high_memory || 193 if((unsigned int) addr >= (unsigned int) high_memory ||
194 virt_to_bus(addr) >= 0x1000000 || 194 virt_to_bus(addr) >= 0x1000000 ||
195 _CROSS_64KB(addr, size, 0)) 195 _CROSS_64KB(addr, size, 0))
196 use_virtual_dma = 1; 196 use_virtual_dma = 1;
197 else 197 else
198 use_virtual_dma = 0; 198 use_virtual_dma = 0;
199 } else { 199 } else {
200 use_virtual_dma = can_use_virtual_dma & 1; 200 use_virtual_dma = can_use_virtual_dma & 1;
201 } 201 }
202 } 202 }
203 203
204 #define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size) 204 #define fd_chose_dma_mode(addr, size) _fd_chose_dma_mode(addr, size)
205 205
206 206
207 static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io) 207 static int vdma_dma_setup(char *addr, unsigned long size, int mode, int io)
208 { 208 {
209 doing_pdma = 1; 209 doing_pdma = 1;
210 virtual_dma_port = io; 210 virtual_dma_port = io;
211 virtual_dma_mode = (mode == DMA_MODE_WRITE); 211 virtual_dma_mode = (mode == DMA_MODE_WRITE);
212 virtual_dma_addr = addr; 212 virtual_dma_addr = addr;
213 virtual_dma_count = size; 213 virtual_dma_count = size;
214 virtual_dma_residue = 0; 214 virtual_dma_residue = 0;
215 return 0; 215 return 0;
216 } 216 }
217 217
218 static int hard_dma_setup(char *addr, unsigned long size, int mode, int io) 218 static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
219 { 219 {
220 #ifdef FLOPPY_SANITY_CHECK 220 #ifdef FLOPPY_SANITY_CHECK
221 if (CROSS_64KB(addr, size)) { 221 if (CROSS_64KB(addr, size)) {
222 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size); 222 printk("DMA crossing 64-K boundary %p-%p\n", addr, addr+size);
223 return -1; 223 return -1;
224 } 224 }
225 #endif 225 #endif
226 /* actual, physical DMA */ 226 /* actual, physical DMA */
227 doing_pdma = 0; 227 doing_pdma = 0;
228 clear_dma_ff(FLOPPY_DMA); 228 clear_dma_ff(FLOPPY_DMA);
229 set_dma_mode(FLOPPY_DMA,mode); 229 set_dma_mode(FLOPPY_DMA,mode);
230 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr)); 230 set_dma_addr(FLOPPY_DMA,virt_to_bus(addr));
231 set_dma_count(FLOPPY_DMA,size); 231 set_dma_count(FLOPPY_DMA,size);
232 enable_dma(FLOPPY_DMA); 232 enable_dma(FLOPPY_DMA);
233 return 0; 233 return 0;
234 } 234 }
235 235
236 static struct fd_routine_l { 236 static struct fd_routine_l {
237 int (*_request_dma)(unsigned int dmanr, const char * device_id); 237 int (*_request_dma)(unsigned int dmanr, const char * device_id);
238 void (*_free_dma)(unsigned int dmanr); 238 void (*_free_dma)(unsigned int dmanr);
239 int (*_get_dma_residue)(unsigned int dummy); 239 int (*_get_dma_residue)(unsigned int dummy);
240 unsigned long (*_dma_mem_alloc) (unsigned long size); 240 unsigned long (*_dma_mem_alloc) (unsigned long size);
241 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io); 241 int (*_dma_setup)(char *addr, unsigned long size, int mode, int io);
242 } fd_routine[] = { 242 } fd_routine[] = {
243 { 243 {
244 request_dma, 244 request_dma,
245 free_dma, 245 free_dma,
246 get_dma_residue, 246 get_dma_residue,
247 dma_mem_alloc, 247 dma_mem_alloc,
248 hard_dma_setup 248 hard_dma_setup
249 }, 249 },
250 { 250 {
251 vdma_request_dma, 251 vdma_request_dma,
252 vdma_nop, 252 vdma_nop,
253 vdma_get_dma_residue, 253 vdma_get_dma_residue,
254 vdma_mem_alloc, 254 vdma_mem_alloc,
255 vdma_dma_setup 255 vdma_dma_setup
256 } 256 }
257 }; 257 };
258 258
259 259
260 static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */ 260 static int FDC1 = 0x3f0; /* Lies. Floppy controller is memory mapped, not io mapped */
261 static int FDC2 = -1; 261 static int FDC2 = -1;
262 262
263 #define FLOPPY0_TYPE 0 263 #define FLOPPY0_TYPE 0
264 #define FLOPPY1_TYPE 0 264 #define FLOPPY1_TYPE 0
265 265
266 #define N_FDC 1 266 #define N_FDC 1
267 #define N_DRIVE 8 267 #define N_DRIVE 8
268 268
269 #define FLOPPY_MOTOR_MASK 0xf0 269 #define FLOPPY_MOTOR_MASK 0xf0
270 270
271 #define AUTO_DMA 271 #define AUTO_DMA
272 272
273 #define EXTRA_FLOPPY_PARAMS 273 #define EXTRA_FLOPPY_PARAMS
274 274
275 #endif /* __ASM_PARISC_FLOPPY_H */ 275 #endif /* __ASM_PARISC_FLOPPY_H */
276 276
include/asm-parisc/signal.h
Diff comments   View file @ 733ea86
1 #ifndef _ASM_PARISC_SIGNAL_H 1 #ifndef _ASM_PARISC_SIGNAL_H
2 #define _ASM_PARISC_SIGNAL_H 2 #define _ASM_PARISC_SIGNAL_H
3 3
4 #define SIGHUP 1 4 #define SIGHUP 1
5 #define SIGINT 2 5 #define SIGINT 2
6 #define SIGQUIT 3 6 #define SIGQUIT 3
7 #define SIGILL 4 7 #define SIGILL 4
8 #define SIGTRAP 5 8 #define SIGTRAP 5
9 #define SIGABRT 6 9 #define SIGABRT 6
10 #define SIGIOT 6 10 #define SIGIOT 6
11 #define SIGEMT 7 11 #define SIGEMT 7
12 #define SIGFPE 8 12 #define SIGFPE 8
13 #define SIGKILL 9 13 #define SIGKILL 9
14 #define SIGBUS 10 14 #define SIGBUS 10
15 #define SIGSEGV 11 15 #define SIGSEGV 11
16 #define SIGSYS 12 /* Linux doesn't use this */ 16 #define SIGSYS 12 /* Linux doesn't use this */
17 #define SIGPIPE 13 17 #define SIGPIPE 13
18 #define SIGALRM 14 18 #define SIGALRM 14
19 #define SIGTERM 15 19 #define SIGTERM 15
20 #define SIGUSR1 16 20 #define SIGUSR1 16
21 #define SIGUSR2 17 21 #define SIGUSR2 17
22 #define SIGCHLD 18 22 #define SIGCHLD 18
23 #define SIGPWR 19 23 #define SIGPWR 19
24 #define SIGVTALRM 20 24 #define SIGVTALRM 20
25 #define SIGPROF 21 25 #define SIGPROF 21
26 #define SIGIO 22 26 #define SIGIO 22
27 #define SIGPOLL SIGIO 27 #define SIGPOLL SIGIO
28 #define SIGWINCH 23 28 #define SIGWINCH 23
29 #define SIGSTOP 24 29 #define SIGSTOP 24
30 #define SIGTSTP 25 30 #define SIGTSTP 25
31 #define SIGCONT 26 31 #define SIGCONT 26
32 #define SIGTTIN 27 32 #define SIGTTIN 27
33 #define SIGTTOU 28 33 #define SIGTTOU 28
34 #define SIGURG 29 34 #define SIGURG 29
35 #define SIGLOST 30 /* Linux doesn't use this either */ 35 #define SIGLOST 30 /* Linux doesn't use this either */
36 #define SIGUNUSED 31 36 #define SIGUNUSED 31
37 #define SIGRESERVE SIGUNUSED 37 #define SIGRESERVE SIGUNUSED
38 38
39 #define SIGXCPU 33 39 #define SIGXCPU 33
40 #define SIGXFSZ 34 40 #define SIGXFSZ 34
41 #define SIGSTKFLT 36 41 #define SIGSTKFLT 36
42 42
43 /* These should not be considered constants from userland. */ 43 /* These should not be considered constants from userland. */
44 #define SIGRTMIN 37 44 #define SIGRTMIN 37
45 #define SIGRTMAX _NSIG /* it's 44 under HP/UX */ 45 #define SIGRTMAX _NSIG /* it's 44 under HP/UX */
46 46
47 /* 47 /*
48 * SA_FLAGS values: 48 * SA_FLAGS values:
49 * 49 *
50 * SA_ONSTACK indicates that a registered stack_t will be used. 50 * SA_ONSTACK indicates that a registered stack_t will be used.
51 * SA_INTERRUPT is a no-op, but left due to historical reasons. Use the
52 * SA_RESTART flag to get restarting signals (which were the default long ago) 51 * SA_RESTART flag to get restarting signals (which were the default long ago)
53 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop. 52 * SA_NOCLDSTOP flag to turn off SIGCHLD when children stop.
54 * SA_RESETHAND clears the handler when the signal is delivered. 53 * SA_RESETHAND clears the handler when the signal is delivered.
55 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies. 54 * SA_NOCLDWAIT flag on SIGCHLD to inhibit zombies.
56 * SA_NODEFER prevents the current signal from being masked in the handler. 55 * SA_NODEFER prevents the current signal from being masked in the handler.
57 * 56 *
58 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single 57 * SA_ONESHOT and SA_NOMASK are the historical Linux names for the Single
59 * Unix names RESETHAND and NODEFER respectively. 58 * Unix names RESETHAND and NODEFER respectively.
60 */ 59 */
61 #define SA_ONSTACK 0x00000001 60 #define SA_ONSTACK 0x00000001
62 #define SA_RESETHAND 0x00000004 61 #define SA_RESETHAND 0x00000004
63 #define SA_NOCLDSTOP 0x00000008 62 #define SA_NOCLDSTOP 0x00000008
64 #define SA_SIGINFO 0x00000010 63 #define SA_SIGINFO 0x00000010
65 #define SA_NODEFER 0x00000020 64 #define SA_NODEFER 0x00000020
66 #define SA_RESTART 0x00000040 65 #define SA_RESTART 0x00000040
67 #define SA_NOCLDWAIT 0x00000080 66 #define SA_NOCLDWAIT 0x00000080
68 #define _SA_SIGGFAULT 0x00000100 /* HPUX */ 67 #define _SA_SIGGFAULT 0x00000100 /* HPUX */
69 68
70 #define SA_NOMASK SA_NODEFER 69 #define SA_NOMASK SA_NODEFER
71 #define SA_ONESHOT SA_RESETHAND 70 #define SA_ONESHOT SA_RESETHAND
72 #define SA_INTERRUPT 0x20000000 /* dummy -- ignored */
73 71
74 #define SA_RESTORER 0x04000000 /* obsolete -- ignored */ 72 #define SA_RESTORER 0x04000000 /* obsolete -- ignored */
75 73
76 /* 74 /*
77 * sigaltstack controls 75 * sigaltstack controls
78 */ 76 */
79 #define SS_ONSTACK 1 77 #define SS_ONSTACK 1
80 #define SS_DISABLE 2 78 #define SS_DISABLE 2
81 79
82 #define MINSIGSTKSZ 2048 80 #define MINSIGSTKSZ 2048
83 #define SIGSTKSZ 8192 81 #define SIGSTKSZ 8192
84 82
85 #ifdef __KERNEL__ 83 #ifdef __KERNEL__
86 84
87 #define _NSIG 64 85 #define _NSIG 64
88 /* bits-per-word, where word apparently means 'long' not 'int' */ 86 /* bits-per-word, where word apparently means 'long' not 'int' */
89 #define _NSIG_BPW BITS_PER_LONG 87 #define _NSIG_BPW BITS_PER_LONG
90 #define _NSIG_WORDS (_NSIG / _NSIG_BPW) 88 #define _NSIG_WORDS (_NSIG / _NSIG_BPW)
91 89
92 #endif /* __KERNEL__ */ 90 #endif /* __KERNEL__ */
93 91
94 #define SIG_BLOCK 0 /* for blocking signals */ 92 #define SIG_BLOCK 0 /* for blocking signals */
95 #define SIG_UNBLOCK 1 /* for unblocking signals */ 93 #define SIG_UNBLOCK 1 /* for unblocking signals */
96 #define SIG_SETMASK 2 /* for setting the signal mask */ 94 #define SIG_SETMASK 2 /* for setting the signal mask */
97 95
98 #define SIG_DFL ((__sighandler_t)0) /* default signal handling */ 96 #define SIG_DFL ((__sighandler_t)0) /* default signal handling */
99 #define SIG_IGN ((__sighandler_t)1) /* ignore signal */ 97 #define SIG_IGN ((__sighandler_t)1) /* ignore signal */
100 #define SIG_ERR ((__sighandler_t)-1) /* error return from signal */ 98 #define SIG_ERR ((__sighandler_t)-1) /* error return from signal */
101 99
102 # ifndef __ASSEMBLY__ 100 # ifndef __ASSEMBLY__
103 101
104 # include <linux/types.h> 102 # include <linux/types.h>
105 103
106 /* Avoid too many header ordering problems. */ 104 /* Avoid too many header ordering problems. */
107 struct siginfo; 105 struct siginfo;
108 106
109 /* Type of a signal handler. */ 107 /* Type of a signal handler. */
110 #ifdef __LP64__ 108 #ifdef __LP64__
111 /* function pointers on 64-bit parisc are pointers to little structs and the 109 /* function pointers on 64-bit parisc are pointers to little structs and the
112 * compiler doesn't support code which changes or tests the address of 110 * compiler doesn't support code which changes or tests the address of
113 * the function in the little struct. This is really ugly -PB 111 * the function in the little struct. This is really ugly -PB
114 */ 112 */
115 typedef char __user *__sighandler_t; 113 typedef char __user *__sighandler_t;
116 #else 114 #else
117 typedef void __signalfn_t(int); 115 typedef void __signalfn_t(int);
118 typedef __signalfn_t __user *__sighandler_t; 116 typedef __signalfn_t __user *__sighandler_t;
119 #endif 117 #endif
120 118
121 typedef struct sigaltstack { 119 typedef struct sigaltstack {
122 void __user *ss_sp; 120 void __user *ss_sp;
123 int ss_flags; 121 int ss_flags;
124 size_t ss_size; 122 size_t ss_size;
125 } stack_t; 123 } stack_t;
126 124
127 #ifdef __KERNEL__ 125 #ifdef __KERNEL__
128 126
129 /* Most things should be clean enough to redefine this at will, if care 127 /* Most things should be clean enough to redefine this at will, if care
130 is taken to make libc match. */ 128 is taken to make libc match. */
131 129
132 typedef unsigned long old_sigset_t; /* at least 32 bits */ 130 typedef unsigned long old_sigset_t; /* at least 32 bits */
133 131
134 typedef struct { 132 typedef struct {
135 /* next_signal() assumes this is a long - no choice */ 133 /* next_signal() assumes this is a long - no choice */
136 unsigned long sig[_NSIG_WORDS]; 134 unsigned long sig[_NSIG_WORDS];
137 } sigset_t; 135 } sigset_t;
138 136
139 struct sigaction { 137 struct sigaction {
140 __sighandler_t sa_handler; 138 __sighandler_t sa_handler;
141 unsigned long sa_flags; 139 unsigned long sa_flags;
142 sigset_t sa_mask; /* mask last for extensibility */ 140 sigset_t sa_mask; /* mask last for extensibility */
143 }; 141 };
144 142
145 struct k_sigaction { 143 struct k_sigaction {
146 struct sigaction sa; 144 struct sigaction sa;
147 }; 145 };
148 146
149 #define ptrace_signal_deliver(regs, cookie) do { } while (0) 147 #define ptrace_signal_deliver(regs, cookie) do { } while (0)
150 148
151 #include <asm/sigcontext.h> 149 #include <asm/sigcontext.h>
152 150
153 #endif /* __KERNEL__ */ 151 #endif /* __KERNEL__ */
154 #endif /* !__ASSEMBLY */ 152 #endif /* !__ASSEMBLY */
155 #endif /* _ASM_PARISC_SIGNAL_H */ 153 #endif /* _ASM_PARISC_SIGNAL_H */
156 154