Eric Lee / linux-smarc-t335x-v3.2

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Commit 8a32352661cc8e942897d205ba18f871ef7be597

Authored by Maciej W. Rozycki
Committed by Jeff Garzik
1 parent 34dd962b74
Exists in master and in 4 other branches v3.2_AM335xPSP_04.06.00.11, v3.2_NEWT335xPSP_04.06.00.11, v3.2_SBC_SMARTMEN, v3.2_SMARCT335xPSP_04.06.00.11

defxx: Fix the handling of ioremap() failures 

If ioremap_nocache() is unfortunate enough to fail, the error code is not
set correctly leading to a false success from dfx_register().  This change
fixes the problem.

Signed-off-by: Maciej W. Rozycki <macro@linux-mips.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

Showing 1 changed file with 1 additions and 0 deletions Inline Diff

1 /* 1 /*
2 * File Name: 2 * File Name:
3 * defxx.c 3 * defxx.c
4 * 4 *
5 * Copyright Information: 5 * Copyright Information:
6 * Copyright Digital Equipment Corporation 1996. 6 * Copyright Digital Equipment Corporation 1996.
7 * 7 *
8 * This software may be used and distributed according to the terms of 8 * This software may be used and distributed according to the terms of
9 * the GNU General Public License, incorporated herein by reference. 9 * the GNU General Public License, incorporated herein by reference.
10 * 10 *
11 * Abstract: 11 * Abstract:
12 * A Linux device driver supporting the Digital Equipment Corporation 12 * A Linux device driver supporting the Digital Equipment Corporation
13 * FDDI TURBOchannel, EISA and PCI controller families. Supported 13 * FDDI TURBOchannel, EISA and PCI controller families. Supported
14 * adapters include: 14 * adapters include:
15 * 15 *
16 * DEC FDDIcontroller/TURBOchannel (DEFTA) 16 * DEC FDDIcontroller/TURBOchannel (DEFTA)
17 * DEC FDDIcontroller/EISA (DEFEA) 17 * DEC FDDIcontroller/EISA (DEFEA)
18 * DEC FDDIcontroller/PCI (DEFPA) 18 * DEC FDDIcontroller/PCI (DEFPA)
19 * 19 *
20 * The original author: 20 * The original author:
21 * LVS Lawrence V. Stefani <lstefani@yahoo.com> 21 * LVS Lawrence V. Stefani <lstefani@yahoo.com>
22 * 22 *
23 * Maintainers: 23 * Maintainers:
24 * macro Maciej W. Rozycki <macro@linux-mips.org> 24 * macro Maciej W. Rozycki <macro@linux-mips.org>
25 * 25 *
26 * Credits: 26 * Credits:
27 * I'd like to thank Patricia Cross for helping me get started with 27 * I'd like to thank Patricia Cross for helping me get started with
28 * Linux, David Davies for a lot of help upgrading and configuring 28 * Linux, David Davies for a lot of help upgrading and configuring
29 * my development system and for answering many OS and driver 29 * my development system and for answering many OS and driver
30 * development questions, and Alan Cox for recommendations and 30 * development questions, and Alan Cox for recommendations and
31 * integration help on getting FDDI support into Linux. LVS 31 * integration help on getting FDDI support into Linux. LVS
32 * 32 *
33 * Driver Architecture: 33 * Driver Architecture:
34 * The driver architecture is largely based on previous driver work 34 * The driver architecture is largely based on previous driver work
35 * for other operating systems. The upper edge interface and 35 * for other operating systems. The upper edge interface and
36 * functions were largely taken from existing Linux device drivers 36 * functions were largely taken from existing Linux device drivers
37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C 37 * such as David Davies' DE4X5.C driver and Donald Becker's TULIP.C
38 * driver. 38 * driver.
39 * 39 *
40 * Adapter Probe - 40 * Adapter Probe -
41 * The driver scans for supported EISA adapters by reading the 41 * The driver scans for supported EISA adapters by reading the
42 * SLOT ID register for each EISA slot and making a match 42 * SLOT ID register for each EISA slot and making a match
43 * against the expected value. 43 * against the expected value.
44 * 44 *
45 * Bus-Specific Initialization - 45 * Bus-Specific Initialization -
46 * This driver currently supports both EISA and PCI controller 46 * This driver currently supports both EISA and PCI controller
47 * families. While the custom DMA chip and FDDI logic is similar 47 * families. While the custom DMA chip and FDDI logic is similar
48 * or identical, the bus logic is very different. After 48 * or identical, the bus logic is very different. After
49 * initialization, the only bus-specific differences is in how the 49 * initialization, the only bus-specific differences is in how the
50 * driver enables and disables interrupts. Other than that, the 50 * driver enables and disables interrupts. Other than that, the
51 * run-time critical code behaves the same on both families. 51 * run-time critical code behaves the same on both families.
52 * It's important to note that both adapter families are configured 52 * It's important to note that both adapter families are configured
53 * to I/O map, rather than memory map, the adapter registers. 53 * to I/O map, rather than memory map, the adapter registers.
54 * 54 *
55 * Driver Open/Close - 55 * Driver Open/Close -
56 * In the driver open routine, the driver ISR (interrupt service 56 * In the driver open routine, the driver ISR (interrupt service
57 * routine) is registered and the adapter is brought to an 57 * routine) is registered and the adapter is brought to an
58 * operational state. In the driver close routine, the opposite 58 * operational state. In the driver close routine, the opposite
59 * occurs; the driver ISR is deregistered and the adapter is 59 * occurs; the driver ISR is deregistered and the adapter is
60 * brought to a safe, but closed state. Users may use consecutive 60 * brought to a safe, but closed state. Users may use consecutive
61 * commands to bring the adapter up and down as in the following 61 * commands to bring the adapter up and down as in the following
62 * example: 62 * example:
63 * ifconfig fddi0 up 63 * ifconfig fddi0 up
64 * ifconfig fddi0 down 64 * ifconfig fddi0 down
65 * ifconfig fddi0 up 65 * ifconfig fddi0 up
66 * 66 *
67 * Driver Shutdown - 67 * Driver Shutdown -
68 * Apparently, there is no shutdown or halt routine support under 68 * Apparently, there is no shutdown or halt routine support under
69 * Linux. This routine would be called during "reboot" or 69 * Linux. This routine would be called during "reboot" or
70 * "shutdown" to allow the driver to place the adapter in a safe 70 * "shutdown" to allow the driver to place the adapter in a safe
71 * state before a warm reboot occurs. To be really safe, the user 71 * state before a warm reboot occurs. To be really safe, the user
72 * should close the adapter before shutdown (eg. ifconfig fddi0 down) 72 * should close the adapter before shutdown (eg. ifconfig fddi0 down)
73 * to ensure that the adapter DMA engine is taken off-line. However, 73 * to ensure that the adapter DMA engine is taken off-line. However,
74 * the current driver code anticipates this problem and always issues 74 * the current driver code anticipates this problem and always issues
75 * a soft reset of the adapter at the beginning of driver initialization. 75 * a soft reset of the adapter at the beginning of driver initialization.
76 * A future driver enhancement in this area may occur in 2.1.X where 76 * A future driver enhancement in this area may occur in 2.1.X where
77 * Alan indicated that a shutdown handler may be implemented. 77 * Alan indicated that a shutdown handler may be implemented.
78 * 78 *
79 * Interrupt Service Routine - 79 * Interrupt Service Routine -
80 * The driver supports shared interrupts, so the ISR is registered for 80 * The driver supports shared interrupts, so the ISR is registered for
81 * each board with the appropriate flag and the pointer to that board's 81 * each board with the appropriate flag and the pointer to that board's
82 * device structure. This provides the context during interrupt 82 * device structure. This provides the context during interrupt
83 * processing to support shared interrupts and multiple boards. 83 * processing to support shared interrupts and multiple boards.
84 * 84 *
85 * Interrupt enabling/disabling can occur at many levels. At the host 85 * Interrupt enabling/disabling can occur at many levels. At the host
86 * end, you can disable system interrupts, or disable interrupts at the 86 * end, you can disable system interrupts, or disable interrupts at the
87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters 87 * PIC (on Intel systems). Across the bus, both EISA and PCI adapters
88 * have a bus-logic chip interrupt enable/disable as well as a DMA 88 * have a bus-logic chip interrupt enable/disable as well as a DMA
89 * controller interrupt enable/disable. 89 * controller interrupt enable/disable.
90 * 90 *
91 * The driver currently enables and disables adapter interrupts at the 91 * The driver currently enables and disables adapter interrupts at the
92 * bus-logic chip and assumes that Linux will take care of clearing or 92 * bus-logic chip and assumes that Linux will take care of clearing or
93 * acknowledging any host-based interrupt chips. 93 * acknowledging any host-based interrupt chips.
94 * 94 *
95 * Control Functions - 95 * Control Functions -
96 * Control functions are those used to support functions such as adding 96 * Control functions are those used to support functions such as adding
97 * or deleting multicast addresses, enabling or disabling packet 97 * or deleting multicast addresses, enabling or disabling packet
98 * reception filters, or other custom/proprietary commands. Presently, 98 * reception filters, or other custom/proprietary commands. Presently,
99 * the driver supports the "get statistics", "set multicast list", and 99 * the driver supports the "get statistics", "set multicast list", and
100 * "set mac address" functions defined by Linux. A list of possible 100 * "set mac address" functions defined by Linux. A list of possible
101 * enhancements include: 101 * enhancements include:
102 * 102 *
103 * - Custom ioctl interface for executing port interface commands 103 * - Custom ioctl interface for executing port interface commands
104 * - Custom ioctl interface for adding unicast addresses to 104 * - Custom ioctl interface for adding unicast addresses to
105 * adapter CAM (to support bridge functions). 105 * adapter CAM (to support bridge functions).
106 * - Custom ioctl interface for supporting firmware upgrades. 106 * - Custom ioctl interface for supporting firmware upgrades.
107 * 107 *
108 * Hardware (port interface) Support Routines - 108 * Hardware (port interface) Support Routines -
109 * The driver function names that start with "dfx_hw_" represent 109 * The driver function names that start with "dfx_hw_" represent
110 * low-level port interface routines that are called frequently. They 110 * low-level port interface routines that are called frequently. They
111 * include issuing a DMA or port control command to the adapter, 111 * include issuing a DMA or port control command to the adapter,
112 * resetting the adapter, or reading the adapter state. Since the 112 * resetting the adapter, or reading the adapter state. Since the
113 * driver initialization and run-time code must make calls into the 113 * driver initialization and run-time code must make calls into the
114 * port interface, these routines were written to be as generic and 114 * port interface, these routines were written to be as generic and
115 * usable as possible. 115 * usable as possible.
116 * 116 *
117 * Receive Path - 117 * Receive Path -
118 * The adapter DMA engine supports a 256 entry receive descriptor block 118 * The adapter DMA engine supports a 256 entry receive descriptor block
119 * of which up to 255 entries can be used at any given time. The 119 * of which up to 255 entries can be used at any given time. The
120 * architecture is a standard producer, consumer, completion model in 120 * architecture is a standard producer, consumer, completion model in
121 * which the driver "produces" receive buffers to the adapter, the 121 * which the driver "produces" receive buffers to the adapter, the
122 * adapter "consumes" the receive buffers by DMAing incoming packet data, 122 * adapter "consumes" the receive buffers by DMAing incoming packet data,
123 * and the driver "completes" the receive buffers by servicing the 123 * and the driver "completes" the receive buffers by servicing the
124 * incoming packet, then "produces" a new buffer and starts the cycle 124 * incoming packet, then "produces" a new buffer and starts the cycle
125 * again. Receive buffers can be fragmented in up to 16 fragments 125 * again. Receive buffers can be fragmented in up to 16 fragments
126 * (descriptor entries). For simplicity, this driver posts 126 * (descriptor entries). For simplicity, this driver posts
127 * single-fragment receive buffers of 4608 bytes, then allocates a 127 * single-fragment receive buffers of 4608 bytes, then allocates a
128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU 128 * sk_buff, copies the data, then reposts the buffer. To reduce CPU
129 * utilization, a better approach would be to pass up the receive 129 * utilization, a better approach would be to pass up the receive
130 * buffer (no extra copy) then allocate and post a replacement buffer. 130 * buffer (no extra copy) then allocate and post a replacement buffer.
131 * This is a performance enhancement that should be looked into at 131 * This is a performance enhancement that should be looked into at
132 * some point. 132 * some point.
133 * 133 *
134 * Transmit Path - 134 * Transmit Path -
135 * Like the receive path, the adapter DMA engine supports a 256 entry 135 * Like the receive path, the adapter DMA engine supports a 256 entry
136 * transmit descriptor block of which up to 255 entries can be used at 136 * transmit descriptor block of which up to 255 entries can be used at
137 * any given time. Transmit buffers can be fragmented in up to 255 137 * any given time. Transmit buffers can be fragmented in up to 255
138 * fragments (descriptor entries). This driver always posts one 138 * fragments (descriptor entries). This driver always posts one
139 * fragment per transmit packet request. 139 * fragment per transmit packet request.
140 * 140 *
141 * The fragment contains the entire packet from FC to end of data. 141 * The fragment contains the entire packet from FC to end of data.
142 * Before posting the buffer to the adapter, the driver sets a three-byte 142 * Before posting the buffer to the adapter, the driver sets a three-byte
143 * packet request header (PRH) which is required by the Motorola MAC chip 143 * packet request header (PRH) which is required by the Motorola MAC chip
144 * used on the adapters. The PRH tells the MAC the type of token to 144 * used on the adapters. The PRH tells the MAC the type of token to
145 * receive/send, whether or not to generate and append the CRC, whether 145 * receive/send, whether or not to generate and append the CRC, whether
146 * synchronous or asynchronous framing is used, etc. Since the PRH 146 * synchronous or asynchronous framing is used, etc. Since the PRH
147 * definition is not necessarily consistent across all FDDI chipsets, 147 * definition is not necessarily consistent across all FDDI chipsets,
148 * the driver, rather than the common FDDI packet handler routines, 148 * the driver, rather than the common FDDI packet handler routines,
149 * sets these bytes. 149 * sets these bytes.
150 * 150 *
151 * To reduce the amount of descriptor fetches needed per transmit request, 151 * To reduce the amount of descriptor fetches needed per transmit request,
152 * the driver takes advantage of the fact that there are at least three 152 * the driver takes advantage of the fact that there are at least three
153 * bytes available before the skb->data field on the outgoing transmit 153 * bytes available before the skb->data field on the outgoing transmit
154 * request. This is guaranteed by having fddi_setup() in net_init.c set 154 * request. This is guaranteed by having fddi_setup() in net_init.c set
155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest 155 * dev->hard_header_len to 24 bytes. 21 bytes accounts for the largest
156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad" 156 * header in an 802.2 SNAP frame. The other 3 bytes are the extra "pad"
157 * bytes which we'll use to store the PRH. 157 * bytes which we'll use to store the PRH.
158 * 158 *
159 * There's a subtle advantage to adding these pad bytes to the 159 * There's a subtle advantage to adding these pad bytes to the
160 * hard_header_len, it ensures that the data portion of the packet for 160 * hard_header_len, it ensures that the data portion of the packet for
161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver 161 * an 802.2 SNAP frame is longword aligned. Other FDDI driver
162 * implementations may not need the extra padding and can start copying 162 * implementations may not need the extra padding and can start copying
163 * or DMAing directly from the FC byte which starts at skb->data. Should 163 * or DMAing directly from the FC byte which starts at skb->data. Should
164 * another driver implementation need ADDITIONAL padding, the net_init.c 164 * another driver implementation need ADDITIONAL padding, the net_init.c
165 * module should be updated and dev->hard_header_len should be increased. 165 * module should be updated and dev->hard_header_len should be increased.
166 * NOTE: To maintain the alignment on the data portion of the packet, 166 * NOTE: To maintain the alignment on the data portion of the packet,
167 * dev->hard_header_len should always be evenly divisible by 4 and at 167 * dev->hard_header_len should always be evenly divisible by 4 and at
168 * least 24 bytes in size. 168 * least 24 bytes in size.
169 * 169 *
170 * Modification History: 170 * Modification History:
171 * Date Name Description 171 * Date Name Description
172 * 16-Aug-96 LVS Created. 172 * 16-Aug-96 LVS Created.
173 * 20-Aug-96 LVS Updated dfx_probe so that version information 173 * 20-Aug-96 LVS Updated dfx_probe so that version information
174 * string is only displayed if 1 or more cards are 174 * string is only displayed if 1 or more cards are
175 * found. Changed dfx_rcv_queue_process to copy 175 * found. Changed dfx_rcv_queue_process to copy
176 * 3 NULL bytes before FC to ensure that data is 176 * 3 NULL bytes before FC to ensure that data is
177 * longword aligned in receive buffer. 177 * longword aligned in receive buffer.
178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable 178 * 09-Sep-96 LVS Updated dfx_ctl_set_multicast_list to enable
179 * LLC group promiscuous mode if multicast list 179 * LLC group promiscuous mode if multicast list
180 * is too large. LLC individual/group promiscuous 180 * is too large. LLC individual/group promiscuous
181 * mode is now disabled if IFF_PROMISC flag not set. 181 * mode is now disabled if IFF_PROMISC flag not set.
182 * dfx_xmt_queue_pkt no longer checks for NULL skb 182 * dfx_xmt_queue_pkt no longer checks for NULL skb
183 * on Alan Cox recommendation. Added node address 183 * on Alan Cox recommendation. Added node address
184 * override support. 184 * override support.
185 * 12-Sep-96 LVS Reset current address to factory address during 185 * 12-Sep-96 LVS Reset current address to factory address during
186 * device open. Updated transmit path to post a 186 * device open. Updated transmit path to post a
187 * single fragment which includes PRH->end of data. 187 * single fragment which includes PRH->end of data.
188 * Mar 2000 AC Did various cleanups for 2.3.x 188 * Mar 2000 AC Did various cleanups for 2.3.x
189 * Jun 2000 jgarzik PCI and resource alloc cleanups 189 * Jun 2000 jgarzik PCI and resource alloc cleanups
190 * Jul 2000 tjeerd Much cleanup and some bug fixes 190 * Jul 2000 tjeerd Much cleanup and some bug fixes
191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup 191 * Sep 2000 tjeerd Fix leak on unload, cosmetic code cleanup
192 * Feb 2001 Skb allocation fixes 192 * Feb 2001 Skb allocation fixes
193 * Feb 2001 davej PCI enable cleanups. 193 * Feb 2001 davej PCI enable cleanups.
194 * 04 Aug 2003 macro Converted to the DMA API. 194 * 04 Aug 2003 macro Converted to the DMA API.
195 * 14 Aug 2004 macro Fix device names reported. 195 * 14 Aug 2004 macro Fix device names reported.
196 * 14 Jun 2005 macro Use irqreturn_t. 196 * 14 Jun 2005 macro Use irqreturn_t.
197 * 23 Oct 2006 macro Big-endian host support. 197 * 23 Oct 2006 macro Big-endian host support.
198 * 14 Dec 2006 macro TURBOchannel support. 198 * 14 Dec 2006 macro TURBOchannel support.
199 */ 199 */
200 200
201 /* Include files */ 201 /* Include files */
202 #include <linux/bitops.h> 202 #include <linux/bitops.h>
203 #include <linux/delay.h> 203 #include <linux/delay.h>
204 #include <linux/dma-mapping.h> 204 #include <linux/dma-mapping.h>
205 #include <linux/eisa.h> 205 #include <linux/eisa.h>
206 #include <linux/errno.h> 206 #include <linux/errno.h>
207 #include <linux/fddidevice.h> 207 #include <linux/fddidevice.h>
208 #include <linux/init.h> 208 #include <linux/init.h>
209 #include <linux/interrupt.h> 209 #include <linux/interrupt.h>
210 #include <linux/ioport.h> 210 #include <linux/ioport.h>
211 #include <linux/kernel.h> 211 #include <linux/kernel.h>
212 #include <linux/module.h> 212 #include <linux/module.h>
213 #include <linux/netdevice.h> 213 #include <linux/netdevice.h>
214 #include <linux/pci.h> 214 #include <linux/pci.h>
215 #include <linux/skbuff.h> 215 #include <linux/skbuff.h>
216 #include <linux/slab.h> 216 #include <linux/slab.h>
217 #include <linux/string.h> 217 #include <linux/string.h>
218 #include <linux/tc.h> 218 #include <linux/tc.h>
219 219
220 #include <asm/byteorder.h> 220 #include <asm/byteorder.h>
221 #include <asm/io.h> 221 #include <asm/io.h>
222 222
223 #include "defxx.h" 223 #include "defxx.h"
224 224
225 /* Version information string should be updated prior to each new release! */ 225 /* Version information string should be updated prior to each new release! */
226 #define DRV_NAME "defxx" 226 #define DRV_NAME "defxx"
227 #define DRV_VERSION "v1.10" 227 #define DRV_VERSION "v1.10"
228 #define DRV_RELDATE "2006/12/14" 228 #define DRV_RELDATE "2006/12/14"
229 229
230 static char version[] __devinitdata = 230 static char version[] __devinitdata =
231 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE 231 DRV_NAME ": " DRV_VERSION " " DRV_RELDATE
232 " Lawrence V. Stefani and others\n"; 232 " Lawrence V. Stefani and others\n";
233 233
234 #define DYNAMIC_BUFFERS 1 234 #define DYNAMIC_BUFFERS 1
235 235
236 #define SKBUFF_RX_COPYBREAK 200 236 #define SKBUFF_RX_COPYBREAK 200
237 /* 237 /*
238 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte 238 * NEW_SKB_SIZE = PI_RCV_DATA_K_SIZE_MAX+128 to allow 128 byte
239 * alignment for compatibility with old EISA boards. 239 * alignment for compatibility with old EISA boards.
240 */ 240 */
241 #define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128) 241 #define NEW_SKB_SIZE (PI_RCV_DATA_K_SIZE_MAX+128)
242 242
243 #define __unused __attribute__ ((unused)) 243 #define __unused __attribute__ ((unused))
244 244
245 #ifdef CONFIG_PCI 245 #ifdef CONFIG_PCI
246 #define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type) 246 #define DFX_BUS_PCI(dev) (dev->bus == &pci_bus_type)
247 #else 247 #else
248 #define DFX_BUS_PCI(dev) 0 248 #define DFX_BUS_PCI(dev) 0
249 #endif 249 #endif
250 250
251 #ifdef CONFIG_EISA 251 #ifdef CONFIG_EISA
252 #define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type) 252 #define DFX_BUS_EISA(dev) (dev->bus == &eisa_bus_type)
253 #else 253 #else
254 #define DFX_BUS_EISA(dev) 0 254 #define DFX_BUS_EISA(dev) 0
255 #endif 255 #endif
256 256
257 #ifdef CONFIG_TC 257 #ifdef CONFIG_TC
258 #define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type) 258 #define DFX_BUS_TC(dev) (dev->bus == &tc_bus_type)
259 #else 259 #else
260 #define DFX_BUS_TC(dev) 0 260 #define DFX_BUS_TC(dev) 0
261 #endif 261 #endif
262 262
263 #ifdef CONFIG_DEFXX_MMIO 263 #ifdef CONFIG_DEFXX_MMIO
264 #define DFX_MMIO 1 264 #define DFX_MMIO 1
265 #else 265 #else
266 #define DFX_MMIO 0 266 #define DFX_MMIO 0
267 #endif 267 #endif
268 268
269 /* Define module-wide (static) routines */ 269 /* Define module-wide (static) routines */
270 270
271 static void dfx_bus_init(struct net_device *dev); 271 static void dfx_bus_init(struct net_device *dev);
272 static void dfx_bus_uninit(struct net_device *dev); 272 static void dfx_bus_uninit(struct net_device *dev);
273 static void dfx_bus_config_check(DFX_board_t *bp); 273 static void dfx_bus_config_check(DFX_board_t *bp);
274 274
275 static int dfx_driver_init(struct net_device *dev, 275 static int dfx_driver_init(struct net_device *dev,
276 const char *print_name, 276 const char *print_name,
277 resource_size_t bar_start); 277 resource_size_t bar_start);
278 static int dfx_adap_init(DFX_board_t *bp, int get_buffers); 278 static int dfx_adap_init(DFX_board_t *bp, int get_buffers);
279 279
280 static int dfx_open(struct net_device *dev); 280 static int dfx_open(struct net_device *dev);
281 static int dfx_close(struct net_device *dev); 281 static int dfx_close(struct net_device *dev);
282 282
283 static void dfx_int_pr_halt_id(DFX_board_t *bp); 283 static void dfx_int_pr_halt_id(DFX_board_t *bp);
284 static void dfx_int_type_0_process(DFX_board_t *bp); 284 static void dfx_int_type_0_process(DFX_board_t *bp);
285 static void dfx_int_common(struct net_device *dev); 285 static void dfx_int_common(struct net_device *dev);
286 static irqreturn_t dfx_interrupt(int irq, void *dev_id); 286 static irqreturn_t dfx_interrupt(int irq, void *dev_id);
287 287
288 static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev); 288 static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev);
289 static void dfx_ctl_set_multicast_list(struct net_device *dev); 289 static void dfx_ctl_set_multicast_list(struct net_device *dev);
290 static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr); 290 static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr);
291 static int dfx_ctl_update_cam(DFX_board_t *bp); 291 static int dfx_ctl_update_cam(DFX_board_t *bp);
292 static int dfx_ctl_update_filters(DFX_board_t *bp); 292 static int dfx_ctl_update_filters(DFX_board_t *bp);
293 293
294 static int dfx_hw_dma_cmd_req(DFX_board_t *bp); 294 static int dfx_hw_dma_cmd_req(DFX_board_t *bp);
295 static int dfx_hw_port_ctrl_req(DFX_board_t *bp, PI_UINT32 command, PI_UINT32 data_a, PI_UINT32 data_b, PI_UINT32 *host_data); 295 static int dfx_hw_port_ctrl_req(DFX_board_t *bp, PI_UINT32 command, PI_UINT32 data_a, PI_UINT32 data_b, PI_UINT32 *host_data);
296 static void dfx_hw_adap_reset(DFX_board_t *bp, PI_UINT32 type); 296 static void dfx_hw_adap_reset(DFX_board_t *bp, PI_UINT32 type);
297 static int dfx_hw_adap_state_rd(DFX_board_t *bp); 297 static int dfx_hw_adap_state_rd(DFX_board_t *bp);
298 static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type); 298 static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type);
299 299
300 static int dfx_rcv_init(DFX_board_t *bp, int get_buffers); 300 static int dfx_rcv_init(DFX_board_t *bp, int get_buffers);
301 static void dfx_rcv_queue_process(DFX_board_t *bp); 301 static void dfx_rcv_queue_process(DFX_board_t *bp);
302 static void dfx_rcv_flush(DFX_board_t *bp); 302 static void dfx_rcv_flush(DFX_board_t *bp);
303 303
304 static int dfx_xmt_queue_pkt(struct sk_buff *skb, struct net_device *dev); 304 static int dfx_xmt_queue_pkt(struct sk_buff *skb, struct net_device *dev);
305 static int dfx_xmt_done(DFX_board_t *bp); 305 static int dfx_xmt_done(DFX_board_t *bp);
306 static void dfx_xmt_flush(DFX_board_t *bp); 306 static void dfx_xmt_flush(DFX_board_t *bp);
307 307
308 /* Define module-wide (static) variables */ 308 /* Define module-wide (static) variables */
309 309
310 static struct pci_driver dfx_pci_driver; 310 static struct pci_driver dfx_pci_driver;
311 static struct eisa_driver dfx_eisa_driver; 311 static struct eisa_driver dfx_eisa_driver;
312 static struct tc_driver dfx_tc_driver; 312 static struct tc_driver dfx_tc_driver;
313 313
314 314
315 /* 315 /*
316 * ======================= 316 * =======================
317 * = dfx_port_write_long = 317 * = dfx_port_write_long =
318 * = dfx_port_read_long = 318 * = dfx_port_read_long =
319 * ======================= 319 * =======================
320 * 320 *
321 * Overview: 321 * Overview:
322 * Routines for reading and writing values from/to adapter 322 * Routines for reading and writing values from/to adapter
323 * 323 *
324 * Returns: 324 * Returns:
325 * None 325 * None
326 * 326 *
327 * Arguments: 327 * Arguments:
328 * bp - pointer to board information 328 * bp - pointer to board information
329 * offset - register offset from base I/O address 329 * offset - register offset from base I/O address
330 * data - for dfx_port_write_long, this is a value to write; 330 * data - for dfx_port_write_long, this is a value to write;
331 * for dfx_port_read_long, this is a pointer to store 331 * for dfx_port_read_long, this is a pointer to store
332 * the read value 332 * the read value
333 * 333 *
334 * Functional Description: 334 * Functional Description:
335 * These routines perform the correct operation to read or write 335 * These routines perform the correct operation to read or write
336 * the adapter register. 336 * the adapter register.
337 * 337 *
338 * EISA port block base addresses are based on the slot number in which the 338 * EISA port block base addresses are based on the slot number in which the
339 * controller is installed. For example, if the EISA controller is installed 339 * controller is installed. For example, if the EISA controller is installed
340 * in slot 4, the port block base address is 0x4000. If the controller is 340 * in slot 4, the port block base address is 0x4000. If the controller is
341 * installed in slot 2, the port block base address is 0x2000, and so on. 341 * installed in slot 2, the port block base address is 0x2000, and so on.
342 * This port block can be used to access PDQ, ESIC, and DEFEA on-board 342 * This port block can be used to access PDQ, ESIC, and DEFEA on-board
343 * registers using the register offsets defined in DEFXX.H. 343 * registers using the register offsets defined in DEFXX.H.
344 * 344 *
345 * PCI port block base addresses are assigned by the PCI BIOS or system 345 * PCI port block base addresses are assigned by the PCI BIOS or system
346 * firmware. There is one 128 byte port block which can be accessed. It 346 * firmware. There is one 128 byte port block which can be accessed. It
347 * allows for I/O mapping of both PDQ and PFI registers using the register 347 * allows for I/O mapping of both PDQ and PFI registers using the register
348 * offsets defined in DEFXX.H. 348 * offsets defined in DEFXX.H.
349 * 349 *
350 * Return Codes: 350 * Return Codes:
351 * None 351 * None
352 * 352 *
353 * Assumptions: 353 * Assumptions:
354 * bp->base is a valid base I/O address for this adapter. 354 * bp->base is a valid base I/O address for this adapter.
355 * offset is a valid register offset for this adapter. 355 * offset is a valid register offset for this adapter.
356 * 356 *
357 * Side Effects: 357 * Side Effects:
358 * Rather than produce macros for these functions, these routines 358 * Rather than produce macros for these functions, these routines
359 * are defined using "inline" to ensure that the compiler will 359 * are defined using "inline" to ensure that the compiler will
360 * generate inline code and not waste a procedure call and return. 360 * generate inline code and not waste a procedure call and return.
361 * This provides all the benefits of macros, but with the 361 * This provides all the benefits of macros, but with the
362 * advantage of strict data type checking. 362 * advantage of strict data type checking.
363 */ 363 */
364 364
365 static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data) 365 static inline void dfx_writel(DFX_board_t *bp, int offset, u32 data)
366 { 366 {
367 writel(data, bp->base.mem + offset); 367 writel(data, bp->base.mem + offset);
368 mb(); 368 mb();
369 } 369 }
370 370
371 static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data) 371 static inline void dfx_outl(DFX_board_t *bp, int offset, u32 data)
372 { 372 {
373 outl(data, bp->base.port + offset); 373 outl(data, bp->base.port + offset);
374 } 374 }
375 375
376 static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data) 376 static void dfx_port_write_long(DFX_board_t *bp, int offset, u32 data)
377 { 377 {
378 struct device __unused *bdev = bp->bus_dev; 378 struct device __unused *bdev = bp->bus_dev;
379 int dfx_bus_tc = DFX_BUS_TC(bdev); 379 int dfx_bus_tc = DFX_BUS_TC(bdev);
380 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 380 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
381 381
382 if (dfx_use_mmio) 382 if (dfx_use_mmio)
383 dfx_writel(bp, offset, data); 383 dfx_writel(bp, offset, data);
384 else 384 else
385 dfx_outl(bp, offset, data); 385 dfx_outl(bp, offset, data);
386 } 386 }
387 387
388 388
389 static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data) 389 static inline void dfx_readl(DFX_board_t *bp, int offset, u32 *data)
390 { 390 {
391 mb(); 391 mb();
392 *data = readl(bp->base.mem + offset); 392 *data = readl(bp->base.mem + offset);
393 } 393 }
394 394
395 static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data) 395 static inline void dfx_inl(DFX_board_t *bp, int offset, u32 *data)
396 { 396 {
397 *data = inl(bp->base.port + offset); 397 *data = inl(bp->base.port + offset);
398 } 398 }
399 399
400 static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data) 400 static void dfx_port_read_long(DFX_board_t *bp, int offset, u32 *data)
401 { 401 {
402 struct device __unused *bdev = bp->bus_dev; 402 struct device __unused *bdev = bp->bus_dev;
403 int dfx_bus_tc = DFX_BUS_TC(bdev); 403 int dfx_bus_tc = DFX_BUS_TC(bdev);
404 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 404 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
405 405
406 if (dfx_use_mmio) 406 if (dfx_use_mmio)
407 dfx_readl(bp, offset, data); 407 dfx_readl(bp, offset, data);
408 else 408 else
409 dfx_inl(bp, offset, data); 409 dfx_inl(bp, offset, data);
410 } 410 }
411 411
412 412
413 /* 413 /*
414 * ================ 414 * ================
415 * = dfx_get_bars = 415 * = dfx_get_bars =
416 * ================ 416 * ================
417 * 417 *
418 * Overview: 418 * Overview:
419 * Retrieves the address range used to access control and status 419 * Retrieves the address range used to access control and status
420 * registers. 420 * registers.
421 * 421 *
422 * Returns: 422 * Returns:
423 * None 423 * None
424 * 424 *
425 * Arguments: 425 * Arguments:
426 * bdev - pointer to device information 426 * bdev - pointer to device information
427 * bar_start - pointer to store the start address 427 * bar_start - pointer to store the start address
428 * bar_len - pointer to store the length of the area 428 * bar_len - pointer to store the length of the area
429 * 429 *
430 * Assumptions: 430 * Assumptions:
431 * I am sure there are some. 431 * I am sure there are some.
432 * 432 *
433 * Side Effects: 433 * Side Effects:
434 * None 434 * None
435 */ 435 */
436 static void dfx_get_bars(struct device *bdev, 436 static void dfx_get_bars(struct device *bdev,
437 resource_size_t *bar_start, resource_size_t *bar_len) 437 resource_size_t *bar_start, resource_size_t *bar_len)
438 { 438 {
439 int dfx_bus_pci = DFX_BUS_PCI(bdev); 439 int dfx_bus_pci = DFX_BUS_PCI(bdev);
440 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 440 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
441 int dfx_bus_tc = DFX_BUS_TC(bdev); 441 int dfx_bus_tc = DFX_BUS_TC(bdev);
442 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 442 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
443 443
444 if (dfx_bus_pci) { 444 if (dfx_bus_pci) {
445 int num = dfx_use_mmio ? 0 : 1; 445 int num = dfx_use_mmio ? 0 : 1;
446 446
447 *bar_start = pci_resource_start(to_pci_dev(bdev), num); 447 *bar_start = pci_resource_start(to_pci_dev(bdev), num);
448 *bar_len = pci_resource_len(to_pci_dev(bdev), num); 448 *bar_len = pci_resource_len(to_pci_dev(bdev), num);
449 } 449 }
450 if (dfx_bus_eisa) { 450 if (dfx_bus_eisa) {
451 unsigned long base_addr = to_eisa_device(bdev)->base_addr; 451 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
452 resource_size_t bar; 452 resource_size_t bar;
453 453
454 if (dfx_use_mmio) { 454 if (dfx_use_mmio) {
455 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2); 455 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_2);
456 bar <<= 8; 456 bar <<= 8;
457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1); 457 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_1);
458 bar <<= 8; 458 bar <<= 8;
459 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0); 459 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_CMP_0);
460 bar <<= 16; 460 bar <<= 16;
461 *bar_start = bar; 461 *bar_start = bar;
462 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2); 462 bar = inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_2);
463 bar <<= 8; 463 bar <<= 8;
464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1); 464 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_1);
465 bar <<= 8; 465 bar <<= 8;
466 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0); 466 bar |= inb(base_addr + PI_ESIC_K_MEM_ADD_MASK_0);
467 bar <<= 16; 467 bar <<= 16;
468 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1; 468 *bar_len = (bar | PI_MEM_ADD_MASK_M) + 1;
469 } else { 469 } else {
470 *bar_start = base_addr; 470 *bar_start = base_addr;
471 *bar_len = PI_ESIC_K_CSR_IO_LEN; 471 *bar_len = PI_ESIC_K_CSR_IO_LEN;
472 } 472 }
473 } 473 }
474 if (dfx_bus_tc) { 474 if (dfx_bus_tc) {
475 *bar_start = to_tc_dev(bdev)->resource.start + 475 *bar_start = to_tc_dev(bdev)->resource.start +
476 PI_TC_K_CSR_OFFSET; 476 PI_TC_K_CSR_OFFSET;
477 *bar_len = PI_TC_K_CSR_LEN; 477 *bar_len = PI_TC_K_CSR_LEN;
478 } 478 }
479 } 479 }
480 480
481 /* 481 /*
482 * ================ 482 * ================
483 * = dfx_register = 483 * = dfx_register =
484 * ================ 484 * ================
485 * 485 *
486 * Overview: 486 * Overview:
487 * Initializes a supported FDDI controller 487 * Initializes a supported FDDI controller
488 * 488 *
489 * Returns: 489 * Returns:
490 * Condition code 490 * Condition code
491 * 491 *
492 * Arguments: 492 * Arguments:
493 * bdev - pointer to device information 493 * bdev - pointer to device information
494 * 494 *
495 * Functional Description: 495 * Functional Description:
496 * 496 *
497 * Return Codes: 497 * Return Codes:
498 * 0 - This device (fddi0, fddi1, etc) configured successfully 498 * 0 - This device (fddi0, fddi1, etc) configured successfully
499 * -EBUSY - Failed to get resources, or dfx_driver_init failed. 499 * -EBUSY - Failed to get resources, or dfx_driver_init failed.
500 * 500 *
501 * Assumptions: 501 * Assumptions:
502 * It compiles so it should work :-( (PCI cards do :-) 502 * It compiles so it should work :-( (PCI cards do :-)
503 * 503 *
504 * Side Effects: 504 * Side Effects:
505 * Device structures for FDDI adapters (fddi0, fddi1, etc) are 505 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
506 * initialized and the board resources are read and stored in 506 * initialized and the board resources are read and stored in
507 * the device structure. 507 * the device structure.
508 */ 508 */
509 static int __devinit dfx_register(struct device *bdev) 509 static int __devinit dfx_register(struct device *bdev)
510 { 510 {
511 static int version_disp; 511 static int version_disp;
512 int dfx_bus_pci = DFX_BUS_PCI(bdev); 512 int dfx_bus_pci = DFX_BUS_PCI(bdev);
513 int dfx_bus_tc = DFX_BUS_TC(bdev); 513 int dfx_bus_tc = DFX_BUS_TC(bdev);
514 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 514 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
515 char *print_name = bdev->bus_id; 515 char *print_name = bdev->bus_id;
516 struct net_device *dev; 516 struct net_device *dev;
517 DFX_board_t *bp; /* board pointer */ 517 DFX_board_t *bp; /* board pointer */
518 resource_size_t bar_start = 0; /* pointer to port */ 518 resource_size_t bar_start = 0; /* pointer to port */
519 resource_size_t bar_len = 0; /* resource length */ 519 resource_size_t bar_len = 0; /* resource length */
520 int alloc_size; /* total buffer size used */ 520 int alloc_size; /* total buffer size used */
521 struct resource *region; 521 struct resource *region;
522 int err = 0; 522 int err = 0;
523 523
524 if (!version_disp) { /* display version info if adapter is found */ 524 if (!version_disp) { /* display version info if adapter is found */
525 version_disp = 1; /* set display flag to TRUE so that */ 525 version_disp = 1; /* set display flag to TRUE so that */
526 printk(version); /* we only display this string ONCE */ 526 printk(version); /* we only display this string ONCE */
527 } 527 }
528 528
529 dev = alloc_fddidev(sizeof(*bp)); 529 dev = alloc_fddidev(sizeof(*bp));
530 if (!dev) { 530 if (!dev) {
531 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n", 531 printk(KERN_ERR "%s: Unable to allocate fddidev, aborting\n",
532 print_name); 532 print_name);
533 return -ENOMEM; 533 return -ENOMEM;
534 } 534 }
535 535
536 /* Enable PCI device. */ 536 /* Enable PCI device. */
537 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) { 537 if (dfx_bus_pci && pci_enable_device(to_pci_dev(bdev))) {
538 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n", 538 printk(KERN_ERR "%s: Cannot enable PCI device, aborting\n",
539 print_name); 539 print_name);
540 goto err_out; 540 goto err_out;
541 } 541 }
542 542
543 SET_MODULE_OWNER(dev); 543 SET_MODULE_OWNER(dev);
544 SET_NETDEV_DEV(dev, bdev); 544 SET_NETDEV_DEV(dev, bdev);
545 545
546 bp = netdev_priv(dev); 546 bp = netdev_priv(dev);
547 bp->bus_dev = bdev; 547 bp->bus_dev = bdev;
548 dev_set_drvdata(bdev, dev); 548 dev_set_drvdata(bdev, dev);
549 549
550 dfx_get_bars(bdev, &bar_start, &bar_len); 550 dfx_get_bars(bdev, &bar_start, &bar_len);
551 551
552 if (dfx_use_mmio) 552 if (dfx_use_mmio)
553 region = request_mem_region(bar_start, bar_len, print_name); 553 region = request_mem_region(bar_start, bar_len, print_name);
554 else 554 else
555 region = request_region(bar_start, bar_len, print_name); 555 region = request_region(bar_start, bar_len, print_name);
556 if (!region) { 556 if (!region) {
557 printk(KERN_ERR "%s: Cannot reserve I/O resource " 557 printk(KERN_ERR "%s: Cannot reserve I/O resource "
558 "0x%lx @ 0x%lx, aborting\n", 558 "0x%lx @ 0x%lx, aborting\n",
559 print_name, (long)bar_len, (long)bar_start); 559 print_name, (long)bar_len, (long)bar_start);
560 err = -EBUSY; 560 err = -EBUSY;
561 goto err_out_disable; 561 goto err_out_disable;
562 } 562 }
563 563
564 /* Set up I/O base address. */ 564 /* Set up I/O base address. */
565 if (dfx_use_mmio) { 565 if (dfx_use_mmio) {
566 bp->base.mem = ioremap_nocache(bar_start, bar_len); 566 bp->base.mem = ioremap_nocache(bar_start, bar_len);
567 if (!bp->base.mem) { 567 if (!bp->base.mem) {
568 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name); 568 printk(KERN_ERR "%s: Cannot map MMIO\n", print_name);
569 err = -ENOMEM;
569 goto err_out_region; 570 goto err_out_region;
570 } 571 }
571 } else { 572 } else {
572 bp->base.port = bar_start; 573 bp->base.port = bar_start;
573 dev->base_addr = bar_start; 574 dev->base_addr = bar_start;
574 } 575 }
575 576
576 /* Initialize new device structure */ 577 /* Initialize new device structure */
577 578
578 dev->get_stats = dfx_ctl_get_stats; 579 dev->get_stats = dfx_ctl_get_stats;
579 dev->open = dfx_open; 580 dev->open = dfx_open;
580 dev->stop = dfx_close; 581 dev->stop = dfx_close;
581 dev->hard_start_xmit = dfx_xmt_queue_pkt; 582 dev->hard_start_xmit = dfx_xmt_queue_pkt;
582 dev->set_multicast_list = dfx_ctl_set_multicast_list; 583 dev->set_multicast_list = dfx_ctl_set_multicast_list;
583 dev->set_mac_address = dfx_ctl_set_mac_address; 584 dev->set_mac_address = dfx_ctl_set_mac_address;
584 585
585 if (dfx_bus_pci) 586 if (dfx_bus_pci)
586 pci_set_master(to_pci_dev(bdev)); 587 pci_set_master(to_pci_dev(bdev));
587 588
588 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) { 589 if (dfx_driver_init(dev, print_name, bar_start) != DFX_K_SUCCESS) {
589 err = -ENODEV; 590 err = -ENODEV;
590 goto err_out_unmap; 591 goto err_out_unmap;
591 } 592 }
592 593
593 err = register_netdev(dev); 594 err = register_netdev(dev);
594 if (err) 595 if (err)
595 goto err_out_kfree; 596 goto err_out_kfree;
596 597
597 printk("%s: registered as %s\n", print_name, dev->name); 598 printk("%s: registered as %s\n", print_name, dev->name);
598 return 0; 599 return 0;
599 600
600 err_out_kfree: 601 err_out_kfree:
601 alloc_size = sizeof(PI_DESCR_BLOCK) + 602 alloc_size = sizeof(PI_DESCR_BLOCK) +
602 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX + 603 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
603 #ifndef DYNAMIC_BUFFERS 604 #ifndef DYNAMIC_BUFFERS
604 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) + 605 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
605 #endif 606 #endif
606 sizeof(PI_CONSUMER_BLOCK) + 607 sizeof(PI_CONSUMER_BLOCK) +
607 (PI_ALIGN_K_DESC_BLK - 1); 608 (PI_ALIGN_K_DESC_BLK - 1);
608 if (bp->kmalloced) 609 if (bp->kmalloced)
609 dma_free_coherent(bdev, alloc_size, 610 dma_free_coherent(bdev, alloc_size,
610 bp->kmalloced, bp->kmalloced_dma); 611 bp->kmalloced, bp->kmalloced_dma);
611 612
612 err_out_unmap: 613 err_out_unmap:
613 if (dfx_use_mmio) 614 if (dfx_use_mmio)
614 iounmap(bp->base.mem); 615 iounmap(bp->base.mem);
615 616
616 err_out_region: 617 err_out_region:
617 if (dfx_use_mmio) 618 if (dfx_use_mmio)
618 release_mem_region(bar_start, bar_len); 619 release_mem_region(bar_start, bar_len);
619 else 620 else
620 release_region(bar_start, bar_len); 621 release_region(bar_start, bar_len);
621 622
622 err_out_disable: 623 err_out_disable:
623 if (dfx_bus_pci) 624 if (dfx_bus_pci)
624 pci_disable_device(to_pci_dev(bdev)); 625 pci_disable_device(to_pci_dev(bdev));
625 626
626 err_out: 627 err_out:
627 free_netdev(dev); 628 free_netdev(dev);
628 return err; 629 return err;
629 } 630 }
630 631
631 632
632 /* 633 /*
633 * ================ 634 * ================
634 * = dfx_bus_init = 635 * = dfx_bus_init =
635 * ================ 636 * ================
636 * 637 *
637 * Overview: 638 * Overview:
638 * Initializes the bus-specific controller logic. 639 * Initializes the bus-specific controller logic.
639 * 640 *
640 * Returns: 641 * Returns:
641 * None 642 * None
642 * 643 *
643 * Arguments: 644 * Arguments:
644 * dev - pointer to device information 645 * dev - pointer to device information
645 * 646 *
646 * Functional Description: 647 * Functional Description:
647 * Determine and save adapter IRQ in device table, 648 * Determine and save adapter IRQ in device table,
648 * then perform bus-specific logic initialization. 649 * then perform bus-specific logic initialization.
649 * 650 *
650 * Return Codes: 651 * Return Codes:
651 * None 652 * None
652 * 653 *
653 * Assumptions: 654 * Assumptions:
654 * bp->base has already been set with the proper 655 * bp->base has already been set with the proper
655 * base I/O address for this device. 656 * base I/O address for this device.
656 * 657 *
657 * Side Effects: 658 * Side Effects:
658 * Interrupts are enabled at the adapter bus-specific logic. 659 * Interrupts are enabled at the adapter bus-specific logic.
659 * Note: Interrupts at the DMA engine (PDQ chip) are not 660 * Note: Interrupts at the DMA engine (PDQ chip) are not
660 * enabled yet. 661 * enabled yet.
661 */ 662 */
662 663
663 static void __devinit dfx_bus_init(struct net_device *dev) 664 static void __devinit dfx_bus_init(struct net_device *dev)
664 { 665 {
665 DFX_board_t *bp = netdev_priv(dev); 666 DFX_board_t *bp = netdev_priv(dev);
666 struct device *bdev = bp->bus_dev; 667 struct device *bdev = bp->bus_dev;
667 int dfx_bus_pci = DFX_BUS_PCI(bdev); 668 int dfx_bus_pci = DFX_BUS_PCI(bdev);
668 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 669 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
669 int dfx_bus_tc = DFX_BUS_TC(bdev); 670 int dfx_bus_tc = DFX_BUS_TC(bdev);
670 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 671 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
671 u8 val; 672 u8 val;
672 673
673 DBG_printk("In dfx_bus_init...\n"); 674 DBG_printk("In dfx_bus_init...\n");
674 675
675 /* Initialize a pointer back to the net_device struct */ 676 /* Initialize a pointer back to the net_device struct */
676 bp->dev = dev; 677 bp->dev = dev;
677 678
678 /* Initialize adapter based on bus type */ 679 /* Initialize adapter based on bus type */
679 680
680 if (dfx_bus_tc) 681 if (dfx_bus_tc)
681 dev->irq = to_tc_dev(bdev)->interrupt; 682 dev->irq = to_tc_dev(bdev)->interrupt;
682 if (dfx_bus_eisa) { 683 if (dfx_bus_eisa) {
683 unsigned long base_addr = to_eisa_device(bdev)->base_addr; 684 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
684 685
685 /* Get the interrupt level from the ESIC chip. */ 686 /* Get the interrupt level from the ESIC chip. */
686 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 687 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
687 val &= PI_CONFIG_STAT_0_M_IRQ; 688 val &= PI_CONFIG_STAT_0_M_IRQ;
688 val >>= PI_CONFIG_STAT_0_V_IRQ; 689 val >>= PI_CONFIG_STAT_0_V_IRQ;
689 690
690 switch (val) { 691 switch (val) {
691 case PI_CONFIG_STAT_0_IRQ_K_9: 692 case PI_CONFIG_STAT_0_IRQ_K_9:
692 dev->irq = 9; 693 dev->irq = 9;
693 break; 694 break;
694 695
695 case PI_CONFIG_STAT_0_IRQ_K_10: 696 case PI_CONFIG_STAT_0_IRQ_K_10:
696 dev->irq = 10; 697 dev->irq = 10;
697 break; 698 break;
698 699
699 case PI_CONFIG_STAT_0_IRQ_K_11: 700 case PI_CONFIG_STAT_0_IRQ_K_11:
700 dev->irq = 11; 701 dev->irq = 11;
701 break; 702 break;
702 703
703 case PI_CONFIG_STAT_0_IRQ_K_15: 704 case PI_CONFIG_STAT_0_IRQ_K_15:
704 dev->irq = 15; 705 dev->irq = 15;
705 break; 706 break;
706 } 707 }
707 708
708 /* 709 /*
709 * Enable memory decoding (MEMCS0) and/or port decoding 710 * Enable memory decoding (MEMCS0) and/or port decoding
710 * (IOCS1/IOCS0) as appropriate in Function Control 711 * (IOCS1/IOCS0) as appropriate in Function Control
711 * Register. One of the port chip selects seems to be 712 * Register. One of the port chip selects seems to be
712 * used for the Burst Holdoff register, but this bit of 713 * used for the Burst Holdoff register, but this bit of
713 * documentation is missing and as yet it has not been 714 * documentation is missing and as yet it has not been
714 * determined which of the two. This is also the reason 715 * determined which of the two. This is also the reason
715 * the size of the decoded port range is twice as large 716 * the size of the decoded port range is twice as large
716 * as one required by the PDQ. 717 * as one required by the PDQ.
717 */ 718 */
718 719
719 /* Set the decode range of the board. */ 720 /* Set the decode range of the board. */
720 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT); 721 val = ((bp->base.port >> 12) << PI_IO_CMP_V_SLOT);
721 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val); 722 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_1, val);
722 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0); 723 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_0_0, 0);
723 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val); 724 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_1, val);
724 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0); 725 outb(base_addr + PI_ESIC_K_IO_ADD_CMP_1_0, 0);
725 val = PI_ESIC_K_CSR_IO_LEN - 1; 726 val = PI_ESIC_K_CSR_IO_LEN - 1;
726 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff); 727 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_1, (val >> 8) & 0xff);
727 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff); 728 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_0_0, val & 0xff);
728 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff); 729 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_1, (val >> 8) & 0xff);
729 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff); 730 outb(base_addr + PI_ESIC_K_IO_ADD_MASK_1_0, val & 0xff);
730 731
731 /* Enable the decoders. */ 732 /* Enable the decoders. */
732 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0; 733 val = PI_FUNCTION_CNTRL_M_IOCS1 | PI_FUNCTION_CNTRL_M_IOCS0;
733 if (dfx_use_mmio) 734 if (dfx_use_mmio)
734 val |= PI_FUNCTION_CNTRL_M_MEMCS0; 735 val |= PI_FUNCTION_CNTRL_M_MEMCS0;
735 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val); 736 outb(base_addr + PI_ESIC_K_FUNCTION_CNTRL, val);
736 737
737 /* 738 /*
738 * Enable access to the rest of the module 739 * Enable access to the rest of the module
739 * (including PDQ and packet memory). 740 * (including PDQ and packet memory).
740 */ 741 */
741 val = PI_SLOT_CNTRL_M_ENB; 742 val = PI_SLOT_CNTRL_M_ENB;
742 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val); 743 outb(base_addr + PI_ESIC_K_SLOT_CNTRL, val);
743 744
744 /* 745 /*
745 * Map PDQ registers into memory or port space. This is 746 * Map PDQ registers into memory or port space. This is
746 * done with a bit in the Burst Holdoff register. 747 * done with a bit in the Burst Holdoff register.
747 */ 748 */
748 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF); 749 val = inb(base_addr + PI_DEFEA_K_BURST_HOLDOFF);
749 if (dfx_use_mmio) 750 if (dfx_use_mmio)
750 val |= PI_BURST_HOLDOFF_V_MEM_MAP; 751 val |= PI_BURST_HOLDOFF_V_MEM_MAP;
751 else 752 else
752 val &= ~PI_BURST_HOLDOFF_V_MEM_MAP; 753 val &= ~PI_BURST_HOLDOFF_V_MEM_MAP;
753 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val); 754 outb(base_addr + PI_DEFEA_K_BURST_HOLDOFF, val);
754 755
755 /* Enable interrupts at EISA bus interface chip (ESIC) */ 756 /* Enable interrupts at EISA bus interface chip (ESIC) */
756 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 757 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
757 val |= PI_CONFIG_STAT_0_M_INT_ENB; 758 val |= PI_CONFIG_STAT_0_M_INT_ENB;
758 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val); 759 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
759 } 760 }
760 if (dfx_bus_pci) { 761 if (dfx_bus_pci) {
761 struct pci_dev *pdev = to_pci_dev(bdev); 762 struct pci_dev *pdev = to_pci_dev(bdev);
762 763
763 /* Get the interrupt level from the PCI Configuration Table */ 764 /* Get the interrupt level from the PCI Configuration Table */
764 765
765 dev->irq = pdev->irq; 766 dev->irq = pdev->irq;
766 767
767 /* Check Latency Timer and set if less than minimal */ 768 /* Check Latency Timer and set if less than minimal */
768 769
769 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val); 770 pci_read_config_byte(pdev, PCI_LATENCY_TIMER, &val);
770 if (val < PFI_K_LAT_TIMER_MIN) { 771 if (val < PFI_K_LAT_TIMER_MIN) {
771 val = PFI_K_LAT_TIMER_DEF; 772 val = PFI_K_LAT_TIMER_DEF;
772 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val); 773 pci_write_config_byte(pdev, PCI_LATENCY_TIMER, val);
773 } 774 }
774 775
775 /* Enable interrupts at PCI bus interface chip (PFI) */ 776 /* Enable interrupts at PCI bus interface chip (PFI) */
776 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB; 777 val = PFI_MODE_M_PDQ_INT_ENB | PFI_MODE_M_DMA_ENB;
777 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val); 778 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, val);
778 } 779 }
779 } 780 }
780 781
781 /* 782 /*
782 * ================== 783 * ==================
783 * = dfx_bus_uninit = 784 * = dfx_bus_uninit =
784 * ================== 785 * ==================
785 * 786 *
786 * Overview: 787 * Overview:
787 * Uninitializes the bus-specific controller logic. 788 * Uninitializes the bus-specific controller logic.
788 * 789 *
789 * Returns: 790 * Returns:
790 * None 791 * None
791 * 792 *
792 * Arguments: 793 * Arguments:
793 * dev - pointer to device information 794 * dev - pointer to device information
794 * 795 *
795 * Functional Description: 796 * Functional Description:
796 * Perform bus-specific logic uninitialization. 797 * Perform bus-specific logic uninitialization.
797 * 798 *
798 * Return Codes: 799 * Return Codes:
799 * None 800 * None
800 * 801 *
801 * Assumptions: 802 * Assumptions:
802 * bp->base has already been set with the proper 803 * bp->base has already been set with the proper
803 * base I/O address for this device. 804 * base I/O address for this device.
804 * 805 *
805 * Side Effects: 806 * Side Effects:
806 * Interrupts are disabled at the adapter bus-specific logic. 807 * Interrupts are disabled at the adapter bus-specific logic.
807 */ 808 */
808 809
809 static void __devinit dfx_bus_uninit(struct net_device *dev) 810 static void __devinit dfx_bus_uninit(struct net_device *dev)
810 { 811 {
811 DFX_board_t *bp = netdev_priv(dev); 812 DFX_board_t *bp = netdev_priv(dev);
812 struct device *bdev = bp->bus_dev; 813 struct device *bdev = bp->bus_dev;
813 int dfx_bus_pci = DFX_BUS_PCI(bdev); 814 int dfx_bus_pci = DFX_BUS_PCI(bdev);
814 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 815 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
815 u8 val; 816 u8 val;
816 817
817 DBG_printk("In dfx_bus_uninit...\n"); 818 DBG_printk("In dfx_bus_uninit...\n");
818 819
819 /* Uninitialize adapter based on bus type */ 820 /* Uninitialize adapter based on bus type */
820 821
821 if (dfx_bus_eisa) { 822 if (dfx_bus_eisa) {
822 unsigned long base_addr = to_eisa_device(bdev)->base_addr; 823 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
823 824
824 /* Disable interrupts at EISA bus interface chip (ESIC) */ 825 /* Disable interrupts at EISA bus interface chip (ESIC) */
825 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 826 val = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
826 val &= ~PI_CONFIG_STAT_0_M_INT_ENB; 827 val &= ~PI_CONFIG_STAT_0_M_INT_ENB;
827 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val); 828 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, val);
828 } 829 }
829 if (dfx_bus_pci) { 830 if (dfx_bus_pci) {
830 /* Disable interrupts at PCI bus interface chip (PFI) */ 831 /* Disable interrupts at PCI bus interface chip (PFI) */
831 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0); 832 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 0);
832 } 833 }
833 } 834 }
834 835
835 836
836 /* 837 /*
837 * ======================== 838 * ========================
838 * = dfx_bus_config_check = 839 * = dfx_bus_config_check =
839 * ======================== 840 * ========================
840 * 841 *
841 * Overview: 842 * Overview:
842 * Checks the configuration (burst size, full-duplex, etc.) If any parameters 843 * Checks the configuration (burst size, full-duplex, etc.) If any parameters
843 * are illegal, then this routine will set new defaults. 844 * are illegal, then this routine will set new defaults.
844 * 845 *
845 * Returns: 846 * Returns:
846 * None 847 * None
847 * 848 *
848 * Arguments: 849 * Arguments:
849 * bp - pointer to board information 850 * bp - pointer to board information
850 * 851 *
851 * Functional Description: 852 * Functional Description:
852 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later 853 * For Revision 1 FDDI EISA, Revision 2 or later FDDI EISA with rev E or later
853 * PDQ, and all FDDI PCI controllers, all values are legal. 854 * PDQ, and all FDDI PCI controllers, all values are legal.
854 * 855 *
855 * Return Codes: 856 * Return Codes:
856 * None 857 * None
857 * 858 *
858 * Assumptions: 859 * Assumptions:
859 * dfx_adap_init has NOT been called yet so burst size and other items have 860 * dfx_adap_init has NOT been called yet so burst size and other items have
860 * not been set. 861 * not been set.
861 * 862 *
862 * Side Effects: 863 * Side Effects:
863 * None 864 * None
864 */ 865 */
865 866
866 static void __devinit dfx_bus_config_check(DFX_board_t *bp) 867 static void __devinit dfx_bus_config_check(DFX_board_t *bp)
867 { 868 {
868 struct device __unused *bdev = bp->bus_dev; 869 struct device __unused *bdev = bp->bus_dev;
869 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 870 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
870 int status; /* return code from adapter port control call */ 871 int status; /* return code from adapter port control call */
871 u32 host_data; /* LW data returned from port control call */ 872 u32 host_data; /* LW data returned from port control call */
872 873
873 DBG_printk("In dfx_bus_config_check...\n"); 874 DBG_printk("In dfx_bus_config_check...\n");
874 875
875 /* Configuration check only valid for EISA adapter */ 876 /* Configuration check only valid for EISA adapter */
876 877
877 if (dfx_bus_eisa) { 878 if (dfx_bus_eisa) {
878 /* 879 /*
879 * First check if revision 2 EISA controller. Rev. 1 cards used 880 * First check if revision 2 EISA controller. Rev. 1 cards used
880 * PDQ revision B, so no workaround needed in this case. Rev. 3 881 * PDQ revision B, so no workaround needed in this case. Rev. 3
881 * cards used PDQ revision E, so no workaround needed in this 882 * cards used PDQ revision E, so no workaround needed in this
882 * case, either. Only Rev. 2 cards used either Rev. D or E 883 * case, either. Only Rev. 2 cards used either Rev. D or E
883 * chips, so we must verify the chip revision on Rev. 2 cards. 884 * chips, so we must verify the chip revision on Rev. 2 cards.
884 */ 885 */
885 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) { 886 if (to_eisa_device(bdev)->id.driver_data == DEFEA_PROD_ID_2) {
886 /* 887 /*
887 * Revision 2 FDDI EISA controller found, 888 * Revision 2 FDDI EISA controller found,
888 * so let's check PDQ revision of adapter. 889 * so let's check PDQ revision of adapter.
889 */ 890 */
890 status = dfx_hw_port_ctrl_req(bp, 891 status = dfx_hw_port_ctrl_req(bp,
891 PI_PCTRL_M_SUB_CMD, 892 PI_PCTRL_M_SUB_CMD,
892 PI_SUB_CMD_K_PDQ_REV_GET, 893 PI_SUB_CMD_K_PDQ_REV_GET,
893 0, 894 0,
894 &host_data); 895 &host_data);
895 if ((status != DFX_K_SUCCESS) || (host_data == 2)) 896 if ((status != DFX_K_SUCCESS) || (host_data == 2))
896 { 897 {
897 /* 898 /*
898 * Either we couldn't determine the PDQ revision, or 899 * Either we couldn't determine the PDQ revision, or
899 * we determined that it is at revision D. In either case, 900 * we determined that it is at revision D. In either case,
900 * we need to implement the workaround. 901 * we need to implement the workaround.
901 */ 902 */
902 903
903 /* Ensure that the burst size is set to 8 longwords or less */ 904 /* Ensure that the burst size is set to 8 longwords or less */
904 905
905 switch (bp->burst_size) 906 switch (bp->burst_size)
906 { 907 {
907 case PI_PDATA_B_DMA_BURST_SIZE_32: 908 case PI_PDATA_B_DMA_BURST_SIZE_32:
908 case PI_PDATA_B_DMA_BURST_SIZE_16: 909 case PI_PDATA_B_DMA_BURST_SIZE_16:
909 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_8; 910 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_8;
910 break; 911 break;
911 912
912 default: 913 default:
913 break; 914 break;
914 } 915 }
915 916
916 /* Ensure that full-duplex mode is not enabled */ 917 /* Ensure that full-duplex mode is not enabled */
917 918
918 bp->full_duplex_enb = PI_SNMP_K_FALSE; 919 bp->full_duplex_enb = PI_SNMP_K_FALSE;
919 } 920 }
920 } 921 }
921 } 922 }
922 } 923 }
923 924
924 925
925 /* 926 /*
926 * =================== 927 * ===================
927 * = dfx_driver_init = 928 * = dfx_driver_init =
928 * =================== 929 * ===================
929 * 930 *
930 * Overview: 931 * Overview:
931 * Initializes remaining adapter board structure information 932 * Initializes remaining adapter board structure information
932 * and makes sure adapter is in a safe state prior to dfx_open(). 933 * and makes sure adapter is in a safe state prior to dfx_open().
933 * 934 *
934 * Returns: 935 * Returns:
935 * Condition code 936 * Condition code
936 * 937 *
937 * Arguments: 938 * Arguments:
938 * dev - pointer to device information 939 * dev - pointer to device information
939 * print_name - printable device name 940 * print_name - printable device name
940 * 941 *
941 * Functional Description: 942 * Functional Description:
942 * This function allocates additional resources such as the host memory 943 * This function allocates additional resources such as the host memory
943 * blocks needed by the adapter (eg. descriptor and consumer blocks). 944 * blocks needed by the adapter (eg. descriptor and consumer blocks).
944 * Remaining bus initialization steps are also completed. The adapter 945 * Remaining bus initialization steps are also completed. The adapter
945 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS 946 * is also reset so that it is in the DMA_UNAVAILABLE state. The OS
946 * must call dfx_open() to open the adapter and bring it on-line. 947 * must call dfx_open() to open the adapter and bring it on-line.
947 * 948 *
948 * Return Codes: 949 * Return Codes:
949 * DFX_K_SUCCESS - initialization succeeded 950 * DFX_K_SUCCESS - initialization succeeded
950 * DFX_K_FAILURE - initialization failed - could not allocate memory 951 * DFX_K_FAILURE - initialization failed - could not allocate memory
951 * or read adapter MAC address 952 * or read adapter MAC address
952 * 953 *
953 * Assumptions: 954 * Assumptions:
954 * Memory allocated from pci_alloc_consistent() call is physically 955 * Memory allocated from pci_alloc_consistent() call is physically
955 * contiguous, locked memory. 956 * contiguous, locked memory.
956 * 957 *
957 * Side Effects: 958 * Side Effects:
958 * Adapter is reset and should be in DMA_UNAVAILABLE state before 959 * Adapter is reset and should be in DMA_UNAVAILABLE state before
959 * returning from this routine. 960 * returning from this routine.
960 */ 961 */
961 962
962 static int __devinit dfx_driver_init(struct net_device *dev, 963 static int __devinit dfx_driver_init(struct net_device *dev,
963 const char *print_name, 964 const char *print_name,
964 resource_size_t bar_start) 965 resource_size_t bar_start)
965 { 966 {
966 DFX_board_t *bp = netdev_priv(dev); 967 DFX_board_t *bp = netdev_priv(dev);
967 struct device *bdev = bp->bus_dev; 968 struct device *bdev = bp->bus_dev;
968 int dfx_bus_pci = DFX_BUS_PCI(bdev); 969 int dfx_bus_pci = DFX_BUS_PCI(bdev);
969 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 970 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
970 int dfx_bus_tc = DFX_BUS_TC(bdev); 971 int dfx_bus_tc = DFX_BUS_TC(bdev);
971 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 972 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
972 int alloc_size; /* total buffer size needed */ 973 int alloc_size; /* total buffer size needed */
973 char *top_v, *curr_v; /* virtual addrs into memory block */ 974 char *top_v, *curr_v; /* virtual addrs into memory block */
974 dma_addr_t top_p, curr_p; /* physical addrs into memory block */ 975 dma_addr_t top_p, curr_p; /* physical addrs into memory block */
975 u32 data, le32; /* host data register value */ 976 u32 data, le32; /* host data register value */
976 char *board_name = NULL; 977 char *board_name = NULL;
977 978
978 DBG_printk("In dfx_driver_init...\n"); 979 DBG_printk("In dfx_driver_init...\n");
979 980
980 /* Initialize bus-specific hardware registers */ 981 /* Initialize bus-specific hardware registers */
981 982
982 dfx_bus_init(dev); 983 dfx_bus_init(dev);
983 984
984 /* 985 /*
985 * Initialize default values for configurable parameters 986 * Initialize default values for configurable parameters
986 * 987 *
987 * Note: All of these parameters are ones that a user may 988 * Note: All of these parameters are ones that a user may
988 * want to customize. It'd be nice to break these 989 * want to customize. It'd be nice to break these
989 * out into Space.c or someplace else that's more 990 * out into Space.c or someplace else that's more
990 * accessible/understandable than this file. 991 * accessible/understandable than this file.
991 */ 992 */
992 993
993 bp->full_duplex_enb = PI_SNMP_K_FALSE; 994 bp->full_duplex_enb = PI_SNMP_K_FALSE;
994 bp->req_ttrt = 8 * 12500; /* 8ms in 80 nanosec units */ 995 bp->req_ttrt = 8 * 12500; /* 8ms in 80 nanosec units */
995 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_DEF; 996 bp->burst_size = PI_PDATA_B_DMA_BURST_SIZE_DEF;
996 bp->rcv_bufs_to_post = RCV_BUFS_DEF; 997 bp->rcv_bufs_to_post = RCV_BUFS_DEF;
997 998
998 /* 999 /*
999 * Ensure that HW configuration is OK 1000 * Ensure that HW configuration is OK
1000 * 1001 *
1001 * Note: Depending on the hardware revision, we may need to modify 1002 * Note: Depending on the hardware revision, we may need to modify
1002 * some of the configurable parameters to workaround hardware 1003 * some of the configurable parameters to workaround hardware
1003 * limitations. We'll perform this configuration check AFTER 1004 * limitations. We'll perform this configuration check AFTER
1004 * setting the parameters to their default values. 1005 * setting the parameters to their default values.
1005 */ 1006 */
1006 1007
1007 dfx_bus_config_check(bp); 1008 dfx_bus_config_check(bp);
1008 1009
1009 /* Disable PDQ interrupts first */ 1010 /* Disable PDQ interrupts first */
1010 1011
1011 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS); 1012 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1012 1013
1013 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */ 1014 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1014 1015
1015 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST); 1016 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1016 1017
1017 /* Read the factory MAC address from the adapter then save it */ 1018 /* Read the factory MAC address from the adapter then save it */
1018 1019
1019 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0, 1020 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_LO, 0,
1020 &data) != DFX_K_SUCCESS) { 1021 &data) != DFX_K_SUCCESS) {
1021 printk("%s: Could not read adapter factory MAC address!\n", 1022 printk("%s: Could not read adapter factory MAC address!\n",
1022 print_name); 1023 print_name);
1023 return(DFX_K_FAILURE); 1024 return(DFX_K_FAILURE);
1024 } 1025 }
1025 le32 = cpu_to_le32(data); 1026 le32 = cpu_to_le32(data);
1026 memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32)); 1027 memcpy(&bp->factory_mac_addr[0], &le32, sizeof(u32));
1027 1028
1028 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0, 1029 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_MLA, PI_PDATA_A_MLA_K_HI, 0,
1029 &data) != DFX_K_SUCCESS) { 1030 &data) != DFX_K_SUCCESS) {
1030 printk("%s: Could not read adapter factory MAC address!\n", 1031 printk("%s: Could not read adapter factory MAC address!\n",
1031 print_name); 1032 print_name);
1032 return(DFX_K_FAILURE); 1033 return(DFX_K_FAILURE);
1033 } 1034 }
1034 le32 = cpu_to_le32(data); 1035 le32 = cpu_to_le32(data);
1035 memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16)); 1036 memcpy(&bp->factory_mac_addr[4], &le32, sizeof(u16));
1036 1037
1037 /* 1038 /*
1038 * Set current address to factory address 1039 * Set current address to factory address
1039 * 1040 *
1040 * Note: Node address override support is handled through 1041 * Note: Node address override support is handled through
1041 * dfx_ctl_set_mac_address. 1042 * dfx_ctl_set_mac_address.
1042 */ 1043 */
1043 1044
1044 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN); 1045 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1045 if (dfx_bus_tc) 1046 if (dfx_bus_tc)
1046 board_name = "DEFTA"; 1047 board_name = "DEFTA";
1047 if (dfx_bus_eisa) 1048 if (dfx_bus_eisa)
1048 board_name = "DEFEA"; 1049 board_name = "DEFEA";
1049 if (dfx_bus_pci) 1050 if (dfx_bus_pci)
1050 board_name = "DEFPA"; 1051 board_name = "DEFPA";
1051 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, " 1052 pr_info("%s: %s at %saddr = 0x%llx, IRQ = %d, "
1052 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n", 1053 "Hardware addr = %02X-%02X-%02X-%02X-%02X-%02X\n",
1053 print_name, board_name, dfx_use_mmio ? "" : "I/O ", 1054 print_name, board_name, dfx_use_mmio ? "" : "I/O ",
1054 (long long)bar_start, dev->irq, 1055 (long long)bar_start, dev->irq,
1055 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2], 1056 dev->dev_addr[0], dev->dev_addr[1], dev->dev_addr[2],
1056 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]); 1057 dev->dev_addr[3], dev->dev_addr[4], dev->dev_addr[5]);
1057 1058
1058 /* 1059 /*
1059 * Get memory for descriptor block, consumer block, and other buffers 1060 * Get memory for descriptor block, consumer block, and other buffers
1060 * that need to be DMA read or written to by the adapter. 1061 * that need to be DMA read or written to by the adapter.
1061 */ 1062 */
1062 1063
1063 alloc_size = sizeof(PI_DESCR_BLOCK) + 1064 alloc_size = sizeof(PI_DESCR_BLOCK) +
1064 PI_CMD_REQ_K_SIZE_MAX + 1065 PI_CMD_REQ_K_SIZE_MAX +
1065 PI_CMD_RSP_K_SIZE_MAX + 1066 PI_CMD_RSP_K_SIZE_MAX +
1066 #ifndef DYNAMIC_BUFFERS 1067 #ifndef DYNAMIC_BUFFERS
1067 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) + 1068 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
1068 #endif 1069 #endif
1069 sizeof(PI_CONSUMER_BLOCK) + 1070 sizeof(PI_CONSUMER_BLOCK) +
1070 (PI_ALIGN_K_DESC_BLK - 1); 1071 (PI_ALIGN_K_DESC_BLK - 1);
1071 bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size, 1072 bp->kmalloced = top_v = dma_alloc_coherent(bp->bus_dev, alloc_size,
1072 &bp->kmalloced_dma, 1073 &bp->kmalloced_dma,
1073 GFP_ATOMIC); 1074 GFP_ATOMIC);
1074 if (top_v == NULL) { 1075 if (top_v == NULL) {
1075 printk("%s: Could not allocate memory for host buffers " 1076 printk("%s: Could not allocate memory for host buffers "
1076 "and structures!\n", print_name); 1077 "and structures!\n", print_name);
1077 return(DFX_K_FAILURE); 1078 return(DFX_K_FAILURE);
1078 } 1079 }
1079 memset(top_v, 0, alloc_size); /* zero out memory before continuing */ 1080 memset(top_v, 0, alloc_size); /* zero out memory before continuing */
1080 top_p = bp->kmalloced_dma; /* get physical address of buffer */ 1081 top_p = bp->kmalloced_dma; /* get physical address of buffer */
1081 1082
1082 /* 1083 /*
1083 * To guarantee the 8K alignment required for the descriptor block, 8K - 1 1084 * To guarantee the 8K alignment required for the descriptor block, 8K - 1
1084 * plus the amount of memory needed was allocated. The physical address 1085 * plus the amount of memory needed was allocated. The physical address
1085 * is now 8K aligned. By carving up the memory in a specific order, 1086 * is now 8K aligned. By carving up the memory in a specific order,
1086 * we'll guarantee the alignment requirements for all other structures. 1087 * we'll guarantee the alignment requirements for all other structures.
1087 * 1088 *
1088 * Note: If the assumptions change regarding the non-paged, non-cached, 1089 * Note: If the assumptions change regarding the non-paged, non-cached,
1089 * physically contiguous nature of the memory block or the address 1090 * physically contiguous nature of the memory block or the address
1090 * alignments, then we'll need to implement a different algorithm 1091 * alignments, then we'll need to implement a different algorithm
1091 * for allocating the needed memory. 1092 * for allocating the needed memory.
1092 */ 1093 */
1093 1094
1094 curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK); 1095 curr_p = ALIGN(top_p, PI_ALIGN_K_DESC_BLK);
1095 curr_v = top_v + (curr_p - top_p); 1096 curr_v = top_v + (curr_p - top_p);
1096 1097
1097 /* Reserve space for descriptor block */ 1098 /* Reserve space for descriptor block */
1098 1099
1099 bp->descr_block_virt = (PI_DESCR_BLOCK *) curr_v; 1100 bp->descr_block_virt = (PI_DESCR_BLOCK *) curr_v;
1100 bp->descr_block_phys = curr_p; 1101 bp->descr_block_phys = curr_p;
1101 curr_v += sizeof(PI_DESCR_BLOCK); 1102 curr_v += sizeof(PI_DESCR_BLOCK);
1102 curr_p += sizeof(PI_DESCR_BLOCK); 1103 curr_p += sizeof(PI_DESCR_BLOCK);
1103 1104
1104 /* Reserve space for command request buffer */ 1105 /* Reserve space for command request buffer */
1105 1106
1106 bp->cmd_req_virt = (PI_DMA_CMD_REQ *) curr_v; 1107 bp->cmd_req_virt = (PI_DMA_CMD_REQ *) curr_v;
1107 bp->cmd_req_phys = curr_p; 1108 bp->cmd_req_phys = curr_p;
1108 curr_v += PI_CMD_REQ_K_SIZE_MAX; 1109 curr_v += PI_CMD_REQ_K_SIZE_MAX;
1109 curr_p += PI_CMD_REQ_K_SIZE_MAX; 1110 curr_p += PI_CMD_REQ_K_SIZE_MAX;
1110 1111
1111 /* Reserve space for command response buffer */ 1112 /* Reserve space for command response buffer */
1112 1113
1113 bp->cmd_rsp_virt = (PI_DMA_CMD_RSP *) curr_v; 1114 bp->cmd_rsp_virt = (PI_DMA_CMD_RSP *) curr_v;
1114 bp->cmd_rsp_phys = curr_p; 1115 bp->cmd_rsp_phys = curr_p;
1115 curr_v += PI_CMD_RSP_K_SIZE_MAX; 1116 curr_v += PI_CMD_RSP_K_SIZE_MAX;
1116 curr_p += PI_CMD_RSP_K_SIZE_MAX; 1117 curr_p += PI_CMD_RSP_K_SIZE_MAX;
1117 1118
1118 /* Reserve space for the LLC host receive queue buffers */ 1119 /* Reserve space for the LLC host receive queue buffers */
1119 1120
1120 bp->rcv_block_virt = curr_v; 1121 bp->rcv_block_virt = curr_v;
1121 bp->rcv_block_phys = curr_p; 1122 bp->rcv_block_phys = curr_p;
1122 1123
1123 #ifndef DYNAMIC_BUFFERS 1124 #ifndef DYNAMIC_BUFFERS
1124 curr_v += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX); 1125 curr_v += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1125 curr_p += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX); 1126 curr_p += (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX);
1126 #endif 1127 #endif
1127 1128
1128 /* Reserve space for the consumer block */ 1129 /* Reserve space for the consumer block */
1129 1130
1130 bp->cons_block_virt = (PI_CONSUMER_BLOCK *) curr_v; 1131 bp->cons_block_virt = (PI_CONSUMER_BLOCK *) curr_v;
1131 bp->cons_block_phys = curr_p; 1132 bp->cons_block_phys = curr_p;
1132 1133
1133 /* Display virtual and physical addresses if debug driver */ 1134 /* Display virtual and physical addresses if debug driver */
1134 1135
1135 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n", 1136 DBG_printk("%s: Descriptor block virt = %0lX, phys = %0X\n",
1136 print_name, 1137 print_name,
1137 (long)bp->descr_block_virt, bp->descr_block_phys); 1138 (long)bp->descr_block_virt, bp->descr_block_phys);
1138 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n", 1139 DBG_printk("%s: Command Request buffer virt = %0lX, phys = %0X\n",
1139 print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys); 1140 print_name, (long)bp->cmd_req_virt, bp->cmd_req_phys);
1140 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n", 1141 DBG_printk("%s: Command Response buffer virt = %0lX, phys = %0X\n",
1141 print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys); 1142 print_name, (long)bp->cmd_rsp_virt, bp->cmd_rsp_phys);
1142 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n", 1143 DBG_printk("%s: Receive buffer block virt = %0lX, phys = %0X\n",
1143 print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys); 1144 print_name, (long)bp->rcv_block_virt, bp->rcv_block_phys);
1144 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n", 1145 DBG_printk("%s: Consumer block virt = %0lX, phys = %0X\n",
1145 print_name, (long)bp->cons_block_virt, bp->cons_block_phys); 1146 print_name, (long)bp->cons_block_virt, bp->cons_block_phys);
1146 1147
1147 return(DFX_K_SUCCESS); 1148 return(DFX_K_SUCCESS);
1148 } 1149 }
1149 1150
1150 1151
1151 /* 1152 /*
1152 * ================= 1153 * =================
1153 * = dfx_adap_init = 1154 * = dfx_adap_init =
1154 * ================= 1155 * =================
1155 * 1156 *
1156 * Overview: 1157 * Overview:
1157 * Brings the adapter to the link avail/link unavailable state. 1158 * Brings the adapter to the link avail/link unavailable state.
1158 * 1159 *
1159 * Returns: 1160 * Returns:
1160 * Condition code 1161 * Condition code
1161 * 1162 *
1162 * Arguments: 1163 * Arguments:
1163 * bp - pointer to board information 1164 * bp - pointer to board information
1164 * get_buffers - non-zero if buffers to be allocated 1165 * get_buffers - non-zero if buffers to be allocated
1165 * 1166 *
1166 * Functional Description: 1167 * Functional Description:
1167 * Issues the low-level firmware/hardware calls necessary to bring 1168 * Issues the low-level firmware/hardware calls necessary to bring
1168 * the adapter up, or to properly reset and restore adapter during 1169 * the adapter up, or to properly reset and restore adapter during
1169 * run-time. 1170 * run-time.
1170 * 1171 *
1171 * Return Codes: 1172 * Return Codes:
1172 * DFX_K_SUCCESS - Adapter brought up successfully 1173 * DFX_K_SUCCESS - Adapter brought up successfully
1173 * DFX_K_FAILURE - Adapter initialization failed 1174 * DFX_K_FAILURE - Adapter initialization failed
1174 * 1175 *
1175 * Assumptions: 1176 * Assumptions:
1176 * bp->reset_type should be set to a valid reset type value before 1177 * bp->reset_type should be set to a valid reset type value before
1177 * calling this routine. 1178 * calling this routine.
1178 * 1179 *
1179 * Side Effects: 1180 * Side Effects:
1180 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state 1181 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1181 * upon a successful return of this routine. 1182 * upon a successful return of this routine.
1182 */ 1183 */
1183 1184
1184 static int dfx_adap_init(DFX_board_t *bp, int get_buffers) 1185 static int dfx_adap_init(DFX_board_t *bp, int get_buffers)
1185 { 1186 {
1186 DBG_printk("In dfx_adap_init...\n"); 1187 DBG_printk("In dfx_adap_init...\n");
1187 1188
1188 /* Disable PDQ interrupts first */ 1189 /* Disable PDQ interrupts first */
1189 1190
1190 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS); 1191 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1191 1192
1192 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */ 1193 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1193 1194
1194 if (dfx_hw_dma_uninit(bp, bp->reset_type) != DFX_K_SUCCESS) 1195 if (dfx_hw_dma_uninit(bp, bp->reset_type) != DFX_K_SUCCESS)
1195 { 1196 {
1196 printk("%s: Could not uninitialize/reset adapter!\n", bp->dev->name); 1197 printk("%s: Could not uninitialize/reset adapter!\n", bp->dev->name);
1197 return(DFX_K_FAILURE); 1198 return(DFX_K_FAILURE);
1198 } 1199 }
1199 1200
1200 /* 1201 /*
1201 * When the PDQ is reset, some false Type 0 interrupts may be pending, 1202 * When the PDQ is reset, some false Type 0 interrupts may be pending,
1202 * so we'll acknowledge all Type 0 interrupts now before continuing. 1203 * so we'll acknowledge all Type 0 interrupts now before continuing.
1203 */ 1204 */
1204 1205
1205 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, PI_HOST_INT_K_ACK_ALL_TYPE_0); 1206 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, PI_HOST_INT_K_ACK_ALL_TYPE_0);
1206 1207
1207 /* 1208 /*
1208 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state 1209 * Clear Type 1 and Type 2 registers before going to DMA_AVAILABLE state
1209 * 1210 *
1210 * Note: We only need to clear host copies of these registers. The PDQ reset 1211 * Note: We only need to clear host copies of these registers. The PDQ reset
1211 * takes care of the on-board register values. 1212 * takes care of the on-board register values.
1212 */ 1213 */
1213 1214
1214 bp->cmd_req_reg.lword = 0; 1215 bp->cmd_req_reg.lword = 0;
1215 bp->cmd_rsp_reg.lword = 0; 1216 bp->cmd_rsp_reg.lword = 0;
1216 bp->rcv_xmt_reg.lword = 0; 1217 bp->rcv_xmt_reg.lword = 0;
1217 1218
1218 /* Clear consumer block before going to DMA_AVAILABLE state */ 1219 /* Clear consumer block before going to DMA_AVAILABLE state */
1219 1220
1220 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK)); 1221 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1221 1222
1222 /* Initialize the DMA Burst Size */ 1223 /* Initialize the DMA Burst Size */
1223 1224
1224 if (dfx_hw_port_ctrl_req(bp, 1225 if (dfx_hw_port_ctrl_req(bp,
1225 PI_PCTRL_M_SUB_CMD, 1226 PI_PCTRL_M_SUB_CMD,
1226 PI_SUB_CMD_K_BURST_SIZE_SET, 1227 PI_SUB_CMD_K_BURST_SIZE_SET,
1227 bp->burst_size, 1228 bp->burst_size,
1228 NULL) != DFX_K_SUCCESS) 1229 NULL) != DFX_K_SUCCESS)
1229 { 1230 {
1230 printk("%s: Could not set adapter burst size!\n", bp->dev->name); 1231 printk("%s: Could not set adapter burst size!\n", bp->dev->name);
1231 return(DFX_K_FAILURE); 1232 return(DFX_K_FAILURE);
1232 } 1233 }
1233 1234
1234 /* 1235 /*
1235 * Set base address of Consumer Block 1236 * Set base address of Consumer Block
1236 * 1237 *
1237 * Assumption: 32-bit physical address of consumer block is 64 byte 1238 * Assumption: 32-bit physical address of consumer block is 64 byte
1238 * aligned. That is, bits 0-5 of the address must be zero. 1239 * aligned. That is, bits 0-5 of the address must be zero.
1239 */ 1240 */
1240 1241
1241 if (dfx_hw_port_ctrl_req(bp, 1242 if (dfx_hw_port_ctrl_req(bp,
1242 PI_PCTRL_M_CONS_BLOCK, 1243 PI_PCTRL_M_CONS_BLOCK,
1243 bp->cons_block_phys, 1244 bp->cons_block_phys,
1244 0, 1245 0,
1245 NULL) != DFX_K_SUCCESS) 1246 NULL) != DFX_K_SUCCESS)
1246 { 1247 {
1247 printk("%s: Could not set consumer block address!\n", bp->dev->name); 1248 printk("%s: Could not set consumer block address!\n", bp->dev->name);
1248 return(DFX_K_FAILURE); 1249 return(DFX_K_FAILURE);
1249 } 1250 }
1250 1251
1251 /* 1252 /*
1252 * Set the base address of Descriptor Block and bring adapter 1253 * Set the base address of Descriptor Block and bring adapter
1253 * to DMA_AVAILABLE state. 1254 * to DMA_AVAILABLE state.
1254 * 1255 *
1255 * Note: We also set the literal and data swapping requirements 1256 * Note: We also set the literal and data swapping requirements
1256 * in this command. 1257 * in this command.
1257 * 1258 *
1258 * Assumption: 32-bit physical address of descriptor block 1259 * Assumption: 32-bit physical address of descriptor block
1259 * is 8Kbyte aligned. 1260 * is 8Kbyte aligned.
1260 */ 1261 */
1261 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_INIT, 1262 if (dfx_hw_port_ctrl_req(bp, PI_PCTRL_M_INIT,
1262 (u32)(bp->descr_block_phys | 1263 (u32)(bp->descr_block_phys |
1263 PI_PDATA_A_INIT_M_BSWAP_INIT), 1264 PI_PDATA_A_INIT_M_BSWAP_INIT),
1264 0, NULL) != DFX_K_SUCCESS) { 1265 0, NULL) != DFX_K_SUCCESS) {
1265 printk("%s: Could not set descriptor block address!\n", 1266 printk("%s: Could not set descriptor block address!\n",
1266 bp->dev->name); 1267 bp->dev->name);
1267 return DFX_K_FAILURE; 1268 return DFX_K_FAILURE;
1268 } 1269 }
1269 1270
1270 /* Set transmit flush timeout value */ 1271 /* Set transmit flush timeout value */
1271 1272
1272 bp->cmd_req_virt->cmd_type = PI_CMD_K_CHARS_SET; 1273 bp->cmd_req_virt->cmd_type = PI_CMD_K_CHARS_SET;
1273 bp->cmd_req_virt->char_set.item[0].item_code = PI_ITEM_K_FLUSH_TIME; 1274 bp->cmd_req_virt->char_set.item[0].item_code = PI_ITEM_K_FLUSH_TIME;
1274 bp->cmd_req_virt->char_set.item[0].value = 3; /* 3 seconds */ 1275 bp->cmd_req_virt->char_set.item[0].value = 3; /* 3 seconds */
1275 bp->cmd_req_virt->char_set.item[0].item_index = 0; 1276 bp->cmd_req_virt->char_set.item[0].item_index = 0;
1276 bp->cmd_req_virt->char_set.item[1].item_code = PI_ITEM_K_EOL; 1277 bp->cmd_req_virt->char_set.item[1].item_code = PI_ITEM_K_EOL;
1277 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 1278 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1278 { 1279 {
1279 printk("%s: DMA command request failed!\n", bp->dev->name); 1280 printk("%s: DMA command request failed!\n", bp->dev->name);
1280 return(DFX_K_FAILURE); 1281 return(DFX_K_FAILURE);
1281 } 1282 }
1282 1283
1283 /* Set the initial values for eFDXEnable and MACTReq MIB objects */ 1284 /* Set the initial values for eFDXEnable and MACTReq MIB objects */
1284 1285
1285 bp->cmd_req_virt->cmd_type = PI_CMD_K_SNMP_SET; 1286 bp->cmd_req_virt->cmd_type = PI_CMD_K_SNMP_SET;
1286 bp->cmd_req_virt->snmp_set.item[0].item_code = PI_ITEM_K_FDX_ENB_DIS; 1287 bp->cmd_req_virt->snmp_set.item[0].item_code = PI_ITEM_K_FDX_ENB_DIS;
1287 bp->cmd_req_virt->snmp_set.item[0].value = bp->full_duplex_enb; 1288 bp->cmd_req_virt->snmp_set.item[0].value = bp->full_duplex_enb;
1288 bp->cmd_req_virt->snmp_set.item[0].item_index = 0; 1289 bp->cmd_req_virt->snmp_set.item[0].item_index = 0;
1289 bp->cmd_req_virt->snmp_set.item[1].item_code = PI_ITEM_K_MAC_T_REQ; 1290 bp->cmd_req_virt->snmp_set.item[1].item_code = PI_ITEM_K_MAC_T_REQ;
1290 bp->cmd_req_virt->snmp_set.item[1].value = bp->req_ttrt; 1291 bp->cmd_req_virt->snmp_set.item[1].value = bp->req_ttrt;
1291 bp->cmd_req_virt->snmp_set.item[1].item_index = 0; 1292 bp->cmd_req_virt->snmp_set.item[1].item_index = 0;
1292 bp->cmd_req_virt->snmp_set.item[2].item_code = PI_ITEM_K_EOL; 1293 bp->cmd_req_virt->snmp_set.item[2].item_code = PI_ITEM_K_EOL;
1293 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 1294 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1294 { 1295 {
1295 printk("%s: DMA command request failed!\n", bp->dev->name); 1296 printk("%s: DMA command request failed!\n", bp->dev->name);
1296 return(DFX_K_FAILURE); 1297 return(DFX_K_FAILURE);
1297 } 1298 }
1298 1299
1299 /* Initialize adapter CAM */ 1300 /* Initialize adapter CAM */
1300 1301
1301 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS) 1302 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
1302 { 1303 {
1303 printk("%s: Adapter CAM update failed!\n", bp->dev->name); 1304 printk("%s: Adapter CAM update failed!\n", bp->dev->name);
1304 return(DFX_K_FAILURE); 1305 return(DFX_K_FAILURE);
1305 } 1306 }
1306 1307
1307 /* Initialize adapter filters */ 1308 /* Initialize adapter filters */
1308 1309
1309 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS) 1310 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
1310 { 1311 {
1311 printk("%s: Adapter filters update failed!\n", bp->dev->name); 1312 printk("%s: Adapter filters update failed!\n", bp->dev->name);
1312 return(DFX_K_FAILURE); 1313 return(DFX_K_FAILURE);
1313 } 1314 }
1314 1315
1315 /* 1316 /*
1316 * Remove any existing dynamic buffers (i.e. if the adapter is being 1317 * Remove any existing dynamic buffers (i.e. if the adapter is being
1317 * reinitialized) 1318 * reinitialized)
1318 */ 1319 */
1319 1320
1320 if (get_buffers) 1321 if (get_buffers)
1321 dfx_rcv_flush(bp); 1322 dfx_rcv_flush(bp);
1322 1323
1323 /* Initialize receive descriptor block and produce buffers */ 1324 /* Initialize receive descriptor block and produce buffers */
1324 1325
1325 if (dfx_rcv_init(bp, get_buffers)) 1326 if (dfx_rcv_init(bp, get_buffers))
1326 { 1327 {
1327 printk("%s: Receive buffer allocation failed\n", bp->dev->name); 1328 printk("%s: Receive buffer allocation failed\n", bp->dev->name);
1328 if (get_buffers) 1329 if (get_buffers)
1329 dfx_rcv_flush(bp); 1330 dfx_rcv_flush(bp);
1330 return(DFX_K_FAILURE); 1331 return(DFX_K_FAILURE);
1331 } 1332 }
1332 1333
1333 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */ 1334 /* Issue START command and bring adapter to LINK_(UN)AVAILABLE state */
1334 1335
1335 bp->cmd_req_virt->cmd_type = PI_CMD_K_START; 1336 bp->cmd_req_virt->cmd_type = PI_CMD_K_START;
1336 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 1337 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
1337 { 1338 {
1338 printk("%s: Start command failed\n", bp->dev->name); 1339 printk("%s: Start command failed\n", bp->dev->name);
1339 if (get_buffers) 1340 if (get_buffers)
1340 dfx_rcv_flush(bp); 1341 dfx_rcv_flush(bp);
1341 return(DFX_K_FAILURE); 1342 return(DFX_K_FAILURE);
1342 } 1343 }
1343 1344
1344 /* Initialization succeeded, reenable PDQ interrupts */ 1345 /* Initialization succeeded, reenable PDQ interrupts */
1345 1346
1346 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_ENABLE_DEF_INTS); 1347 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_ENABLE_DEF_INTS);
1347 return(DFX_K_SUCCESS); 1348 return(DFX_K_SUCCESS);
1348 } 1349 }
1349 1350
1350 1351
1351 /* 1352 /*
1352 * ============ 1353 * ============
1353 * = dfx_open = 1354 * = dfx_open =
1354 * ============ 1355 * ============
1355 * 1356 *
1356 * Overview: 1357 * Overview:
1357 * Opens the adapter 1358 * Opens the adapter
1358 * 1359 *
1359 * Returns: 1360 * Returns:
1360 * Condition code 1361 * Condition code
1361 * 1362 *
1362 * Arguments: 1363 * Arguments:
1363 * dev - pointer to device information 1364 * dev - pointer to device information
1364 * 1365 *
1365 * Functional Description: 1366 * Functional Description:
1366 * This function brings the adapter to an operational state. 1367 * This function brings the adapter to an operational state.
1367 * 1368 *
1368 * Return Codes: 1369 * Return Codes:
1369 * 0 - Adapter was successfully opened 1370 * 0 - Adapter was successfully opened
1370 * -EAGAIN - Could not register IRQ or adapter initialization failed 1371 * -EAGAIN - Could not register IRQ or adapter initialization failed
1371 * 1372 *
1372 * Assumptions: 1373 * Assumptions:
1373 * This routine should only be called for a device that was 1374 * This routine should only be called for a device that was
1374 * initialized successfully. 1375 * initialized successfully.
1375 * 1376 *
1376 * Side Effects: 1377 * Side Effects:
1377 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state 1378 * Adapter should be in LINK_AVAILABLE or LINK_UNAVAILABLE state
1378 * if the open is successful. 1379 * if the open is successful.
1379 */ 1380 */
1380 1381
1381 static int dfx_open(struct net_device *dev) 1382 static int dfx_open(struct net_device *dev)
1382 { 1383 {
1383 DFX_board_t *bp = netdev_priv(dev); 1384 DFX_board_t *bp = netdev_priv(dev);
1384 int ret; 1385 int ret;
1385 1386
1386 DBG_printk("In dfx_open...\n"); 1387 DBG_printk("In dfx_open...\n");
1387 1388
1388 /* Register IRQ - support shared interrupts by passing device ptr */ 1389 /* Register IRQ - support shared interrupts by passing device ptr */
1389 1390
1390 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name, 1391 ret = request_irq(dev->irq, dfx_interrupt, IRQF_SHARED, dev->name,
1391 dev); 1392 dev);
1392 if (ret) { 1393 if (ret) {
1393 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq); 1394 printk(KERN_ERR "%s: Requested IRQ %d is busy\n", dev->name, dev->irq);
1394 return ret; 1395 return ret;
1395 } 1396 }
1396 1397
1397 /* 1398 /*
1398 * Set current address to factory MAC address 1399 * Set current address to factory MAC address
1399 * 1400 *
1400 * Note: We've already done this step in dfx_driver_init. 1401 * Note: We've already done this step in dfx_driver_init.
1401 * However, it's possible that a user has set a node 1402 * However, it's possible that a user has set a node
1402 * address override, then closed and reopened the 1403 * address override, then closed and reopened the
1403 * adapter. Unless we reset the device address field 1404 * adapter. Unless we reset the device address field
1404 * now, we'll continue to use the existing modified 1405 * now, we'll continue to use the existing modified
1405 * address. 1406 * address.
1406 */ 1407 */
1407 1408
1408 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN); 1409 memcpy(dev->dev_addr, bp->factory_mac_addr, FDDI_K_ALEN);
1409 1410
1410 /* Clear local unicast/multicast address tables and counts */ 1411 /* Clear local unicast/multicast address tables and counts */
1411 1412
1412 memset(bp->uc_table, 0, sizeof(bp->uc_table)); 1413 memset(bp->uc_table, 0, sizeof(bp->uc_table));
1413 memset(bp->mc_table, 0, sizeof(bp->mc_table)); 1414 memset(bp->mc_table, 0, sizeof(bp->mc_table));
1414 bp->uc_count = 0; 1415 bp->uc_count = 0;
1415 bp->mc_count = 0; 1416 bp->mc_count = 0;
1416 1417
1417 /* Disable promiscuous filter settings */ 1418 /* Disable promiscuous filter settings */
1418 1419
1419 bp->ind_group_prom = PI_FSTATE_K_BLOCK; 1420 bp->ind_group_prom = PI_FSTATE_K_BLOCK;
1420 bp->group_prom = PI_FSTATE_K_BLOCK; 1421 bp->group_prom = PI_FSTATE_K_BLOCK;
1421 1422
1422 spin_lock_init(&bp->lock); 1423 spin_lock_init(&bp->lock);
1423 1424
1424 /* Reset and initialize adapter */ 1425 /* Reset and initialize adapter */
1425 1426
1426 bp->reset_type = PI_PDATA_A_RESET_M_SKIP_ST; /* skip self-test */ 1427 bp->reset_type = PI_PDATA_A_RESET_M_SKIP_ST; /* skip self-test */
1427 if (dfx_adap_init(bp, 1) != DFX_K_SUCCESS) 1428 if (dfx_adap_init(bp, 1) != DFX_K_SUCCESS)
1428 { 1429 {
1429 printk(KERN_ERR "%s: Adapter open failed!\n", dev->name); 1430 printk(KERN_ERR "%s: Adapter open failed!\n", dev->name);
1430 free_irq(dev->irq, dev); 1431 free_irq(dev->irq, dev);
1431 return -EAGAIN; 1432 return -EAGAIN;
1432 } 1433 }
1433 1434
1434 /* Set device structure info */ 1435 /* Set device structure info */
1435 netif_start_queue(dev); 1436 netif_start_queue(dev);
1436 return(0); 1437 return(0);
1437 } 1438 }
1438 1439
1439 1440
1440 /* 1441 /*
1441 * ============= 1442 * =============
1442 * = dfx_close = 1443 * = dfx_close =
1443 * ============= 1444 * =============
1444 * 1445 *
1445 * Overview: 1446 * Overview:
1446 * Closes the device/module. 1447 * Closes the device/module.
1447 * 1448 *
1448 * Returns: 1449 * Returns:
1449 * Condition code 1450 * Condition code
1450 * 1451 *
1451 * Arguments: 1452 * Arguments:
1452 * dev - pointer to device information 1453 * dev - pointer to device information
1453 * 1454 *
1454 * Functional Description: 1455 * Functional Description:
1455 * This routine closes the adapter and brings it to a safe state. 1456 * This routine closes the adapter and brings it to a safe state.
1456 * The interrupt service routine is deregistered with the OS. 1457 * The interrupt service routine is deregistered with the OS.
1457 * The adapter can be opened again with another call to dfx_open(). 1458 * The adapter can be opened again with another call to dfx_open().
1458 * 1459 *
1459 * Return Codes: 1460 * Return Codes:
1460 * Always return 0. 1461 * Always return 0.
1461 * 1462 *
1462 * Assumptions: 1463 * Assumptions:
1463 * No further requests for this adapter are made after this routine is 1464 * No further requests for this adapter are made after this routine is
1464 * called. dfx_open() can be called to reset and reinitialize the 1465 * called. dfx_open() can be called to reset and reinitialize the
1465 * adapter. 1466 * adapter.
1466 * 1467 *
1467 * Side Effects: 1468 * Side Effects:
1468 * Adapter should be in DMA_UNAVAILABLE state upon completion of this 1469 * Adapter should be in DMA_UNAVAILABLE state upon completion of this
1469 * routine. 1470 * routine.
1470 */ 1471 */
1471 1472
1472 static int dfx_close(struct net_device *dev) 1473 static int dfx_close(struct net_device *dev)
1473 { 1474 {
1474 DFX_board_t *bp = netdev_priv(dev); 1475 DFX_board_t *bp = netdev_priv(dev);
1475 1476
1476 DBG_printk("In dfx_close...\n"); 1477 DBG_printk("In dfx_close...\n");
1477 1478
1478 /* Disable PDQ interrupts first */ 1479 /* Disable PDQ interrupts first */
1479 1480
1480 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS); 1481 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1481 1482
1482 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */ 1483 /* Place adapter in DMA_UNAVAILABLE state by resetting adapter */
1483 1484
1484 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST); 1485 (void) dfx_hw_dma_uninit(bp, PI_PDATA_A_RESET_M_SKIP_ST);
1485 1486
1486 /* 1487 /*
1487 * Flush any pending transmit buffers 1488 * Flush any pending transmit buffers
1488 * 1489 *
1489 * Note: It's important that we flush the transmit buffers 1490 * Note: It's important that we flush the transmit buffers
1490 * BEFORE we clear our copy of the Type 2 register. 1491 * BEFORE we clear our copy of the Type 2 register.
1491 * Otherwise, we'll have no idea how many buffers 1492 * Otherwise, we'll have no idea how many buffers
1492 * we need to free. 1493 * we need to free.
1493 */ 1494 */
1494 1495
1495 dfx_xmt_flush(bp); 1496 dfx_xmt_flush(bp);
1496 1497
1497 /* 1498 /*
1498 * Clear Type 1 and Type 2 registers after adapter reset 1499 * Clear Type 1 and Type 2 registers after adapter reset
1499 * 1500 *
1500 * Note: Even though we're closing the adapter, it's 1501 * Note: Even though we're closing the adapter, it's
1501 * possible that an interrupt will occur after 1502 * possible that an interrupt will occur after
1502 * dfx_close is called. Without some assurance to 1503 * dfx_close is called. Without some assurance to
1503 * the contrary we want to make sure that we don't 1504 * the contrary we want to make sure that we don't
1504 * process receive and transmit LLC frames and update 1505 * process receive and transmit LLC frames and update
1505 * the Type 2 register with bad information. 1506 * the Type 2 register with bad information.
1506 */ 1507 */
1507 1508
1508 bp->cmd_req_reg.lword = 0; 1509 bp->cmd_req_reg.lword = 0;
1509 bp->cmd_rsp_reg.lword = 0; 1510 bp->cmd_rsp_reg.lword = 0;
1510 bp->rcv_xmt_reg.lword = 0; 1511 bp->rcv_xmt_reg.lword = 0;
1511 1512
1512 /* Clear consumer block for the same reason given above */ 1513 /* Clear consumer block for the same reason given above */
1513 1514
1514 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK)); 1515 memset(bp->cons_block_virt, 0, sizeof(PI_CONSUMER_BLOCK));
1515 1516
1516 /* Release all dynamically allocate skb in the receive ring. */ 1517 /* Release all dynamically allocate skb in the receive ring. */
1517 1518
1518 dfx_rcv_flush(bp); 1519 dfx_rcv_flush(bp);
1519 1520
1520 /* Clear device structure flags */ 1521 /* Clear device structure flags */
1521 1522
1522 netif_stop_queue(dev); 1523 netif_stop_queue(dev);
1523 1524
1524 /* Deregister (free) IRQ */ 1525 /* Deregister (free) IRQ */
1525 1526
1526 free_irq(dev->irq, dev); 1527 free_irq(dev->irq, dev);
1527 1528
1528 return(0); 1529 return(0);
1529 } 1530 }
1530 1531
1531 1532
1532 /* 1533 /*
1533 * ====================== 1534 * ======================
1534 * = dfx_int_pr_halt_id = 1535 * = dfx_int_pr_halt_id =
1535 * ====================== 1536 * ======================
1536 * 1537 *
1537 * Overview: 1538 * Overview:
1538 * Displays halt id's in string form. 1539 * Displays halt id's in string form.
1539 * 1540 *
1540 * Returns: 1541 * Returns:
1541 * None 1542 * None
1542 * 1543 *
1543 * Arguments: 1544 * Arguments:
1544 * bp - pointer to board information 1545 * bp - pointer to board information
1545 * 1546 *
1546 * Functional Description: 1547 * Functional Description:
1547 * Determine current halt id and display appropriate string. 1548 * Determine current halt id and display appropriate string.
1548 * 1549 *
1549 * Return Codes: 1550 * Return Codes:
1550 * None 1551 * None
1551 * 1552 *
1552 * Assumptions: 1553 * Assumptions:
1553 * None 1554 * None
1554 * 1555 *
1555 * Side Effects: 1556 * Side Effects:
1556 * None 1557 * None
1557 */ 1558 */
1558 1559
1559 static void dfx_int_pr_halt_id(DFX_board_t *bp) 1560 static void dfx_int_pr_halt_id(DFX_board_t *bp)
1560 { 1561 {
1561 PI_UINT32 port_status; /* PDQ port status register value */ 1562 PI_UINT32 port_status; /* PDQ port status register value */
1562 PI_UINT32 halt_id; /* PDQ port status halt ID */ 1563 PI_UINT32 halt_id; /* PDQ port status halt ID */
1563 1564
1564 /* Read the latest port status */ 1565 /* Read the latest port status */
1565 1566
1566 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status); 1567 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1567 1568
1568 /* Display halt state transition information */ 1569 /* Display halt state transition information */
1569 1570
1570 halt_id = (port_status & PI_PSTATUS_M_HALT_ID) >> PI_PSTATUS_V_HALT_ID; 1571 halt_id = (port_status & PI_PSTATUS_M_HALT_ID) >> PI_PSTATUS_V_HALT_ID;
1571 switch (halt_id) 1572 switch (halt_id)
1572 { 1573 {
1573 case PI_HALT_ID_K_SELFTEST_TIMEOUT: 1574 case PI_HALT_ID_K_SELFTEST_TIMEOUT:
1574 printk("%s: Halt ID: Selftest Timeout\n", bp->dev->name); 1575 printk("%s: Halt ID: Selftest Timeout\n", bp->dev->name);
1575 break; 1576 break;
1576 1577
1577 case PI_HALT_ID_K_PARITY_ERROR: 1578 case PI_HALT_ID_K_PARITY_ERROR:
1578 printk("%s: Halt ID: Host Bus Parity Error\n", bp->dev->name); 1579 printk("%s: Halt ID: Host Bus Parity Error\n", bp->dev->name);
1579 break; 1580 break;
1580 1581
1581 case PI_HALT_ID_K_HOST_DIR_HALT: 1582 case PI_HALT_ID_K_HOST_DIR_HALT:
1582 printk("%s: Halt ID: Host-Directed Halt\n", bp->dev->name); 1583 printk("%s: Halt ID: Host-Directed Halt\n", bp->dev->name);
1583 break; 1584 break;
1584 1585
1585 case PI_HALT_ID_K_SW_FAULT: 1586 case PI_HALT_ID_K_SW_FAULT:
1586 printk("%s: Halt ID: Adapter Software Fault\n", bp->dev->name); 1587 printk("%s: Halt ID: Adapter Software Fault\n", bp->dev->name);
1587 break; 1588 break;
1588 1589
1589 case PI_HALT_ID_K_HW_FAULT: 1590 case PI_HALT_ID_K_HW_FAULT:
1590 printk("%s: Halt ID: Adapter Hardware Fault\n", bp->dev->name); 1591 printk("%s: Halt ID: Adapter Hardware Fault\n", bp->dev->name);
1591 break; 1592 break;
1592 1593
1593 case PI_HALT_ID_K_PC_TRACE: 1594 case PI_HALT_ID_K_PC_TRACE:
1594 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp->dev->name); 1595 printk("%s: Halt ID: FDDI Network PC Trace Path Test\n", bp->dev->name);
1595 break; 1596 break;
1596 1597
1597 case PI_HALT_ID_K_DMA_ERROR: 1598 case PI_HALT_ID_K_DMA_ERROR:
1598 printk("%s: Halt ID: Adapter DMA Error\n", bp->dev->name); 1599 printk("%s: Halt ID: Adapter DMA Error\n", bp->dev->name);
1599 break; 1600 break;
1600 1601
1601 case PI_HALT_ID_K_IMAGE_CRC_ERROR: 1602 case PI_HALT_ID_K_IMAGE_CRC_ERROR:
1602 printk("%s: Halt ID: Firmware Image CRC Error\n", bp->dev->name); 1603 printk("%s: Halt ID: Firmware Image CRC Error\n", bp->dev->name);
1603 break; 1604 break;
1604 1605
1605 case PI_HALT_ID_K_BUS_EXCEPTION: 1606 case PI_HALT_ID_K_BUS_EXCEPTION:
1606 printk("%s: Halt ID: 68000 Bus Exception\n", bp->dev->name); 1607 printk("%s: Halt ID: 68000 Bus Exception\n", bp->dev->name);
1607 break; 1608 break;
1608 1609
1609 default: 1610 default:
1610 printk("%s: Halt ID: Unknown (code = %X)\n", bp->dev->name, halt_id); 1611 printk("%s: Halt ID: Unknown (code = %X)\n", bp->dev->name, halt_id);
1611 break; 1612 break;
1612 } 1613 }
1613 } 1614 }
1614 1615
1615 1616
1616 /* 1617 /*
1617 * ========================== 1618 * ==========================
1618 * = dfx_int_type_0_process = 1619 * = dfx_int_type_0_process =
1619 * ========================== 1620 * ==========================
1620 * 1621 *
1621 * Overview: 1622 * Overview:
1622 * Processes Type 0 interrupts. 1623 * Processes Type 0 interrupts.
1623 * 1624 *
1624 * Returns: 1625 * Returns:
1625 * None 1626 * None
1626 * 1627 *
1627 * Arguments: 1628 * Arguments:
1628 * bp - pointer to board information 1629 * bp - pointer to board information
1629 * 1630 *
1630 * Functional Description: 1631 * Functional Description:
1631 * Processes all enabled Type 0 interrupts. If the reason for the interrupt 1632 * Processes all enabled Type 0 interrupts. If the reason for the interrupt
1632 * is a serious fault on the adapter, then an error message is displayed 1633 * is a serious fault on the adapter, then an error message is displayed
1633 * and the adapter is reset. 1634 * and the adapter is reset.
1634 * 1635 *
1635 * One tricky potential timing window is the rapid succession of "link avail" 1636 * One tricky potential timing window is the rapid succession of "link avail"
1636 * "link unavail" state change interrupts. The acknowledgement of the Type 0 1637 * "link unavail" state change interrupts. The acknowledgement of the Type 0
1637 * interrupt must be done before reading the state from the Port Status 1638 * interrupt must be done before reading the state from the Port Status
1638 * register. This is true because a state change could occur after reading 1639 * register. This is true because a state change could occur after reading
1639 * the data, but before acknowledging the interrupt. If this state change 1640 * the data, but before acknowledging the interrupt. If this state change
1640 * does happen, it would be lost because the driver is using the old state, 1641 * does happen, it would be lost because the driver is using the old state,
1641 * and it will never know about the new state because it subsequently 1642 * and it will never know about the new state because it subsequently
1642 * acknowledges the state change interrupt. 1643 * acknowledges the state change interrupt.
1643 * 1644 *
1644 * INCORRECT CORRECT 1645 * INCORRECT CORRECT
1645 * read type 0 int reasons read type 0 int reasons 1646 * read type 0 int reasons read type 0 int reasons
1646 * read adapter state ack type 0 interrupts 1647 * read adapter state ack type 0 interrupts
1647 * ack type 0 interrupts read adapter state 1648 * ack type 0 interrupts read adapter state
1648 * ... process interrupt ... ... process interrupt ... 1649 * ... process interrupt ... ... process interrupt ...
1649 * 1650 *
1650 * Return Codes: 1651 * Return Codes:
1651 * None 1652 * None
1652 * 1653 *
1653 * Assumptions: 1654 * Assumptions:
1654 * None 1655 * None
1655 * 1656 *
1656 * Side Effects: 1657 * Side Effects:
1657 * An adapter reset may occur if the adapter has any Type 0 error interrupts 1658 * An adapter reset may occur if the adapter has any Type 0 error interrupts
1658 * or if the port status indicates that the adapter is halted. The driver 1659 * or if the port status indicates that the adapter is halted. The driver
1659 * is responsible for reinitializing the adapter with the current CAM 1660 * is responsible for reinitializing the adapter with the current CAM
1660 * contents and adapter filter settings. 1661 * contents and adapter filter settings.
1661 */ 1662 */
1662 1663
1663 static void dfx_int_type_0_process(DFX_board_t *bp) 1664 static void dfx_int_type_0_process(DFX_board_t *bp)
1664 1665
1665 { 1666 {
1666 PI_UINT32 type_0_status; /* Host Interrupt Type 0 register */ 1667 PI_UINT32 type_0_status; /* Host Interrupt Type 0 register */
1667 PI_UINT32 state; /* current adap state (from port status) */ 1668 PI_UINT32 state; /* current adap state (from port status) */
1668 1669
1669 /* 1670 /*
1670 * Read host interrupt Type 0 register to determine which Type 0 1671 * Read host interrupt Type 0 register to determine which Type 0
1671 * interrupts are pending. Immediately write it back out to clear 1672 * interrupts are pending. Immediately write it back out to clear
1672 * those interrupts. 1673 * those interrupts.
1673 */ 1674 */
1674 1675
1675 dfx_port_read_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, &type_0_status); 1676 dfx_port_read_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, &type_0_status);
1676 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, type_0_status); 1677 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_0_STATUS, type_0_status);
1677 1678
1678 /* Check for Type 0 error interrupts */ 1679 /* Check for Type 0 error interrupts */
1679 1680
1680 if (type_0_status & (PI_TYPE_0_STAT_M_NXM | 1681 if (type_0_status & (PI_TYPE_0_STAT_M_NXM |
1681 PI_TYPE_0_STAT_M_PM_PAR_ERR | 1682 PI_TYPE_0_STAT_M_PM_PAR_ERR |
1682 PI_TYPE_0_STAT_M_BUS_PAR_ERR)) 1683 PI_TYPE_0_STAT_M_BUS_PAR_ERR))
1683 { 1684 {
1684 /* Check for Non-Existent Memory error */ 1685 /* Check for Non-Existent Memory error */
1685 1686
1686 if (type_0_status & PI_TYPE_0_STAT_M_NXM) 1687 if (type_0_status & PI_TYPE_0_STAT_M_NXM)
1687 printk("%s: Non-Existent Memory Access Error\n", bp->dev->name); 1688 printk("%s: Non-Existent Memory Access Error\n", bp->dev->name);
1688 1689
1689 /* Check for Packet Memory Parity error */ 1690 /* Check for Packet Memory Parity error */
1690 1691
1691 if (type_0_status & PI_TYPE_0_STAT_M_PM_PAR_ERR) 1692 if (type_0_status & PI_TYPE_0_STAT_M_PM_PAR_ERR)
1692 printk("%s: Packet Memory Parity Error\n", bp->dev->name); 1693 printk("%s: Packet Memory Parity Error\n", bp->dev->name);
1693 1694
1694 /* Check for Host Bus Parity error */ 1695 /* Check for Host Bus Parity error */
1695 1696
1696 if (type_0_status & PI_TYPE_0_STAT_M_BUS_PAR_ERR) 1697 if (type_0_status & PI_TYPE_0_STAT_M_BUS_PAR_ERR)
1697 printk("%s: Host Bus Parity Error\n", bp->dev->name); 1698 printk("%s: Host Bus Parity Error\n", bp->dev->name);
1698 1699
1699 /* Reset adapter and bring it back on-line */ 1700 /* Reset adapter and bring it back on-line */
1700 1701
1701 bp->link_available = PI_K_FALSE; /* link is no longer available */ 1702 bp->link_available = PI_K_FALSE; /* link is no longer available */
1702 bp->reset_type = 0; /* rerun on-board diagnostics */ 1703 bp->reset_type = 0; /* rerun on-board diagnostics */
1703 printk("%s: Resetting adapter...\n", bp->dev->name); 1704 printk("%s: Resetting adapter...\n", bp->dev->name);
1704 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS) 1705 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1705 { 1706 {
1706 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name); 1707 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1707 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS); 1708 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1708 return; 1709 return;
1709 } 1710 }
1710 printk("%s: Adapter reset successful!\n", bp->dev->name); 1711 printk("%s: Adapter reset successful!\n", bp->dev->name);
1711 return; 1712 return;
1712 } 1713 }
1713 1714
1714 /* Check for transmit flush interrupt */ 1715 /* Check for transmit flush interrupt */
1715 1716
1716 if (type_0_status & PI_TYPE_0_STAT_M_XMT_FLUSH) 1717 if (type_0_status & PI_TYPE_0_STAT_M_XMT_FLUSH)
1717 { 1718 {
1718 /* Flush any pending xmt's and acknowledge the flush interrupt */ 1719 /* Flush any pending xmt's and acknowledge the flush interrupt */
1719 1720
1720 bp->link_available = PI_K_FALSE; /* link is no longer available */ 1721 bp->link_available = PI_K_FALSE; /* link is no longer available */
1721 dfx_xmt_flush(bp); /* flush any outstanding packets */ 1722 dfx_xmt_flush(bp); /* flush any outstanding packets */
1722 (void) dfx_hw_port_ctrl_req(bp, 1723 (void) dfx_hw_port_ctrl_req(bp,
1723 PI_PCTRL_M_XMT_DATA_FLUSH_DONE, 1724 PI_PCTRL_M_XMT_DATA_FLUSH_DONE,
1724 0, 1725 0,
1725 0, 1726 0,
1726 NULL); 1727 NULL);
1727 } 1728 }
1728 1729
1729 /* Check for adapter state change */ 1730 /* Check for adapter state change */
1730 1731
1731 if (type_0_status & PI_TYPE_0_STAT_M_STATE_CHANGE) 1732 if (type_0_status & PI_TYPE_0_STAT_M_STATE_CHANGE)
1732 { 1733 {
1733 /* Get latest adapter state */ 1734 /* Get latest adapter state */
1734 1735
1735 state = dfx_hw_adap_state_rd(bp); /* get adapter state */ 1736 state = dfx_hw_adap_state_rd(bp); /* get adapter state */
1736 if (state == PI_STATE_K_HALTED) 1737 if (state == PI_STATE_K_HALTED)
1737 { 1738 {
1738 /* 1739 /*
1739 * Adapter has transitioned to HALTED state, try to reset 1740 * Adapter has transitioned to HALTED state, try to reset
1740 * adapter to bring it back on-line. If reset fails, 1741 * adapter to bring it back on-line. If reset fails,
1741 * leave the adapter in the broken state. 1742 * leave the adapter in the broken state.
1742 */ 1743 */
1743 1744
1744 printk("%s: Controller has transitioned to HALTED state!\n", bp->dev->name); 1745 printk("%s: Controller has transitioned to HALTED state!\n", bp->dev->name);
1745 dfx_int_pr_halt_id(bp); /* display halt id as string */ 1746 dfx_int_pr_halt_id(bp); /* display halt id as string */
1746 1747
1747 /* Reset adapter and bring it back on-line */ 1748 /* Reset adapter and bring it back on-line */
1748 1749
1749 bp->link_available = PI_K_FALSE; /* link is no longer available */ 1750 bp->link_available = PI_K_FALSE; /* link is no longer available */
1750 bp->reset_type = 0; /* rerun on-board diagnostics */ 1751 bp->reset_type = 0; /* rerun on-board diagnostics */
1751 printk("%s: Resetting adapter...\n", bp->dev->name); 1752 printk("%s: Resetting adapter...\n", bp->dev->name);
1752 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS) 1753 if (dfx_adap_init(bp, 0) != DFX_K_SUCCESS)
1753 { 1754 {
1754 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name); 1755 printk("%s: Adapter reset failed! Disabling adapter interrupts.\n", bp->dev->name);
1755 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS); 1756 dfx_port_write_long(bp, PI_PDQ_K_REG_HOST_INT_ENB, PI_HOST_INT_K_DISABLE_ALL_INTS);
1756 return; 1757 return;
1757 } 1758 }
1758 printk("%s: Adapter reset successful!\n", bp->dev->name); 1759 printk("%s: Adapter reset successful!\n", bp->dev->name);
1759 } 1760 }
1760 else if (state == PI_STATE_K_LINK_AVAIL) 1761 else if (state == PI_STATE_K_LINK_AVAIL)
1761 { 1762 {
1762 bp->link_available = PI_K_TRUE; /* set link available flag */ 1763 bp->link_available = PI_K_TRUE; /* set link available flag */
1763 } 1764 }
1764 } 1765 }
1765 } 1766 }
1766 1767
1767 1768
1768 /* 1769 /*
1769 * ================== 1770 * ==================
1770 * = dfx_int_common = 1771 * = dfx_int_common =
1771 * ================== 1772 * ==================
1772 * 1773 *
1773 * Overview: 1774 * Overview:
1774 * Interrupt service routine (ISR) 1775 * Interrupt service routine (ISR)
1775 * 1776 *
1776 * Returns: 1777 * Returns:
1777 * None 1778 * None
1778 * 1779 *
1779 * Arguments: 1780 * Arguments:
1780 * bp - pointer to board information 1781 * bp - pointer to board information
1781 * 1782 *
1782 * Functional Description: 1783 * Functional Description:
1783 * This is the ISR which processes incoming adapter interrupts. 1784 * This is the ISR which processes incoming adapter interrupts.
1784 * 1785 *
1785 * Return Codes: 1786 * Return Codes:
1786 * None 1787 * None
1787 * 1788 *
1788 * Assumptions: 1789 * Assumptions:
1789 * This routine assumes PDQ interrupts have not been disabled. 1790 * This routine assumes PDQ interrupts have not been disabled.
1790 * When interrupts are disabled at the PDQ, the Port Status register 1791 * When interrupts are disabled at the PDQ, the Port Status register
1791 * is automatically cleared. This routine uses the Port Status 1792 * is automatically cleared. This routine uses the Port Status
1792 * register value to determine whether a Type 0 interrupt occurred, 1793 * register value to determine whether a Type 0 interrupt occurred,
1793 * so it's important that adapter interrupts are not normally 1794 * so it's important that adapter interrupts are not normally
1794 * enabled/disabled at the PDQ. 1795 * enabled/disabled at the PDQ.
1795 * 1796 *
1796 * It's vital that this routine is NOT reentered for the 1797 * It's vital that this routine is NOT reentered for the
1797 * same board and that the OS is not in another section of 1798 * same board and that the OS is not in another section of
1798 * code (eg. dfx_xmt_queue_pkt) for the same board on a 1799 * code (eg. dfx_xmt_queue_pkt) for the same board on a
1799 * different thread. 1800 * different thread.
1800 * 1801 *
1801 * Side Effects: 1802 * Side Effects:
1802 * Pending interrupts are serviced. Depending on the type of 1803 * Pending interrupts are serviced. Depending on the type of
1803 * interrupt, acknowledging and clearing the interrupt at the 1804 * interrupt, acknowledging and clearing the interrupt at the
1804 * PDQ involves writing a register to clear the interrupt bit 1805 * PDQ involves writing a register to clear the interrupt bit
1805 * or updating completion indices. 1806 * or updating completion indices.
1806 */ 1807 */
1807 1808
1808 static void dfx_int_common(struct net_device *dev) 1809 static void dfx_int_common(struct net_device *dev)
1809 { 1810 {
1810 DFX_board_t *bp = netdev_priv(dev); 1811 DFX_board_t *bp = netdev_priv(dev);
1811 PI_UINT32 port_status; /* Port Status register */ 1812 PI_UINT32 port_status; /* Port Status register */
1812 1813
1813 /* Process xmt interrupts - frequent case, so always call this routine */ 1814 /* Process xmt interrupts - frequent case, so always call this routine */
1814 1815
1815 if(dfx_xmt_done(bp)) /* free consumed xmt packets */ 1816 if(dfx_xmt_done(bp)) /* free consumed xmt packets */
1816 netif_wake_queue(dev); 1817 netif_wake_queue(dev);
1817 1818
1818 /* Process rcv interrupts - frequent case, so always call this routine */ 1819 /* Process rcv interrupts - frequent case, so always call this routine */
1819 1820
1820 dfx_rcv_queue_process(bp); /* service received LLC frames */ 1821 dfx_rcv_queue_process(bp); /* service received LLC frames */
1821 1822
1822 /* 1823 /*
1823 * Transmit and receive producer and completion indices are updated on the 1824 * Transmit and receive producer and completion indices are updated on the
1824 * adapter by writing to the Type 2 Producer register. Since the frequent 1825 * adapter by writing to the Type 2 Producer register. Since the frequent
1825 * case is that we'll be processing either LLC transmit or receive buffers, 1826 * case is that we'll be processing either LLC transmit or receive buffers,
1826 * we'll optimize I/O writes by doing a single register write here. 1827 * we'll optimize I/O writes by doing a single register write here.
1827 */ 1828 */
1828 1829
1829 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword); 1830 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
1830 1831
1831 /* Read PDQ Port Status register to find out which interrupts need processing */ 1832 /* Read PDQ Port Status register to find out which interrupts need processing */
1832 1833
1833 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status); 1834 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
1834 1835
1835 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */ 1836 /* Process Type 0 interrupts (if any) - infrequent, so only call when needed */
1836 1837
1837 if (port_status & PI_PSTATUS_M_TYPE_0_PENDING) 1838 if (port_status & PI_PSTATUS_M_TYPE_0_PENDING)
1838 dfx_int_type_0_process(bp); /* process Type 0 interrupts */ 1839 dfx_int_type_0_process(bp); /* process Type 0 interrupts */
1839 } 1840 }
1840 1841
1841 1842
1842 /* 1843 /*
1843 * ================= 1844 * =================
1844 * = dfx_interrupt = 1845 * = dfx_interrupt =
1845 * ================= 1846 * =================
1846 * 1847 *
1847 * Overview: 1848 * Overview:
1848 * Interrupt processing routine 1849 * Interrupt processing routine
1849 * 1850 *
1850 * Returns: 1851 * Returns:
1851 * Whether a valid interrupt was seen. 1852 * Whether a valid interrupt was seen.
1852 * 1853 *
1853 * Arguments: 1854 * Arguments:
1854 * irq - interrupt vector 1855 * irq - interrupt vector
1855 * dev_id - pointer to device information 1856 * dev_id - pointer to device information
1856 * 1857 *
1857 * Functional Description: 1858 * Functional Description:
1858 * This routine calls the interrupt processing routine for this adapter. It 1859 * This routine calls the interrupt processing routine for this adapter. It
1859 * disables and reenables adapter interrupts, as appropriate. We can support 1860 * disables and reenables adapter interrupts, as appropriate. We can support
1860 * shared interrupts since the incoming dev_id pointer provides our device 1861 * shared interrupts since the incoming dev_id pointer provides our device
1861 * structure context. 1862 * structure context.
1862 * 1863 *
1863 * Return Codes: 1864 * Return Codes:
1864 * IRQ_HANDLED - an IRQ was handled. 1865 * IRQ_HANDLED - an IRQ was handled.
1865 * IRQ_NONE - no IRQ was handled. 1866 * IRQ_NONE - no IRQ was handled.
1866 * 1867 *
1867 * Assumptions: 1868 * Assumptions:
1868 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC 1869 * The interrupt acknowledgement at the hardware level (eg. ACKing the PIC
1869 * on Intel-based systems) is done by the operating system outside this 1870 * on Intel-based systems) is done by the operating system outside this
1870 * routine. 1871 * routine.
1871 * 1872 *
1872 * System interrupts are enabled through this call. 1873 * System interrupts are enabled through this call.
1873 * 1874 *
1874 * Side Effects: 1875 * Side Effects:
1875 * Interrupts are disabled, then reenabled at the adapter. 1876 * Interrupts are disabled, then reenabled at the adapter.
1876 */ 1877 */
1877 1878
1878 static irqreturn_t dfx_interrupt(int irq, void *dev_id) 1879 static irqreturn_t dfx_interrupt(int irq, void *dev_id)
1879 { 1880 {
1880 struct net_device *dev = dev_id; 1881 struct net_device *dev = dev_id;
1881 DFX_board_t *bp = netdev_priv(dev); 1882 DFX_board_t *bp = netdev_priv(dev);
1882 struct device *bdev = bp->bus_dev; 1883 struct device *bdev = bp->bus_dev;
1883 int dfx_bus_pci = DFX_BUS_PCI(bdev); 1884 int dfx_bus_pci = DFX_BUS_PCI(bdev);
1884 int dfx_bus_eisa = DFX_BUS_EISA(bdev); 1885 int dfx_bus_eisa = DFX_BUS_EISA(bdev);
1885 int dfx_bus_tc = DFX_BUS_TC(bdev); 1886 int dfx_bus_tc = DFX_BUS_TC(bdev);
1886 1887
1887 /* Service adapter interrupts */ 1888 /* Service adapter interrupts */
1888 1889
1889 if (dfx_bus_pci) { 1890 if (dfx_bus_pci) {
1890 u32 status; 1891 u32 status;
1891 1892
1892 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status); 1893 dfx_port_read_long(bp, PFI_K_REG_STATUS, &status);
1893 if (!(status & PFI_STATUS_M_PDQ_INT)) 1894 if (!(status & PFI_STATUS_M_PDQ_INT))
1894 return IRQ_NONE; 1895 return IRQ_NONE;
1895 1896
1896 spin_lock(&bp->lock); 1897 spin_lock(&bp->lock);
1897 1898
1898 /* Disable PDQ-PFI interrupts at PFI */ 1899 /* Disable PDQ-PFI interrupts at PFI */
1899 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 1900 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1900 PFI_MODE_M_DMA_ENB); 1901 PFI_MODE_M_DMA_ENB);
1901 1902
1902 /* Call interrupt service routine for this adapter */ 1903 /* Call interrupt service routine for this adapter */
1903 dfx_int_common(dev); 1904 dfx_int_common(dev);
1904 1905
1905 /* Clear PDQ interrupt status bit and reenable interrupts */ 1906 /* Clear PDQ interrupt status bit and reenable interrupts */
1906 dfx_port_write_long(bp, PFI_K_REG_STATUS, 1907 dfx_port_write_long(bp, PFI_K_REG_STATUS,
1907 PFI_STATUS_M_PDQ_INT); 1908 PFI_STATUS_M_PDQ_INT);
1908 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL, 1909 dfx_port_write_long(bp, PFI_K_REG_MODE_CTRL,
1909 (PFI_MODE_M_PDQ_INT_ENB | 1910 (PFI_MODE_M_PDQ_INT_ENB |
1910 PFI_MODE_M_DMA_ENB)); 1911 PFI_MODE_M_DMA_ENB));
1911 1912
1912 spin_unlock(&bp->lock); 1913 spin_unlock(&bp->lock);
1913 } 1914 }
1914 if (dfx_bus_eisa) { 1915 if (dfx_bus_eisa) {
1915 unsigned long base_addr = to_eisa_device(bdev)->base_addr; 1916 unsigned long base_addr = to_eisa_device(bdev)->base_addr;
1916 u8 status; 1917 u8 status;
1917 1918
1918 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 1919 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1919 if (!(status & PI_CONFIG_STAT_0_M_PEND)) 1920 if (!(status & PI_CONFIG_STAT_0_M_PEND))
1920 return IRQ_NONE; 1921 return IRQ_NONE;
1921 1922
1922 spin_lock(&bp->lock); 1923 spin_lock(&bp->lock);
1923 1924
1924 /* Disable interrupts at the ESIC */ 1925 /* Disable interrupts at the ESIC */
1925 status &= ~PI_CONFIG_STAT_0_M_INT_ENB; 1926 status &= ~PI_CONFIG_STAT_0_M_INT_ENB;
1926 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status); 1927 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1927 1928
1928 /* Call interrupt service routine for this adapter */ 1929 /* Call interrupt service routine for this adapter */
1929 dfx_int_common(dev); 1930 dfx_int_common(dev);
1930 1931
1931 /* Reenable interrupts at the ESIC */ 1932 /* Reenable interrupts at the ESIC */
1932 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0); 1933 status = inb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0);
1933 status |= PI_CONFIG_STAT_0_M_INT_ENB; 1934 status |= PI_CONFIG_STAT_0_M_INT_ENB;
1934 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status); 1935 outb(base_addr + PI_ESIC_K_IO_CONFIG_STAT_0, status);
1935 1936
1936 spin_unlock(&bp->lock); 1937 spin_unlock(&bp->lock);
1937 } 1938 }
1938 if (dfx_bus_tc) { 1939 if (dfx_bus_tc) {
1939 u32 status; 1940 u32 status;
1940 1941
1941 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status); 1942 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &status);
1942 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING | 1943 if (!(status & (PI_PSTATUS_M_RCV_DATA_PENDING |
1943 PI_PSTATUS_M_XMT_DATA_PENDING | 1944 PI_PSTATUS_M_XMT_DATA_PENDING |
1944 PI_PSTATUS_M_SMT_HOST_PENDING | 1945 PI_PSTATUS_M_SMT_HOST_PENDING |
1945 PI_PSTATUS_M_UNSOL_PENDING | 1946 PI_PSTATUS_M_UNSOL_PENDING |
1946 PI_PSTATUS_M_CMD_RSP_PENDING | 1947 PI_PSTATUS_M_CMD_RSP_PENDING |
1947 PI_PSTATUS_M_CMD_REQ_PENDING | 1948 PI_PSTATUS_M_CMD_REQ_PENDING |
1948 PI_PSTATUS_M_TYPE_0_PENDING))) 1949 PI_PSTATUS_M_TYPE_0_PENDING)))
1949 return IRQ_NONE; 1950 return IRQ_NONE;
1950 1951
1951 spin_lock(&bp->lock); 1952 spin_lock(&bp->lock);
1952 1953
1953 /* Call interrupt service routine for this adapter */ 1954 /* Call interrupt service routine for this adapter */
1954 dfx_int_common(dev); 1955 dfx_int_common(dev);
1955 1956
1956 spin_unlock(&bp->lock); 1957 spin_unlock(&bp->lock);
1957 } 1958 }
1958 1959
1959 return IRQ_HANDLED; 1960 return IRQ_HANDLED;
1960 } 1961 }
1961 1962
1962 1963
1963 /* 1964 /*
1964 * ===================== 1965 * =====================
1965 * = dfx_ctl_get_stats = 1966 * = dfx_ctl_get_stats =
1966 * ===================== 1967 * =====================
1967 * 1968 *
1968 * Overview: 1969 * Overview:
1969 * Get statistics for FDDI adapter 1970 * Get statistics for FDDI adapter
1970 * 1971 *
1971 * Returns: 1972 * Returns:
1972 * Pointer to FDDI statistics structure 1973 * Pointer to FDDI statistics structure
1973 * 1974 *
1974 * Arguments: 1975 * Arguments:
1975 * dev - pointer to device information 1976 * dev - pointer to device information
1976 * 1977 *
1977 * Functional Description: 1978 * Functional Description:
1978 * Gets current MIB objects from adapter, then 1979 * Gets current MIB objects from adapter, then
1979 * returns FDDI statistics structure as defined 1980 * returns FDDI statistics structure as defined
1980 * in if_fddi.h. 1981 * in if_fddi.h.
1981 * 1982 *
1982 * Note: Since the FDDI statistics structure is 1983 * Note: Since the FDDI statistics structure is
1983 * still new and the device structure doesn't 1984 * still new and the device structure doesn't
1984 * have an FDDI-specific get statistics handler, 1985 * have an FDDI-specific get statistics handler,
1985 * we'll return the FDDI statistics structure as 1986 * we'll return the FDDI statistics structure as
1986 * a pointer to an Ethernet statistics structure. 1987 * a pointer to an Ethernet statistics structure.
1987 * That way, at least the first part of the statistics 1988 * That way, at least the first part of the statistics
1988 * structure can be decoded properly, and it allows 1989 * structure can be decoded properly, and it allows
1989 * "smart" applications to perform a second cast to 1990 * "smart" applications to perform a second cast to
1990 * decode the FDDI-specific statistics. 1991 * decode the FDDI-specific statistics.
1991 * 1992 *
1992 * We'll have to pay attention to this routine as the 1993 * We'll have to pay attention to this routine as the
1993 * device structure becomes more mature and LAN media 1994 * device structure becomes more mature and LAN media
1994 * independent. 1995 * independent.
1995 * 1996 *
1996 * Return Codes: 1997 * Return Codes:
1997 * None 1998 * None
1998 * 1999 *
1999 * Assumptions: 2000 * Assumptions:
2000 * None 2001 * None
2001 * 2002 *
2002 * Side Effects: 2003 * Side Effects:
2003 * None 2004 * None
2004 */ 2005 */
2005 2006
2006 static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev) 2007 static struct net_device_stats *dfx_ctl_get_stats(struct net_device *dev)
2007 { 2008 {
2008 DFX_board_t *bp = netdev_priv(dev); 2009 DFX_board_t *bp = netdev_priv(dev);
2009 2010
2010 /* Fill the bp->stats structure with driver-maintained counters */ 2011 /* Fill the bp->stats structure with driver-maintained counters */
2011 2012
2012 bp->stats.gen.rx_packets = bp->rcv_total_frames; 2013 bp->stats.gen.rx_packets = bp->rcv_total_frames;
2013 bp->stats.gen.tx_packets = bp->xmt_total_frames; 2014 bp->stats.gen.tx_packets = bp->xmt_total_frames;
2014 bp->stats.gen.rx_bytes = bp->rcv_total_bytes; 2015 bp->stats.gen.rx_bytes = bp->rcv_total_bytes;
2015 bp->stats.gen.tx_bytes = bp->xmt_total_bytes; 2016 bp->stats.gen.tx_bytes = bp->xmt_total_bytes;
2016 bp->stats.gen.rx_errors = bp->rcv_crc_errors + 2017 bp->stats.gen.rx_errors = bp->rcv_crc_errors +
2017 bp->rcv_frame_status_errors + 2018 bp->rcv_frame_status_errors +
2018 bp->rcv_length_errors; 2019 bp->rcv_length_errors;
2019 bp->stats.gen.tx_errors = bp->xmt_length_errors; 2020 bp->stats.gen.tx_errors = bp->xmt_length_errors;
2020 bp->stats.gen.rx_dropped = bp->rcv_discards; 2021 bp->stats.gen.rx_dropped = bp->rcv_discards;
2021 bp->stats.gen.tx_dropped = bp->xmt_discards; 2022 bp->stats.gen.tx_dropped = bp->xmt_discards;
2022 bp->stats.gen.multicast = bp->rcv_multicast_frames; 2023 bp->stats.gen.multicast = bp->rcv_multicast_frames;
2023 bp->stats.gen.collisions = 0; /* always zero (0) for FDDI */ 2024 bp->stats.gen.collisions = 0; /* always zero (0) for FDDI */
2024 2025
2025 /* Get FDDI SMT MIB objects */ 2026 /* Get FDDI SMT MIB objects */
2026 2027
2027 bp->cmd_req_virt->cmd_type = PI_CMD_K_SMT_MIB_GET; 2028 bp->cmd_req_virt->cmd_type = PI_CMD_K_SMT_MIB_GET;
2028 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 2029 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2029 return((struct net_device_stats *) &bp->stats); 2030 return((struct net_device_stats *) &bp->stats);
2030 2031
2031 /* Fill the bp->stats structure with the SMT MIB object values */ 2032 /* Fill the bp->stats structure with the SMT MIB object values */
2032 2033
2033 memcpy(bp->stats.smt_station_id, &bp->cmd_rsp_virt->smt_mib_get.smt_station_id, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_station_id)); 2034 memcpy(bp->stats.smt_station_id, &bp->cmd_rsp_virt->smt_mib_get.smt_station_id, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_station_id));
2034 bp->stats.smt_op_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_op_version_id; 2035 bp->stats.smt_op_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_op_version_id;
2035 bp->stats.smt_hi_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_hi_version_id; 2036 bp->stats.smt_hi_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_hi_version_id;
2036 bp->stats.smt_lo_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_lo_version_id; 2037 bp->stats.smt_lo_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_lo_version_id;
2037 memcpy(bp->stats.smt_user_data, &bp->cmd_rsp_virt->smt_mib_get.smt_user_data, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_user_data)); 2038 memcpy(bp->stats.smt_user_data, &bp->cmd_rsp_virt->smt_mib_get.smt_user_data, sizeof(bp->cmd_rsp_virt->smt_mib_get.smt_user_data));
2038 bp->stats.smt_mib_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_mib_version_id; 2039 bp->stats.smt_mib_version_id = bp->cmd_rsp_virt->smt_mib_get.smt_mib_version_id;
2039 bp->stats.smt_mac_cts = bp->cmd_rsp_virt->smt_mib_get.smt_mac_ct; 2040 bp->stats.smt_mac_cts = bp->cmd_rsp_virt->smt_mib_get.smt_mac_ct;
2040 bp->stats.smt_non_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_non_master_ct; 2041 bp->stats.smt_non_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_non_master_ct;
2041 bp->stats.smt_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_master_ct; 2042 bp->stats.smt_master_cts = bp->cmd_rsp_virt->smt_mib_get.smt_master_ct;
2042 bp->stats.smt_available_paths = bp->cmd_rsp_virt->smt_mib_get.smt_available_paths; 2043 bp->stats.smt_available_paths = bp->cmd_rsp_virt->smt_mib_get.smt_available_paths;
2043 bp->stats.smt_config_capabilities = bp->cmd_rsp_virt->smt_mib_get.smt_config_capabilities; 2044 bp->stats.smt_config_capabilities = bp->cmd_rsp_virt->smt_mib_get.smt_config_capabilities;
2044 bp->stats.smt_config_policy = bp->cmd_rsp_virt->smt_mib_get.smt_config_policy; 2045 bp->stats.smt_config_policy = bp->cmd_rsp_virt->smt_mib_get.smt_config_policy;
2045 bp->stats.smt_connection_policy = bp->cmd_rsp_virt->smt_mib_get.smt_connection_policy; 2046 bp->stats.smt_connection_policy = bp->cmd_rsp_virt->smt_mib_get.smt_connection_policy;
2046 bp->stats.smt_t_notify = bp->cmd_rsp_virt->smt_mib_get.smt_t_notify; 2047 bp->stats.smt_t_notify = bp->cmd_rsp_virt->smt_mib_get.smt_t_notify;
2047 bp->stats.smt_stat_rpt_policy = bp->cmd_rsp_virt->smt_mib_get.smt_stat_rpt_policy; 2048 bp->stats.smt_stat_rpt_policy = bp->cmd_rsp_virt->smt_mib_get.smt_stat_rpt_policy;
2048 bp->stats.smt_trace_max_expiration = bp->cmd_rsp_virt->smt_mib_get.smt_trace_max_expiration; 2049 bp->stats.smt_trace_max_expiration = bp->cmd_rsp_virt->smt_mib_get.smt_trace_max_expiration;
2049 bp->stats.smt_bypass_present = bp->cmd_rsp_virt->smt_mib_get.smt_bypass_present; 2050 bp->stats.smt_bypass_present = bp->cmd_rsp_virt->smt_mib_get.smt_bypass_present;
2050 bp->stats.smt_ecm_state = bp->cmd_rsp_virt->smt_mib_get.smt_ecm_state; 2051 bp->stats.smt_ecm_state = bp->cmd_rsp_virt->smt_mib_get.smt_ecm_state;
2051 bp->stats.smt_cf_state = bp->cmd_rsp_virt->smt_mib_get.smt_cf_state; 2052 bp->stats.smt_cf_state = bp->cmd_rsp_virt->smt_mib_get.smt_cf_state;
2052 bp->stats.smt_remote_disconnect_flag = bp->cmd_rsp_virt->smt_mib_get.smt_remote_disconnect_flag; 2053 bp->stats.smt_remote_disconnect_flag = bp->cmd_rsp_virt->smt_mib_get.smt_remote_disconnect_flag;
2053 bp->stats.smt_station_status = bp->cmd_rsp_virt->smt_mib_get.smt_station_status; 2054 bp->stats.smt_station_status = bp->cmd_rsp_virt->smt_mib_get.smt_station_status;
2054 bp->stats.smt_peer_wrap_flag = bp->cmd_rsp_virt->smt_mib_get.smt_peer_wrap_flag; 2055 bp->stats.smt_peer_wrap_flag = bp->cmd_rsp_virt->smt_mib_get.smt_peer_wrap_flag;
2055 bp->stats.smt_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_msg_time_stamp.ls; 2056 bp->stats.smt_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_msg_time_stamp.ls;
2056 bp->stats.smt_transition_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_transition_time_stamp.ls; 2057 bp->stats.smt_transition_time_stamp = bp->cmd_rsp_virt->smt_mib_get.smt_transition_time_stamp.ls;
2057 bp->stats.mac_frame_status_functions = bp->cmd_rsp_virt->smt_mib_get.mac_frame_status_functions; 2058 bp->stats.mac_frame_status_functions = bp->cmd_rsp_virt->smt_mib_get.mac_frame_status_functions;
2058 bp->stats.mac_t_max_capability = bp->cmd_rsp_virt->smt_mib_get.mac_t_max_capability; 2059 bp->stats.mac_t_max_capability = bp->cmd_rsp_virt->smt_mib_get.mac_t_max_capability;
2059 bp->stats.mac_tvx_capability = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_capability; 2060 bp->stats.mac_tvx_capability = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_capability;
2060 bp->stats.mac_available_paths = bp->cmd_rsp_virt->smt_mib_get.mac_available_paths; 2061 bp->stats.mac_available_paths = bp->cmd_rsp_virt->smt_mib_get.mac_available_paths;
2061 bp->stats.mac_current_path = bp->cmd_rsp_virt->smt_mib_get.mac_current_path; 2062 bp->stats.mac_current_path = bp->cmd_rsp_virt->smt_mib_get.mac_current_path;
2062 memcpy(bp->stats.mac_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_upstream_nbr, FDDI_K_ALEN); 2063 memcpy(bp->stats.mac_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_upstream_nbr, FDDI_K_ALEN);
2063 memcpy(bp->stats.mac_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_downstream_nbr, FDDI_K_ALEN); 2064 memcpy(bp->stats.mac_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_downstream_nbr, FDDI_K_ALEN);
2064 memcpy(bp->stats.mac_old_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_upstream_nbr, FDDI_K_ALEN); 2065 memcpy(bp->stats.mac_old_upstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_upstream_nbr, FDDI_K_ALEN);
2065 memcpy(bp->stats.mac_old_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_downstream_nbr, FDDI_K_ALEN); 2066 memcpy(bp->stats.mac_old_downstream_nbr, &bp->cmd_rsp_virt->smt_mib_get.mac_old_downstream_nbr, FDDI_K_ALEN);
2066 bp->stats.mac_dup_address_test = bp->cmd_rsp_virt->smt_mib_get.mac_dup_address_test; 2067 bp->stats.mac_dup_address_test = bp->cmd_rsp_virt->smt_mib_get.mac_dup_address_test;
2067 bp->stats.mac_requested_paths = bp->cmd_rsp_virt->smt_mib_get.mac_requested_paths; 2068 bp->stats.mac_requested_paths = bp->cmd_rsp_virt->smt_mib_get.mac_requested_paths;
2068 bp->stats.mac_downstream_port_type = bp->cmd_rsp_virt->smt_mib_get.mac_downstream_port_type; 2069 bp->stats.mac_downstream_port_type = bp->cmd_rsp_virt->smt_mib_get.mac_downstream_port_type;
2069 memcpy(bp->stats.mac_smt_address, &bp->cmd_rsp_virt->smt_mib_get.mac_smt_address, FDDI_K_ALEN); 2070 memcpy(bp->stats.mac_smt_address, &bp->cmd_rsp_virt->smt_mib_get.mac_smt_address, FDDI_K_ALEN);
2070 bp->stats.mac_t_req = bp->cmd_rsp_virt->smt_mib_get.mac_t_req; 2071 bp->stats.mac_t_req = bp->cmd_rsp_virt->smt_mib_get.mac_t_req;
2071 bp->stats.mac_t_neg = bp->cmd_rsp_virt->smt_mib_get.mac_t_neg; 2072 bp->stats.mac_t_neg = bp->cmd_rsp_virt->smt_mib_get.mac_t_neg;
2072 bp->stats.mac_t_max = bp->cmd_rsp_virt->smt_mib_get.mac_t_max; 2073 bp->stats.mac_t_max = bp->cmd_rsp_virt->smt_mib_get.mac_t_max;
2073 bp->stats.mac_tvx_value = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_value; 2074 bp->stats.mac_tvx_value = bp->cmd_rsp_virt->smt_mib_get.mac_tvx_value;
2074 bp->stats.mac_frame_error_threshold = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_threshold; 2075 bp->stats.mac_frame_error_threshold = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_threshold;
2075 bp->stats.mac_frame_error_ratio = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_ratio; 2076 bp->stats.mac_frame_error_ratio = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_ratio;
2076 bp->stats.mac_rmt_state = bp->cmd_rsp_virt->smt_mib_get.mac_rmt_state; 2077 bp->stats.mac_rmt_state = bp->cmd_rsp_virt->smt_mib_get.mac_rmt_state;
2077 bp->stats.mac_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_da_flag; 2078 bp->stats.mac_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_da_flag;
2078 bp->stats.mac_una_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_unda_flag; 2079 bp->stats.mac_una_da_flag = bp->cmd_rsp_virt->smt_mib_get.mac_unda_flag;
2079 bp->stats.mac_frame_error_flag = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_flag; 2080 bp->stats.mac_frame_error_flag = bp->cmd_rsp_virt->smt_mib_get.mac_frame_error_flag;
2080 bp->stats.mac_ma_unitdata_available = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_available; 2081 bp->stats.mac_ma_unitdata_available = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_available;
2081 bp->stats.mac_hardware_present = bp->cmd_rsp_virt->smt_mib_get.mac_hardware_present; 2082 bp->stats.mac_hardware_present = bp->cmd_rsp_virt->smt_mib_get.mac_hardware_present;
2082 bp->stats.mac_ma_unitdata_enable = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_enable; 2083 bp->stats.mac_ma_unitdata_enable = bp->cmd_rsp_virt->smt_mib_get.mac_ma_unitdata_enable;
2083 bp->stats.path_tvx_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_tvx_lower_bound; 2084 bp->stats.path_tvx_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_tvx_lower_bound;
2084 bp->stats.path_t_max_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_t_max_lower_bound; 2085 bp->stats.path_t_max_lower_bound = bp->cmd_rsp_virt->smt_mib_get.path_t_max_lower_bound;
2085 bp->stats.path_max_t_req = bp->cmd_rsp_virt->smt_mib_get.path_max_t_req; 2086 bp->stats.path_max_t_req = bp->cmd_rsp_virt->smt_mib_get.path_max_t_req;
2086 memcpy(bp->stats.path_configuration, &bp->cmd_rsp_virt->smt_mib_get.path_configuration, sizeof(bp->cmd_rsp_virt->smt_mib_get.path_configuration)); 2087 memcpy(bp->stats.path_configuration, &bp->cmd_rsp_virt->smt_mib_get.path_configuration, sizeof(bp->cmd_rsp_virt->smt_mib_get.path_configuration));
2087 bp->stats.port_my_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[0]; 2088 bp->stats.port_my_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[0];
2088 bp->stats.port_my_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[1]; 2089 bp->stats.port_my_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_my_type[1];
2089 bp->stats.port_neighbor_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[0]; 2090 bp->stats.port_neighbor_type[0] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[0];
2090 bp->stats.port_neighbor_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[1]; 2091 bp->stats.port_neighbor_type[1] = bp->cmd_rsp_virt->smt_mib_get.port_neighbor_type[1];
2091 bp->stats.port_connection_policies[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[0]; 2092 bp->stats.port_connection_policies[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[0];
2092 bp->stats.port_connection_policies[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[1]; 2093 bp->stats.port_connection_policies[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_policies[1];
2093 bp->stats.port_mac_indicated[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[0]; 2094 bp->stats.port_mac_indicated[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[0];
2094 bp->stats.port_mac_indicated[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[1]; 2095 bp->stats.port_mac_indicated[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_indicated[1];
2095 bp->stats.port_current_path[0] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[0]; 2096 bp->stats.port_current_path[0] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[0];
2096 bp->stats.port_current_path[1] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[1]; 2097 bp->stats.port_current_path[1] = bp->cmd_rsp_virt->smt_mib_get.port_current_path[1];
2097 memcpy(&bp->stats.port_requested_paths[0*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[0], 3); 2098 memcpy(&bp->stats.port_requested_paths[0*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[0], 3);
2098 memcpy(&bp->stats.port_requested_paths[1*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[1], 3); 2099 memcpy(&bp->stats.port_requested_paths[1*3], &bp->cmd_rsp_virt->smt_mib_get.port_requested_paths[1], 3);
2099 bp->stats.port_mac_placement[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[0]; 2100 bp->stats.port_mac_placement[0] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[0];
2100 bp->stats.port_mac_placement[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[1]; 2101 bp->stats.port_mac_placement[1] = bp->cmd_rsp_virt->smt_mib_get.port_mac_placement[1];
2101 bp->stats.port_available_paths[0] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[0]; 2102 bp->stats.port_available_paths[0] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[0];
2102 bp->stats.port_available_paths[1] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[1]; 2103 bp->stats.port_available_paths[1] = bp->cmd_rsp_virt->smt_mib_get.port_available_paths[1];
2103 bp->stats.port_pmd_class[0] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[0]; 2104 bp->stats.port_pmd_class[0] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[0];
2104 bp->stats.port_pmd_class[1] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[1]; 2105 bp->stats.port_pmd_class[1] = bp->cmd_rsp_virt->smt_mib_get.port_pmd_class[1];
2105 bp->stats.port_connection_capabilities[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[0]; 2106 bp->stats.port_connection_capabilities[0] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[0];
2106 bp->stats.port_connection_capabilities[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[1]; 2107 bp->stats.port_connection_capabilities[1] = bp->cmd_rsp_virt->smt_mib_get.port_connection_capabilities[1];
2107 bp->stats.port_bs_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[0]; 2108 bp->stats.port_bs_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[0];
2108 bp->stats.port_bs_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[1]; 2109 bp->stats.port_bs_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_bs_flag[1];
2109 bp->stats.port_ler_estimate[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[0]; 2110 bp->stats.port_ler_estimate[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[0];
2110 bp->stats.port_ler_estimate[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[1]; 2111 bp->stats.port_ler_estimate[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_estimate[1];
2111 bp->stats.port_ler_cutoff[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[0]; 2112 bp->stats.port_ler_cutoff[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[0];
2112 bp->stats.port_ler_cutoff[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[1]; 2113 bp->stats.port_ler_cutoff[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_cutoff[1];
2113 bp->stats.port_ler_alarm[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[0]; 2114 bp->stats.port_ler_alarm[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[0];
2114 bp->stats.port_ler_alarm[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[1]; 2115 bp->stats.port_ler_alarm[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_alarm[1];
2115 bp->stats.port_connect_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[0]; 2116 bp->stats.port_connect_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[0];
2116 bp->stats.port_connect_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[1]; 2117 bp->stats.port_connect_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_connect_state[1];
2117 bp->stats.port_pcm_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[0]; 2118 bp->stats.port_pcm_state[0] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[0];
2118 bp->stats.port_pcm_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[1]; 2119 bp->stats.port_pcm_state[1] = bp->cmd_rsp_virt->smt_mib_get.port_pcm_state[1];
2119 bp->stats.port_pc_withhold[0] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[0]; 2120 bp->stats.port_pc_withhold[0] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[0];
2120 bp->stats.port_pc_withhold[1] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[1]; 2121 bp->stats.port_pc_withhold[1] = bp->cmd_rsp_virt->smt_mib_get.port_pc_withhold[1];
2121 bp->stats.port_ler_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[0]; 2122 bp->stats.port_ler_flag[0] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[0];
2122 bp->stats.port_ler_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[1]; 2123 bp->stats.port_ler_flag[1] = bp->cmd_rsp_virt->smt_mib_get.port_ler_flag[1];
2123 bp->stats.port_hardware_present[0] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[0]; 2124 bp->stats.port_hardware_present[0] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[0];
2124 bp->stats.port_hardware_present[1] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[1]; 2125 bp->stats.port_hardware_present[1] = bp->cmd_rsp_virt->smt_mib_get.port_hardware_present[1];
2125 2126
2126 /* Get FDDI counters */ 2127 /* Get FDDI counters */
2127 2128
2128 bp->cmd_req_virt->cmd_type = PI_CMD_K_CNTRS_GET; 2129 bp->cmd_req_virt->cmd_type = PI_CMD_K_CNTRS_GET;
2129 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 2130 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2130 return((struct net_device_stats *) &bp->stats); 2131 return((struct net_device_stats *) &bp->stats);
2131 2132
2132 /* Fill the bp->stats structure with the FDDI counter values */ 2133 /* Fill the bp->stats structure with the FDDI counter values */
2133 2134
2134 bp->stats.mac_frame_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.frame_cnt.ls; 2135 bp->stats.mac_frame_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.frame_cnt.ls;
2135 bp->stats.mac_copied_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.copied_cnt.ls; 2136 bp->stats.mac_copied_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.copied_cnt.ls;
2136 bp->stats.mac_transmit_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.transmit_cnt.ls; 2137 bp->stats.mac_transmit_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.transmit_cnt.ls;
2137 bp->stats.mac_error_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.error_cnt.ls; 2138 bp->stats.mac_error_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.error_cnt.ls;
2138 bp->stats.mac_lost_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.lost_cnt.ls; 2139 bp->stats.mac_lost_cts = bp->cmd_rsp_virt->cntrs_get.cntrs.lost_cnt.ls;
2139 bp->stats.port_lct_fail_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[0].ls; 2140 bp->stats.port_lct_fail_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[0].ls;
2140 bp->stats.port_lct_fail_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[1].ls; 2141 bp->stats.port_lct_fail_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lct_rejects[1].ls;
2141 bp->stats.port_lem_reject_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[0].ls; 2142 bp->stats.port_lem_reject_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[0].ls;
2142 bp->stats.port_lem_reject_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[1].ls; 2143 bp->stats.port_lem_reject_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.lem_rejects[1].ls;
2143 bp->stats.port_lem_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[0].ls; 2144 bp->stats.port_lem_cts[0] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[0].ls;
2144 bp->stats.port_lem_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[1].ls; 2145 bp->stats.port_lem_cts[1] = bp->cmd_rsp_virt->cntrs_get.cntrs.link_errors[1].ls;
2145 2146
2146 return((struct net_device_stats *) &bp->stats); 2147 return((struct net_device_stats *) &bp->stats);
2147 } 2148 }
2148 2149
2149 2150
2150 /* 2151 /*
2151 * ============================== 2152 * ==============================
2152 * = dfx_ctl_set_multicast_list = 2153 * = dfx_ctl_set_multicast_list =
2153 * ============================== 2154 * ==============================
2154 * 2155 *
2155 * Overview: 2156 * Overview:
2156 * Enable/Disable LLC frame promiscuous mode reception 2157 * Enable/Disable LLC frame promiscuous mode reception
2157 * on the adapter and/or update multicast address table. 2158 * on the adapter and/or update multicast address table.
2158 * 2159 *
2159 * Returns: 2160 * Returns:
2160 * None 2161 * None
2161 * 2162 *
2162 * Arguments: 2163 * Arguments:
2163 * dev - pointer to device information 2164 * dev - pointer to device information
2164 * 2165 *
2165 * Functional Description: 2166 * Functional Description:
2166 * This routine follows a fairly simple algorithm for setting the 2167 * This routine follows a fairly simple algorithm for setting the
2167 * adapter filters and CAM: 2168 * adapter filters and CAM:
2168 * 2169 *
2169 * if IFF_PROMISC flag is set 2170 * if IFF_PROMISC flag is set
2170 * enable LLC individual/group promiscuous mode 2171 * enable LLC individual/group promiscuous mode
2171 * else 2172 * else
2172 * disable LLC individual/group promiscuous mode 2173 * disable LLC individual/group promiscuous mode
2173 * if number of incoming multicast addresses > 2174 * if number of incoming multicast addresses >
2174 * (CAM max size - number of unicast addresses in CAM) 2175 * (CAM max size - number of unicast addresses in CAM)
2175 * enable LLC group promiscuous mode 2176 * enable LLC group promiscuous mode
2176 * set driver-maintained multicast address count to zero 2177 * set driver-maintained multicast address count to zero
2177 * else 2178 * else
2178 * disable LLC group promiscuous mode 2179 * disable LLC group promiscuous mode
2179 * set driver-maintained multicast address count to incoming count 2180 * set driver-maintained multicast address count to incoming count
2180 * update adapter CAM 2181 * update adapter CAM
2181 * update adapter filters 2182 * update adapter filters
2182 * 2183 *
2183 * Return Codes: 2184 * Return Codes:
2184 * None 2185 * None
2185 * 2186 *
2186 * Assumptions: 2187 * Assumptions:
2187 * Multicast addresses are presented in canonical (LSB) format. 2188 * Multicast addresses are presented in canonical (LSB) format.
2188 * 2189 *
2189 * Side Effects: 2190 * Side Effects:
2190 * On-board adapter CAM and filters are updated. 2191 * On-board adapter CAM and filters are updated.
2191 */ 2192 */
2192 2193
2193 static void dfx_ctl_set_multicast_list(struct net_device *dev) 2194 static void dfx_ctl_set_multicast_list(struct net_device *dev)
2194 { 2195 {
2195 DFX_board_t *bp = netdev_priv(dev); 2196 DFX_board_t *bp = netdev_priv(dev);
2196 int i; /* used as index in for loop */ 2197 int i; /* used as index in for loop */
2197 struct dev_mc_list *dmi; /* ptr to multicast addr entry */ 2198 struct dev_mc_list *dmi; /* ptr to multicast addr entry */
2198 2199
2199 /* Enable LLC frame promiscuous mode, if necessary */ 2200 /* Enable LLC frame promiscuous mode, if necessary */
2200 2201
2201 if (dev->flags & IFF_PROMISC) 2202 if (dev->flags & IFF_PROMISC)
2202 bp->ind_group_prom = PI_FSTATE_K_PASS; /* Enable LLC ind/group prom mode */ 2203 bp->ind_group_prom = PI_FSTATE_K_PASS; /* Enable LLC ind/group prom mode */
2203 2204
2204 /* Else, update multicast address table */ 2205 /* Else, update multicast address table */
2205 2206
2206 else 2207 else
2207 { 2208 {
2208 bp->ind_group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC ind/group prom mode */ 2209 bp->ind_group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC ind/group prom mode */
2209 /* 2210 /*
2210 * Check whether incoming multicast address count exceeds table size 2211 * Check whether incoming multicast address count exceeds table size
2211 * 2212 *
2212 * Note: The adapters utilize an on-board 64 entry CAM for 2213 * Note: The adapters utilize an on-board 64 entry CAM for
2213 * supporting perfect filtering of multicast packets 2214 * supporting perfect filtering of multicast packets
2214 * and bridge functions when adding unicast addresses. 2215 * and bridge functions when adding unicast addresses.
2215 * There is no hash function available. To support 2216 * There is no hash function available. To support
2216 * additional multicast addresses, the all multicast 2217 * additional multicast addresses, the all multicast
2217 * filter (LLC group promiscuous mode) must be enabled. 2218 * filter (LLC group promiscuous mode) must be enabled.
2218 * 2219 *
2219 * The firmware reserves two CAM entries for SMT-related 2220 * The firmware reserves two CAM entries for SMT-related
2220 * multicast addresses, which leaves 62 entries available. 2221 * multicast addresses, which leaves 62 entries available.
2221 * The following code ensures that we're not being asked 2222 * The following code ensures that we're not being asked
2222 * to add more than 62 addresses to the CAM. If we are, 2223 * to add more than 62 addresses to the CAM. If we are,
2223 * the driver will enable the all multicast filter. 2224 * the driver will enable the all multicast filter.
2224 * Should the number of multicast addresses drop below 2225 * Should the number of multicast addresses drop below
2225 * the high water mark, the filter will be disabled and 2226 * the high water mark, the filter will be disabled and
2226 * perfect filtering will be used. 2227 * perfect filtering will be used.
2227 */ 2228 */
2228 2229
2229 if (dev->mc_count > (PI_CMD_ADDR_FILTER_K_SIZE - bp->uc_count)) 2230 if (dev->mc_count > (PI_CMD_ADDR_FILTER_K_SIZE - bp->uc_count))
2230 { 2231 {
2231 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */ 2232 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2232 bp->mc_count = 0; /* Don't add mc addrs to CAM */ 2233 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2233 } 2234 }
2234 else 2235 else
2235 { 2236 {
2236 bp->group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC group prom mode */ 2237 bp->group_prom = PI_FSTATE_K_BLOCK; /* Disable LLC group prom mode */
2237 bp->mc_count = dev->mc_count; /* Add mc addrs to CAM */ 2238 bp->mc_count = dev->mc_count; /* Add mc addrs to CAM */
2238 } 2239 }
2239 2240
2240 /* Copy addresses to multicast address table, then update adapter CAM */ 2241 /* Copy addresses to multicast address table, then update adapter CAM */
2241 2242
2242 dmi = dev->mc_list; /* point to first multicast addr */ 2243 dmi = dev->mc_list; /* point to first multicast addr */
2243 for (i=0; i < bp->mc_count; i++) 2244 for (i=0; i < bp->mc_count; i++)
2244 { 2245 {
2245 memcpy(&bp->mc_table[i*FDDI_K_ALEN], dmi->dmi_addr, FDDI_K_ALEN); 2246 memcpy(&bp->mc_table[i*FDDI_K_ALEN], dmi->dmi_addr, FDDI_K_ALEN);
2246 dmi = dmi->next; /* point to next multicast addr */ 2247 dmi = dmi->next; /* point to next multicast addr */
2247 } 2248 }
2248 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS) 2249 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2249 { 2250 {
2250 DBG_printk("%s: Could not update multicast address table!\n", dev->name); 2251 DBG_printk("%s: Could not update multicast address table!\n", dev->name);
2251 } 2252 }
2252 else 2253 else
2253 { 2254 {
2254 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev->name, bp->mc_count); 2255 DBG_printk("%s: Multicast address table updated! Added %d addresses.\n", dev->name, bp->mc_count);
2255 } 2256 }
2256 } 2257 }
2257 2258
2258 /* Update adapter filters */ 2259 /* Update adapter filters */
2259 2260
2260 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS) 2261 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2261 { 2262 {
2262 DBG_printk("%s: Could not update adapter filters!\n", dev->name); 2263 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2263 } 2264 }
2264 else 2265 else
2265 { 2266 {
2266 DBG_printk("%s: Adapter filters updated!\n", dev->name); 2267 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2267 } 2268 }
2268 } 2269 }
2269 2270
2270 2271
2271 /* 2272 /*
2272 * =========================== 2273 * ===========================
2273 * = dfx_ctl_set_mac_address = 2274 * = dfx_ctl_set_mac_address =
2274 * =========================== 2275 * ===========================
2275 * 2276 *
2276 * Overview: 2277 * Overview:
2277 * Add node address override (unicast address) to adapter 2278 * Add node address override (unicast address) to adapter
2278 * CAM and update dev_addr field in device table. 2279 * CAM and update dev_addr field in device table.
2279 * 2280 *
2280 * Returns: 2281 * Returns:
2281 * None 2282 * None
2282 * 2283 *
2283 * Arguments: 2284 * Arguments:
2284 * dev - pointer to device information 2285 * dev - pointer to device information
2285 * addr - pointer to sockaddr structure containing unicast address to add 2286 * addr - pointer to sockaddr structure containing unicast address to add
2286 * 2287 *
2287 * Functional Description: 2288 * Functional Description:
2288 * The adapter supports node address overrides by adding one or more 2289 * The adapter supports node address overrides by adding one or more
2289 * unicast addresses to the adapter CAM. This is similar to adding 2290 * unicast addresses to the adapter CAM. This is similar to adding
2290 * multicast addresses. In this routine we'll update the driver and 2291 * multicast addresses. In this routine we'll update the driver and
2291 * device structures with the new address, then update the adapter CAM 2292 * device structures with the new address, then update the adapter CAM
2292 * to ensure that the adapter will copy and strip frames destined and 2293 * to ensure that the adapter will copy and strip frames destined and
2293 * sourced by that address. 2294 * sourced by that address.
2294 * 2295 *
2295 * Return Codes: 2296 * Return Codes:
2296 * Always returns zero. 2297 * Always returns zero.
2297 * 2298 *
2298 * Assumptions: 2299 * Assumptions:
2299 * The address pointed to by addr->sa_data is a valid unicast 2300 * The address pointed to by addr->sa_data is a valid unicast
2300 * address and is presented in canonical (LSB) format. 2301 * address and is presented in canonical (LSB) format.
2301 * 2302 *
2302 * Side Effects: 2303 * Side Effects:
2303 * On-board adapter CAM is updated. On-board adapter filters 2304 * On-board adapter CAM is updated. On-board adapter filters
2304 * may be updated. 2305 * may be updated.
2305 */ 2306 */
2306 2307
2307 static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr) 2308 static int dfx_ctl_set_mac_address(struct net_device *dev, void *addr)
2308 { 2309 {
2309 struct sockaddr *p_sockaddr = (struct sockaddr *)addr; 2310 struct sockaddr *p_sockaddr = (struct sockaddr *)addr;
2310 DFX_board_t *bp = netdev_priv(dev); 2311 DFX_board_t *bp = netdev_priv(dev);
2311 2312
2312 /* Copy unicast address to driver-maintained structs and update count */ 2313 /* Copy unicast address to driver-maintained structs and update count */
2313 2314
2314 memcpy(dev->dev_addr, p_sockaddr->sa_data, FDDI_K_ALEN); /* update device struct */ 2315 memcpy(dev->dev_addr, p_sockaddr->sa_data, FDDI_K_ALEN); /* update device struct */
2315 memcpy(&bp->uc_table[0], p_sockaddr->sa_data, FDDI_K_ALEN); /* update driver struct */ 2316 memcpy(&bp->uc_table[0], p_sockaddr->sa_data, FDDI_K_ALEN); /* update driver struct */
2316 bp->uc_count = 1; 2317 bp->uc_count = 1;
2317 2318
2318 /* 2319 /*
2319 * Verify we're not exceeding the CAM size by adding unicast address 2320 * Verify we're not exceeding the CAM size by adding unicast address
2320 * 2321 *
2321 * Note: It's possible that before entering this routine we've 2322 * Note: It's possible that before entering this routine we've
2322 * already filled the CAM with 62 multicast addresses. 2323 * already filled the CAM with 62 multicast addresses.
2323 * Since we need to place the node address override into 2324 * Since we need to place the node address override into
2324 * the CAM, we have to check to see that we're not 2325 * the CAM, we have to check to see that we're not
2325 * exceeding the CAM size. If we are, we have to enable 2326 * exceeding the CAM size. If we are, we have to enable
2326 * the LLC group (multicast) promiscuous mode filter as 2327 * the LLC group (multicast) promiscuous mode filter as
2327 * in dfx_ctl_set_multicast_list. 2328 * in dfx_ctl_set_multicast_list.
2328 */ 2329 */
2329 2330
2330 if ((bp->uc_count + bp->mc_count) > PI_CMD_ADDR_FILTER_K_SIZE) 2331 if ((bp->uc_count + bp->mc_count) > PI_CMD_ADDR_FILTER_K_SIZE)
2331 { 2332 {
2332 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */ 2333 bp->group_prom = PI_FSTATE_K_PASS; /* Enable LLC group prom mode */
2333 bp->mc_count = 0; /* Don't add mc addrs to CAM */ 2334 bp->mc_count = 0; /* Don't add mc addrs to CAM */
2334 2335
2335 /* Update adapter filters */ 2336 /* Update adapter filters */
2336 2337
2337 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS) 2338 if (dfx_ctl_update_filters(bp) != DFX_K_SUCCESS)
2338 { 2339 {
2339 DBG_printk("%s: Could not update adapter filters!\n", dev->name); 2340 DBG_printk("%s: Could not update adapter filters!\n", dev->name);
2340 } 2341 }
2341 else 2342 else
2342 { 2343 {
2343 DBG_printk("%s: Adapter filters updated!\n", dev->name); 2344 DBG_printk("%s: Adapter filters updated!\n", dev->name);
2344 } 2345 }
2345 } 2346 }
2346 2347
2347 /* Update adapter CAM with new unicast address */ 2348 /* Update adapter CAM with new unicast address */
2348 2349
2349 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS) 2350 if (dfx_ctl_update_cam(bp) != DFX_K_SUCCESS)
2350 { 2351 {
2351 DBG_printk("%s: Could not set new MAC address!\n", dev->name); 2352 DBG_printk("%s: Could not set new MAC address!\n", dev->name);
2352 } 2353 }
2353 else 2354 else
2354 { 2355 {
2355 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev->name); 2356 DBG_printk("%s: Adapter CAM updated with new MAC address\n", dev->name);
2356 } 2357 }
2357 return(0); /* always return zero */ 2358 return(0); /* always return zero */
2358 } 2359 }
2359 2360
2360 2361
2361 /* 2362 /*
2362 * ====================== 2363 * ======================
2363 * = dfx_ctl_update_cam = 2364 * = dfx_ctl_update_cam =
2364 * ====================== 2365 * ======================
2365 * 2366 *
2366 * Overview: 2367 * Overview:
2367 * Procedure to update adapter CAM (Content Addressable Memory) 2368 * Procedure to update adapter CAM (Content Addressable Memory)
2368 * with desired unicast and multicast address entries. 2369 * with desired unicast and multicast address entries.
2369 * 2370 *
2370 * Returns: 2371 * Returns:
2371 * Condition code 2372 * Condition code
2372 * 2373 *
2373 * Arguments: 2374 * Arguments:
2374 * bp - pointer to board information 2375 * bp - pointer to board information
2375 * 2376 *
2376 * Functional Description: 2377 * Functional Description:
2377 * Updates adapter CAM with current contents of board structure 2378 * Updates adapter CAM with current contents of board structure
2378 * unicast and multicast address tables. Since there are only 62 2379 * unicast and multicast address tables. Since there are only 62
2379 * free entries in CAM, this routine ensures that the command 2380 * free entries in CAM, this routine ensures that the command
2380 * request buffer is not overrun. 2381 * request buffer is not overrun.
2381 * 2382 *
2382 * Return Codes: 2383 * Return Codes:
2383 * DFX_K_SUCCESS - Request succeeded 2384 * DFX_K_SUCCESS - Request succeeded
2384 * DFX_K_FAILURE - Request failed 2385 * DFX_K_FAILURE - Request failed
2385 * 2386 *
2386 * Assumptions: 2387 * Assumptions:
2387 * All addresses being added (unicast and multicast) are in canonical 2388 * All addresses being added (unicast and multicast) are in canonical
2388 * order. 2389 * order.
2389 * 2390 *
2390 * Side Effects: 2391 * Side Effects:
2391 * On-board adapter CAM is updated. 2392 * On-board adapter CAM is updated.
2392 */ 2393 */
2393 2394
2394 static int dfx_ctl_update_cam(DFX_board_t *bp) 2395 static int dfx_ctl_update_cam(DFX_board_t *bp)
2395 { 2396 {
2396 int i; /* used as index */ 2397 int i; /* used as index */
2397 PI_LAN_ADDR *p_addr; /* pointer to CAM entry */ 2398 PI_LAN_ADDR *p_addr; /* pointer to CAM entry */
2398 2399
2399 /* 2400 /*
2400 * Fill in command request information 2401 * Fill in command request information
2401 * 2402 *
2402 * Note: Even though both the unicast and multicast address 2403 * Note: Even though both the unicast and multicast address
2403 * table entries are stored as contiguous 6 byte entries, 2404 * table entries are stored as contiguous 6 byte entries,
2404 * the firmware address filter set command expects each 2405 * the firmware address filter set command expects each
2405 * entry to be two longwords (8 bytes total). We must be 2406 * entry to be two longwords (8 bytes total). We must be
2406 * careful to only copy the six bytes of each unicast and 2407 * careful to only copy the six bytes of each unicast and
2407 * multicast table entry into each command entry. This 2408 * multicast table entry into each command entry. This
2408 * is also why we must first clear the entire command 2409 * is also why we must first clear the entire command
2409 * request buffer. 2410 * request buffer.
2410 */ 2411 */
2411 2412
2412 memset(bp->cmd_req_virt, 0, PI_CMD_REQ_K_SIZE_MAX); /* first clear buffer */ 2413 memset(bp->cmd_req_virt, 0, PI_CMD_REQ_K_SIZE_MAX); /* first clear buffer */
2413 bp->cmd_req_virt->cmd_type = PI_CMD_K_ADDR_FILTER_SET; 2414 bp->cmd_req_virt->cmd_type = PI_CMD_K_ADDR_FILTER_SET;
2414 p_addr = &bp->cmd_req_virt->addr_filter_set.entry[0]; 2415 p_addr = &bp->cmd_req_virt->addr_filter_set.entry[0];
2415 2416
2416 /* Now add unicast addresses to command request buffer, if any */ 2417 /* Now add unicast addresses to command request buffer, if any */
2417 2418
2418 for (i=0; i < (int)bp->uc_count; i++) 2419 for (i=0; i < (int)bp->uc_count; i++)
2419 { 2420 {
2420 if (i < PI_CMD_ADDR_FILTER_K_SIZE) 2421 if (i < PI_CMD_ADDR_FILTER_K_SIZE)
2421 { 2422 {
2422 memcpy(p_addr, &bp->uc_table[i*FDDI_K_ALEN], FDDI_K_ALEN); 2423 memcpy(p_addr, &bp->uc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2423 p_addr++; /* point to next command entry */ 2424 p_addr++; /* point to next command entry */
2424 } 2425 }
2425 } 2426 }
2426 2427
2427 /* Now add multicast addresses to command request buffer, if any */ 2428 /* Now add multicast addresses to command request buffer, if any */
2428 2429
2429 for (i=0; i < (int)bp->mc_count; i++) 2430 for (i=0; i < (int)bp->mc_count; i++)
2430 { 2431 {
2431 if ((i + bp->uc_count) < PI_CMD_ADDR_FILTER_K_SIZE) 2432 if ((i + bp->uc_count) < PI_CMD_ADDR_FILTER_K_SIZE)
2432 { 2433 {
2433 memcpy(p_addr, &bp->mc_table[i*FDDI_K_ALEN], FDDI_K_ALEN); 2434 memcpy(p_addr, &bp->mc_table[i*FDDI_K_ALEN], FDDI_K_ALEN);
2434 p_addr++; /* point to next command entry */ 2435 p_addr++; /* point to next command entry */
2435 } 2436 }
2436 } 2437 }
2437 2438
2438 /* Issue command to update adapter CAM, then return */ 2439 /* Issue command to update adapter CAM, then return */
2439 2440
2440 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 2441 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2441 return(DFX_K_FAILURE); 2442 return(DFX_K_FAILURE);
2442 return(DFX_K_SUCCESS); 2443 return(DFX_K_SUCCESS);
2443 } 2444 }
2444 2445
2445 2446
2446 /* 2447 /*
2447 * ========================== 2448 * ==========================
2448 * = dfx_ctl_update_filters = 2449 * = dfx_ctl_update_filters =
2449 * ========================== 2450 * ==========================
2450 * 2451 *
2451 * Overview: 2452 * Overview:
2452 * Procedure to update adapter filters with desired 2453 * Procedure to update adapter filters with desired
2453 * filter settings. 2454 * filter settings.
2454 * 2455 *
2455 * Returns: 2456 * Returns:
2456 * Condition code 2457 * Condition code
2457 * 2458 *
2458 * Arguments: 2459 * Arguments:
2459 * bp - pointer to board information 2460 * bp - pointer to board information
2460 * 2461 *
2461 * Functional Description: 2462 * Functional Description:
2462 * Enables or disables filter using current filter settings. 2463 * Enables or disables filter using current filter settings.
2463 * 2464 *
2464 * Return Codes: 2465 * Return Codes:
2465 * DFX_K_SUCCESS - Request succeeded. 2466 * DFX_K_SUCCESS - Request succeeded.
2466 * DFX_K_FAILURE - Request failed. 2467 * DFX_K_FAILURE - Request failed.
2467 * 2468 *
2468 * Assumptions: 2469 * Assumptions:
2469 * We must always pass up packets destined to the broadcast 2470 * We must always pass up packets destined to the broadcast
2470 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the 2471 * address (FF-FF-FF-FF-FF-FF), so we'll always keep the
2471 * broadcast filter enabled. 2472 * broadcast filter enabled.
2472 * 2473 *
2473 * Side Effects: 2474 * Side Effects:
2474 * On-board adapter filters are updated. 2475 * On-board adapter filters are updated.
2475 */ 2476 */
2476 2477
2477 static int dfx_ctl_update_filters(DFX_board_t *bp) 2478 static int dfx_ctl_update_filters(DFX_board_t *bp)
2478 { 2479 {
2479 int i = 0; /* used as index */ 2480 int i = 0; /* used as index */
2480 2481
2481 /* Fill in command request information */ 2482 /* Fill in command request information */
2482 2483
2483 bp->cmd_req_virt->cmd_type = PI_CMD_K_FILTERS_SET; 2484 bp->cmd_req_virt->cmd_type = PI_CMD_K_FILTERS_SET;
2484 2485
2485 /* Initialize Broadcast filter - * ALWAYS ENABLED * */ 2486 /* Initialize Broadcast filter - * ALWAYS ENABLED * */
2486 2487
2487 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_BROADCAST; 2488 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_BROADCAST;
2488 bp->cmd_req_virt->filter_set.item[i++].value = PI_FSTATE_K_PASS; 2489 bp->cmd_req_virt->filter_set.item[i++].value = PI_FSTATE_K_PASS;
2489 2490
2490 /* Initialize LLC Individual/Group Promiscuous filter */ 2491 /* Initialize LLC Individual/Group Promiscuous filter */
2491 2492
2492 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_IND_GROUP_PROM; 2493 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_IND_GROUP_PROM;
2493 bp->cmd_req_virt->filter_set.item[i++].value = bp->ind_group_prom; 2494 bp->cmd_req_virt->filter_set.item[i++].value = bp->ind_group_prom;
2494 2495
2495 /* Initialize LLC Group Promiscuous filter */ 2496 /* Initialize LLC Group Promiscuous filter */
2496 2497
2497 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_GROUP_PROM; 2498 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_GROUP_PROM;
2498 bp->cmd_req_virt->filter_set.item[i++].value = bp->group_prom; 2499 bp->cmd_req_virt->filter_set.item[i++].value = bp->group_prom;
2499 2500
2500 /* Terminate the item code list */ 2501 /* Terminate the item code list */
2501 2502
2502 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_EOL; 2503 bp->cmd_req_virt->filter_set.item[i].item_code = PI_ITEM_K_EOL;
2503 2504
2504 /* Issue command to update adapter filters, then return */ 2505 /* Issue command to update adapter filters, then return */
2505 2506
2506 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS) 2507 if (dfx_hw_dma_cmd_req(bp) != DFX_K_SUCCESS)
2507 return(DFX_K_FAILURE); 2508 return(DFX_K_FAILURE);
2508 return(DFX_K_SUCCESS); 2509 return(DFX_K_SUCCESS);
2509 } 2510 }
2510 2511
2511 2512
2512 /* 2513 /*
2513 * ====================== 2514 * ======================
2514 * = dfx_hw_dma_cmd_req = 2515 * = dfx_hw_dma_cmd_req =
2515 * ====================== 2516 * ======================
2516 * 2517 *
2517 * Overview: 2518 * Overview:
2518 * Sends PDQ DMA command to adapter firmware 2519 * Sends PDQ DMA command to adapter firmware
2519 * 2520 *
2520 * Returns: 2521 * Returns:
2521 * Condition code 2522 * Condition code
2522 * 2523 *
2523 * Arguments: 2524 * Arguments:
2524 * bp - pointer to board information 2525 * bp - pointer to board information
2525 * 2526 *
2526 * Functional Description: 2527 * Functional Description:
2527 * The command request and response buffers are posted to the adapter in the manner 2528 * The command request and response buffers are posted to the adapter in the manner
2528 * described in the PDQ Port Specification: 2529 * described in the PDQ Port Specification:
2529 * 2530 *
2530 * 1. Command Response Buffer is posted to adapter. 2531 * 1. Command Response Buffer is posted to adapter.
2531 * 2. Command Request Buffer is posted to adapter. 2532 * 2. Command Request Buffer is posted to adapter.
2532 * 3. Command Request consumer index is polled until it indicates that request 2533 * 3. Command Request consumer index is polled until it indicates that request
2533 * buffer has been DMA'd to adapter. 2534 * buffer has been DMA'd to adapter.
2534 * 4. Command Response consumer index is polled until it indicates that response 2535 * 4. Command Response consumer index is polled until it indicates that response
2535 * buffer has been DMA'd from adapter. 2536 * buffer has been DMA'd from adapter.
2536 * 2537 *
2537 * This ordering ensures that a response buffer is already available for the firmware 2538 * This ordering ensures that a response buffer is already available for the firmware
2538 * to use once it's done processing the request buffer. 2539 * to use once it's done processing the request buffer.
2539 * 2540 *
2540 * Return Codes: 2541 * Return Codes:
2541 * DFX_K_SUCCESS - DMA command succeeded 2542 * DFX_K_SUCCESS - DMA command succeeded
2542 * DFX_K_OUTSTATE - Adapter is NOT in proper state 2543 * DFX_K_OUTSTATE - Adapter is NOT in proper state
2543 * DFX_K_HW_TIMEOUT - DMA command timed out 2544 * DFX_K_HW_TIMEOUT - DMA command timed out
2544 * 2545 *
2545 * Assumptions: 2546 * Assumptions:
2546 * Command request buffer has already been filled with desired DMA command. 2547 * Command request buffer has already been filled with desired DMA command.
2547 * 2548 *
2548 * Side Effects: 2549 * Side Effects:
2549 * None 2550 * None
2550 */ 2551 */
2551 2552
2552 static int dfx_hw_dma_cmd_req(DFX_board_t *bp) 2553 static int dfx_hw_dma_cmd_req(DFX_board_t *bp)
2553 { 2554 {
2554 int status; /* adapter status */ 2555 int status; /* adapter status */
2555 int timeout_cnt; /* used in for loops */ 2556 int timeout_cnt; /* used in for loops */
2556 2557
2557 /* Make sure the adapter is in a state that we can issue the DMA command in */ 2558 /* Make sure the adapter is in a state that we can issue the DMA command in */
2558 2559
2559 status = dfx_hw_adap_state_rd(bp); 2560 status = dfx_hw_adap_state_rd(bp);
2560 if ((status == PI_STATE_K_RESET) || 2561 if ((status == PI_STATE_K_RESET) ||
2561 (status == PI_STATE_K_HALTED) || 2562 (status == PI_STATE_K_HALTED) ||
2562 (status == PI_STATE_K_DMA_UNAVAIL) || 2563 (status == PI_STATE_K_DMA_UNAVAIL) ||
2563 (status == PI_STATE_K_UPGRADE)) 2564 (status == PI_STATE_K_UPGRADE))
2564 return(DFX_K_OUTSTATE); 2565 return(DFX_K_OUTSTATE);
2565 2566
2566 /* Put response buffer on the command response queue */ 2567 /* Put response buffer on the command response queue */
2567 2568
2568 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_0 = (u32) (PI_RCV_DESCR_M_SOP | 2569 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2569 ((PI_CMD_RSP_K_SIZE_MAX / PI_ALIGN_K_CMD_RSP_BUFF) << PI_RCV_DESCR_V_SEG_LEN)); 2570 ((PI_CMD_RSP_K_SIZE_MAX / PI_ALIGN_K_CMD_RSP_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2570 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_1 = bp->cmd_rsp_phys; 2571 bp->descr_block_virt->cmd_rsp[bp->cmd_rsp_reg.index.prod].long_1 = bp->cmd_rsp_phys;
2571 2572
2572 /* Bump (and wrap) the producer index and write out to register */ 2573 /* Bump (and wrap) the producer index and write out to register */
2573 2574
2574 bp->cmd_rsp_reg.index.prod += 1; 2575 bp->cmd_rsp_reg.index.prod += 1;
2575 bp->cmd_rsp_reg.index.prod &= PI_CMD_RSP_K_NUM_ENTRIES-1; 2576 bp->cmd_rsp_reg.index.prod &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2576 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword); 2577 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2577 2578
2578 /* Put request buffer on the command request queue */ 2579 /* Put request buffer on the command request queue */
2579 2580
2580 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_0 = (u32) (PI_XMT_DESCR_M_SOP | 2581 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_0 = (u32) (PI_XMT_DESCR_M_SOP |
2581 PI_XMT_DESCR_M_EOP | (PI_CMD_REQ_K_SIZE_MAX << PI_XMT_DESCR_V_SEG_LEN)); 2582 PI_XMT_DESCR_M_EOP | (PI_CMD_REQ_K_SIZE_MAX << PI_XMT_DESCR_V_SEG_LEN));
2582 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_1 = bp->cmd_req_phys; 2583 bp->descr_block_virt->cmd_req[bp->cmd_req_reg.index.prod].long_1 = bp->cmd_req_phys;
2583 2584
2584 /* Bump (and wrap) the producer index and write out to register */ 2585 /* Bump (and wrap) the producer index and write out to register */
2585 2586
2586 bp->cmd_req_reg.index.prod += 1; 2587 bp->cmd_req_reg.index.prod += 1;
2587 bp->cmd_req_reg.index.prod &= PI_CMD_REQ_K_NUM_ENTRIES-1; 2588 bp->cmd_req_reg.index.prod &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2588 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword); 2589 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2589 2590
2590 /* 2591 /*
2591 * Here we wait for the command request consumer index to be equal 2592 * Here we wait for the command request consumer index to be equal
2592 * to the producer, indicating that the adapter has DMAed the request. 2593 * to the producer, indicating that the adapter has DMAed the request.
2593 */ 2594 */
2594 2595
2595 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--) 2596 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2596 { 2597 {
2597 if (bp->cmd_req_reg.index.prod == (u8)(bp->cons_block_virt->cmd_req)) 2598 if (bp->cmd_req_reg.index.prod == (u8)(bp->cons_block_virt->cmd_req))
2598 break; 2599 break;
2599 udelay(100); /* wait for 100 microseconds */ 2600 udelay(100); /* wait for 100 microseconds */
2600 } 2601 }
2601 if (timeout_cnt == 0) 2602 if (timeout_cnt == 0)
2602 return(DFX_K_HW_TIMEOUT); 2603 return(DFX_K_HW_TIMEOUT);
2603 2604
2604 /* Bump (and wrap) the completion index and write out to register */ 2605 /* Bump (and wrap) the completion index and write out to register */
2605 2606
2606 bp->cmd_req_reg.index.comp += 1; 2607 bp->cmd_req_reg.index.comp += 1;
2607 bp->cmd_req_reg.index.comp &= PI_CMD_REQ_K_NUM_ENTRIES-1; 2608 bp->cmd_req_reg.index.comp &= PI_CMD_REQ_K_NUM_ENTRIES-1;
2608 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword); 2609 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_REQ_PROD, bp->cmd_req_reg.lword);
2609 2610
2610 /* 2611 /*
2611 * Here we wait for the command response consumer index to be equal 2612 * Here we wait for the command response consumer index to be equal
2612 * to the producer, indicating that the adapter has DMAed the response. 2613 * to the producer, indicating that the adapter has DMAed the response.
2613 */ 2614 */
2614 2615
2615 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--) 2616 for (timeout_cnt = 20000; timeout_cnt > 0; timeout_cnt--)
2616 { 2617 {
2617 if (bp->cmd_rsp_reg.index.prod == (u8)(bp->cons_block_virt->cmd_rsp)) 2618 if (bp->cmd_rsp_reg.index.prod == (u8)(bp->cons_block_virt->cmd_rsp))
2618 break; 2619 break;
2619 udelay(100); /* wait for 100 microseconds */ 2620 udelay(100); /* wait for 100 microseconds */
2620 } 2621 }
2621 if (timeout_cnt == 0) 2622 if (timeout_cnt == 0)
2622 return(DFX_K_HW_TIMEOUT); 2623 return(DFX_K_HW_TIMEOUT);
2623 2624
2624 /* Bump (and wrap) the completion index and write out to register */ 2625 /* Bump (and wrap) the completion index and write out to register */
2625 2626
2626 bp->cmd_rsp_reg.index.comp += 1; 2627 bp->cmd_rsp_reg.index.comp += 1;
2627 bp->cmd_rsp_reg.index.comp &= PI_CMD_RSP_K_NUM_ENTRIES-1; 2628 bp->cmd_rsp_reg.index.comp &= PI_CMD_RSP_K_NUM_ENTRIES-1;
2628 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword); 2629 dfx_port_write_long(bp, PI_PDQ_K_REG_CMD_RSP_PROD, bp->cmd_rsp_reg.lword);
2629 return(DFX_K_SUCCESS); 2630 return(DFX_K_SUCCESS);
2630 } 2631 }
2631 2632
2632 2633
2633 /* 2634 /*
2634 * ======================== 2635 * ========================
2635 * = dfx_hw_port_ctrl_req = 2636 * = dfx_hw_port_ctrl_req =
2636 * ======================== 2637 * ========================
2637 * 2638 *
2638 * Overview: 2639 * Overview:
2639 * Sends PDQ port control command to adapter firmware 2640 * Sends PDQ port control command to adapter firmware
2640 * 2641 *
2641 * Returns: 2642 * Returns:
2642 * Host data register value in host_data if ptr is not NULL 2643 * Host data register value in host_data if ptr is not NULL
2643 * 2644 *
2644 * Arguments: 2645 * Arguments:
2645 * bp - pointer to board information 2646 * bp - pointer to board information
2646 * command - port control command 2647 * command - port control command
2647 * data_a - port data A register value 2648 * data_a - port data A register value
2648 * data_b - port data B register value 2649 * data_b - port data B register value
2649 * host_data - ptr to host data register value 2650 * host_data - ptr to host data register value
2650 * 2651 *
2651 * Functional Description: 2652 * Functional Description:
2652 * Send generic port control command to adapter by writing 2653 * Send generic port control command to adapter by writing
2653 * to various PDQ port registers, then polling for completion. 2654 * to various PDQ port registers, then polling for completion.
2654 * 2655 *
2655 * Return Codes: 2656 * Return Codes:
2656 * DFX_K_SUCCESS - port control command succeeded 2657 * DFX_K_SUCCESS - port control command succeeded
2657 * DFX_K_HW_TIMEOUT - port control command timed out 2658 * DFX_K_HW_TIMEOUT - port control command timed out
2658 * 2659 *
2659 * Assumptions: 2660 * Assumptions:
2660 * None 2661 * None
2661 * 2662 *
2662 * Side Effects: 2663 * Side Effects:
2663 * None 2664 * None
2664 */ 2665 */
2665 2666
2666 static int dfx_hw_port_ctrl_req( 2667 static int dfx_hw_port_ctrl_req(
2667 DFX_board_t *bp, 2668 DFX_board_t *bp,
2668 PI_UINT32 command, 2669 PI_UINT32 command,
2669 PI_UINT32 data_a, 2670 PI_UINT32 data_a,
2670 PI_UINT32 data_b, 2671 PI_UINT32 data_b,
2671 PI_UINT32 *host_data 2672 PI_UINT32 *host_data
2672 ) 2673 )
2673 2674
2674 { 2675 {
2675 PI_UINT32 port_cmd; /* Port Control command register value */ 2676 PI_UINT32 port_cmd; /* Port Control command register value */
2676 int timeout_cnt; /* used in for loops */ 2677 int timeout_cnt; /* used in for loops */
2677 2678
2678 /* Set Command Error bit in command longword */ 2679 /* Set Command Error bit in command longword */
2679 2680
2680 port_cmd = (PI_UINT32) (command | PI_PCTRL_M_CMD_ERROR); 2681 port_cmd = (PI_UINT32) (command | PI_PCTRL_M_CMD_ERROR);
2681 2682
2682 /* Issue port command to the adapter */ 2683 /* Issue port command to the adapter */
2683 2684
2684 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, data_a); 2685 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, data_a);
2685 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_B, data_b); 2686 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_B, data_b);
2686 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_CTRL, port_cmd); 2687 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_CTRL, port_cmd);
2687 2688
2688 /* Now wait for command to complete */ 2689 /* Now wait for command to complete */
2689 2690
2690 if (command == PI_PCTRL_M_BLAST_FLASH) 2691 if (command == PI_PCTRL_M_BLAST_FLASH)
2691 timeout_cnt = 600000; /* set command timeout count to 60 seconds */ 2692 timeout_cnt = 600000; /* set command timeout count to 60 seconds */
2692 else 2693 else
2693 timeout_cnt = 20000; /* set command timeout count to 2 seconds */ 2694 timeout_cnt = 20000; /* set command timeout count to 2 seconds */
2694 2695
2695 for (; timeout_cnt > 0; timeout_cnt--) 2696 for (; timeout_cnt > 0; timeout_cnt--)
2696 { 2697 {
2697 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_CTRL, &port_cmd); 2698 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_CTRL, &port_cmd);
2698 if (!(port_cmd & PI_PCTRL_M_CMD_ERROR)) 2699 if (!(port_cmd & PI_PCTRL_M_CMD_ERROR))
2699 break; 2700 break;
2700 udelay(100); /* wait for 100 microseconds */ 2701 udelay(100); /* wait for 100 microseconds */
2701 } 2702 }
2702 if (timeout_cnt == 0) 2703 if (timeout_cnt == 0)
2703 return(DFX_K_HW_TIMEOUT); 2704 return(DFX_K_HW_TIMEOUT);
2704 2705
2705 /* 2706 /*
2706 * If the address of host_data is non-zero, assume caller has supplied a 2707 * If the address of host_data is non-zero, assume caller has supplied a
2707 * non NULL pointer, and return the contents of the HOST_DATA register in 2708 * non NULL pointer, and return the contents of the HOST_DATA register in
2708 * it. 2709 * it.
2709 */ 2710 */
2710 2711
2711 if (host_data != NULL) 2712 if (host_data != NULL)
2712 dfx_port_read_long(bp, PI_PDQ_K_REG_HOST_DATA, host_data); 2713 dfx_port_read_long(bp, PI_PDQ_K_REG_HOST_DATA, host_data);
2713 return(DFX_K_SUCCESS); 2714 return(DFX_K_SUCCESS);
2714 } 2715 }
2715 2716
2716 2717
2717 /* 2718 /*
2718 * ===================== 2719 * =====================
2719 * = dfx_hw_adap_reset = 2720 * = dfx_hw_adap_reset =
2720 * ===================== 2721 * =====================
2721 * 2722 *
2722 * Overview: 2723 * Overview:
2723 * Resets adapter 2724 * Resets adapter
2724 * 2725 *
2725 * Returns: 2726 * Returns:
2726 * None 2727 * None
2727 * 2728 *
2728 * Arguments: 2729 * Arguments:
2729 * bp - pointer to board information 2730 * bp - pointer to board information
2730 * type - type of reset to perform 2731 * type - type of reset to perform
2731 * 2732 *
2732 * Functional Description: 2733 * Functional Description:
2733 * Issue soft reset to adapter by writing to PDQ Port Reset 2734 * Issue soft reset to adapter by writing to PDQ Port Reset
2734 * register. Use incoming reset type to tell adapter what 2735 * register. Use incoming reset type to tell adapter what
2735 * kind of reset operation to perform. 2736 * kind of reset operation to perform.
2736 * 2737 *
2737 * Return Codes: 2738 * Return Codes:
2738 * None 2739 * None
2739 * 2740 *
2740 * Assumptions: 2741 * Assumptions:
2741 * This routine merely issues a soft reset to the adapter. 2742 * This routine merely issues a soft reset to the adapter.
2742 * It is expected that after this routine returns, the caller 2743 * It is expected that after this routine returns, the caller
2743 * will appropriately poll the Port Status register for the 2744 * will appropriately poll the Port Status register for the
2744 * adapter to enter the proper state. 2745 * adapter to enter the proper state.
2745 * 2746 *
2746 * Side Effects: 2747 * Side Effects:
2747 * Internal adapter registers are cleared. 2748 * Internal adapter registers are cleared.
2748 */ 2749 */
2749 2750
2750 static void dfx_hw_adap_reset( 2751 static void dfx_hw_adap_reset(
2751 DFX_board_t *bp, 2752 DFX_board_t *bp,
2752 PI_UINT32 type 2753 PI_UINT32 type
2753 ) 2754 )
2754 2755
2755 { 2756 {
2756 /* Set Reset type and assert reset */ 2757 /* Set Reset type and assert reset */
2757 2758
2758 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, type); /* tell adapter type of reset */ 2759 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_DATA_A, type); /* tell adapter type of reset */
2759 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, PI_RESET_M_ASSERT_RESET); 2760 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, PI_RESET_M_ASSERT_RESET);
2760 2761
2761 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */ 2762 /* Wait for at least 1 Microsecond according to the spec. We wait 20 just to be safe */
2762 2763
2763 udelay(20); 2764 udelay(20);
2764 2765
2765 /* Deassert reset */ 2766 /* Deassert reset */
2766 2767
2767 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, 0); 2768 dfx_port_write_long(bp, PI_PDQ_K_REG_PORT_RESET, 0);
2768 } 2769 }
2769 2770
2770 2771
2771 /* 2772 /*
2772 * ======================== 2773 * ========================
2773 * = dfx_hw_adap_state_rd = 2774 * = dfx_hw_adap_state_rd =
2774 * ======================== 2775 * ========================
2775 * 2776 *
2776 * Overview: 2777 * Overview:
2777 * Returns current adapter state 2778 * Returns current adapter state
2778 * 2779 *
2779 * Returns: 2780 * Returns:
2780 * Adapter state per PDQ Port Specification 2781 * Adapter state per PDQ Port Specification
2781 * 2782 *
2782 * Arguments: 2783 * Arguments:
2783 * bp - pointer to board information 2784 * bp - pointer to board information
2784 * 2785 *
2785 * Functional Description: 2786 * Functional Description:
2786 * Reads PDQ Port Status register and returns adapter state. 2787 * Reads PDQ Port Status register and returns adapter state.
2787 * 2788 *
2788 * Return Codes: 2789 * Return Codes:
2789 * None 2790 * None
2790 * 2791 *
2791 * Assumptions: 2792 * Assumptions:
2792 * None 2793 * None
2793 * 2794 *
2794 * Side Effects: 2795 * Side Effects:
2795 * None 2796 * None
2796 */ 2797 */
2797 2798
2798 static int dfx_hw_adap_state_rd(DFX_board_t *bp) 2799 static int dfx_hw_adap_state_rd(DFX_board_t *bp)
2799 { 2800 {
2800 PI_UINT32 port_status; /* Port Status register value */ 2801 PI_UINT32 port_status; /* Port Status register value */
2801 2802
2802 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status); 2803 dfx_port_read_long(bp, PI_PDQ_K_REG_PORT_STATUS, &port_status);
2803 return((port_status & PI_PSTATUS_M_STATE) >> PI_PSTATUS_V_STATE); 2804 return((port_status & PI_PSTATUS_M_STATE) >> PI_PSTATUS_V_STATE);
2804 } 2805 }
2805 2806
2806 2807
2807 /* 2808 /*
2808 * ===================== 2809 * =====================
2809 * = dfx_hw_dma_uninit = 2810 * = dfx_hw_dma_uninit =
2810 * ===================== 2811 * =====================
2811 * 2812 *
2812 * Overview: 2813 * Overview:
2813 * Brings adapter to DMA_UNAVAILABLE state 2814 * Brings adapter to DMA_UNAVAILABLE state
2814 * 2815 *
2815 * Returns: 2816 * Returns:
2816 * Condition code 2817 * Condition code
2817 * 2818 *
2818 * Arguments: 2819 * Arguments:
2819 * bp - pointer to board information 2820 * bp - pointer to board information
2820 * type - type of reset to perform 2821 * type - type of reset to perform
2821 * 2822 *
2822 * Functional Description: 2823 * Functional Description:
2823 * Bring adapter to DMA_UNAVAILABLE state by performing the following: 2824 * Bring adapter to DMA_UNAVAILABLE state by performing the following:
2824 * 1. Set reset type bit in Port Data A Register then reset adapter. 2825 * 1. Set reset type bit in Port Data A Register then reset adapter.
2825 * 2. Check that adapter is in DMA_UNAVAILABLE state. 2826 * 2. Check that adapter is in DMA_UNAVAILABLE state.
2826 * 2827 *
2827 * Return Codes: 2828 * Return Codes:
2828 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state 2829 * DFX_K_SUCCESS - adapter is in DMA_UNAVAILABLE state
2829 * DFX_K_HW_TIMEOUT - adapter did not reset properly 2830 * DFX_K_HW_TIMEOUT - adapter did not reset properly
2830 * 2831 *
2831 * Assumptions: 2832 * Assumptions:
2832 * None 2833 * None
2833 * 2834 *
2834 * Side Effects: 2835 * Side Effects:
2835 * Internal adapter registers are cleared. 2836 * Internal adapter registers are cleared.
2836 */ 2837 */
2837 2838
2838 static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type) 2839 static int dfx_hw_dma_uninit(DFX_board_t *bp, PI_UINT32 type)
2839 { 2840 {
2840 int timeout_cnt; /* used in for loops */ 2841 int timeout_cnt; /* used in for loops */
2841 2842
2842 /* Set reset type bit and reset adapter */ 2843 /* Set reset type bit and reset adapter */
2843 2844
2844 dfx_hw_adap_reset(bp, type); 2845 dfx_hw_adap_reset(bp, type);
2845 2846
2846 /* Now wait for adapter to enter DMA_UNAVAILABLE state */ 2847 /* Now wait for adapter to enter DMA_UNAVAILABLE state */
2847 2848
2848 for (timeout_cnt = 100000; timeout_cnt > 0; timeout_cnt--) 2849 for (timeout_cnt = 100000; timeout_cnt > 0; timeout_cnt--)
2849 { 2850 {
2850 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_DMA_UNAVAIL) 2851 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_DMA_UNAVAIL)
2851 break; 2852 break;
2852 udelay(100); /* wait for 100 microseconds */ 2853 udelay(100); /* wait for 100 microseconds */
2853 } 2854 }
2854 if (timeout_cnt == 0) 2855 if (timeout_cnt == 0)
2855 return(DFX_K_HW_TIMEOUT); 2856 return(DFX_K_HW_TIMEOUT);
2856 return(DFX_K_SUCCESS); 2857 return(DFX_K_SUCCESS);
2857 } 2858 }
2858 2859
2859 /* 2860 /*
2860 * Align an sk_buff to a boundary power of 2 2861 * Align an sk_buff to a boundary power of 2
2861 * 2862 *
2862 */ 2863 */
2863 2864
2864 static void my_skb_align(struct sk_buff *skb, int n) 2865 static void my_skb_align(struct sk_buff *skb, int n)
2865 { 2866 {
2866 unsigned long x = (unsigned long)skb->data; 2867 unsigned long x = (unsigned long)skb->data;
2867 unsigned long v; 2868 unsigned long v;
2868 2869
2869 v = ALIGN(x, n); /* Where we want to be */ 2870 v = ALIGN(x, n); /* Where we want to be */
2870 2871
2871 skb_reserve(skb, v - x); 2872 skb_reserve(skb, v - x);
2872 } 2873 }
2873 2874
2874 2875
2875 /* 2876 /*
2876 * ================ 2877 * ================
2877 * = dfx_rcv_init = 2878 * = dfx_rcv_init =
2878 * ================ 2879 * ================
2879 * 2880 *
2880 * Overview: 2881 * Overview:
2881 * Produces buffers to adapter LLC Host receive descriptor block 2882 * Produces buffers to adapter LLC Host receive descriptor block
2882 * 2883 *
2883 * Returns: 2884 * Returns:
2884 * None 2885 * None
2885 * 2886 *
2886 * Arguments: 2887 * Arguments:
2887 * bp - pointer to board information 2888 * bp - pointer to board information
2888 * get_buffers - non-zero if buffers to be allocated 2889 * get_buffers - non-zero if buffers to be allocated
2889 * 2890 *
2890 * Functional Description: 2891 * Functional Description:
2891 * This routine can be called during dfx_adap_init() or during an adapter 2892 * This routine can be called during dfx_adap_init() or during an adapter
2892 * reset. It initializes the descriptor block and produces all allocated 2893 * reset. It initializes the descriptor block and produces all allocated
2893 * LLC Host queue receive buffers. 2894 * LLC Host queue receive buffers.
2894 * 2895 *
2895 * Return Codes: 2896 * Return Codes:
2896 * Return 0 on success or -ENOMEM if buffer allocation failed (when using 2897 * Return 0 on success or -ENOMEM if buffer allocation failed (when using
2897 * dynamic buffer allocation). If the buffer allocation failed, the 2898 * dynamic buffer allocation). If the buffer allocation failed, the
2898 * already allocated buffers will not be released and the caller should do 2899 * already allocated buffers will not be released and the caller should do
2899 * this. 2900 * this.
2900 * 2901 *
2901 * Assumptions: 2902 * Assumptions:
2902 * The PDQ has been reset and the adapter and driver maintained Type 2 2903 * The PDQ has been reset and the adapter and driver maintained Type 2
2903 * register indices are cleared. 2904 * register indices are cleared.
2904 * 2905 *
2905 * Side Effects: 2906 * Side Effects:
2906 * Receive buffers are posted to the adapter LLC queue and the adapter 2907 * Receive buffers are posted to the adapter LLC queue and the adapter
2907 * is notified. 2908 * is notified.
2908 */ 2909 */
2909 2910
2910 static int dfx_rcv_init(DFX_board_t *bp, int get_buffers) 2911 static int dfx_rcv_init(DFX_board_t *bp, int get_buffers)
2911 { 2912 {
2912 int i, j; /* used in for loop */ 2913 int i, j; /* used in for loop */
2913 2914
2914 /* 2915 /*
2915 * Since each receive buffer is a single fragment of same length, initialize 2916 * Since each receive buffer is a single fragment of same length, initialize
2916 * first longword in each receive descriptor for entire LLC Host descriptor 2917 * first longword in each receive descriptor for entire LLC Host descriptor
2917 * block. Also initialize second longword in each receive descriptor with 2918 * block. Also initialize second longword in each receive descriptor with
2918 * physical address of receive buffer. We'll always allocate receive 2919 * physical address of receive buffer. We'll always allocate receive
2919 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor 2920 * buffers in powers of 2 so that we can easily fill the 256 entry descriptor
2920 * block and produce new receive buffers by simply updating the receive 2921 * block and produce new receive buffers by simply updating the receive
2921 * producer index. 2922 * producer index.
2922 * 2923 *
2923 * Assumptions: 2924 * Assumptions:
2924 * To support all shipping versions of PDQ, the receive buffer size 2925 * To support all shipping versions of PDQ, the receive buffer size
2925 * must be mod 128 in length and the physical address must be 128 byte 2926 * must be mod 128 in length and the physical address must be 128 byte
2926 * aligned. In other words, bits 0-6 of the length and address must 2927 * aligned. In other words, bits 0-6 of the length and address must
2927 * be zero for the following descriptor field entries to be correct on 2928 * be zero for the following descriptor field entries to be correct on
2928 * all PDQ-based boards. We guaranteed both requirements during 2929 * all PDQ-based boards. We guaranteed both requirements during
2929 * driver initialization when we allocated memory for the receive buffers. 2930 * driver initialization when we allocated memory for the receive buffers.
2930 */ 2931 */
2931 2932
2932 if (get_buffers) { 2933 if (get_buffers) {
2933 #ifdef DYNAMIC_BUFFERS 2934 #ifdef DYNAMIC_BUFFERS
2934 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++) 2935 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
2935 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post) 2936 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2936 { 2937 {
2937 struct sk_buff *newskb = __dev_alloc_skb(NEW_SKB_SIZE, GFP_NOIO); 2938 struct sk_buff *newskb = __dev_alloc_skb(NEW_SKB_SIZE, GFP_NOIO);
2938 if (!newskb) 2939 if (!newskb)
2939 return -ENOMEM; 2940 return -ENOMEM;
2940 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP | 2941 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2941 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN)); 2942 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2942 /* 2943 /*
2943 * align to 128 bytes for compatibility with 2944 * align to 128 bytes for compatibility with
2944 * the old EISA boards. 2945 * the old EISA boards.
2945 */ 2946 */
2946 2947
2947 my_skb_align(newskb, 128); 2948 my_skb_align(newskb, 128);
2948 bp->descr_block_virt->rcv_data[i + j].long_1 = 2949 bp->descr_block_virt->rcv_data[i + j].long_1 =
2949 (u32)dma_map_single(bp->bus_dev, newskb->data, 2950 (u32)dma_map_single(bp->bus_dev, newskb->data,
2950 NEW_SKB_SIZE, 2951 NEW_SKB_SIZE,
2951 DMA_FROM_DEVICE); 2952 DMA_FROM_DEVICE);
2952 /* 2953 /*
2953 * p_rcv_buff_va is only used inside the 2954 * p_rcv_buff_va is only used inside the
2954 * kernel so we put the skb pointer here. 2955 * kernel so we put the skb pointer here.
2955 */ 2956 */
2956 bp->p_rcv_buff_va[i+j] = (char *) newskb; 2957 bp->p_rcv_buff_va[i+j] = (char *) newskb;
2957 } 2958 }
2958 #else 2959 #else
2959 for (i=0; i < (int)(bp->rcv_bufs_to_post); i++) 2960 for (i=0; i < (int)(bp->rcv_bufs_to_post); i++)
2960 for (j=0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post) 2961 for (j=0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
2961 { 2962 {
2962 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP | 2963 bp->descr_block_virt->rcv_data[i+j].long_0 = (u32) (PI_RCV_DESCR_M_SOP |
2963 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN)); 2964 ((PI_RCV_DATA_K_SIZE_MAX / PI_ALIGN_K_RCV_DATA_BUFF) << PI_RCV_DESCR_V_SEG_LEN));
2964 bp->descr_block_virt->rcv_data[i+j].long_1 = (u32) (bp->rcv_block_phys + (i * PI_RCV_DATA_K_SIZE_MAX)); 2965 bp->descr_block_virt->rcv_data[i+j].long_1 = (u32) (bp->rcv_block_phys + (i * PI_RCV_DATA_K_SIZE_MAX));
2965 bp->p_rcv_buff_va[i+j] = (char *) (bp->rcv_block_virt + (i * PI_RCV_DATA_K_SIZE_MAX)); 2966 bp->p_rcv_buff_va[i+j] = (char *) (bp->rcv_block_virt + (i * PI_RCV_DATA_K_SIZE_MAX));
2966 } 2967 }
2967 #endif 2968 #endif
2968 } 2969 }
2969 2970
2970 /* Update receive producer and Type 2 register */ 2971 /* Update receive producer and Type 2 register */
2971 2972
2972 bp->rcv_xmt_reg.index.rcv_prod = bp->rcv_bufs_to_post; 2973 bp->rcv_xmt_reg.index.rcv_prod = bp->rcv_bufs_to_post;
2973 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword); 2974 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
2974 return 0; 2975 return 0;
2975 } 2976 }
2976 2977
2977 2978
2978 /* 2979 /*
2979 * ========================= 2980 * =========================
2980 * = dfx_rcv_queue_process = 2981 * = dfx_rcv_queue_process =
2981 * ========================= 2982 * =========================
2982 * 2983 *
2983 * Overview: 2984 * Overview:
2984 * Process received LLC frames. 2985 * Process received LLC frames.
2985 * 2986 *
2986 * Returns: 2987 * Returns:
2987 * None 2988 * None
2988 * 2989 *
2989 * Arguments: 2990 * Arguments:
2990 * bp - pointer to board information 2991 * bp - pointer to board information
2991 * 2992 *
2992 * Functional Description: 2993 * Functional Description:
2993 * Received LLC frames are processed until there are no more consumed frames. 2994 * Received LLC frames are processed until there are no more consumed frames.
2994 * Once all frames are processed, the receive buffers are returned to the 2995 * Once all frames are processed, the receive buffers are returned to the
2995 * adapter. Note that this algorithm fixes the length of time that can be spent 2996 * adapter. Note that this algorithm fixes the length of time that can be spent
2996 * in this routine, because there are a fixed number of receive buffers to 2997 * in this routine, because there are a fixed number of receive buffers to
2997 * process and buffers are not produced until this routine exits and returns 2998 * process and buffers are not produced until this routine exits and returns
2998 * to the ISR. 2999 * to the ISR.
2999 * 3000 *
3000 * Return Codes: 3001 * Return Codes:
3001 * None 3002 * None
3002 * 3003 *
3003 * Assumptions: 3004 * Assumptions:
3004 * None 3005 * None
3005 * 3006 *
3006 * Side Effects: 3007 * Side Effects:
3007 * None 3008 * None
3008 */ 3009 */
3009 3010
3010 static void dfx_rcv_queue_process( 3011 static void dfx_rcv_queue_process(
3011 DFX_board_t *bp 3012 DFX_board_t *bp
3012 ) 3013 )
3013 3014
3014 { 3015 {
3015 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */ 3016 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3016 char *p_buff; /* ptr to start of packet receive buffer (FMC descriptor) */ 3017 char *p_buff; /* ptr to start of packet receive buffer (FMC descriptor) */
3017 u32 descr, pkt_len; /* FMC descriptor field and packet length */ 3018 u32 descr, pkt_len; /* FMC descriptor field and packet length */
3018 struct sk_buff *skb; /* pointer to a sk_buff to hold incoming packet data */ 3019 struct sk_buff *skb; /* pointer to a sk_buff to hold incoming packet data */
3019 3020
3020 /* Service all consumed LLC receive frames */ 3021 /* Service all consumed LLC receive frames */
3021 3022
3022 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data); 3023 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3023 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons) 3024 while (bp->rcv_xmt_reg.index.rcv_comp != p_type_2_cons->index.rcv_cons)
3024 { 3025 {
3025 /* Process any errors */ 3026 /* Process any errors */
3026 3027
3027 int entry; 3028 int entry;
3028 3029
3029 entry = bp->rcv_xmt_reg.index.rcv_comp; 3030 entry = bp->rcv_xmt_reg.index.rcv_comp;
3030 #ifdef DYNAMIC_BUFFERS 3031 #ifdef DYNAMIC_BUFFERS
3031 p_buff = (char *) (((struct sk_buff *)bp->p_rcv_buff_va[entry])->data); 3032 p_buff = (char *) (((struct sk_buff *)bp->p_rcv_buff_va[entry])->data);
3032 #else 3033 #else
3033 p_buff = (char *) bp->p_rcv_buff_va[entry]; 3034 p_buff = (char *) bp->p_rcv_buff_va[entry];
3034 #endif 3035 #endif
3035 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32)); 3036 memcpy(&descr, p_buff + RCV_BUFF_K_DESCR, sizeof(u32));
3036 3037
3037 if (descr & PI_FMC_DESCR_M_RCC_FLUSH) 3038 if (descr & PI_FMC_DESCR_M_RCC_FLUSH)
3038 { 3039 {
3039 if (descr & PI_FMC_DESCR_M_RCC_CRC) 3040 if (descr & PI_FMC_DESCR_M_RCC_CRC)
3040 bp->rcv_crc_errors++; 3041 bp->rcv_crc_errors++;
3041 else 3042 else
3042 bp->rcv_frame_status_errors++; 3043 bp->rcv_frame_status_errors++;
3043 } 3044 }
3044 else 3045 else
3045 { 3046 {
3046 int rx_in_place = 0; 3047 int rx_in_place = 0;
3047 3048
3048 /* The frame was received without errors - verify packet length */ 3049 /* The frame was received without errors - verify packet length */
3049 3050
3050 pkt_len = (u32)((descr & PI_FMC_DESCR_M_LEN) >> PI_FMC_DESCR_V_LEN); 3051 pkt_len = (u32)((descr & PI_FMC_DESCR_M_LEN) >> PI_FMC_DESCR_V_LEN);
3051 pkt_len -= 4; /* subtract 4 byte CRC */ 3052 pkt_len -= 4; /* subtract 4 byte CRC */
3052 if (!IN_RANGE(pkt_len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN)) 3053 if (!IN_RANGE(pkt_len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3053 bp->rcv_length_errors++; 3054 bp->rcv_length_errors++;
3054 else{ 3055 else{
3055 #ifdef DYNAMIC_BUFFERS 3056 #ifdef DYNAMIC_BUFFERS
3056 if (pkt_len > SKBUFF_RX_COPYBREAK) { 3057 if (pkt_len > SKBUFF_RX_COPYBREAK) {
3057 struct sk_buff *newskb; 3058 struct sk_buff *newskb;
3058 3059
3059 newskb = dev_alloc_skb(NEW_SKB_SIZE); 3060 newskb = dev_alloc_skb(NEW_SKB_SIZE);
3060 if (newskb){ 3061 if (newskb){
3061 rx_in_place = 1; 3062 rx_in_place = 1;
3062 3063
3063 my_skb_align(newskb, 128); 3064 my_skb_align(newskb, 128);
3064 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry]; 3065 skb = (struct sk_buff *)bp->p_rcv_buff_va[entry];
3065 dma_unmap_single(bp->bus_dev, 3066 dma_unmap_single(bp->bus_dev,
3066 bp->descr_block_virt->rcv_data[entry].long_1, 3067 bp->descr_block_virt->rcv_data[entry].long_1,
3067 NEW_SKB_SIZE, 3068 NEW_SKB_SIZE,
3068 DMA_FROM_DEVICE); 3069 DMA_FROM_DEVICE);
3069 skb_reserve(skb, RCV_BUFF_K_PADDING); 3070 skb_reserve(skb, RCV_BUFF_K_PADDING);
3070 bp->p_rcv_buff_va[entry] = (char *)newskb; 3071 bp->p_rcv_buff_va[entry] = (char *)newskb;
3071 bp->descr_block_virt->rcv_data[entry].long_1 = 3072 bp->descr_block_virt->rcv_data[entry].long_1 =
3072 (u32)dma_map_single(bp->bus_dev, 3073 (u32)dma_map_single(bp->bus_dev,
3073 newskb->data, 3074 newskb->data,
3074 NEW_SKB_SIZE, 3075 NEW_SKB_SIZE,
3075 DMA_FROM_DEVICE); 3076 DMA_FROM_DEVICE);
3076 } else 3077 } else
3077 skb = NULL; 3078 skb = NULL;
3078 } else 3079 } else
3079 #endif 3080 #endif
3080 skb = dev_alloc_skb(pkt_len+3); /* alloc new buffer to pass up, add room for PRH */ 3081 skb = dev_alloc_skb(pkt_len+3); /* alloc new buffer to pass up, add room for PRH */
3081 if (skb == NULL) 3082 if (skb == NULL)
3082 { 3083 {
3083 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp->dev->name); 3084 printk("%s: Could not allocate receive buffer. Dropping packet.\n", bp->dev->name);
3084 bp->rcv_discards++; 3085 bp->rcv_discards++;
3085 break; 3086 break;
3086 } 3087 }
3087 else { 3088 else {
3088 #ifndef DYNAMIC_BUFFERS 3089 #ifndef DYNAMIC_BUFFERS
3089 if (! rx_in_place) 3090 if (! rx_in_place)
3090 #endif 3091 #endif
3091 { 3092 {
3092 /* Receive buffer allocated, pass receive packet up */ 3093 /* Receive buffer allocated, pass receive packet up */
3093 3094
3094 skb_copy_to_linear_data(skb, 3095 skb_copy_to_linear_data(skb,
3095 p_buff + RCV_BUFF_K_PADDING, 3096 p_buff + RCV_BUFF_K_PADDING,
3096 pkt_len + 3); 3097 pkt_len + 3);
3097 } 3098 }
3098 3099
3099 skb_reserve(skb,3); /* adjust data field so that it points to FC byte */ 3100 skb_reserve(skb,3); /* adjust data field so that it points to FC byte */
3100 skb_put(skb, pkt_len); /* pass up packet length, NOT including CRC */ 3101 skb_put(skb, pkt_len); /* pass up packet length, NOT including CRC */
3101 skb->protocol = fddi_type_trans(skb, bp->dev); 3102 skb->protocol = fddi_type_trans(skb, bp->dev);
3102 bp->rcv_total_bytes += skb->len; 3103 bp->rcv_total_bytes += skb->len;
3103 netif_rx(skb); 3104 netif_rx(skb);
3104 3105
3105 /* Update the rcv counters */ 3106 /* Update the rcv counters */
3106 bp->dev->last_rx = jiffies; 3107 bp->dev->last_rx = jiffies;
3107 bp->rcv_total_frames++; 3108 bp->rcv_total_frames++;
3108 if (*(p_buff + RCV_BUFF_K_DA) & 0x01) 3109 if (*(p_buff + RCV_BUFF_K_DA) & 0x01)
3109 bp->rcv_multicast_frames++; 3110 bp->rcv_multicast_frames++;
3110 } 3111 }
3111 } 3112 }
3112 } 3113 }
3113 3114
3114 /* 3115 /*
3115 * Advance the producer (for recycling) and advance the completion 3116 * Advance the producer (for recycling) and advance the completion
3116 * (for servicing received frames). Note that it is okay to 3117 * (for servicing received frames). Note that it is okay to
3117 * advance the producer without checking that it passes the 3118 * advance the producer without checking that it passes the
3118 * completion index because they are both advanced at the same 3119 * completion index because they are both advanced at the same
3119 * rate. 3120 * rate.
3120 */ 3121 */
3121 3122
3122 bp->rcv_xmt_reg.index.rcv_prod += 1; 3123 bp->rcv_xmt_reg.index.rcv_prod += 1;
3123 bp->rcv_xmt_reg.index.rcv_comp += 1; 3124 bp->rcv_xmt_reg.index.rcv_comp += 1;
3124 } 3125 }
3125 } 3126 }
3126 3127
3127 3128
3128 /* 3129 /*
3129 * ===================== 3130 * =====================
3130 * = dfx_xmt_queue_pkt = 3131 * = dfx_xmt_queue_pkt =
3131 * ===================== 3132 * =====================
3132 * 3133 *
3133 * Overview: 3134 * Overview:
3134 * Queues packets for transmission 3135 * Queues packets for transmission
3135 * 3136 *
3136 * Returns: 3137 * Returns:
3137 * Condition code 3138 * Condition code
3138 * 3139 *
3139 * Arguments: 3140 * Arguments:
3140 * skb - pointer to sk_buff to queue for transmission 3141 * skb - pointer to sk_buff to queue for transmission
3141 * dev - pointer to device information 3142 * dev - pointer to device information
3142 * 3143 *
3143 * Functional Description: 3144 * Functional Description:
3144 * Here we assume that an incoming skb transmit request 3145 * Here we assume that an incoming skb transmit request
3145 * is contained in a single physically contiguous buffer 3146 * is contained in a single physically contiguous buffer
3146 * in which the virtual address of the start of packet 3147 * in which the virtual address of the start of packet
3147 * (skb->data) can be converted to a physical address 3148 * (skb->data) can be converted to a physical address
3148 * by using pci_map_single(). 3149 * by using pci_map_single().
3149 * 3150 *
3150 * Since the adapter architecture requires a three byte 3151 * Since the adapter architecture requires a three byte
3151 * packet request header to prepend the start of packet, 3152 * packet request header to prepend the start of packet,
3152 * we'll write the three byte field immediately prior to 3153 * we'll write the three byte field immediately prior to
3153 * the FC byte. This assumption is valid because we've 3154 * the FC byte. This assumption is valid because we've
3154 * ensured that dev->hard_header_len includes three pad 3155 * ensured that dev->hard_header_len includes three pad
3155 * bytes. By posting a single fragment to the adapter, 3156 * bytes. By posting a single fragment to the adapter,
3156 * we'll reduce the number of descriptor fetches and 3157 * we'll reduce the number of descriptor fetches and
3157 * bus traffic needed to send the request. 3158 * bus traffic needed to send the request.
3158 * 3159 *
3159 * Also, we can't free the skb until after it's been DMA'd 3160 * Also, we can't free the skb until after it's been DMA'd
3160 * out by the adapter, so we'll queue it in the driver and 3161 * out by the adapter, so we'll queue it in the driver and
3161 * return it in dfx_xmt_done. 3162 * return it in dfx_xmt_done.
3162 * 3163 *
3163 * Return Codes: 3164 * Return Codes:
3164 * 0 - driver queued packet, link is unavailable, or skbuff was bad 3165 * 0 - driver queued packet, link is unavailable, or skbuff was bad
3165 * 1 - caller should requeue the sk_buff for later transmission 3166 * 1 - caller should requeue the sk_buff for later transmission
3166 * 3167 *
3167 * Assumptions: 3168 * Assumptions:
3168 * First and foremost, we assume the incoming skb pointer 3169 * First and foremost, we assume the incoming skb pointer
3169 * is NOT NULL and is pointing to a valid sk_buff structure. 3170 * is NOT NULL and is pointing to a valid sk_buff structure.
3170 * 3171 *
3171 * The outgoing packet is complete, starting with the 3172 * The outgoing packet is complete, starting with the
3172 * frame control byte including the last byte of data, 3173 * frame control byte including the last byte of data,
3173 * but NOT including the 4 byte CRC. We'll let the 3174 * but NOT including the 4 byte CRC. We'll let the
3174 * adapter hardware generate and append the CRC. 3175 * adapter hardware generate and append the CRC.
3175 * 3176 *
3176 * The entire packet is stored in one physically 3177 * The entire packet is stored in one physically
3177 * contiguous buffer which is not cached and whose 3178 * contiguous buffer which is not cached and whose
3178 * 32-bit physical address can be determined. 3179 * 32-bit physical address can be determined.
3179 * 3180 *
3180 * It's vital that this routine is NOT reentered for the 3181 * It's vital that this routine is NOT reentered for the
3181 * same board and that the OS is not in another section of 3182 * same board and that the OS is not in another section of
3182 * code (eg. dfx_int_common) for the same board on a 3183 * code (eg. dfx_int_common) for the same board on a
3183 * different thread. 3184 * different thread.
3184 * 3185 *
3185 * Side Effects: 3186 * Side Effects:
3186 * None 3187 * None
3187 */ 3188 */
3188 3189
3189 static int dfx_xmt_queue_pkt( 3190 static int dfx_xmt_queue_pkt(
3190 struct sk_buff *skb, 3191 struct sk_buff *skb,
3191 struct net_device *dev 3192 struct net_device *dev
3192 ) 3193 )
3193 3194
3194 { 3195 {
3195 DFX_board_t *bp = netdev_priv(dev); 3196 DFX_board_t *bp = netdev_priv(dev);
3196 u8 prod; /* local transmit producer index */ 3197 u8 prod; /* local transmit producer index */
3197 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */ 3198 PI_XMT_DESCR *p_xmt_descr; /* ptr to transmit descriptor block entry */
3198 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */ 3199 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3199 unsigned long flags; 3200 unsigned long flags;
3200 3201
3201 netif_stop_queue(dev); 3202 netif_stop_queue(dev);
3202 3203
3203 /* 3204 /*
3204 * Verify that incoming transmit request is OK 3205 * Verify that incoming transmit request is OK
3205 * 3206 *
3206 * Note: The packet size check is consistent with other 3207 * Note: The packet size check is consistent with other
3207 * Linux device drivers, although the correct packet 3208 * Linux device drivers, although the correct packet
3208 * size should be verified before calling the 3209 * size should be verified before calling the
3209 * transmit routine. 3210 * transmit routine.
3210 */ 3211 */
3211 3212
3212 if (!IN_RANGE(skb->len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN)) 3213 if (!IN_RANGE(skb->len, FDDI_K_LLC_ZLEN, FDDI_K_LLC_LEN))
3213 { 3214 {
3214 printk("%s: Invalid packet length - %u bytes\n", 3215 printk("%s: Invalid packet length - %u bytes\n",
3215 dev->name, skb->len); 3216 dev->name, skb->len);
3216 bp->xmt_length_errors++; /* bump error counter */ 3217 bp->xmt_length_errors++; /* bump error counter */
3217 netif_wake_queue(dev); 3218 netif_wake_queue(dev);
3218 dev_kfree_skb(skb); 3219 dev_kfree_skb(skb);
3219 return(0); /* return "success" */ 3220 return(0); /* return "success" */
3220 } 3221 }
3221 /* 3222 /*
3222 * See if adapter link is available, if not, free buffer 3223 * See if adapter link is available, if not, free buffer
3223 * 3224 *
3224 * Note: If the link isn't available, free buffer and return 0 3225 * Note: If the link isn't available, free buffer and return 0
3225 * rather than tell the upper layer to requeue the packet. 3226 * rather than tell the upper layer to requeue the packet.
3226 * The methodology here is that by the time the link 3227 * The methodology here is that by the time the link
3227 * becomes available, the packet to be sent will be 3228 * becomes available, the packet to be sent will be
3228 * fairly stale. By simply dropping the packet, the 3229 * fairly stale. By simply dropping the packet, the
3229 * higher layer protocols will eventually time out 3230 * higher layer protocols will eventually time out
3230 * waiting for response packets which it won't receive. 3231 * waiting for response packets which it won't receive.
3231 */ 3232 */
3232 3233
3233 if (bp->link_available == PI_K_FALSE) 3234 if (bp->link_available == PI_K_FALSE)
3234 { 3235 {
3235 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_LINK_AVAIL) /* is link really available? */ 3236 if (dfx_hw_adap_state_rd(bp) == PI_STATE_K_LINK_AVAIL) /* is link really available? */
3236 bp->link_available = PI_K_TRUE; /* if so, set flag and continue */ 3237 bp->link_available = PI_K_TRUE; /* if so, set flag and continue */
3237 else 3238 else
3238 { 3239 {
3239 bp->xmt_discards++; /* bump error counter */ 3240 bp->xmt_discards++; /* bump error counter */
3240 dev_kfree_skb(skb); /* free sk_buff now */ 3241 dev_kfree_skb(skb); /* free sk_buff now */
3241 netif_wake_queue(dev); 3242 netif_wake_queue(dev);
3242 return(0); /* return "success" */ 3243 return(0); /* return "success" */
3243 } 3244 }
3244 } 3245 }
3245 3246
3246 spin_lock_irqsave(&bp->lock, flags); 3247 spin_lock_irqsave(&bp->lock, flags);
3247 3248
3248 /* Get the current producer and the next free xmt data descriptor */ 3249 /* Get the current producer and the next free xmt data descriptor */
3249 3250
3250 prod = bp->rcv_xmt_reg.index.xmt_prod; 3251 prod = bp->rcv_xmt_reg.index.xmt_prod;
3251 p_xmt_descr = &(bp->descr_block_virt->xmt_data[prod]); 3252 p_xmt_descr = &(bp->descr_block_virt->xmt_data[prod]);
3252 3253
3253 /* 3254 /*
3254 * Get pointer to auxiliary queue entry to contain information 3255 * Get pointer to auxiliary queue entry to contain information
3255 * for this packet. 3256 * for this packet.
3256 * 3257 *
3257 * Note: The current xmt producer index will become the 3258 * Note: The current xmt producer index will become the
3258 * current xmt completion index when we complete this 3259 * current xmt completion index when we complete this
3259 * packet later on. So, we'll get the pointer to the 3260 * packet later on. So, we'll get the pointer to the
3260 * next auxiliary queue entry now before we bump the 3261 * next auxiliary queue entry now before we bump the
3261 * producer index. 3262 * producer index.
3262 */ 3263 */
3263 3264
3264 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[prod++]); /* also bump producer index */ 3265 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[prod++]); /* also bump producer index */
3265 3266
3266 /* Write the three PRH bytes immediately before the FC byte */ 3267 /* Write the three PRH bytes immediately before the FC byte */
3267 3268
3268 skb_push(skb,3); 3269 skb_push(skb,3);
3269 skb->data[0] = DFX_PRH0_BYTE; /* these byte values are defined */ 3270 skb->data[0] = DFX_PRH0_BYTE; /* these byte values are defined */
3270 skb->data[1] = DFX_PRH1_BYTE; /* in the Motorola FDDI MAC chip */ 3271 skb->data[1] = DFX_PRH1_BYTE; /* in the Motorola FDDI MAC chip */
3271 skb->data[2] = DFX_PRH2_BYTE; /* specification */ 3272 skb->data[2] = DFX_PRH2_BYTE; /* specification */
3272 3273
3273 /* 3274 /*
3274 * Write the descriptor with buffer info and bump producer 3275 * Write the descriptor with buffer info and bump producer
3275 * 3276 *
3276 * Note: Since we need to start DMA from the packet request 3277 * Note: Since we need to start DMA from the packet request
3277 * header, we'll add 3 bytes to the DMA buffer length, 3278 * header, we'll add 3 bytes to the DMA buffer length,
3278 * and we'll determine the physical address of the 3279 * and we'll determine the physical address of the
3279 * buffer from the PRH, not skb->data. 3280 * buffer from the PRH, not skb->data.
3280 * 3281 *
3281 * Assumptions: 3282 * Assumptions:
3282 * 1. Packet starts with the frame control (FC) byte 3283 * 1. Packet starts with the frame control (FC) byte
3283 * at skb->data. 3284 * at skb->data.
3284 * 2. The 4-byte CRC is not appended to the buffer or 3285 * 2. The 4-byte CRC is not appended to the buffer or
3285 * included in the length. 3286 * included in the length.
3286 * 3. Packet length (skb->len) is from FC to end of 3287 * 3. Packet length (skb->len) is from FC to end of
3287 * data, inclusive. 3288 * data, inclusive.
3288 * 4. The packet length does not exceed the maximum 3289 * 4. The packet length does not exceed the maximum
3289 * FDDI LLC frame length of 4491 bytes. 3290 * FDDI LLC frame length of 4491 bytes.
3290 * 5. The entire packet is contained in a physically 3291 * 5. The entire packet is contained in a physically
3291 * contiguous, non-cached, locked memory space 3292 * contiguous, non-cached, locked memory space
3292 * comprised of a single buffer pointed to by 3293 * comprised of a single buffer pointed to by
3293 * skb->data. 3294 * skb->data.
3294 * 6. The physical address of the start of packet 3295 * 6. The physical address of the start of packet
3295 * can be determined from the virtual address 3296 * can be determined from the virtual address
3296 * by using pci_map_single() and is only 32-bits 3297 * by using pci_map_single() and is only 32-bits
3297 * wide. 3298 * wide.
3298 */ 3299 */
3299 3300
3300 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN)); 3301 p_xmt_descr->long_0 = (u32) (PI_XMT_DESCR_M_SOP | PI_XMT_DESCR_M_EOP | ((skb->len) << PI_XMT_DESCR_V_SEG_LEN));
3301 p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data, 3302 p_xmt_descr->long_1 = (u32)dma_map_single(bp->bus_dev, skb->data,
3302 skb->len, DMA_TO_DEVICE); 3303 skb->len, DMA_TO_DEVICE);
3303 3304
3304 /* 3305 /*
3305 * Verify that descriptor is actually available 3306 * Verify that descriptor is actually available
3306 * 3307 *
3307 * Note: If descriptor isn't available, return 1 which tells 3308 * Note: If descriptor isn't available, return 1 which tells
3308 * the upper layer to requeue the packet for later 3309 * the upper layer to requeue the packet for later
3309 * transmission. 3310 * transmission.
3310 * 3311 *
3311 * We need to ensure that the producer never reaches the 3312 * We need to ensure that the producer never reaches the
3312 * completion, except to indicate that the queue is empty. 3313 * completion, except to indicate that the queue is empty.
3313 */ 3314 */
3314 3315
3315 if (prod == bp->rcv_xmt_reg.index.xmt_comp) 3316 if (prod == bp->rcv_xmt_reg.index.xmt_comp)
3316 { 3317 {
3317 skb_pull(skb,3); 3318 skb_pull(skb,3);
3318 spin_unlock_irqrestore(&bp->lock, flags); 3319 spin_unlock_irqrestore(&bp->lock, flags);
3319 return(1); /* requeue packet for later */ 3320 return(1); /* requeue packet for later */
3320 } 3321 }
3321 3322
3322 /* 3323 /*
3323 * Save info for this packet for xmt done indication routine 3324 * Save info for this packet for xmt done indication routine
3324 * 3325 *
3325 * Normally, we'd save the producer index in the p_xmt_drv_descr 3326 * Normally, we'd save the producer index in the p_xmt_drv_descr
3326 * structure so that we'd have it handy when we complete this 3327 * structure so that we'd have it handy when we complete this
3327 * packet later (in dfx_xmt_done). However, since the current 3328 * packet later (in dfx_xmt_done). However, since the current
3328 * transmit architecture guarantees a single fragment for the 3329 * transmit architecture guarantees a single fragment for the
3329 * entire packet, we can simply bump the completion index by 3330 * entire packet, we can simply bump the completion index by
3330 * one (1) for each completed packet. 3331 * one (1) for each completed packet.
3331 * 3332 *
3332 * Note: If this assumption changes and we're presented with 3333 * Note: If this assumption changes and we're presented with
3333 * an inconsistent number of transmit fragments for packet 3334 * an inconsistent number of transmit fragments for packet
3334 * data, we'll need to modify this code to save the current 3335 * data, we'll need to modify this code to save the current
3335 * transmit producer index. 3336 * transmit producer index.
3336 */ 3337 */
3337 3338
3338 p_xmt_drv_descr->p_skb = skb; 3339 p_xmt_drv_descr->p_skb = skb;
3339 3340
3340 /* Update Type 2 register */ 3341 /* Update Type 2 register */
3341 3342
3342 bp->rcv_xmt_reg.index.xmt_prod = prod; 3343 bp->rcv_xmt_reg.index.xmt_prod = prod;
3343 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword); 3344 dfx_port_write_long(bp, PI_PDQ_K_REG_TYPE_2_PROD, bp->rcv_xmt_reg.lword);
3344 spin_unlock_irqrestore(&bp->lock, flags); 3345 spin_unlock_irqrestore(&bp->lock, flags);
3345 netif_wake_queue(dev); 3346 netif_wake_queue(dev);
3346 return(0); /* packet queued to adapter */ 3347 return(0); /* packet queued to adapter */
3347 } 3348 }
3348 3349
3349 3350
3350 /* 3351 /*
3351 * ================ 3352 * ================
3352 * = dfx_xmt_done = 3353 * = dfx_xmt_done =
3353 * ================ 3354 * ================
3354 * 3355 *
3355 * Overview: 3356 * Overview:
3356 * Processes all frames that have been transmitted. 3357 * Processes all frames that have been transmitted.
3357 * 3358 *
3358 * Returns: 3359 * Returns:
3359 * None 3360 * None
3360 * 3361 *
3361 * Arguments: 3362 * Arguments:
3362 * bp - pointer to board information 3363 * bp - pointer to board information
3363 * 3364 *
3364 * Functional Description: 3365 * Functional Description:
3365 * For all consumed transmit descriptors that have not 3366 * For all consumed transmit descriptors that have not
3366 * yet been completed, we'll free the skb we were holding 3367 * yet been completed, we'll free the skb we were holding
3367 * onto using dev_kfree_skb and bump the appropriate 3368 * onto using dev_kfree_skb and bump the appropriate
3368 * counters. 3369 * counters.
3369 * 3370 *
3370 * Return Codes: 3371 * Return Codes:
3371 * None 3372 * None
3372 * 3373 *
3373 * Assumptions: 3374 * Assumptions:
3374 * The Type 2 register is not updated in this routine. It is 3375 * The Type 2 register is not updated in this routine. It is
3375 * assumed that it will be updated in the ISR when dfx_xmt_done 3376 * assumed that it will be updated in the ISR when dfx_xmt_done
3376 * returns. 3377 * returns.
3377 * 3378 *
3378 * Side Effects: 3379 * Side Effects:
3379 * None 3380 * None
3380 */ 3381 */
3381 3382
3382 static int dfx_xmt_done(DFX_board_t *bp) 3383 static int dfx_xmt_done(DFX_board_t *bp)
3383 { 3384 {
3384 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */ 3385 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3385 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */ 3386 PI_TYPE_2_CONSUMER *p_type_2_cons; /* ptr to rcv/xmt consumer block register */
3386 u8 comp; /* local transmit completion index */ 3387 u8 comp; /* local transmit completion index */
3387 int freed = 0; /* buffers freed */ 3388 int freed = 0; /* buffers freed */
3388 3389
3389 /* Service all consumed transmit frames */ 3390 /* Service all consumed transmit frames */
3390 3391
3391 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data); 3392 p_type_2_cons = (PI_TYPE_2_CONSUMER *)(&bp->cons_block_virt->xmt_rcv_data);
3392 while (bp->rcv_xmt_reg.index.xmt_comp != p_type_2_cons->index.xmt_cons) 3393 while (bp->rcv_xmt_reg.index.xmt_comp != p_type_2_cons->index.xmt_cons)
3393 { 3394 {
3394 /* Get pointer to the transmit driver descriptor block information */ 3395 /* Get pointer to the transmit driver descriptor block information */
3395 3396
3396 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]); 3397 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3397 3398
3398 /* Increment transmit counters */ 3399 /* Increment transmit counters */
3399 3400
3400 bp->xmt_total_frames++; 3401 bp->xmt_total_frames++;
3401 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len; 3402 bp->xmt_total_bytes += p_xmt_drv_descr->p_skb->len;
3402 3403
3403 /* Return skb to operating system */ 3404 /* Return skb to operating system */
3404 comp = bp->rcv_xmt_reg.index.xmt_comp; 3405 comp = bp->rcv_xmt_reg.index.xmt_comp;
3405 dma_unmap_single(bp->bus_dev, 3406 dma_unmap_single(bp->bus_dev,
3406 bp->descr_block_virt->xmt_data[comp].long_1, 3407 bp->descr_block_virt->xmt_data[comp].long_1,
3407 p_xmt_drv_descr->p_skb->len, 3408 p_xmt_drv_descr->p_skb->len,
3408 DMA_TO_DEVICE); 3409 DMA_TO_DEVICE);
3409 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb); 3410 dev_kfree_skb_irq(p_xmt_drv_descr->p_skb);
3410 3411
3411 /* 3412 /*
3412 * Move to start of next packet by updating completion index 3413 * Move to start of next packet by updating completion index
3413 * 3414 *
3414 * Here we assume that a transmit packet request is always 3415 * Here we assume that a transmit packet request is always
3415 * serviced by posting one fragment. We can therefore 3416 * serviced by posting one fragment. We can therefore
3416 * simplify the completion code by incrementing the 3417 * simplify the completion code by incrementing the
3417 * completion index by one. This code will need to be 3418 * completion index by one. This code will need to be
3418 * modified if this assumption changes. See comments 3419 * modified if this assumption changes. See comments
3419 * in dfx_xmt_queue_pkt for more details. 3420 * in dfx_xmt_queue_pkt for more details.
3420 */ 3421 */
3421 3422
3422 bp->rcv_xmt_reg.index.xmt_comp += 1; 3423 bp->rcv_xmt_reg.index.xmt_comp += 1;
3423 freed++; 3424 freed++;
3424 } 3425 }
3425 return freed; 3426 return freed;
3426 } 3427 }
3427 3428
3428 3429
3429 /* 3430 /*
3430 * ================= 3431 * =================
3431 * = dfx_rcv_flush = 3432 * = dfx_rcv_flush =
3432 * ================= 3433 * =================
3433 * 3434 *
3434 * Overview: 3435 * Overview:
3435 * Remove all skb's in the receive ring. 3436 * Remove all skb's in the receive ring.
3436 * 3437 *
3437 * Returns: 3438 * Returns:
3438 * None 3439 * None
3439 * 3440 *
3440 * Arguments: 3441 * Arguments:
3441 * bp - pointer to board information 3442 * bp - pointer to board information
3442 * 3443 *
3443 * Functional Description: 3444 * Functional Description:
3444 * Free's all the dynamically allocated skb's that are 3445 * Free's all the dynamically allocated skb's that are
3445 * currently attached to the device receive ring. This 3446 * currently attached to the device receive ring. This
3446 * function is typically only used when the device is 3447 * function is typically only used when the device is
3447 * initialized or reinitialized. 3448 * initialized or reinitialized.
3448 * 3449 *
3449 * Return Codes: 3450 * Return Codes:
3450 * None 3451 * None
3451 * 3452 *
3452 * Side Effects: 3453 * Side Effects:
3453 * None 3454 * None
3454 */ 3455 */
3455 #ifdef DYNAMIC_BUFFERS 3456 #ifdef DYNAMIC_BUFFERS
3456 static void dfx_rcv_flush( DFX_board_t *bp ) 3457 static void dfx_rcv_flush( DFX_board_t *bp )
3457 { 3458 {
3458 int i, j; 3459 int i, j;
3459 3460
3460 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++) 3461 for (i = 0; i < (int)(bp->rcv_bufs_to_post); i++)
3461 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post) 3462 for (j = 0; (i + j) < (int)PI_RCV_DATA_K_NUM_ENTRIES; j += bp->rcv_bufs_to_post)
3462 { 3463 {
3463 struct sk_buff *skb; 3464 struct sk_buff *skb;
3464 skb = (struct sk_buff *)bp->p_rcv_buff_va[i+j]; 3465 skb = (struct sk_buff *)bp->p_rcv_buff_va[i+j];
3465 if (skb) 3466 if (skb)
3466 dev_kfree_skb(skb); 3467 dev_kfree_skb(skb);
3467 bp->p_rcv_buff_va[i+j] = NULL; 3468 bp->p_rcv_buff_va[i+j] = NULL;
3468 } 3469 }
3469 3470
3470 } 3471 }
3471 #else 3472 #else
3472 static inline void dfx_rcv_flush( DFX_board_t *bp ) 3473 static inline void dfx_rcv_flush( DFX_board_t *bp )
3473 { 3474 {
3474 } 3475 }
3475 #endif /* DYNAMIC_BUFFERS */ 3476 #endif /* DYNAMIC_BUFFERS */
3476 3477
3477 /* 3478 /*
3478 * ================= 3479 * =================
3479 * = dfx_xmt_flush = 3480 * = dfx_xmt_flush =
3480 * ================= 3481 * =================
3481 * 3482 *
3482 * Overview: 3483 * Overview:
3483 * Processes all frames whether they've been transmitted 3484 * Processes all frames whether they've been transmitted
3484 * or not. 3485 * or not.
3485 * 3486 *
3486 * Returns: 3487 * Returns:
3487 * None 3488 * None
3488 * 3489 *
3489 * Arguments: 3490 * Arguments:
3490 * bp - pointer to board information 3491 * bp - pointer to board information
3491 * 3492 *
3492 * Functional Description: 3493 * Functional Description:
3493 * For all produced transmit descriptors that have not 3494 * For all produced transmit descriptors that have not
3494 * yet been completed, we'll free the skb we were holding 3495 * yet been completed, we'll free the skb we were holding
3495 * onto using dev_kfree_skb and bump the appropriate 3496 * onto using dev_kfree_skb and bump the appropriate
3496 * counters. Of course, it's possible that some of 3497 * counters. Of course, it's possible that some of
3497 * these transmit requests actually did go out, but we 3498 * these transmit requests actually did go out, but we
3498 * won't make that distinction here. Finally, we'll 3499 * won't make that distinction here. Finally, we'll
3499 * update the consumer index to match the producer. 3500 * update the consumer index to match the producer.
3500 * 3501 *
3501 * Return Codes: 3502 * Return Codes:
3502 * None 3503 * None
3503 * 3504 *
3504 * Assumptions: 3505 * Assumptions:
3505 * This routine does NOT update the Type 2 register. It 3506 * This routine does NOT update the Type 2 register. It
3506 * is assumed that this routine is being called during a 3507 * is assumed that this routine is being called during a
3507 * transmit flush interrupt, or a shutdown or close routine. 3508 * transmit flush interrupt, or a shutdown or close routine.
3508 * 3509 *
3509 * Side Effects: 3510 * Side Effects:
3510 * None 3511 * None
3511 */ 3512 */
3512 3513
3513 static void dfx_xmt_flush( DFX_board_t *bp ) 3514 static void dfx_xmt_flush( DFX_board_t *bp )
3514 { 3515 {
3515 u32 prod_cons; /* rcv/xmt consumer block longword */ 3516 u32 prod_cons; /* rcv/xmt consumer block longword */
3516 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */ 3517 XMT_DRIVER_DESCR *p_xmt_drv_descr; /* ptr to transmit driver descriptor */
3517 u8 comp; /* local transmit completion index */ 3518 u8 comp; /* local transmit completion index */
3518 3519
3519 /* Flush all outstanding transmit frames */ 3520 /* Flush all outstanding transmit frames */
3520 3521
3521 while (bp->rcv_xmt_reg.index.xmt_comp != bp->rcv_xmt_reg.index.xmt_prod) 3522 while (bp->rcv_xmt_reg.index.xmt_comp != bp->rcv_xmt_reg.index.xmt_prod)
3522 { 3523 {
3523 /* Get pointer to the transmit driver descriptor block information */ 3524 /* Get pointer to the transmit driver descriptor block information */
3524 3525
3525 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]); 3526 p_xmt_drv_descr = &(bp->xmt_drv_descr_blk[bp->rcv_xmt_reg.index.xmt_comp]);
3526 3527
3527 /* Return skb to operating system */ 3528 /* Return skb to operating system */
3528 comp = bp->rcv_xmt_reg.index.xmt_comp; 3529 comp = bp->rcv_xmt_reg.index.xmt_comp;
3529 dma_unmap_single(bp->bus_dev, 3530 dma_unmap_single(bp->bus_dev,
3530 bp->descr_block_virt->xmt_data[comp].long_1, 3531 bp->descr_block_virt->xmt_data[comp].long_1,
3531 p_xmt_drv_descr->p_skb->len, 3532 p_xmt_drv_descr->p_skb->len,
3532 DMA_TO_DEVICE); 3533 DMA_TO_DEVICE);
3533 dev_kfree_skb(p_xmt_drv_descr->p_skb); 3534 dev_kfree_skb(p_xmt_drv_descr->p_skb);
3534 3535
3535 /* Increment transmit error counter */ 3536 /* Increment transmit error counter */
3536 3537
3537 bp->xmt_discards++; 3538 bp->xmt_discards++;
3538 3539
3539 /* 3540 /*
3540 * Move to start of next packet by updating completion index 3541 * Move to start of next packet by updating completion index
3541 * 3542 *
3542 * Here we assume that a transmit packet request is always 3543 * Here we assume that a transmit packet request is always
3543 * serviced by posting one fragment. We can therefore 3544 * serviced by posting one fragment. We can therefore
3544 * simplify the completion code by incrementing the 3545 * simplify the completion code by incrementing the
3545 * completion index by one. This code will need to be 3546 * completion index by one. This code will need to be
3546 * modified if this assumption changes. See comments 3547 * modified if this assumption changes. See comments
3547 * in dfx_xmt_queue_pkt for more details. 3548 * in dfx_xmt_queue_pkt for more details.
3548 */ 3549 */
3549 3550
3550 bp->rcv_xmt_reg.index.xmt_comp += 1; 3551 bp->rcv_xmt_reg.index.xmt_comp += 1;
3551 } 3552 }
3552 3553
3553 /* Update the transmit consumer index in the consumer block */ 3554 /* Update the transmit consumer index in the consumer block */
3554 3555
3555 prod_cons = (u32)(bp->cons_block_virt->xmt_rcv_data & ~PI_CONS_M_XMT_INDEX); 3556 prod_cons = (u32)(bp->cons_block_virt->xmt_rcv_data & ~PI_CONS_M_XMT_INDEX);
3556 prod_cons |= (u32)(bp->rcv_xmt_reg.index.xmt_prod << PI_CONS_V_XMT_INDEX); 3557 prod_cons |= (u32)(bp->rcv_xmt_reg.index.xmt_prod << PI_CONS_V_XMT_INDEX);
3557 bp->cons_block_virt->xmt_rcv_data = prod_cons; 3558 bp->cons_block_virt->xmt_rcv_data = prod_cons;
3558 } 3559 }
3559 3560
3560 /* 3561 /*
3561 * ================== 3562 * ==================
3562 * = dfx_unregister = 3563 * = dfx_unregister =
3563 * ================== 3564 * ==================
3564 * 3565 *
3565 * Overview: 3566 * Overview:
3566 * Shuts down an FDDI controller 3567 * Shuts down an FDDI controller
3567 * 3568 *
3568 * Returns: 3569 * Returns:
3569 * Condition code 3570 * Condition code
3570 * 3571 *
3571 * Arguments: 3572 * Arguments:
3572 * bdev - pointer to device information 3573 * bdev - pointer to device information
3573 * 3574 *
3574 * Functional Description: 3575 * Functional Description:
3575 * 3576 *
3576 * Return Codes: 3577 * Return Codes:
3577 * None 3578 * None
3578 * 3579 *
3579 * Assumptions: 3580 * Assumptions:
3580 * It compiles so it should work :-( (PCI cards do :-) 3581 * It compiles so it should work :-( (PCI cards do :-)
3581 * 3582 *
3582 * Side Effects: 3583 * Side Effects:
3583 * Device structures for FDDI adapters (fddi0, fddi1, etc) are 3584 * Device structures for FDDI adapters (fddi0, fddi1, etc) are
3584 * freed. 3585 * freed.
3585 */ 3586 */
3586 static void __devexit dfx_unregister(struct device *bdev) 3587 static void __devexit dfx_unregister(struct device *bdev)
3587 { 3588 {
3588 struct net_device *dev = dev_get_drvdata(bdev); 3589 struct net_device *dev = dev_get_drvdata(bdev);
3589 DFX_board_t *bp = netdev_priv(dev); 3590 DFX_board_t *bp = netdev_priv(dev);
3590 int dfx_bus_pci = DFX_BUS_PCI(bdev); 3591 int dfx_bus_pci = DFX_BUS_PCI(bdev);
3591 int dfx_bus_tc = DFX_BUS_TC(bdev); 3592 int dfx_bus_tc = DFX_BUS_TC(bdev);
3592 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc; 3593 int dfx_use_mmio = DFX_MMIO || dfx_bus_tc;
3593 resource_size_t bar_start = 0; /* pointer to port */ 3594 resource_size_t bar_start = 0; /* pointer to port */
3594 resource_size_t bar_len = 0; /* resource length */ 3595 resource_size_t bar_len = 0; /* resource length */
3595 int alloc_size; /* total buffer size used */ 3596 int alloc_size; /* total buffer size used */
3596 3597
3597 unregister_netdev(dev); 3598 unregister_netdev(dev);
3598 3599
3599 alloc_size = sizeof(PI_DESCR_BLOCK) + 3600 alloc_size = sizeof(PI_DESCR_BLOCK) +
3600 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX + 3601 PI_CMD_REQ_K_SIZE_MAX + PI_CMD_RSP_K_SIZE_MAX +
3601 #ifndef DYNAMIC_BUFFERS 3602 #ifndef DYNAMIC_BUFFERS
3602 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) + 3603 (bp->rcv_bufs_to_post * PI_RCV_DATA_K_SIZE_MAX) +
3603 #endif 3604 #endif
3604 sizeof(PI_CONSUMER_BLOCK) + 3605 sizeof(PI_CONSUMER_BLOCK) +
3605 (PI_ALIGN_K_DESC_BLK - 1); 3606 (PI_ALIGN_K_DESC_BLK - 1);
3606 if (bp->kmalloced) 3607 if (bp->kmalloced)
3607 dma_free_coherent(bdev, alloc_size, 3608 dma_free_coherent(bdev, alloc_size,
3608 bp->kmalloced, bp->kmalloced_dma); 3609 bp->kmalloced, bp->kmalloced_dma);
3609 3610
3610 dfx_bus_uninit(dev); 3611 dfx_bus_uninit(dev);
3611 3612
3612 dfx_get_bars(bdev, &bar_start, &bar_len); 3613 dfx_get_bars(bdev, &bar_start, &bar_len);
3613 if (dfx_use_mmio) { 3614 if (dfx_use_mmio) {
3614 iounmap(bp->base.mem); 3615 iounmap(bp->base.mem);
3615 release_mem_region(bar_start, bar_len); 3616 release_mem_region(bar_start, bar_len);
3616 } else 3617 } else
3617 release_region(bar_start, bar_len); 3618 release_region(bar_start, bar_len);
3618 3619
3619 if (dfx_bus_pci) 3620 if (dfx_bus_pci)
3620 pci_disable_device(to_pci_dev(bdev)); 3621 pci_disable_device(to_pci_dev(bdev));
3621 3622
3622 free_netdev(dev); 3623 free_netdev(dev);
3623 } 3624 }
3624 3625
3625 3626
3626 static int __devinit __unused dfx_dev_register(struct device *); 3627 static int __devinit __unused dfx_dev_register(struct device *);
3627 static int __devexit __unused dfx_dev_unregister(struct device *); 3628 static int __devexit __unused dfx_dev_unregister(struct device *);
3628 3629
3629 #ifdef CONFIG_PCI 3630 #ifdef CONFIG_PCI
3630 static int __devinit dfx_pci_register(struct pci_dev *, 3631 static int __devinit dfx_pci_register(struct pci_dev *,
3631 const struct pci_device_id *); 3632 const struct pci_device_id *);
3632 static void __devexit dfx_pci_unregister(struct pci_dev *); 3633 static void __devexit dfx_pci_unregister(struct pci_dev *);
3633 3634
3634 static struct pci_device_id dfx_pci_table[] = { 3635 static struct pci_device_id dfx_pci_table[] = {
3635 { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) }, 3636 { PCI_DEVICE(PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_FDDI) },
3636 { } 3637 { }
3637 }; 3638 };
3638 MODULE_DEVICE_TABLE(pci, dfx_pci_table); 3639 MODULE_DEVICE_TABLE(pci, dfx_pci_table);
3639 3640
3640 static struct pci_driver dfx_pci_driver = { 3641 static struct pci_driver dfx_pci_driver = {
3641 .name = "defxx", 3642 .name = "defxx",
3642 .id_table = dfx_pci_table, 3643 .id_table = dfx_pci_table,
3643 .probe = dfx_pci_register, 3644 .probe = dfx_pci_register,
3644 .remove = __devexit_p(dfx_pci_unregister), 3645 .remove = __devexit_p(dfx_pci_unregister),
3645 }; 3646 };
3646 3647
3647 static __devinit int dfx_pci_register(struct pci_dev *pdev, 3648 static __devinit int dfx_pci_register(struct pci_dev *pdev,
3648 const struct pci_device_id *ent) 3649 const struct pci_device_id *ent)
3649 { 3650 {
3650 return dfx_register(&pdev->dev); 3651 return dfx_register(&pdev->dev);
3651 } 3652 }
3652 3653
3653 static void __devexit dfx_pci_unregister(struct pci_dev *pdev) 3654 static void __devexit dfx_pci_unregister(struct pci_dev *pdev)
3654 { 3655 {
3655 dfx_unregister(&pdev->dev); 3656 dfx_unregister(&pdev->dev);
3656 } 3657 }
3657 #endif /* CONFIG_PCI */ 3658 #endif /* CONFIG_PCI */
3658 3659
3659 #ifdef CONFIG_EISA 3660 #ifdef CONFIG_EISA
3660 static struct eisa_device_id dfx_eisa_table[] = { 3661 static struct eisa_device_id dfx_eisa_table[] = {
3661 { "DEC3001", DEFEA_PROD_ID_1 }, 3662 { "DEC3001", DEFEA_PROD_ID_1 },
3662 { "DEC3002", DEFEA_PROD_ID_2 }, 3663 { "DEC3002", DEFEA_PROD_ID_2 },
3663 { "DEC3003", DEFEA_PROD_ID_3 }, 3664 { "DEC3003", DEFEA_PROD_ID_3 },
3664 { "DEC3004", DEFEA_PROD_ID_4 }, 3665 { "DEC3004", DEFEA_PROD_ID_4 },
3665 { } 3666 { }
3666 }; 3667 };
3667 MODULE_DEVICE_TABLE(eisa, dfx_eisa_table); 3668 MODULE_DEVICE_TABLE(eisa, dfx_eisa_table);
3668 3669
3669 static struct eisa_driver dfx_eisa_driver = { 3670 static struct eisa_driver dfx_eisa_driver = {
3670 .id_table = dfx_eisa_table, 3671 .id_table = dfx_eisa_table,
3671 .driver = { 3672 .driver = {
3672 .name = "defxx", 3673 .name = "defxx",
3673 .bus = &eisa_bus_type, 3674 .bus = &eisa_bus_type,
3674 .probe = dfx_dev_register, 3675 .probe = dfx_dev_register,
3675 .remove = __devexit_p(dfx_dev_unregister), 3676 .remove = __devexit_p(dfx_dev_unregister),
3676 }, 3677 },
3677 }; 3678 };
3678 #endif /* CONFIG_EISA */ 3679 #endif /* CONFIG_EISA */
3679 3680
3680 #ifdef CONFIG_TC 3681 #ifdef CONFIG_TC
3681 static struct tc_device_id const dfx_tc_table[] = { 3682 static struct tc_device_id const dfx_tc_table[] = {
3682 { "DEC ", "PMAF-FA " }, 3683 { "DEC ", "PMAF-FA " },
3683 { "DEC ", "PMAF-FD " }, 3684 { "DEC ", "PMAF-FD " },
3684 { "DEC ", "PMAF-FS " }, 3685 { "DEC ", "PMAF-FS " },
3685 { "DEC ", "PMAF-FU " }, 3686 { "DEC ", "PMAF-FU " },
3686 { } 3687 { }
3687 }; 3688 };
3688 MODULE_DEVICE_TABLE(tc, dfx_tc_table); 3689 MODULE_DEVICE_TABLE(tc, dfx_tc_table);
3689 3690
3690 static struct tc_driver dfx_tc_driver = { 3691 static struct tc_driver dfx_tc_driver = {
3691 .id_table = dfx_tc_table, 3692 .id_table = dfx_tc_table,
3692 .driver = { 3693 .driver = {
3693 .name = "defxx", 3694 .name = "defxx",
3694 .bus = &tc_bus_type, 3695 .bus = &tc_bus_type,
3695 .probe = dfx_dev_register, 3696 .probe = dfx_dev_register,
3696 .remove = __devexit_p(dfx_dev_unregister), 3697 .remove = __devexit_p(dfx_dev_unregister),
3697 }, 3698 },
3698 }; 3699 };
3699 #endif /* CONFIG_TC */ 3700 #endif /* CONFIG_TC */
3700 3701
3701 static int __devinit __unused dfx_dev_register(struct device *dev) 3702 static int __devinit __unused dfx_dev_register(struct device *dev)
3702 { 3703 {
3703 int status; 3704 int status;
3704 3705
3705 status = dfx_register(dev); 3706 status = dfx_register(dev);
3706 if (!status) 3707 if (!status)
3707 get_device(dev); 3708 get_device(dev);
3708 return status; 3709 return status;
3709 } 3710 }
3710 3711
3711 static int __devexit __unused dfx_dev_unregister(struct device *dev) 3712 static int __devexit __unused dfx_dev_unregister(struct device *dev)
3712 { 3713 {
3713 put_device(dev); 3714 put_device(dev);
3714 dfx_unregister(dev); 3715 dfx_unregister(dev);
3715 return 0; 3716 return 0;
3716 } 3717 }
3717 3718
3718 3719
3719 static int __devinit dfx_init(void) 3720 static int __devinit dfx_init(void)
3720 { 3721 {
3721 int status; 3722 int status;
3722 3723
3723 status = pci_register_driver(&dfx_pci_driver); 3724 status = pci_register_driver(&dfx_pci_driver);
3724 if (!status) 3725 if (!status)
3725 status = eisa_driver_register(&dfx_eisa_driver); 3726 status = eisa_driver_register(&dfx_eisa_driver);
3726 if (!status) 3727 if (!status)
3727 status = tc_register_driver(&dfx_tc_driver); 3728 status = tc_register_driver(&dfx_tc_driver);
3728 return status; 3729 return status;
3729 } 3730 }
3730 3731
3731 static void __devexit dfx_cleanup(void) 3732 static void __devexit dfx_cleanup(void)
3732 { 3733 {
3733 tc_unregister_driver(&dfx_tc_driver); 3734 tc_unregister_driver(&dfx_tc_driver);
3734 eisa_driver_unregister(&dfx_eisa_driver); 3735 eisa_driver_unregister(&dfx_eisa_driver);
3735 pci_unregister_driver(&dfx_pci_driver); 3736 pci_unregister_driver(&dfx_pci_driver);
3736 } 3737 }
3737 3738
3738 module_init(dfx_init); 3739 module_init(dfx_init);
3739 module_exit(dfx_cleanup); 3740 module_exit(dfx_cleanup);
3740 MODULE_AUTHOR("Lawrence V. Stefani"); 3741 MODULE_AUTHOR("Lawrence V. Stefani");
3741 MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver " 3742 MODULE_DESCRIPTION("DEC FDDIcontroller TC/EISA/PCI (DEFTA/DEFEA/DEFPA) driver "
3742 DRV_VERSION " " DRV_RELDATE); 3743 DRV_VERSION " " DRV_RELDATE);
3743 MODULE_LICENSE("GPL"); 3744 MODULE_LICENSE("GPL");
3744 3745
3745 3746
3746 /* 3747 /*
3747 * Local variables: 3748 * Local variables:
3748 * kernel-compile-command: "gcc -D__KERNEL__ -I/root/linux/include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -c defxx.c" 3749 * kernel-compile-command: "gcc -D__KERNEL__ -I/root/linux/include -Wall -Wstrict-prototypes -O2 -pipe -fomit-frame-pointer -fno-strength-reduce -m486 -malign-loops=2 -malign-jumps=2 -malign-functions=2 -c defxx.c"
3749 * End: 3750 * End:
3750 */ 3751 */
3751 3752