Eric Lee / linux-smarc-t335x-v3.2

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/*

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/*

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* linux/drivers/char/8250.c

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* linux/drivers/char/8250.c

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*

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*

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* Driver for 8250/16550-type serial ports

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* Driver for 8250/16550-type serial ports

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*

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*

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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.

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* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.

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*

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*

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*

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*

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* This program is free software; you can redistribute it and/or modify

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* This program is free software; you can redistribute it and/or modify

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* it under the terms of the GNU General Public License as published by

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* it under the terms of the GNU General Public License as published by

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* the Free Software Foundation; either version 2 of the License, or

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* the Free Software Foundation; either version 2 of the License, or

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* (at your option) any later version.

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* (at your option) any later version.

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*

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*

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* A note about mapbase / membase

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* A note about mapbase / membase

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*

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*

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* mapbase is the physical address of the IO port.

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* mapbase is the physical address of the IO port.

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* membase is an 'ioremapped' cookie.

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* membase is an 'ioremapped' cookie.

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*/

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*/

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#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)

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#define SUPPORT_SYSRQ

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#define SUPPORT_SYSRQ

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#endif

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#endif

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#include <linux/module.h>

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#include <linux/module.h>

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#include <linux/moduleparam.h>

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#include <linux/moduleparam.h>

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#include <linux/ioport.h>

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#include <linux/ioport.h>

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#include <linux/init.h>

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#include <linux/init.h>

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#include <linux/console.h>

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#include <linux/console.h>

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#include <linux/sysrq.h>

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#include <linux/sysrq.h>

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#include <linux/delay.h>

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#include <linux/delay.h>

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#include <linux/platform_device.h>

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#include <linux/platform_device.h>

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#include <linux/tty.h>

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#include <linux/tty.h>

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#include <linux/tty_flip.h>

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#include <linux/tty_flip.h>

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#include <linux/serial_reg.h>

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#include <linux/serial_reg.h>

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#include <linux/serial_core.h>

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#include <linux/serial_core.h>

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#include <linux/serial.h>

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#include <linux/serial.h>

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#include <linux/serial_8250.h>

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#include <linux/serial_8250.h>

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#include <linux/nmi.h>

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#include <linux/nmi.h>

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#include <linux/mutex.h>

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#include <linux/mutex.h>

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#include <asm/io.h>

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#include <asm/io.h>

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#include <asm/irq.h>

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#include <asm/irq.h>

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#include "8250.h"

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#include "8250.h"

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#ifdef CONFIG_SPARC

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#ifdef CONFIG_SPARC

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#include "suncore.h"

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#include "suncore.h"

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#endif

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#endif

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/*

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/*

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* Configuration:

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* Configuration:

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* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option

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* share_irqs - whether we pass IRQF_SHARED to request_irq(). This option

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* is unsafe when used on edge-triggered interrupts.

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* is unsafe when used on edge-triggered interrupts.

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*/

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*/

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static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;

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static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;

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static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;

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static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;

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static struct uart_driver serial8250_reg;

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static struct uart_driver serial8250_reg;

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static int serial_index(struct uart_port *port)

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static int serial_index(struct uart_port *port)

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{

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{

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return (serial8250_reg.minor - 64) + port->line;

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return (serial8250_reg.minor - 64) + port->line;

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}

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}

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/*

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/*

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* Debugging.

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* Debugging.

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*/

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*/

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#if 0

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#if 0

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#define DEBUG_AUTOCONF(fmt...) printk(fmt)

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#define DEBUG_AUTOCONF(fmt...) printk(fmt)

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#else

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#else

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#define DEBUG_AUTOCONF(fmt...) do { } while (0)

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#define DEBUG_AUTOCONF(fmt...) do { } while (0)

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#endif

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#endif

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#if 0

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#if 0

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#define DEBUG_INTR(fmt...) printk(fmt)

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#define DEBUG_INTR(fmt...) printk(fmt)

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#else

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#else

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#define DEBUG_INTR(fmt...) do { } while (0)

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#define DEBUG_INTR(fmt...) do { } while (0)

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#endif

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#endif

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#define PASS_LIMIT 256

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#define PASS_LIMIT 256

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/*

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/*

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* We default to IRQ0 for the "no irq" hack. Some

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* We default to IRQ0 for the "no irq" hack. Some

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* machine types want others as well - they're free

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* machine types want others as well - they're free

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* to redefine this in their header file.

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* to redefine this in their header file.

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*/

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*/

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#define is_real_interrupt(irq) ((irq) != 0)

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#define is_real_interrupt(irq) ((irq) != 0)

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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ

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#ifdef CONFIG_SERIAL_8250_DETECT_IRQ

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#define CONFIG_SERIAL_DETECT_IRQ 1

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#define CONFIG_SERIAL_DETECT_IRQ 1

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#endif

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#endif

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#ifdef CONFIG_SERIAL_8250_MANY_PORTS

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#ifdef CONFIG_SERIAL_8250_MANY_PORTS

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#define CONFIG_SERIAL_MANY_PORTS 1

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#define CONFIG_SERIAL_MANY_PORTS 1

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#endif

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#endif

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/*

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/*

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* HUB6 is always on. This will be removed once the header

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* HUB6 is always on. This will be removed once the header

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* files have been cleaned.

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* files have been cleaned.

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*/

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*/

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#define CONFIG_HUB6 1

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#define CONFIG_HUB6 1

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#include <asm/serial.h>

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#include <asm/serial.h>

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/*

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/*

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* SERIAL_PORT_DFNS tells us about built-in ports that have no

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* SERIAL_PORT_DFNS tells us about built-in ports that have no

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* standard enumeration mechanism. Platforms that can find all

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* standard enumeration mechanism. Platforms that can find all

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* serial ports via mechanisms like ACPI or PCI need not supply it.

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* serial ports via mechanisms like ACPI or PCI need not supply it.

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*/

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*/

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#ifndef SERIAL_PORT_DFNS

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#ifndef SERIAL_PORT_DFNS

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#define SERIAL_PORT_DFNS

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#define SERIAL_PORT_DFNS

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#endif

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#endif

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static const struct old_serial_port old_serial_port[] = {

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static const struct old_serial_port old_serial_port[] = {

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SERIAL_PORT_DFNS /* defined in asm/serial.h */

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SERIAL_PORT_DFNS /* defined in asm/serial.h */

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};

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};

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#define UART_NR CONFIG_SERIAL_8250_NR_UARTS

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#define UART_NR CONFIG_SERIAL_8250_NR_UARTS

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#ifdef CONFIG_SERIAL_8250_RSA

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#ifdef CONFIG_SERIAL_8250_RSA

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#define PORT_RSA_MAX 4

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#define PORT_RSA_MAX 4

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static unsigned long probe_rsa[PORT_RSA_MAX];

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static unsigned long probe_rsa[PORT_RSA_MAX];

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static unsigned int probe_rsa_count;

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static unsigned int probe_rsa_count;

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#endif /* CONFIG_SERIAL_8250_RSA */

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#endif /* CONFIG_SERIAL_8250_RSA */

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struct uart_8250_port {

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struct uart_8250_port {

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struct uart_port port;

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struct uart_port port;

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struct timer_list timer; /* "no irq" timer */

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struct timer_list timer; /* "no irq" timer */

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struct list_head list; /* ports on this IRQ */

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struct list_head list; /* ports on this IRQ */

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unsigned short capabilities; /* port capabilities */

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unsigned short capabilities; /* port capabilities */

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unsigned short bugs; /* port bugs */

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unsigned short bugs; /* port bugs */

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unsigned int tx_loadsz; /* transmit fifo load size */

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unsigned int tx_loadsz; /* transmit fifo load size */

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unsigned char acr;

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unsigned char acr;

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unsigned char ier;

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unsigned char ier;

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unsigned char lcr;

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unsigned char lcr;

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unsigned char mcr;

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unsigned char mcr;

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unsigned char mcr_mask; /* mask of user bits */

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unsigned char mcr_mask; /* mask of user bits */

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unsigned char mcr_force; /* mask of forced bits */

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unsigned char mcr_force; /* mask of forced bits */

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/*

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/*

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* Some bits in registers are cleared on a read, so they must

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* Some bits in registers are cleared on a read, so they must

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* be saved whenever the register is read but the bits will not

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* be saved whenever the register is read but the bits will not

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* be immediately processed.

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* be immediately processed.

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*/

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*/

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#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS

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#define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS

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unsigned char lsr_saved_flags;

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unsigned char lsr_saved_flags;

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#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA

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#define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA

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unsigned char msr_saved_flags;

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unsigned char msr_saved_flags;

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/*

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/*

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* We provide a per-port pm hook.

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* We provide a per-port pm hook.

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*/

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*/

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void (*pm)(struct uart_port *port,

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void (*pm)(struct uart_port *port,

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unsigned int state, unsigned int old);

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unsigned int state, unsigned int old);

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};

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};

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struct irq_info {

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struct irq_info {

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struct hlist_node node;

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struct hlist_node node;

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int irq;

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int irq;

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spinlock_t lock; /* Protects list not the hash */

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spinlock_t lock; /* Protects list not the hash */

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struct list_head *head;

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struct list_head *head;

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};

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};

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#define NR_IRQ_HASH 32 /* Can be adjusted later */

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#define NR_IRQ_HASH 32 /* Can be adjusted later */

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static struct hlist_head irq_lists[NR_IRQ_HASH];

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static struct hlist_head irq_lists[NR_IRQ_HASH];

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static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */

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static DEFINE_MUTEX(hash_mutex); /* Used to walk the hash */

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/*

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/*

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* Here we define the default xmit fifo size used for each type of UART.

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* Here we define the default xmit fifo size used for each type of UART.

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*/

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*/

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static const struct serial8250_config uart_config[] = {

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static const struct serial8250_config uart_config[] = {

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[PORT_UNKNOWN] = {

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[PORT_UNKNOWN] = {

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.name = "unknown",

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.name = "unknown",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_8250] = {

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[PORT_8250] = {

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.name = "8250",

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.name = "8250",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16450] = {

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[PORT_16450] = {

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.name = "16450",

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.name = "16450",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16550] = {

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[PORT_16550] = {

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.name = "16550",

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.name = "16550",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16550A] = {

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[PORT_16550A] = {

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.name = "16550A",

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.name = "16550A",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_CIRRUS] = {

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[PORT_CIRRUS] = {

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.name = "Cirrus",

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.name = "Cirrus",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16650] = {

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[PORT_16650] = {

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.name = "ST16650",

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.name = "ST16650",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16650V2] = {

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[PORT_16650V2] = {

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.name = "ST16650V2",

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.name = "ST16650V2",

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.fifo_size = 32,

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.fifo_size = 32,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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UART_FCR_T_TRIG_00,

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UART_FCR_T_TRIG_00,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16750] = {

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[PORT_16750] = {

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.name = "TI16750",

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.name = "TI16750",

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.fifo_size = 64,

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.fifo_size = 64,

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.tx_loadsz = 64,

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.tx_loadsz = 64,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |

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UART_FCR7_64BYTE,

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UART_FCR7_64BYTE,

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.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,

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.flags = UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,

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},

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},

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[PORT_STARTECH] = {

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[PORT_STARTECH] = {

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.name = "Startech",

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.name = "Startech",

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.fifo_size = 1,

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.fifo_size = 1,

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.tx_loadsz = 1,

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.tx_loadsz = 1,

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},

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},

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[PORT_16C950] = {

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[PORT_16C950] = {

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.name = "16C950/954",

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.name = "16C950/954",

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.fifo_size = 128,

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.fifo_size = 128,

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.tx_loadsz = 128,

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.tx_loadsz = 128,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_16654] = {

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[PORT_16654] = {

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.name = "ST16654",

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.name = "ST16654",

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.fifo_size = 64,

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.fifo_size = 64,

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.tx_loadsz = 32,

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.tx_loadsz = 32,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |

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UART_FCR_T_TRIG_10,

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UART_FCR_T_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_16850] = {

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[PORT_16850] = {

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.name = "XR16850",

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.name = "XR16850",

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.fifo_size = 128,

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.fifo_size = 128,

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.tx_loadsz = 128,

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.tx_loadsz = 128,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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.flags = UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,

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},

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},

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[PORT_RSA] = {

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[PORT_RSA] = {

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.name = "RSA",

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.name = "RSA",

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.fifo_size = 2048,

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.fifo_size = 2048,

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.tx_loadsz = 2048,

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.tx_loadsz = 2048,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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[PORT_NS16550A] = {

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[PORT_NS16550A] = {

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.name = "NS16550A",

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.name = "NS16550A",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_NATSEMI,

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.flags = UART_CAP_FIFO | UART_NATSEMI,

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},

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},

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[PORT_XSCALE] = {

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[PORT_XSCALE] = {

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.name = "XScale",

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.name = "XScale",

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.fifo_size = 32,

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.fifo_size = 32,

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.tx_loadsz = 32,

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.tx_loadsz = 32,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO | UART_CAP_UUE,

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.flags = UART_CAP_FIFO | UART_CAP_UUE,

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},

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},

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[PORT_RM9000] = {

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[PORT_RM9000] = {

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.name = "RM9000",

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.name = "RM9000",

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.fifo_size = 16,

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.fifo_size = 16,

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.tx_loadsz = 16,

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.tx_loadsz = 16,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.fcr = UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,

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.flags = UART_CAP_FIFO,

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.flags = UART_CAP_FIFO,

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},

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},

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};

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};

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#if defined (CONFIG_SERIAL_8250_AU1X00)

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#if defined (CONFIG_SERIAL_8250_AU1X00)

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/* Au1x00 UART hardware has a weird register layout */

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/* Au1x00 UART hardware has a weird register layout */

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static const u8 au_io_in_map[] = {

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static const u8 au_io_in_map[] = {

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[UART_RX] = 0,

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[UART_RX] = 0,

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[UART_IER] = 2,

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[UART_IER] = 2,

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[UART_IIR] = 3,

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[UART_IIR] = 3,

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[UART_LCR] = 5,

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[UART_LCR] = 5,

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[UART_MCR] = 6,

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[UART_MCR] = 6,

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[UART_LSR] = 7,

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[UART_LSR] = 7,

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[UART_MSR] = 8,

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[UART_MSR] = 8,

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};

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};

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static const u8 au_io_out_map[] = {

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static const u8 au_io_out_map[] = {

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[UART_TX] = 1,

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[UART_TX] = 1,

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[UART_IER] = 2,

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[UART_IER] = 2,

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[UART_FCR] = 4,

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[UART_FCR] = 4,

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[UART_LCR] = 5,

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[UART_LCR] = 5,

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[UART_MCR] = 6,

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[UART_MCR] = 6,

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};

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};

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/* sane hardware needs no mapping */

305

/* sane hardware needs no mapping */

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static inline int map_8250_in_reg(struct uart_port *p, int offset)

306

static inline int map_8250_in_reg(struct uart_port *p, int offset)

307

{

307

{

308

if (p->iotype != UPIO_AU)

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if (p->iotype != UPIO_AU)

309

return offset;

309

return offset;

310

return au_io_in_map[offset];

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return au_io_in_map[offset];

311

}

311

}

312

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static inline int map_8250_out_reg(struct uart_port *p, int offset)

313

static inline int map_8250_out_reg(struct uart_port *p, int offset)

314

{

314

{

315

if (p->iotype != UPIO_AU)

315

if (p->iotype != UPIO_AU)

316

return offset;

316

return offset;

317

return au_io_out_map[offset];

317

return au_io_out_map[offset];

318

}

318

}

319

320

#elif defined(CONFIG_SERIAL_8250_RM9K)

320

#elif defined(CONFIG_SERIAL_8250_RM9K)

321

322

static const u8

322

static const u8

323

regmap_in[8] = {

323

regmap_in[8] = {

324

[UART_RX] = 0x00,

324

[UART_RX] = 0x00,

325

[UART_IER] = 0x0c,

325

[UART_IER] = 0x0c,

326

[UART_IIR] = 0x14,

326

[UART_IIR] = 0x14,

327

[UART_LCR] = 0x1c,

327

[UART_LCR] = 0x1c,

328

[UART_MCR] = 0x20,

328

[UART_MCR] = 0x20,

329

[UART_LSR] = 0x24,

329

[UART_LSR] = 0x24,

330

[UART_MSR] = 0x28,

330

[UART_MSR] = 0x28,

331

[UART_SCR] = 0x2c

331

[UART_SCR] = 0x2c

332

},

332

},

333

regmap_out[8] = {

333

regmap_out[8] = {

334

[UART_TX] = 0x04,

334

[UART_TX] = 0x04,

335

[UART_IER] = 0x0c,

335

[UART_IER] = 0x0c,

336

[UART_FCR] = 0x18,

336

[UART_FCR] = 0x18,

337

[UART_LCR] = 0x1c,

337

[UART_LCR] = 0x1c,

338

[UART_MCR] = 0x20,

338

[UART_MCR] = 0x20,

339

[UART_LSR] = 0x24,

339

[UART_LSR] = 0x24,

340

[UART_MSR] = 0x28,

340

[UART_MSR] = 0x28,

341

[UART_SCR] = 0x2c

341

[UART_SCR] = 0x2c

342

};

342

};

343

344

static inline int map_8250_in_reg(struct uart_port *p, int offset)

344

static inline int map_8250_in_reg(struct uart_port *p, int offset)

345

{

345

{

346

if (p->iotype != UPIO_RM9000)

346

if (p->iotype != UPIO_RM9000)

347

return offset;

347

return offset;

348

return regmap_in[offset];

348

return regmap_in[offset];

349

}

349

}

350

351

static inline int map_8250_out_reg(struct uart_port *p, int offset)

351

static inline int map_8250_out_reg(struct uart_port *p, int offset)

352

{

352

{

353

if (p->iotype != UPIO_RM9000)

353

if (p->iotype != UPIO_RM9000)

354

return offset;

354

return offset;

355

return regmap_out[offset];

355

return regmap_out[offset];

356

}

356

}

357

358

#else

358

#else

359

360

/* sane hardware needs no mapping */

360

/* sane hardware needs no mapping */

361

#define map_8250_in_reg(up, offset) (offset)

361

#define map_8250_in_reg(up, offset) (offset)

362

#define map_8250_out_reg(up, offset) (offset)

362

#define map_8250_out_reg(up, offset) (offset)

363

364

#endif

364

#endif

365

366

static unsigned int hub6_serial_in(struct uart_port *p, int offset)

366

static unsigned int hub6_serial_in(struct uart_port *p, int offset)

367

{

367

{

368

offset = map_8250_in_reg(p, offset) << p->regshift;

368

offset = map_8250_in_reg(p, offset) << p->regshift;

369

outb(p->hub6 - 1 + offset, p->iobase);

369

outb(p->hub6 - 1 + offset, p->iobase);

370

return inb(p->iobase + 1);

370

return inb(p->iobase + 1);

371

}

371

}

372

373

static void hub6_serial_out(struct uart_port *p, int offset, int value)

373

static void hub6_serial_out(struct uart_port *p, int offset, int value)

374

{

374

{

375

offset = map_8250_out_reg(p, offset) << p->regshift;

375

offset = map_8250_out_reg(p, offset) << p->regshift;

376

outb(p->hub6 - 1 + offset, p->iobase);

376

outb(p->hub6 - 1 + offset, p->iobase);

377

outb(value, p->iobase + 1);

377

outb(value, p->iobase + 1);

378

}

378

}

379

380

static unsigned int mem_serial_in(struct uart_port *p, int offset)

380

static unsigned int mem_serial_in(struct uart_port *p, int offset)

381

{

381

{

382

offset = map_8250_in_reg(p, offset) << p->regshift;

382

offset = map_8250_in_reg(p, offset) << p->regshift;

383

return readb(p->membase + offset);

383

return readb(p->membase + offset);

384

}

384

}

385

386

static void mem_serial_out(struct uart_port *p, int offset, int value)

386

static void mem_serial_out(struct uart_port *p, int offset, int value)

387

{

387

{

388

offset = map_8250_out_reg(p, offset) << p->regshift;

388

offset = map_8250_out_reg(p, offset) << p->regshift;

389

writeb(value, p->membase + offset);

389

writeb(value, p->membase + offset);

390

}

390

}

391

392

static void mem32_serial_out(struct uart_port *p, int offset, int value)

392

static void mem32_serial_out(struct uart_port *p, int offset, int value)

393

{

393

{

394

offset = map_8250_out_reg(p, offset) << p->regshift;

394

offset = map_8250_out_reg(p, offset) << p->regshift;

395

writel(value, p->membase + offset);

395

writel(value, p->membase + offset);

396

}

396

}

397

398

static unsigned int mem32_serial_in(struct uart_port *p, int offset)

398

static unsigned int mem32_serial_in(struct uart_port *p, int offset)

399

{

399

{

400

offset = map_8250_in_reg(p, offset) << p->regshift;

400

offset = map_8250_in_reg(p, offset) << p->regshift;

401

return readl(p->membase + offset);

401

return readl(p->membase + offset);

402

}

402

}

403

404

#ifdef CONFIG_SERIAL_8250_AU1X00

404

#ifdef CONFIG_SERIAL_8250_AU1X00

405

static unsigned int au_serial_in(struct uart_port *p, int offset)

405

static unsigned int au_serial_in(struct uart_port *p, int offset)

406

{

406

{

407

offset = map_8250_in_reg(p, offset) << p->regshift;

407

offset = map_8250_in_reg(p, offset) << p->regshift;

408

return __raw_readl(p->membase + offset);

408

return __raw_readl(p->membase + offset);

409

}

409

}

410

411

static void au_serial_out(struct uart_port *p, int offset, int value)

411

static void au_serial_out(struct uart_port *p, int offset, int value)

412

{

412

{

413

offset = map_8250_out_reg(p, offset) << p->regshift;

413

offset = map_8250_out_reg(p, offset) << p->regshift;

414

__raw_writel(value, p->membase + offset);

414

__raw_writel(value, p->membase + offset);

415

}

415

}

416

#endif

416

#endif

417

418

static unsigned int tsi_serial_in(struct uart_port *p, int offset)

418

static unsigned int tsi_serial_in(struct uart_port *p, int offset)

419

{

419

{

420

unsigned int tmp;

420

unsigned int tmp;

421

offset = map_8250_in_reg(p, offset) << p->regshift;

421

offset = map_8250_in_reg(p, offset) << p->regshift;

422

if (offset == UART_IIR) {

422

if (offset == UART_IIR) {

423

tmp = readl(p->membase + (UART_IIR & ~3));

423

tmp = readl(p->membase + (UART_IIR & ~3));

424

return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */

424

return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */

425

} else

425

} else

426

return readb(p->membase + offset);

426

return readb(p->membase + offset);

427

}

427

}

428

429

static void tsi_serial_out(struct uart_port *p, int offset, int value)

429

static void tsi_serial_out(struct uart_port *p, int offset, int value)

430

{

430

{

431

offset = map_8250_out_reg(p, offset) << p->regshift;

431

offset = map_8250_out_reg(p, offset) << p->regshift;

432

if (!((offset == UART_IER) && (value & UART_IER_UUE)))

432

if (!((offset == UART_IER) && (value & UART_IER_UUE)))

433

writeb(value, p->membase + offset);

433

writeb(value, p->membase + offset);

434

}

434

}

435

436

static void dwapb_serial_out(struct uart_port *p, int offset, int value)

436

static void dwapb_serial_out(struct uart_port *p, int offset, int value)

437

{

437

{

438

int save_offset = offset;

438

int save_offset = offset;

439

offset = map_8250_out_reg(p, offset) << p->regshift;

439

offset = map_8250_out_reg(p, offset) << p->regshift;

440

/* Save the LCR value so it can be re-written when a

440

/* Save the LCR value so it can be re-written when a

441

* Busy Detect interrupt occurs. */

441

* Busy Detect interrupt occurs. */

442

if (save_offset == UART_LCR) {

442

if (save_offset == UART_LCR) {

443

struct uart_8250_port *up = (struct uart_8250_port *)p;

443

struct uart_8250_port *up = (struct uart_8250_port *)p;

444

up->lcr = value;

444

up->lcr = value;

445

}

445

}

446

writeb(value, p->membase + offset);

446

writeb(value, p->membase + offset);

447

/* Read the IER to ensure any interrupt is cleared before

447

/* Read the IER to ensure any interrupt is cleared before

448

* returning from ISR. */

448

* returning from ISR. */

449

if (save_offset == UART_TX || save_offset == UART_IER)

449

if (save_offset == UART_TX || save_offset == UART_IER)

450

value = p->serial_in(p, UART_IER);

450

value = p->serial_in(p, UART_IER);

451

}

451

}

452

453

static unsigned int io_serial_in(struct uart_port *p, int offset)

453

static unsigned int io_serial_in(struct uart_port *p, int offset)

454

{

454

{

455

offset = map_8250_in_reg(p, offset) << p->regshift;

455

offset = map_8250_in_reg(p, offset) << p->regshift;

456

return inb(p->iobase + offset);

456

return inb(p->iobase + offset);

457

}

457

}

458

459

static void io_serial_out(struct uart_port *p, int offset, int value)

459

static void io_serial_out(struct uart_port *p, int offset, int value)

460

{

460

{

461

offset = map_8250_out_reg(p, offset) << p->regshift;

461

offset = map_8250_out_reg(p, offset) << p->regshift;

462

outb(value, p->iobase + offset);

462

outb(value, p->iobase + offset);

463

}

463

}

464

465

static void set_io_from_upio(struct uart_port *p)

465

static void set_io_from_upio(struct uart_port *p)

466

{

466

{

467

switch (p->iotype) {

467

switch (p->iotype) {

468

case UPIO_HUB6:

468

case UPIO_HUB6:

469

p->serial_in = hub6_serial_in;

469

p->serial_in = hub6_serial_in;

470

p->serial_out = hub6_serial_out;

470

p->serial_out = hub6_serial_out;

471

break;

471

break;

472

473

case UPIO_MEM:

473

case UPIO_MEM:

474

p->serial_in = mem_serial_in;

474

p->serial_in = mem_serial_in;

475

p->serial_out = mem_serial_out;

475

p->serial_out = mem_serial_out;

476

break;

476

break;

477

478

case UPIO_RM9000:

478

case UPIO_RM9000:

479

case UPIO_MEM32:

479

case UPIO_MEM32:

480

p->serial_in = mem32_serial_in;

480

p->serial_in = mem32_serial_in;

481

p->serial_out = mem32_serial_out;

481

p->serial_out = mem32_serial_out;

482

break;

482

break;

483

484

#ifdef CONFIG_SERIAL_8250_AU1X00

484

#ifdef CONFIG_SERIAL_8250_AU1X00

485

case UPIO_AU:

485

case UPIO_AU:

486

p->serial_in = au_serial_in;

486

p->serial_in = au_serial_in;

487

p->serial_out = au_serial_out;

487

p->serial_out = au_serial_out;

488

break;

488

break;

489

#endif

489

#endif

490

case UPIO_TSI:

490

case UPIO_TSI:

491

p->serial_in = tsi_serial_in;

491

p->serial_in = tsi_serial_in;

492

p->serial_out = tsi_serial_out;

492

p->serial_out = tsi_serial_out;

493

break;

493

break;

494

495

case UPIO_DWAPB:

495

case UPIO_DWAPB:

496

p->serial_in = mem_serial_in;

496

p->serial_in = mem_serial_in;

497

p->serial_out = dwapb_serial_out;

497

p->serial_out = dwapb_serial_out;

498

break;

498

break;

499

500

default:

500

default:

501

p->serial_in = io_serial_in;

501

p->serial_in = io_serial_in;

502

p->serial_out = io_serial_out;

502

p->serial_out = io_serial_out;

503

break;

503

break;

504

}

504

}

505

}

505

}

506

507

static void

507

static void

508

serial_out_sync(struct uart_8250_port *up, int offset, int value)

508

serial_out_sync(struct uart_8250_port *up, int offset, int value)

509

{

509

{

510

struct uart_port *p = &up->port;

510

struct uart_port *p = &up->port;

511

switch (p->iotype) {

511

switch (p->iotype) {

512

case UPIO_MEM:

512

case UPIO_MEM:

513

case UPIO_MEM32:

513

case UPIO_MEM32:

514

#ifdef CONFIG_SERIAL_8250_AU1X00

514

#ifdef CONFIG_SERIAL_8250_AU1X00

515

case UPIO_AU:

515

case UPIO_AU:

516

#endif

516

#endif

517

case UPIO_DWAPB:

517

case UPIO_DWAPB:

518

p->serial_out(p, offset, value);

518

p->serial_out(p, offset, value);

519

p->serial_in(p, UART_LCR); /* safe, no side-effects */

519

p->serial_in(p, UART_LCR); /* safe, no side-effects */

520

break;

520

break;

521

default:

521

default:

522

p->serial_out(p, offset, value);

522

p->serial_out(p, offset, value);

523

}

523

}

524

}

524

}

525

526

#define serial_in(up, offset) \

526

#define serial_in(up, offset) \

527

(up->port.serial_in(&(up)->port, (offset)))

527

(up->port.serial_in(&(up)->port, (offset)))

528

#define serial_out(up, offset, value) \

528

#define serial_out(up, offset, value) \

529

(up->port.serial_out(&(up)->port, (offset), (value)))

529

(up->port.serial_out(&(up)->port, (offset), (value)))

530

/*

530

/*

531

* We used to support using pause I/O for certain machines. We

531

* We used to support using pause I/O for certain machines. We

532

* haven't supported this for a while, but just in case it's badly

532

* haven't supported this for a while, but just in case it's badly

533

* needed for certain old 386 machines, I've left these #define's

533

* needed for certain old 386 machines, I've left these #define's

534

* in....

534

* in....

535

*/

535

*/

536

#define serial_inp(up, offset) serial_in(up, offset)

536

#define serial_inp(up, offset) serial_in(up, offset)

537

#define serial_outp(up, offset, value) serial_out(up, offset, value)

537

#define serial_outp(up, offset, value) serial_out(up, offset, value)

538

539

/* Uart divisor latch read */

539

/* Uart divisor latch read */

540

static inline int _serial_dl_read(struct uart_8250_port *up)

540

static inline int _serial_dl_read(struct uart_8250_port *up)

541

{

541

{

542

return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;

542

return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;

543

}

543

}

544

545

/* Uart divisor latch write */

545

/* Uart divisor latch write */

546

static inline void _serial_dl_write(struct uart_8250_port *up, int value)

546

static inline void _serial_dl_write(struct uart_8250_port *up, int value)

547

{

547

{

548

serial_outp(up, UART_DLL, value & 0xff);

548

serial_outp(up, UART_DLL, value & 0xff);

549

serial_outp(up, UART_DLM, value >> 8 & 0xff);

549

serial_outp(up, UART_DLM, value >> 8 & 0xff);

550

}

550

}

551

552

#if defined(CONFIG_SERIAL_8250_AU1X00)

552

#if defined(CONFIG_SERIAL_8250_AU1X00)

553

/* Au1x00 haven't got a standard divisor latch */

553

/* Au1x00 haven't got a standard divisor latch */

554

static int serial_dl_read(struct uart_8250_port *up)

554

static int serial_dl_read(struct uart_8250_port *up)

555

{

555

{

556

if (up->port.iotype == UPIO_AU)

556

if (up->port.iotype == UPIO_AU)

557

return __raw_readl(up->port.membase + 0x28);

557

return __raw_readl(up->port.membase + 0x28);

558

else

558

else

559

return _serial_dl_read(up);

559

return _serial_dl_read(up);

560

}

560

}

561

562

static void serial_dl_write(struct uart_8250_port *up, int value)

562

static void serial_dl_write(struct uart_8250_port *up, int value)

563

{

563

{

564

if (up->port.iotype == UPIO_AU)

564

if (up->port.iotype == UPIO_AU)

565

__raw_writel(value, up->port.membase + 0x28);

565

__raw_writel(value, up->port.membase + 0x28);

566

else

566

else

567

_serial_dl_write(up, value);

567

_serial_dl_write(up, value);

568

}

568

}

569

#elif defined(CONFIG_SERIAL_8250_RM9K)

569

#elif defined(CONFIG_SERIAL_8250_RM9K)

570

static int serial_dl_read(struct uart_8250_port *up)

570

static int serial_dl_read(struct uart_8250_port *up)

571

{

571

{

572

return (up->port.iotype == UPIO_RM9000) ?

572

return (up->port.iotype == UPIO_RM9000) ?

573

(((__raw_readl(up->port.membase + 0x10) << 8) |

573

(((__raw_readl(up->port.membase + 0x10) << 8) |

574

(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :

574

(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :

575

_serial_dl_read(up);

575

_serial_dl_read(up);

576

}

576

}

577

578

static void serial_dl_write(struct uart_8250_port *up, int value)

578

static void serial_dl_write(struct uart_8250_port *up, int value)

579

{

579

{

580

if (up->port.iotype == UPIO_RM9000) {

580

if (up->port.iotype == UPIO_RM9000) {

581

__raw_writel(value, up->port.membase + 0x08);

581

__raw_writel(value, up->port.membase + 0x08);

582

__raw_writel(value >> 8, up->port.membase + 0x10);

582

__raw_writel(value >> 8, up->port.membase + 0x10);

583

} else {

583

} else {

584

_serial_dl_write(up, value);

584

_serial_dl_write(up, value);

585

}

585

}

586

}

586

}

587

#else

587

#else

588

#define serial_dl_read(up) _serial_dl_read(up)

588

#define serial_dl_read(up) _serial_dl_read(up)

589

#define serial_dl_write(up, value) _serial_dl_write(up, value)

589

#define serial_dl_write(up, value) _serial_dl_write(up, value)

590

#endif

590

#endif

591

592

/*

592

/*

593

* For the 16C950

593

* For the 16C950

594

*/

594

*/

595

static void serial_icr_write(struct uart_8250_port *up, int offset, int value)

595

static void serial_icr_write(struct uart_8250_port *up, int offset, int value)

596

{

596

{

597

serial_out(up, UART_SCR, offset);

597

serial_out(up, UART_SCR, offset);

598

serial_out(up, UART_ICR, value);

598

serial_out(up, UART_ICR, value);

599

}

599

}

600

601

static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)

601

static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)

602

{

602

{

603

unsigned int value;

603

unsigned int value;

604

605

serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

605

serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);

606

serial_out(up, UART_SCR, offset);

606

serial_out(up, UART_SCR, offset);

607

value = serial_in(up, UART_ICR);

607

value = serial_in(up, UART_ICR);

608

serial_icr_write(up, UART_ACR, up->acr);

608

serial_icr_write(up, UART_ACR, up->acr);

609

610

return value;

610

return value;

611

}

611

}

612

613

/*

613

/*

614

* FIFO support.

614

* FIFO support.

615

*/

615

*/

616

static void serial8250_clear_fifos(struct uart_8250_port *p)

616

static void serial8250_clear_fifos(struct uart_8250_port *p)

617

{

617

{

618

if (p->capabilities & UART_CAP_FIFO) {

618

if (p->capabilities & UART_CAP_FIFO) {

619

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);

619

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);

620

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |

620

serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |

621

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

621

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

622

serial_outp(p, UART_FCR, 0);

622

serial_outp(p, UART_FCR, 0);

623

}

623

}

624

}

624

}

625

626

/*

626

/*

627

* IER sleep support. UARTs which have EFRs need the "extended

627

* IER sleep support. UARTs which have EFRs need the "extended

628

* capability" bit enabled. Note that on XR16C850s, we need to

628

* capability" bit enabled. Note that on XR16C850s, we need to

629

* reset LCR to write to IER.

629

* reset LCR to write to IER.

630

*/

630

*/

631

static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)

631

static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)

632

{

632

{

633

if (p->capabilities & UART_CAP_SLEEP) {

633

if (p->capabilities & UART_CAP_SLEEP) {

634

if (p->capabilities & UART_CAP_EFR) {

634

if (p->capabilities & UART_CAP_EFR) {

635

serial_outp(p, UART_LCR, 0xBF);

635

serial_outp(p, UART_LCR, 0xBF);

636

serial_outp(p, UART_EFR, UART_EFR_ECB);

636

serial_outp(p, UART_EFR, UART_EFR_ECB);

637

serial_outp(p, UART_LCR, 0);

637

serial_outp(p, UART_LCR, 0);

638

}

638

}

639

serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);

639

serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);

640

if (p->capabilities & UART_CAP_EFR) {

640

if (p->capabilities & UART_CAP_EFR) {

641

serial_outp(p, UART_LCR, 0xBF);

641

serial_outp(p, UART_LCR, 0xBF);

642

serial_outp(p, UART_EFR, 0);

642

serial_outp(p, UART_EFR, 0);

643

serial_outp(p, UART_LCR, 0);

643

serial_outp(p, UART_LCR, 0);

644

}

644

}

645

}

645

}

646

}

646

}

647

648

#ifdef CONFIG_SERIAL_8250_RSA

648

#ifdef CONFIG_SERIAL_8250_RSA

649

/*

649

/*

650

* Attempts to turn on the RSA FIFO. Returns zero on failure.

650

* Attempts to turn on the RSA FIFO. Returns zero on failure.

651

* We set the port uart clock rate if we succeed.

651

* We set the port uart clock rate if we succeed.

652

*/

652

*/

653

static int __enable_rsa(struct uart_8250_port *up)

653

static int __enable_rsa(struct uart_8250_port *up)

654

{

654

{

655

unsigned char mode;

655

unsigned char mode;

656

int result;

656

int result;

657

658

mode = serial_inp(up, UART_RSA_MSR);

658

mode = serial_inp(up, UART_RSA_MSR);

659

result = mode & UART_RSA_MSR_FIFO;

659

result = mode & UART_RSA_MSR_FIFO;

660

661

if (!result) {

661

if (!result) {

662

serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

662

serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);

663

mode = serial_inp(up, UART_RSA_MSR);

663

mode = serial_inp(up, UART_RSA_MSR);

664

result = mode & UART_RSA_MSR_FIFO;

664

result = mode & UART_RSA_MSR_FIFO;

665

}

665

}

666

667

if (result)

667

if (result)

668

up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

668

up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;

669

670

return result;

670

return result;

671

}

671

}

672

673

static void enable_rsa(struct uart_8250_port *up)

673

static void enable_rsa(struct uart_8250_port *up)

674

{

674

{

675

if (up->port.type == PORT_RSA) {

675

if (up->port.type == PORT_RSA) {

676

if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

676

if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {

677

spin_lock_irq(&up->port.lock);

677

spin_lock_irq(&up->port.lock);

678

__enable_rsa(up);

678

__enable_rsa(up);

679

spin_unlock_irq(&up->port.lock);

679

spin_unlock_irq(&up->port.lock);

680

}

680

}

681

if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

681

if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)

682

serial_outp(up, UART_RSA_FRR, 0);

682

serial_outp(up, UART_RSA_FRR, 0);

683

}

683

}

684

}

684

}

685

686

/*

686

/*

687

* Attempts to turn off the RSA FIFO. Returns zero on failure.

687

* Attempts to turn off the RSA FIFO. Returns zero on failure.

688

* It is unknown why interrupts were disabled in here. However,

688

* It is unknown why interrupts were disabled in here. However,

689

* the caller is expected to preserve this behaviour by grabbing

689

* the caller is expected to preserve this behaviour by grabbing

690

* the spinlock before calling this function.

690

* the spinlock before calling this function.

691

*/

691

*/

692

static void disable_rsa(struct uart_8250_port *up)

692

static void disable_rsa(struct uart_8250_port *up)

693

{

693

{

694

unsigned char mode;

694

unsigned char mode;

695

int result;

695

int result;

696

697

if (up->port.type == PORT_RSA &&

697

if (up->port.type == PORT_RSA &&

698

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

698

up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {

699

spin_lock_irq(&up->port.lock);

699

spin_lock_irq(&up->port.lock);

700

701

mode = serial_inp(up, UART_RSA_MSR);

701

mode = serial_inp(up, UART_RSA_MSR);

702

result = !(mode & UART_RSA_MSR_FIFO);

702

result = !(mode & UART_RSA_MSR_FIFO);

703

704

if (!result) {

704

if (!result) {

705

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

705

serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);

706

mode = serial_inp(up, UART_RSA_MSR);

706

mode = serial_inp(up, UART_RSA_MSR);

707

result = !(mode & UART_RSA_MSR_FIFO);

707

result = !(mode & UART_RSA_MSR_FIFO);

708

}

708

}

709

710

if (result)

710

if (result)

711

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

711

up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;

712

spin_unlock_irq(&up->port.lock);

712

spin_unlock_irq(&up->port.lock);

713

}

713

}

714

}

714

}

715

#endif /* CONFIG_SERIAL_8250_RSA */

715

#endif /* CONFIG_SERIAL_8250_RSA */

716

717

/*

717

/*

718

* This is a quickie test to see how big the FIFO is.

718

* This is a quickie test to see how big the FIFO is.

719

* It doesn't work at all the time, more's the pity.

719

* It doesn't work at all the time, more's the pity.

720

*/

720

*/

721

static int size_fifo(struct uart_8250_port *up)

721

static int size_fifo(struct uart_8250_port *up)

722

{

722

{

723

unsigned char old_fcr, old_mcr, old_lcr;

723

unsigned char old_fcr, old_mcr, old_lcr;

724

unsigned short old_dl;

724

unsigned short old_dl;

725

int count;

725

int count;

726

727

old_lcr = serial_inp(up, UART_LCR);

727

old_lcr = serial_inp(up, UART_LCR);

728

serial_outp(up, UART_LCR, 0);

728

serial_outp(up, UART_LCR, 0);

729

old_fcr = serial_inp(up, UART_FCR);

729

old_fcr = serial_inp(up, UART_FCR);

730

old_mcr = serial_inp(up, UART_MCR);

730

old_mcr = serial_inp(up, UART_MCR);

731

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

731

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |

732

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

732

UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);

733

serial_outp(up, UART_MCR, UART_MCR_LOOP);

733

serial_outp(up, UART_MCR, UART_MCR_LOOP);

734

serial_outp(up, UART_LCR, UART_LCR_DLAB);

734

serial_outp(up, UART_LCR, UART_LCR_DLAB);

735

old_dl = serial_dl_read(up);

735

old_dl = serial_dl_read(up);

736

serial_dl_write(up, 0x0001);

736

serial_dl_write(up, 0x0001);

737

serial_outp(up, UART_LCR, 0x03);

737

serial_outp(up, UART_LCR, 0x03);

738

for (count = 0; count < 256; count++)

738

for (count = 0; count < 256; count++)

739

serial_outp(up, UART_TX, count);

739

serial_outp(up, UART_TX, count);

740

mdelay(20);/* FIXME - schedule_timeout */

740

mdelay(20);/* FIXME - schedule_timeout */

741

for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&

741

for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&

742

(count < 256); count++)

742

(count < 256); count++)

743

serial_inp(up, UART_RX);

743

serial_inp(up, UART_RX);

744

serial_outp(up, UART_FCR, old_fcr);

744

serial_outp(up, UART_FCR, old_fcr);

745

serial_outp(up, UART_MCR, old_mcr);

745

serial_outp(up, UART_MCR, old_mcr);

746

serial_outp(up, UART_LCR, UART_LCR_DLAB);

746

serial_outp(up, UART_LCR, UART_LCR_DLAB);

747

serial_dl_write(up, old_dl);

747

serial_dl_write(up, old_dl);

748

serial_outp(up, UART_LCR, old_lcr);

748

serial_outp(up, UART_LCR, old_lcr);

749

750

return count;

750

return count;

751

}

751

}

752

753

/*

753

/*

754

* Read UART ID using the divisor method - set DLL and DLM to zero

754

* Read UART ID using the divisor method - set DLL and DLM to zero

755

* and the revision will be in DLL and device type in DLM. We

755

* and the revision will be in DLL and device type in DLM. We

756

* preserve the device state across this.

756

* preserve the device state across this.

757

*/

757

*/

758

static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)

758

static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)

759

{

759

{

760

unsigned char old_dll, old_dlm, old_lcr;

760

unsigned char old_dll, old_dlm, old_lcr;

761

unsigned int id;

761

unsigned int id;

762

763

old_lcr = serial_inp(p, UART_LCR);

763

old_lcr = serial_inp(p, UART_LCR);

764

serial_outp(p, UART_LCR, UART_LCR_DLAB);

764

serial_outp(p, UART_LCR, UART_LCR_DLAB);

765

766

old_dll = serial_inp(p, UART_DLL);

766

old_dll = serial_inp(p, UART_DLL);

767

old_dlm = serial_inp(p, UART_DLM);

767

old_dlm = serial_inp(p, UART_DLM);

768

769

serial_outp(p, UART_DLL, 0);

769

serial_outp(p, UART_DLL, 0);

770

serial_outp(p, UART_DLM, 0);

770

serial_outp(p, UART_DLM, 0);

771

772

id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;

772

id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;

773

774

serial_outp(p, UART_DLL, old_dll);

774

serial_outp(p, UART_DLL, old_dll);

775

serial_outp(p, UART_DLM, old_dlm);

775

serial_outp(p, UART_DLM, old_dlm);

776

serial_outp(p, UART_LCR, old_lcr);

776

serial_outp(p, UART_LCR, old_lcr);

777

778

return id;

778

return id;

779

}

779

}

780

781

/*

781

/*

782

* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.

782

* This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.

783

* When this function is called we know it is at least a StarTech

783

* When this function is called we know it is at least a StarTech

784

* 16650 V2, but it might be one of several StarTech UARTs, or one of

784

* 16650 V2, but it might be one of several StarTech UARTs, or one of

785

* its clones. (We treat the broken original StarTech 16650 V1 as a

785

* its clones. (We treat the broken original StarTech 16650 V1 as a

786

* 16550, and why not? Startech doesn't seem to even acknowledge its

786

* 16550, and why not? Startech doesn't seem to even acknowledge its

787

* existence.)

787

* existence.)

788

*

788

*

789

* What evil have men's minds wrought...

789

* What evil have men's minds wrought...

790

*/

790

*/

791

static void autoconfig_has_efr(struct uart_8250_port *up)

791

static void autoconfig_has_efr(struct uart_8250_port *up)

792

{

792

{

793

unsigned int id1, id2, id3, rev;

793

unsigned int id1, id2, id3, rev;

794

795

/*

795

/*

796

* Everything with an EFR has SLEEP

796

* Everything with an EFR has SLEEP

797

*/

797

*/

798

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

798

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

799

800

/*

800

/*

801

* First we check to see if it's an Oxford Semiconductor UART.

801

* First we check to see if it's an Oxford Semiconductor UART.

802

*

802

*

803

* If we have to do this here because some non-National

803

* If we have to do this here because some non-National

804

* Semiconductor clone chips lock up if you try writing to the

804

* Semiconductor clone chips lock up if you try writing to the

805

* LSR register (which serial_icr_read does)

805

* LSR register (which serial_icr_read does)

806

*/

806

*/

807

808

/*

808

/*

809

* Check for Oxford Semiconductor 16C950.

809

* Check for Oxford Semiconductor 16C950.

810

*

810

*

811

* EFR [4] must be set else this test fails.

811

* EFR [4] must be set else this test fails.

812

*

812

*

813

* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)

813

* This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)

814

* claims that it's needed for 952 dual UART's (which are not

814

* claims that it's needed for 952 dual UART's (which are not

815

* recommended for new designs).

815

* recommended for new designs).

816

*/

816

*/

817

up->acr = 0;

817

up->acr = 0;

818

serial_out(up, UART_LCR, 0xBF);

818

serial_out(up, UART_LCR, 0xBF);

819

serial_out(up, UART_EFR, UART_EFR_ECB);

819

serial_out(up, UART_EFR, UART_EFR_ECB);

820

serial_out(up, UART_LCR, 0x00);

820

serial_out(up, UART_LCR, 0x00);

821

id1 = serial_icr_read(up, UART_ID1);

821

id1 = serial_icr_read(up, UART_ID1);

822

id2 = serial_icr_read(up, UART_ID2);

822

id2 = serial_icr_read(up, UART_ID2);

823

id3 = serial_icr_read(up, UART_ID3);

823

id3 = serial_icr_read(up, UART_ID3);

824

rev = serial_icr_read(up, UART_REV);

824

rev = serial_icr_read(up, UART_REV);

825

826

DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);

826

DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);

827

828

if (id1 == 0x16 && id2 == 0xC9 &&

828

if (id1 == 0x16 && id2 == 0xC9 &&

829

(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {

829

(id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {

830

up->port.type = PORT_16C950;

830

up->port.type = PORT_16C950;

831

832

/*

832

/*

833

* Enable work around for the Oxford Semiconductor 952 rev B

833

* Enable work around for the Oxford Semiconductor 952 rev B

834

* chip which causes it to seriously miscalculate baud rates

834

* chip which causes it to seriously miscalculate baud rates

835

* when DLL is 0.

835

* when DLL is 0.

836

*/

836

*/

837

if (id3 == 0x52 && rev == 0x01)

837

if (id3 == 0x52 && rev == 0x01)

838

up->bugs |= UART_BUG_QUOT;

838

up->bugs |= UART_BUG_QUOT;

839

return;

839

return;

840

}

840

}

841

842

/*

842

/*

843

* We check for a XR16C850 by setting DLL and DLM to 0, and then

843

* We check for a XR16C850 by setting DLL and DLM to 0, and then

844

* reading back DLL and DLM. The chip type depends on the DLM

844

* reading back DLL and DLM. The chip type depends on the DLM

845

* value read back:

845

* value read back:

846

* 0x10 - XR16C850 and the DLL contains the chip revision.

846

* 0x10 - XR16C850 and the DLL contains the chip revision.

847

* 0x12 - XR16C2850.

847

* 0x12 - XR16C2850.

848

* 0x14 - XR16C854.

848

* 0x14 - XR16C854.

849

*/

849

*/

850

id1 = autoconfig_read_divisor_id(up);

850

id1 = autoconfig_read_divisor_id(up);

851

DEBUG_AUTOCONF("850id=%04x ", id1);

851

DEBUG_AUTOCONF("850id=%04x ", id1);

852

853

id2 = id1 >> 8;

853

id2 = id1 >> 8;

854

if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {

854

if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {

855

up->port.type = PORT_16850;

855

up->port.type = PORT_16850;

856

return;

856

return;

857

}

857

}

858

859

/*

859

/*

860

* It wasn't an XR16C850.

860

* It wasn't an XR16C850.

861

*

861

*

862

* We distinguish between the '654 and the '650 by counting

862

* We distinguish between the '654 and the '650 by counting

863

* how many bytes are in the FIFO. I'm using this for now,

863

* how many bytes are in the FIFO. I'm using this for now,

864

* since that's the technique that was sent to me in the

864

* since that's the technique that was sent to me in the

865

* serial driver update, but I'm not convinced this works.

865

* serial driver update, but I'm not convinced this works.

866

* I've had problems doing this in the past. -TYT

866

* I've had problems doing this in the past. -TYT

867

*/

867

*/

868

if (size_fifo(up) == 64)

868

if (size_fifo(up) == 64)

869

up->port.type = PORT_16654;

869

up->port.type = PORT_16654;

870

else

870

else

871

up->port.type = PORT_16650V2;

871

up->port.type = PORT_16650V2;

872

}

872

}

873

874

/*

874

/*

875

* We detected a chip without a FIFO. Only two fall into

875

* We detected a chip without a FIFO. Only two fall into

876

* this category - the original 8250 and the 16450. The

876

* this category - the original 8250 and the 16450. The

877

* 16450 has a scratch register (accessible with LCR=0)

877

* 16450 has a scratch register (accessible with LCR=0)

878

*/

878

*/

879

static void autoconfig_8250(struct uart_8250_port *up)

879

static void autoconfig_8250(struct uart_8250_port *up)

880

{

880

{

881

unsigned char scratch, status1, status2;

881

unsigned char scratch, status1, status2;

882

883

up->port.type = PORT_8250;

883

up->port.type = PORT_8250;

884

885

scratch = serial_in(up, UART_SCR);

885

scratch = serial_in(up, UART_SCR);

886

serial_outp(up, UART_SCR, 0xa5);

886

serial_outp(up, UART_SCR, 0xa5);

887

status1 = serial_in(up, UART_SCR);

887

status1 = serial_in(up, UART_SCR);

888

serial_outp(up, UART_SCR, 0x5a);

888

serial_outp(up, UART_SCR, 0x5a);

889

status2 = serial_in(up, UART_SCR);

889

status2 = serial_in(up, UART_SCR);

890

serial_outp(up, UART_SCR, scratch);

890

serial_outp(up, UART_SCR, scratch);

891

892

if (status1 == 0xa5 && status2 == 0x5a)

892

if (status1 == 0xa5 && status2 == 0x5a)

893

up->port.type = PORT_16450;

893

up->port.type = PORT_16450;

894

}

894

}

895

896

static int broken_efr(struct uart_8250_port *up)

896

static int broken_efr(struct uart_8250_port *up)

897

{

897

{

898

/*

898

/*

899

* Exar ST16C2550 "A2" devices incorrectly detect as

899

* Exar ST16C2550 "A2" devices incorrectly detect as

900

* having an EFR, and report an ID of 0x0201. See

900

* having an EFR, and report an ID of 0x0201. See

901

* http://www.exar.com/info.php?pdf=dan180_oct2004.pdf

901

* http://www.exar.com/info.php?pdf=dan180_oct2004.pdf

902

*/

902

*/

903

if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)

903

if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)

904

return 1;

904

return 1;

905

906

return 0;

906

return 0;

907

}

907

}

908

909

/*

909

/*

910

* We know that the chip has FIFOs. Does it have an EFR? The

910

* We know that the chip has FIFOs. Does it have an EFR? The

911

* EFR is located in the same register position as the IIR and

911

* EFR is located in the same register position as the IIR and

912

* we know the top two bits of the IIR are currently set. The

912

* we know the top two bits of the IIR are currently set. The

913

* EFR should contain zero. Try to read the EFR.

913

* EFR should contain zero. Try to read the EFR.

914

*/

914

*/

915

static void autoconfig_16550a(struct uart_8250_port *up)

915

static void autoconfig_16550a(struct uart_8250_port *up)

916

{

916

{

917

unsigned char status1, status2;

917

unsigned char status1, status2;

918

unsigned int iersave;

918

unsigned int iersave;

919

920

up->port.type = PORT_16550A;

920

up->port.type = PORT_16550A;

921

up->capabilities |= UART_CAP_FIFO;

921

up->capabilities |= UART_CAP_FIFO;

922

923

/*

923

/*

924

* Check for presence of the EFR when DLAB is set.

924

* Check for presence of the EFR when DLAB is set.

925

* Only ST16C650V1 UARTs pass this test.

925

* Only ST16C650V1 UARTs pass this test.

926

*/

926

*/

927

serial_outp(up, UART_LCR, UART_LCR_DLAB);

927

serial_outp(up, UART_LCR, UART_LCR_DLAB);

928

if (serial_in(up, UART_EFR) == 0) {

928

if (serial_in(up, UART_EFR) == 0) {

929

serial_outp(up, UART_EFR, 0xA8);

929

serial_outp(up, UART_EFR, 0xA8);

930

if (serial_in(up, UART_EFR) != 0) {

930

if (serial_in(up, UART_EFR) != 0) {

931

DEBUG_AUTOCONF("EFRv1 ");

931

DEBUG_AUTOCONF("EFRv1 ");

932

up->port.type = PORT_16650;

932

up->port.type = PORT_16650;

933

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

933

up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;

934

} else {

934

} else {

935

DEBUG_AUTOCONF("Motorola 8xxx DUART ");

935

DEBUG_AUTOCONF("Motorola 8xxx DUART ");

936

}

936

}

937

serial_outp(up, UART_EFR, 0);

937

serial_outp(up, UART_EFR, 0);

938

return;

938

return;

939

}

939

}

940

941

/*

941

/*

942

* Maybe it requires 0xbf to be written to the LCR.

942

* Maybe it requires 0xbf to be written to the LCR.

943

* (other ST16C650V2 UARTs, TI16C752A, etc)

943

* (other ST16C650V2 UARTs, TI16C752A, etc)

944

*/

944

*/

945

serial_outp(up, UART_LCR, 0xBF);

945

serial_outp(up, UART_LCR, 0xBF);

946

if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {

946

if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {

947

DEBUG_AUTOCONF("EFRv2 ");

947

DEBUG_AUTOCONF("EFRv2 ");

948

autoconfig_has_efr(up);

948

autoconfig_has_efr(up);

949

return;

949

return;

950

}

950

}

951

952

/*

952

/*

953

* Check for a National Semiconductor SuperIO chip.

953

* Check for a National Semiconductor SuperIO chip.

954

* Attempt to switch to bank 2, read the value of the LOOP bit

954

* Attempt to switch to bank 2, read the value of the LOOP bit

955

* from EXCR1. Switch back to bank 0, change it in MCR. Then

955

* from EXCR1. Switch back to bank 0, change it in MCR. Then

956

* switch back to bank 2, read it from EXCR1 again and check

956

* switch back to bank 2, read it from EXCR1 again and check

957

* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2

957

* it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2

958

*/

958

*/

959

serial_outp(up, UART_LCR, 0);

959

serial_outp(up, UART_LCR, 0);

960

status1 = serial_in(up, UART_MCR);

960

status1 = serial_in(up, UART_MCR);

961

serial_outp(up, UART_LCR, 0xE0);

961

serial_outp(up, UART_LCR, 0xE0);

962

status2 = serial_in(up, 0x02); /* EXCR1 */

962

status2 = serial_in(up, 0x02); /* EXCR1 */

963

964

if (!((status2 ^ status1) & UART_MCR_LOOP)) {

964

if (!((status2 ^ status1) & UART_MCR_LOOP)) {

965

serial_outp(up, UART_LCR, 0);

965

serial_outp(up, UART_LCR, 0);

966

serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);

966

serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);

967

serial_outp(up, UART_LCR, 0xE0);

967

serial_outp(up, UART_LCR, 0xE0);

968

status2 = serial_in(up, 0x02); /* EXCR1 */

968

status2 = serial_in(up, 0x02); /* EXCR1 */

969

serial_outp(up, UART_LCR, 0);

969

serial_outp(up, UART_LCR, 0);

970

serial_outp(up, UART_MCR, status1);

970

serial_outp(up, UART_MCR, status1);

971

972

if ((status2 ^ status1) & UART_MCR_LOOP) {

972

if ((status2 ^ status1) & UART_MCR_LOOP) {

973

unsigned short quot;

973

unsigned short quot;

974

975

serial_outp(up, UART_LCR, 0xE0);

975

serial_outp(up, UART_LCR, 0xE0);

976

977

quot = serial_dl_read(up);

977

quot = serial_dl_read(up);

978

quot <<= 3;

978

quot <<= 3;

979

980

status1 = serial_in(up, 0x04); /* EXCR2 */

980

status1 = serial_in(up, 0x04); /* EXCR2 */

981

status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

981

status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

982

status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

982

status1 |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

983

serial_outp(up, 0x04, status1);

983

serial_outp(up, 0x04, status1);

984

985

serial_dl_write(up, quot);

985

serial_dl_write(up, quot);

986

987

serial_outp(up, UART_LCR, 0);

987

serial_outp(up, UART_LCR, 0);

988

989

up->port.uartclk = 921600*16;

989

up->port.uartclk = 921600*16;

990

up->port.type = PORT_NS16550A;

990

up->port.type = PORT_NS16550A;

991

up->capabilities |= UART_NATSEMI;

991

up->capabilities |= UART_NATSEMI;

992

return;

992

return;

993

}

993

}

994

}

994

}

995

996

/*

996

/*

997

* No EFR. Try to detect a TI16750, which only sets bit 5 of

997

* No EFR. Try to detect a TI16750, which only sets bit 5 of

998

* the IIR when 64 byte FIFO mode is enabled when DLAB is set.

998

* the IIR when 64 byte FIFO mode is enabled when DLAB is set.

999

* Try setting it with and without DLAB set. Cheap clones

999

* Try setting it with and without DLAB set. Cheap clones

1000

* set bit 5 without DLAB set.

1000

* set bit 5 without DLAB set.

1001

*/

1001

*/

1002

serial_outp(up, UART_LCR, 0);

1002

serial_outp(up, UART_LCR, 0);

1003

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1003

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1004

status1 = serial_in(up, UART_IIR) >> 5;

1004

status1 = serial_in(up, UART_IIR) >> 5;

1005

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1005

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1006

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1006

serial_outp(up, UART_LCR, UART_LCR_DLAB);

1007

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1007

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);

1008

status2 = serial_in(up, UART_IIR) >> 5;

1008

status2 = serial_in(up, UART_IIR) >> 5;

1009

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1009

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1010

serial_outp(up, UART_LCR, 0);

1010

serial_outp(up, UART_LCR, 0);

1011

1012

DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

1012

DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);

1013

1014

if (status1 == 6 && status2 == 7) {

1014

if (status1 == 6 && status2 == 7) {

1015

up->port.type = PORT_16750;

1015

up->port.type = PORT_16750;

1016

up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;

1016

up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;

1017

return;

1017

return;

1018

}

1018

}

1019

1020

/*

1020

/*

1021

* Try writing and reading the UART_IER_UUE bit (b6).

1021

* Try writing and reading the UART_IER_UUE bit (b6).

1022

* If it works, this is probably one of the Xscale platform's

1022

* If it works, this is probably one of the Xscale platform's

1023

* internal UARTs.

1023

* internal UARTs.

1024

* We're going to explicitly set the UUE bit to 0 before

1024

* We're going to explicitly set the UUE bit to 0 before

1025

* trying to write and read a 1 just to make sure it's not

1025

* trying to write and read a 1 just to make sure it's not

1026

* already a 1 and maybe locked there before we even start start.

1026

* already a 1 and maybe locked there before we even start start.

1027

*/

1027

*/

1028

iersave = serial_in(up, UART_IER);

1028

iersave = serial_in(up, UART_IER);

1029

serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);

1029

serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);

1030

if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {

1030

if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {

1031

/*

1031

/*

1032

* OK it's in a known zero state, try writing and reading

1032

* OK it's in a known zero state, try writing and reading

1033

* without disturbing the current state of the other bits.

1033

* without disturbing the current state of the other bits.

1034

*/

1034

*/

1035

serial_outp(up, UART_IER, iersave | UART_IER_UUE);

1035

serial_outp(up, UART_IER, iersave | UART_IER_UUE);

1036

if (serial_in(up, UART_IER) & UART_IER_UUE) {

1036

if (serial_in(up, UART_IER) & UART_IER_UUE) {

1037

/*

1037

/*

1038

* It's an Xscale.

1038

* It's an Xscale.

1039

* We'll leave the UART_IER_UUE bit set to 1 (enabled).

1039

* We'll leave the UART_IER_UUE bit set to 1 (enabled).

1040

*/

1040

*/

1041

DEBUG_AUTOCONF("Xscale ");

1041

DEBUG_AUTOCONF("Xscale ");

1042

up->port.type = PORT_XSCALE;

1042

up->port.type = PORT_XSCALE;

1043

up->capabilities |= UART_CAP_UUE;

1043

up->capabilities |= UART_CAP_UUE;

1044

return;

1044

return;

1045

}

1045

}

1046

} else {

1046

} else {

1047

/*

1047

/*

1048

* If we got here we couldn't force the IER_UUE bit to 0.

1048

* If we got here we couldn't force the IER_UUE bit to 0.

1049

* Log it and continue.

1049

* Log it and continue.

1050

*/

1050

*/

1051

DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");

1051

DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");

1052

}

1052

}

1053

serial_outp(up, UART_IER, iersave);

1053

serial_outp(up, UART_IER, iersave);

1054

}

1054

}

1055

1056

/*

1056

/*

1057

* This routine is called by rs_init() to initialize a specific serial

1057

* This routine is called by rs_init() to initialize a specific serial

1058

* port. It determines what type of UART chip this serial port is

1058

* port. It determines what type of UART chip this serial port is

1059

* using: 8250, 16450, 16550, 16550A. The important question is

1059

* using: 8250, 16450, 16550, 16550A. The important question is

1060

* whether or not this UART is a 16550A or not, since this will

1060

* whether or not this UART is a 16550A or not, since this will

1061

* determine whether or not we can use its FIFO features or not.

1061

* determine whether or not we can use its FIFO features or not.

1062

*/

1062

*/

1063

static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)

1063

static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)

1064

{

1064

{

1065

unsigned char status1, scratch, scratch2, scratch3;

1065

unsigned char status1, scratch, scratch2, scratch3;

1066

unsigned char save_lcr, save_mcr;

1066

unsigned char save_lcr, save_mcr;

1067

unsigned long flags;

1067

unsigned long flags;

1068

1069

if (!up->port.iobase && !up->port.mapbase && !up->port.membase)

1069

if (!up->port.iobase && !up->port.mapbase && !up->port.membase)

1070

return;

1070

return;

1071

1072

DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",

1072

DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",

1073

serial_index(&up->port), up->port.iobase, up->port.membase);

1073

serial_index(&up->port), up->port.iobase, up->port.membase);

1074

1075

/*

1075

/*

1076

* We really do need global IRQs disabled here - we're going to

1076

* We really do need global IRQs disabled here - we're going to

1077

* be frobbing the chips IRQ enable register to see if it exists.

1077

* be frobbing the chips IRQ enable register to see if it exists.

1078

*/

1078

*/

1079

spin_lock_irqsave(&up->port.lock, flags);

1079

spin_lock_irqsave(&up->port.lock, flags);

1080

1081

up->capabilities = 0;

1081

up->capabilities = 0;

1082

up->bugs = 0;

1082

up->bugs = 0;

1083

1084

if (!(up->port.flags & UPF_BUGGY_UART)) {

1084

if (!(up->port.flags & UPF_BUGGY_UART)) {

1085

/*

1085

/*

1086

* Do a simple existence test first; if we fail this,

1086

* Do a simple existence test first; if we fail this,

1087

* there's no point trying anything else.

1087

* there's no point trying anything else.

1088

*

1088

*

1089

* 0x80 is used as a nonsense port to prevent against

1089

* 0x80 is used as a nonsense port to prevent against

1090

* false positives due to ISA bus float. The

1090

* false positives due to ISA bus float. The

1091

* assumption is that 0x80 is a non-existent port;

1091

* assumption is that 0x80 is a non-existent port;

1092

* which should be safe since include/asm/io.h also

1092

* which should be safe since include/asm/io.h also

1093

* makes this assumption.

1093

* makes this assumption.

1094

*

1094

*

1095

* Note: this is safe as long as MCR bit 4 is clear

1095

* Note: this is safe as long as MCR bit 4 is clear

1096

* and the device is in "PC" mode.

1096

* and the device is in "PC" mode.

1097

*/

1097

*/

1098

scratch = serial_inp(up, UART_IER);

1098

scratch = serial_inp(up, UART_IER);

1099

serial_outp(up, UART_IER, 0);

1099

serial_outp(up, UART_IER, 0);

1100

#ifdef __i386__

1100

#ifdef __i386__

1101

outb(0xff, 0x080);

1101

outb(0xff, 0x080);

1102

#endif

1102

#endif

1103

/*

1103

/*

1104

* Mask out IER[7:4] bits for test as some UARTs (e.g. TL

1104

* Mask out IER[7:4] bits for test as some UARTs (e.g. TL

1105

* 16C754B) allow only to modify them if an EFR bit is set.

1105

* 16C754B) allow only to modify them if an EFR bit is set.

1106

*/

1106

*/

1107

scratch2 = serial_inp(up, UART_IER) & 0x0f;

1107

scratch2 = serial_inp(up, UART_IER) & 0x0f;

1108

serial_outp(up, UART_IER, 0x0F);

1108

serial_outp(up, UART_IER, 0x0F);

1109

#ifdef __i386__

1109

#ifdef __i386__

1110

outb(0, 0x080);

1110

outb(0, 0x080);

1111

#endif

1111

#endif

1112

scratch3 = serial_inp(up, UART_IER) & 0x0f;

1112

scratch3 = serial_inp(up, UART_IER) & 0x0f;

1113

serial_outp(up, UART_IER, scratch);

1113

serial_outp(up, UART_IER, scratch);

1114

if (scratch2 != 0 || scratch3 != 0x0F) {

1114

if (scratch2 != 0 || scratch3 != 0x0F) {

1115

/*

1115

/*

1116

* We failed; there's nothing here

1116

* We failed; there's nothing here

1117

*/

1117

*/

1118

DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",

1118

DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",

1119

scratch2, scratch3);

1119

scratch2, scratch3);

1120

goto out;

1120

goto out;

1121

}

1121

}

1122

}

1122

}

1123

1124

save_mcr = serial_in(up, UART_MCR);

1124

save_mcr = serial_in(up, UART_MCR);

1125

save_lcr = serial_in(up, UART_LCR);

1125

save_lcr = serial_in(up, UART_LCR);

1126

1127

/*

1127

/*

1128

* Check to see if a UART is really there. Certain broken

1128

* Check to see if a UART is really there. Certain broken

1129

* internal modems based on the Rockwell chipset fail this

1129

* internal modems based on the Rockwell chipset fail this

1130

* test, because they apparently don't implement the loopback

1130

* test, because they apparently don't implement the loopback

1131

* test mode. So this test is skipped on the COM 1 through

1131

* test mode. So this test is skipped on the COM 1 through

1132

* COM 4 ports. This *should* be safe, since no board

1132

* COM 4 ports. This *should* be safe, since no board

1133

* manufacturer would be stupid enough to design a board

1133

* manufacturer would be stupid enough to design a board

1134

* that conflicts with COM 1-4 --- we hope!

1134

* that conflicts with COM 1-4 --- we hope!

1135

*/

1135

*/

1136

if (!(up->port.flags & UPF_SKIP_TEST)) {

1136

if (!(up->port.flags & UPF_SKIP_TEST)) {

1137

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1137

serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);

1138

status1 = serial_inp(up, UART_MSR) & 0xF0;

1138

status1 = serial_inp(up, UART_MSR) & 0xF0;

1139

serial_outp(up, UART_MCR, save_mcr);

1139

serial_outp(up, UART_MCR, save_mcr);

1140

if (status1 != 0x90) {

1140

if (status1 != 0x90) {

1141

DEBUG_AUTOCONF("LOOP test failed (%02x) ",

1141

DEBUG_AUTOCONF("LOOP test failed (%02x) ",

1142

status1);

1142

status1);

1143

goto out;

1143

goto out;

1144

}

1144

}

1145

}

1145

}

1146

1147

/*

1147

/*

1148

* We're pretty sure there's a port here. Lets find out what

1148

* We're pretty sure there's a port here. Lets find out what

1149

* type of port it is. The IIR top two bits allows us to find

1149

* type of port it is. The IIR top two bits allows us to find

1150

* out if it's 8250 or 16450, 16550, 16550A or later. This

1150

* out if it's 8250 or 16450, 16550, 16550A or later. This

1151

* determines what we test for next.

1151

* determines what we test for next.

1152

*

1152

*

1153

* We also initialise the EFR (if any) to zero for later. The

1153

* We also initialise the EFR (if any) to zero for later. The

1154

* EFR occupies the same register location as the FCR and IIR.

1154

* EFR occupies the same register location as the FCR and IIR.

1155

*/

1155

*/

1156

serial_outp(up, UART_LCR, 0xBF);

1156

serial_outp(up, UART_LCR, 0xBF);

1157

serial_outp(up, UART_EFR, 0);

1157

serial_outp(up, UART_EFR, 0);

1158

serial_outp(up, UART_LCR, 0);

1158

serial_outp(up, UART_LCR, 0);

1159

1160

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1160

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

1161

scratch = serial_in(up, UART_IIR) >> 6;

1161

scratch = serial_in(up, UART_IIR) >> 6;

1162

1163

DEBUG_AUTOCONF("iir=%d ", scratch);

1163

DEBUG_AUTOCONF("iir=%d ", scratch);

1164

1165

switch (scratch) {

1165

switch (scratch) {

1166

case 0:

1166

case 0:

1167

autoconfig_8250(up);

1167

autoconfig_8250(up);

1168

break;

1168

break;

1169

case 1:

1169

case 1:

1170

up->port.type = PORT_UNKNOWN;

1170

up->port.type = PORT_UNKNOWN;

1171

break;

1171

break;

1172

case 2:

1172

case 2:

1173

up->port.type = PORT_16550;

1173

up->port.type = PORT_16550;

1174

break;

1174

break;

1175

case 3:

1175

case 3:

1176

autoconfig_16550a(up);

1176

autoconfig_16550a(up);

1177

break;

1177

break;

1178

}

1178

}

1179

1180

#ifdef CONFIG_SERIAL_8250_RSA

1180

#ifdef CONFIG_SERIAL_8250_RSA

1181

/*

1181

/*

1182

* Only probe for RSA ports if we got the region.

1182

* Only probe for RSA ports if we got the region.

1183

*/

1183

*/

1184

if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {

1184

if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {

1185

int i;

1185

int i;

1186

1187

for (i = 0 ; i < probe_rsa_count; ++i) {

1187

for (i = 0 ; i < probe_rsa_count; ++i) {

1188

if (probe_rsa[i] == up->port.iobase &&

1188

if (probe_rsa[i] == up->port.iobase &&

1189

__enable_rsa(up)) {

1189

__enable_rsa(up)) {

1190

up->port.type = PORT_RSA;

1190

up->port.type = PORT_RSA;

1191

break;

1191

break;

1192

}

1192

}

1193

}

1193

}

1194

}

1194

}

1195

#endif

1195

#endif

1196

1197

#ifdef CONFIG_SERIAL_8250_AU1X00

1197

#ifdef CONFIG_SERIAL_8250_AU1X00

1198

/* if access method is AU, it is a 16550 with a quirk */

1198

/* if access method is AU, it is a 16550 with a quirk */

1199

if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)

1199

if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)

1200

up->bugs |= UART_BUG_NOMSR;

1200

up->bugs |= UART_BUG_NOMSR;

1201

#endif

1201

#endif

1202

1203

serial_outp(up, UART_LCR, save_lcr);

1203

serial_outp(up, UART_LCR, save_lcr);

1204

1205

if (up->capabilities != uart_config[up->port.type].flags) {

1205

if (up->capabilities != uart_config[up->port.type].flags) {

1206

printk(KERN_WARNING

1206

printk(KERN_WARNING

1207

"ttyS%d: detected caps %08x should be %08x\n",

1207

"ttyS%d: detected caps %08x should be %08x\n",

1208

serial_index(&up->port), up->capabilities,

1208

serial_index(&up->port), up->capabilities,

1209

uart_config[up->port.type].flags);

1209

uart_config[up->port.type].flags);

1210

}

1210

}

1211

1212

up->port.fifosize = uart_config[up->port.type].fifo_size;

1212

up->port.fifosize = uart_config[up->port.type].fifo_size;

1213

up->capabilities = uart_config[up->port.type].flags;

1213

up->capabilities = uart_config[up->port.type].flags;

1214

up->tx_loadsz = uart_config[up->port.type].tx_loadsz;

1214

up->tx_loadsz = uart_config[up->port.type].tx_loadsz;

1215

1216

if (up->port.type == PORT_UNKNOWN)

1216

if (up->port.type == PORT_UNKNOWN)

1217

goto out;

1217

goto out;

1218

1219

/*

1219

/*

1220

* Reset the UART.

1220

* Reset the UART.

1221

*/

1221

*/

1222

#ifdef CONFIG_SERIAL_8250_RSA

1222

#ifdef CONFIG_SERIAL_8250_RSA

1223

if (up->port.type == PORT_RSA)

1223

if (up->port.type == PORT_RSA)

1224

serial_outp(up, UART_RSA_FRR, 0);

1224

serial_outp(up, UART_RSA_FRR, 0);

1225

#endif

1225

#endif

1226

serial_outp(up, UART_MCR, save_mcr);

1226

serial_outp(up, UART_MCR, save_mcr);

1227

serial8250_clear_fifos(up);

1227

serial8250_clear_fifos(up);

1228

serial_in(up, UART_RX);

1228

serial_in(up, UART_RX);

1229

if (up->capabilities & UART_CAP_UUE)

1229

if (up->capabilities & UART_CAP_UUE)

1230

serial_outp(up, UART_IER, UART_IER_UUE);

1230

serial_outp(up, UART_IER, UART_IER_UUE);

1231

else

1231

else

1232

serial_outp(up, UART_IER, 0);

1232

serial_outp(up, UART_IER, 0);

1233

1234

out:

1234

out:

1235

spin_unlock_irqrestore(&up->port.lock, flags);

1235

spin_unlock_irqrestore(&up->port.lock, flags);

1236

DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);

1236

DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);

1237

}

1237

}

1238

1239

static void autoconfig_irq(struct uart_8250_port *up)

1239

static void autoconfig_irq(struct uart_8250_port *up)

1240

{

1240

{

1241

unsigned char save_mcr, save_ier;

1241

unsigned char save_mcr, save_ier;

1242

unsigned char save_ICP = 0;

1242

unsigned char save_ICP = 0;

1243

unsigned int ICP = 0;

1243

unsigned int ICP = 0;

1244

unsigned long irqs;

1244

unsigned long irqs;

1245

int irq;

1245

int irq;

1246

1247

if (up->port.flags & UPF_FOURPORT) {

1247

if (up->port.flags & UPF_FOURPORT) {

1248

ICP = (up->port.iobase & 0xfe0) | 0x1f;

1248

ICP = (up->port.iobase & 0xfe0) | 0x1f;

1249

save_ICP = inb_p(ICP);

1249

save_ICP = inb_p(ICP);

1250

outb_p(0x80, ICP);

1250

outb_p(0x80, ICP);

1251

(void) inb_p(ICP);

1251

(void) inb_p(ICP);

1252

}

1252

}

1253

1254

/* forget possible initially masked and pending IRQ */

1254

/* forget possible initially masked and pending IRQ */

1255

probe_irq_off(probe_irq_on());

1255

probe_irq_off(probe_irq_on());

1256

save_mcr = serial_inp(up, UART_MCR);

1256

save_mcr = serial_inp(up, UART_MCR);

1257

save_ier = serial_inp(up, UART_IER);

1257

save_ier = serial_inp(up, UART_IER);

1258

serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);

1258

serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);

1259

1260

irqs = probe_irq_on();

1260

irqs = probe_irq_on();

1261

serial_outp(up, UART_MCR, 0);

1261

serial_outp(up, UART_MCR, 0);

1262

udelay(10);

1262

udelay(10);

1263

if (up->port.flags & UPF_FOURPORT) {

1263

if (up->port.flags & UPF_FOURPORT) {

1264

serial_outp(up, UART_MCR,

1264

serial_outp(up, UART_MCR,

1265

UART_MCR_DTR | UART_MCR_RTS);

1265

UART_MCR_DTR | UART_MCR_RTS);

1266

} else {

1266

} else {

1267

serial_outp(up, UART_MCR,

1267

serial_outp(up, UART_MCR,

1268

UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);

1268

UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);

1269

}

1269

}

1270

serial_outp(up, UART_IER, 0x0f); /* enable all intrs */

1270

serial_outp(up, UART_IER, 0x0f); /* enable all intrs */

1271

(void)serial_inp(up, UART_LSR);

1271

(void)serial_inp(up, UART_LSR);

1272

(void)serial_inp(up, UART_RX);

1272

(void)serial_inp(up, UART_RX);

1273

(void)serial_inp(up, UART_IIR);

1273

(void)serial_inp(up, UART_IIR);

1274

(void)serial_inp(up, UART_MSR);

1274

(void)serial_inp(up, UART_MSR);

1275

serial_outp(up, UART_TX, 0xFF);

1275

serial_outp(up, UART_TX, 0xFF);

1276

udelay(20);

1276

udelay(20);

1277

irq = probe_irq_off(irqs);

1277

irq = probe_irq_off(irqs);

1278

1279

serial_outp(up, UART_MCR, save_mcr);

1279

serial_outp(up, UART_MCR, save_mcr);

1280

serial_outp(up, UART_IER, save_ier);

1280

serial_outp(up, UART_IER, save_ier);

1281

1282

if (up->port.flags & UPF_FOURPORT)

1282

if (up->port.flags & UPF_FOURPORT)

1283

outb_p(save_ICP, ICP);

1283

outb_p(save_ICP, ICP);

1284

1285

up->port.irq = (irq > 0) ? irq : 0;

1285

up->port.irq = (irq > 0) ? irq : 0;

1286

}

1286

}

1287

1288

static inline void __stop_tx(struct uart_8250_port *p)

1288

static inline void __stop_tx(struct uart_8250_port *p)

1289

{

1289

{

1290

if (p->ier & UART_IER_THRI) {

1290

if (p->ier & UART_IER_THRI) {

1291

p->ier &= ~UART_IER_THRI;

1291

p->ier &= ~UART_IER_THRI;

1292

serial_out(p, UART_IER, p->ier);

1292

serial_out(p, UART_IER, p->ier);

1293

}

1293

}

1294

}

1294

}

1295

1296

static void serial8250_stop_tx(struct uart_port *port)

1296

static void serial8250_stop_tx(struct uart_port *port)

1297

{

1297

{

1298

struct uart_8250_port *up = (struct uart_8250_port *)port;

1298

struct uart_8250_port *up = (struct uart_8250_port *)port;

1299

1300

__stop_tx(up);

1300

__stop_tx(up);

1301

1302

/*

1302

/*

1303

* We really want to stop the transmitter from sending.

1303

* We really want to stop the transmitter from sending.

1304

*/

1304

*/

1305

if (up->port.type == PORT_16C950) {

1305

if (up->port.type == PORT_16C950) {

1306

up->acr |= UART_ACR_TXDIS;

1306

up->acr |= UART_ACR_TXDIS;

1307

serial_icr_write(up, UART_ACR, up->acr);

1307

serial_icr_write(up, UART_ACR, up->acr);

1308

}

1308

}

1309

}

1309

}

1310

1311

static void transmit_chars(struct uart_8250_port *up);

1311

static void transmit_chars(struct uart_8250_port *up);

1312

1313

static void serial8250_start_tx(struct uart_port *port)

1313

static void serial8250_start_tx(struct uart_port *port)

1314

{

1314

{

1315

struct uart_8250_port *up = (struct uart_8250_port *)port;

1315

struct uart_8250_port *up = (struct uart_8250_port *)port;

1316

1317

if (!(up->ier & UART_IER_THRI)) {

1317

if (!(up->ier & UART_IER_THRI)) {

1318

up->ier |= UART_IER_THRI;

1318

up->ier |= UART_IER_THRI;

1319

serial_out(up, UART_IER, up->ier);

1319

serial_out(up, UART_IER, up->ier);

1320

1321

if (up->bugs & UART_BUG_TXEN) {

1321

if (up->bugs & UART_BUG_TXEN) {

1322

unsigned char lsr, iir;

1322

unsigned char lsr, iir;

1323

lsr = serial_in(up, UART_LSR);

1323

lsr = serial_in(up, UART_LSR);

1324

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1324

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1325

iir = serial_in(up, UART_IIR) & 0x0f;

1325

iir = serial_in(up, UART_IIR) & 0x0f;

1326

if ((up->port.type == PORT_RM9000) ?

1326

if ((up->port.type == PORT_RM9000) ?

1327

(lsr & UART_LSR_THRE &&

1327

(lsr & UART_LSR_THRE &&

1328

(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :

1328

(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :

1329

(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))

1329

(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))

1330

transmit_chars(up);

1330

transmit_chars(up);

1331

}

1331

}

1332

}

1332

}

1333

1334

/*

1334

/*

1335

* Re-enable the transmitter if we disabled it.

1335

* Re-enable the transmitter if we disabled it.

1336

*/

1336

*/

1337

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

1337

if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {

1338

up->acr &= ~UART_ACR_TXDIS;

1338

up->acr &= ~UART_ACR_TXDIS;

1339

serial_icr_write(up, UART_ACR, up->acr);

1339

serial_icr_write(up, UART_ACR, up->acr);

1340

}

1340

}

1341

}

1341

}

1342

1343

static void serial8250_stop_rx(struct uart_port *port)

1343

static void serial8250_stop_rx(struct uart_port *port)

1344

{

1344

{

1345

struct uart_8250_port *up = (struct uart_8250_port *)port;

1345

struct uart_8250_port *up = (struct uart_8250_port *)port;

1346

1347

up->ier &= ~UART_IER_RLSI;

1347

up->ier &= ~UART_IER_RLSI;

1348

up->port.read_status_mask &= ~UART_LSR_DR;

1348

up->port.read_status_mask &= ~UART_LSR_DR;

1349

serial_out(up, UART_IER, up->ier);

1349

serial_out(up, UART_IER, up->ier);

1350

}

1350

}

1351

1352

static void serial8250_enable_ms(struct uart_port *port)

1352

static void serial8250_enable_ms(struct uart_port *port)

1353

{

1353

{

1354

struct uart_8250_port *up = (struct uart_8250_port *)port;

1354

struct uart_8250_port *up = (struct uart_8250_port *)port;

1355

1356

/* no MSR capabilities */

1356

/* no MSR capabilities */

1357

if (up->bugs & UART_BUG_NOMSR)

1357

if (up->bugs & UART_BUG_NOMSR)

1358

return;

1358

return;

1359

1360

up->ier |= UART_IER_MSI;

1360

up->ier |= UART_IER_MSI;

1361

serial_out(up, UART_IER, up->ier);

1361

serial_out(up, UART_IER, up->ier);

1362

}

1362

}

1363

1364

static void

1364

static void

1365

receive_chars(struct uart_8250_port *up, unsigned int *status)

1365

receive_chars(struct uart_8250_port *up, unsigned int *status)

1366

{

1366

{

1367

struct tty_struct *tty = up->port.info->port.tty;

1367

struct tty_struct *tty = up->port.info->port.tty;

1368

unsigned char ch, lsr = *status;

1368

unsigned char ch, lsr = *status;

1369

int max_count = 256;

1369

int max_count = 256;

1370

char flag;

1370

char flag;

1371

1372

do {

1372

do {

1373

if (likely(lsr & UART_LSR_DR))

1373

if (likely(lsr & UART_LSR_DR))

1374

ch = serial_inp(up, UART_RX);

1374

ch = serial_inp(up, UART_RX);

1375

else

1375

else

1376

/*

1376

/*

1377

* Intel 82571 has a Serial Over Lan device that will

1377

* Intel 82571 has a Serial Over Lan device that will

1378

* set UART_LSR_BI without setting UART_LSR_DR when

1378

* set UART_LSR_BI without setting UART_LSR_DR when

1379

* it receives a break. To avoid reading from the

1379

* it receives a break. To avoid reading from the

1380

* receive buffer without UART_LSR_DR bit set, we

1380

* receive buffer without UART_LSR_DR bit set, we

1381

* just force the read character to be 0

1381

* just force the read character to be 0

1382

*/

1382

*/

1383

ch = 0;

1383

ch = 0;

1384

1385

flag = TTY_NORMAL;

1385

flag = TTY_NORMAL;

1386

up->port.icount.rx++;

1386

up->port.icount.rx++;

1387

1388

lsr |= up->lsr_saved_flags;

1388

lsr |= up->lsr_saved_flags;

1389

up->lsr_saved_flags = 0;

1389

up->lsr_saved_flags = 0;

1390

1391

if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {

1391

if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {

1392

/*

1392

/*

1393

* For statistics only

1393

* For statistics only

1394

*/

1394

*/

1395

if (lsr & UART_LSR_BI) {

1395

if (lsr & UART_LSR_BI) {

1396

lsr &= ~(UART_LSR_FE | UART_LSR_PE);

1396

lsr &= ~(UART_LSR_FE | UART_LSR_PE);

1397

up->port.icount.brk++;

1397

up->port.icount.brk++;

1398

/*

1398

/*

1399

* We do the SysRQ and SAK checking

1399

* We do the SysRQ and SAK checking

1400

* here because otherwise the break

1400

* here because otherwise the break

1401

* may get masked by ignore_status_mask

1401

* may get masked by ignore_status_mask

1402

* or read_status_mask.

1402

* or read_status_mask.

1403

*/

1403

*/

1404

if (uart_handle_break(&up->port))

1404

if (uart_handle_break(&up->port))

1405

goto ignore_char;

1405

goto ignore_char;

1406

} else if (lsr & UART_LSR_PE)

1406

} else if (lsr & UART_LSR_PE)

1407

up->port.icount.parity++;

1407

up->port.icount.parity++;

1408

else if (lsr & UART_LSR_FE)

1408

else if (lsr & UART_LSR_FE)

1409

up->port.icount.frame++;

1409

up->port.icount.frame++;

1410

if (lsr & UART_LSR_OE)

1410

if (lsr & UART_LSR_OE)

1411

up->port.icount.overrun++;

1411

up->port.icount.overrun++;

1412

1413

/*

1413

/*

1414

* Mask off conditions which should be ignored.

1414

* Mask off conditions which should be ignored.

1415

*/

1415

*/

1416

lsr &= up->port.read_status_mask;

1416

lsr &= up->port.read_status_mask;

1417

1418

if (lsr & UART_LSR_BI) {

1418

if (lsr & UART_LSR_BI) {

1419

DEBUG_INTR("handling break....");

1419

DEBUG_INTR("handling break....");

1420

flag = TTY_BREAK;

1420

flag = TTY_BREAK;

1421

} else if (lsr & UART_LSR_PE)

1421

} else if (lsr & UART_LSR_PE)

1422

flag = TTY_PARITY;

1422

flag = TTY_PARITY;

1423

else if (lsr & UART_LSR_FE)

1423

else if (lsr & UART_LSR_FE)

1424

flag = TTY_FRAME;

1424

flag = TTY_FRAME;

1425

}

1425

}

1426

if (uart_handle_sysrq_char(&up->port, ch))

1426

if (uart_handle_sysrq_char(&up->port, ch))

1427

goto ignore_char;

1427

goto ignore_char;

1428

1429

uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

1429

uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);

1430

1431

ignore_char:

1431

ignore_char:

1432

lsr = serial_inp(up, UART_LSR);

1432

lsr = serial_inp(up, UART_LSR);

1433

} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));

1433

} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));

1434

spin_unlock(&up->port.lock);

1434

spin_unlock(&up->port.lock);

1435

tty_flip_buffer_push(tty);

1435

tty_flip_buffer_push(tty);

1436

spin_lock(&up->port.lock);

1436

spin_lock(&up->port.lock);

1437

*status = lsr;

1437

*status = lsr;

1438

}

1438

}

1439

1440

static void transmit_chars(struct uart_8250_port *up)

1440

static void transmit_chars(struct uart_8250_port *up)

1441

{

1441

{

1442

struct circ_buf *xmit = &up->port.info->xmit;

1442

struct circ_buf *xmit = &up->port.info->xmit;

1443

int count;

1443

int count;

1444

1445

if (up->port.x_char) {

1445

if (up->port.x_char) {

1446

serial_outp(up, UART_TX, up->port.x_char);

1446

serial_outp(up, UART_TX, up->port.x_char);

1447

up->port.icount.tx++;

1447

up->port.icount.tx++;

1448

up->port.x_char = 0;

1448

up->port.x_char = 0;

1449

return;

1449

return;

1450

}

1450

}

1451

if (uart_tx_stopped(&up->port)) {

1451

if (uart_tx_stopped(&up->port)) {

1452

serial8250_stop_tx(&up->port);

1452

serial8250_stop_tx(&up->port);

1453

return;

1453

return;

1454

}

1454

}

1455

if (uart_circ_empty(xmit)) {

1455

if (uart_circ_empty(xmit)) {

1456

__stop_tx(up);

1456

__stop_tx(up);

1457

return;

1457

return;

1458

}

1458

}

1459

1460

count = up->tx_loadsz;

1460

count = up->tx_loadsz;

1461

do {

1461

do {

1462

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

1462

serial_out(up, UART_TX, xmit->buf[xmit->tail]);

1463

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

1463

xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);

1464

up->port.icount.tx++;

1464

up->port.icount.tx++;

1465

if (uart_circ_empty(xmit))

1465

if (uart_circ_empty(xmit))

1466

break;

1466

break;

1467

} while (--count > 0);

1467

} while (--count > 0);

1468

1469

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

1469

if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)

1470

uart_write_wakeup(&up->port);

1470

uart_write_wakeup(&up->port);

1471

1472

DEBUG_INTR("THRE...");

1472

DEBUG_INTR("THRE...");

1473

1474

if (uart_circ_empty(xmit))

1474

if (uart_circ_empty(xmit))

1475

__stop_tx(up);

1475

__stop_tx(up);

1476

}

1476

}

1477

1478

static unsigned int check_modem_status(struct uart_8250_port *up)

1478

static unsigned int check_modem_status(struct uart_8250_port *up)

1479

{

1479

{

1480

unsigned int status = serial_in(up, UART_MSR);

1480

unsigned int status = serial_in(up, UART_MSR);

1481

1482

status |= up->msr_saved_flags;

1482

status |= up->msr_saved_flags;

1483

up->msr_saved_flags = 0;

1483

up->msr_saved_flags = 0;

1484

if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&

1484

if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&

1485

up->port.info != NULL) {

1485

up->port.info != NULL) {

1486

if (status & UART_MSR_TERI)

1486

if (status & UART_MSR_TERI)

1487

up->port.icount.rng++;

1487

up->port.icount.rng++;

1488

if (status & UART_MSR_DDSR)

1488

if (status & UART_MSR_DDSR)

1489

up->port.icount.dsr++;

1489

up->port.icount.dsr++;

1490

if (status & UART_MSR_DDCD)

1490

if (status & UART_MSR_DDCD)

1491

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

1491

uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);

1492

if (status & UART_MSR_DCTS)

1492

if (status & UART_MSR_DCTS)

1493

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

1493

uart_handle_cts_change(&up->port, status & UART_MSR_CTS);

1494

1495

wake_up_interruptible(&up->port.info->delta_msr_wait);

1495

wake_up_interruptible(&up->port.info->delta_msr_wait);

1496

}

1496

}

1497

1498

return status;

1498

return status;

1499

}

1499

}

1500

1501

/*

1501

/*

1502

* This handles the interrupt from one port.

1502

* This handles the interrupt from one port.

1503

*/

1503

*/

1504

static void serial8250_handle_port(struct uart_8250_port *up)

1504

static void serial8250_handle_port(struct uart_8250_port *up)

1505

{

1505

{

1506

unsigned int status;

1506

unsigned int status;

1507

unsigned long flags;

1507

unsigned long flags;

1508

1509

spin_lock_irqsave(&up->port.lock, flags);

1509

spin_lock_irqsave(&up->port.lock, flags);

1510

1511

status = serial_inp(up, UART_LSR);

1511

status = serial_inp(up, UART_LSR);

1512

1513

DEBUG_INTR("status = %x...", status);

1513

DEBUG_INTR("status = %x...", status);

1514

1515

if (status & (UART_LSR_DR | UART_LSR_BI))

1515

if (status & (UART_LSR_DR | UART_LSR_BI))

1516

receive_chars(up, &status);

1516

receive_chars(up, &status);

1517

check_modem_status(up);

1517

check_modem_status(up);

1518

if (status & UART_LSR_THRE)

1518

if (status & UART_LSR_THRE)

1519

transmit_chars(up);

1519

transmit_chars(up);

1520

1521

spin_unlock_irqrestore(&up->port.lock, flags);

1521

spin_unlock_irqrestore(&up->port.lock, flags);

1522

}

1522

}

1523

1524

/*

1524

/*

1525

* This is the serial driver's interrupt routine.

1525

* This is the serial driver's interrupt routine.

1526

*

1526

*

1527

* Arjan thinks the old way was overly complex, so it got simplified.

1527

* Arjan thinks the old way was overly complex, so it got simplified.

1528

* Alan disagrees, saying that need the complexity to handle the weird

1528

* Alan disagrees, saying that need the complexity to handle the weird

1529

* nature of ISA shared interrupts. (This is a special exception.)

1529

* nature of ISA shared interrupts. (This is a special exception.)

1530

*

1530

*

1531

* In order to handle ISA shared interrupts properly, we need to check

1531

* In order to handle ISA shared interrupts properly, we need to check

1532

* that all ports have been serviced, and therefore the ISA interrupt

1532

* that all ports have been serviced, and therefore the ISA interrupt

1533

* line has been de-asserted.

1533

* line has been de-asserted.

1534

*

1534

*

1535

* This means we need to loop through all ports. checking that they

1535

* This means we need to loop through all ports. checking that they

1536

* don't have an interrupt pending.

1536

* don't have an interrupt pending.

1537

*/

1537

*/

1538

static irqreturn_t serial8250_interrupt(int irq, void *dev_id)

1538

static irqreturn_t serial8250_interrupt(int irq, void *dev_id)

1539

{

1539

{

1540

struct irq_info *i = dev_id;

1540

struct irq_info *i = dev_id;

1541

struct list_head *l, *end = NULL;

1541

struct list_head *l, *end = NULL;

1542

int pass_counter = 0, handled = 0;

1542

int pass_counter = 0, handled = 0;

1543

1544

DEBUG_INTR("serial8250_interrupt(%d)...", irq);

1544

DEBUG_INTR("serial8250_interrupt(%d)...", irq);

1545

1546

spin_lock(&i->lock);

1546

spin_lock(&i->lock);

1547

1548

l = i->head;

1548

l = i->head;

1549

do {

1549

do {

1550

struct uart_8250_port *up;

1550

struct uart_8250_port *up;

1551

unsigned int iir;

1551

unsigned int iir;

1552

1553

up = list_entry(l, struct uart_8250_port, list);

1553

up = list_entry(l, struct uart_8250_port, list);

1554

1555

iir = serial_in(up, UART_IIR);

1555

iir = serial_in(up, UART_IIR);

1556

if (!(iir & UART_IIR_NO_INT)) {

1556

if (!(iir & UART_IIR_NO_INT)) {

1557

serial8250_handle_port(up);

1557

serial8250_handle_port(up);

1558

1559

handled = 1;

1559

handled = 1;

1560

1561

end = NULL;

1561

end = NULL;

1562

} else if (up->port.iotype == UPIO_DWAPB &&

1562

} else if (up->port.iotype == UPIO_DWAPB &&

1563

(iir & UART_IIR_BUSY) == UART_IIR_BUSY) {

1563

(iir & UART_IIR_BUSY) == UART_IIR_BUSY) {

1564

/* The DesignWare APB UART has an Busy Detect (0x07)

1564

/* The DesignWare APB UART has an Busy Detect (0x07)

1565

* interrupt meaning an LCR write attempt occured while the

1565

* interrupt meaning an LCR write attempt occured while the

1566

* UART was busy. The interrupt must be cleared by reading

1566

* UART was busy. The interrupt must be cleared by reading

1567

* the UART status register (USR) and the LCR re-written. */

1567

* the UART status register (USR) and the LCR re-written. */

1568

unsigned int status;

1568

unsigned int status;

1569

status = *(volatile u32 *)up->port.private_data;

1569

status = *(volatile u32 *)up->port.private_data;

1570

serial_out(up, UART_LCR, up->lcr);

1570

serial_out(up, UART_LCR, up->lcr);

1571

1572

handled = 1;

1572

handled = 1;

1573

1574

end = NULL;

1574

end = NULL;

1575

} else if (end == NULL)

1575

} else if (end == NULL)

1576

end = l;

1576

end = l;

1577

1578

l = l->next;

1578

l = l->next;

1579

1580

if (l == i->head && pass_counter++ > PASS_LIMIT) {

1580

if (l == i->head && pass_counter++ > PASS_LIMIT) {

1581

/* If we hit this, we're dead. */

1581

/* If we hit this, we're dead. */

1582

printk(KERN_ERR "serial8250: too much work for "

1582

printk(KERN_ERR "serial8250: too much work for "

1583

"irq%d\n", irq);

1583

"irq%d\n", irq);

1584

break;

1584

break;

1585

}

1585

}

1586

} while (l != end);

1586

} while (l != end);

1587

1588

spin_unlock(&i->lock);

1588

spin_unlock(&i->lock);

1589

1590

DEBUG_INTR("end.\n");

1590

DEBUG_INTR("end.\n");

1591

1592

return IRQ_RETVAL(handled);

1592

return IRQ_RETVAL(handled);

1593

}

1593

}

1594

1595

/*

1595

/*

1596

* To support ISA shared interrupts, we need to have one interrupt

1596

* To support ISA shared interrupts, we need to have one interrupt

1597

* handler that ensures that the IRQ line has been deasserted

1597

* handler that ensures that the IRQ line has been deasserted

1598

* before returning. Failing to do this will result in the IRQ

1598

* before returning. Failing to do this will result in the IRQ

1599

* line being stuck active, and, since ISA irqs are edge triggered,

1599

* line being stuck active, and, since ISA irqs are edge triggered,

1600

* no more IRQs will be seen.

1600

* no more IRQs will be seen.

1601

*/

1601

*/

1602

static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)

1602

static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)

1603

{

1603

{

1604

spin_lock_irq(&i->lock);

1604

spin_lock_irq(&i->lock);

1605

1606

if (!list_empty(i->head)) {

1606

if (!list_empty(i->head)) {

1607

if (i->head == &up->list)

1607

if (i->head == &up->list)

1608

i->head = i->head->next;

1608

i->head = i->head->next;

1609

list_del(&up->list);

1609

list_del(&up->list);

1610

} else {

1610

} else {

1611

BUG_ON(i->head != &up->list);

1611

BUG_ON(i->head != &up->list);

1612

i->head = NULL;

1612

i->head = NULL;

1613

}

1613

}

1614

spin_unlock_irq(&i->lock);

1614

spin_unlock_irq(&i->lock);

1615

/* List empty so throw away the hash node */

1615

/* List empty so throw away the hash node */

1616

if (i->head == NULL) {

1616

if (i->head == NULL) {

1617

hlist_del(&i->node);

1617

hlist_del(&i->node);

1618

kfree(i);

1618

kfree(i);

1619

}

1619

}

1620

}

1620

}

1621

1622

static int serial_link_irq_chain(struct uart_8250_port *up)

1622

static int serial_link_irq_chain(struct uart_8250_port *up)

1623

{

1623

{

1624

struct hlist_head *h;

1624

struct hlist_head *h;

1625

struct hlist_node *n;

1625

struct hlist_node *n;

1626

struct irq_info *i;

1626

struct irq_info *i;

1627

int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;

1627

int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;

1628

1629

mutex_lock(&hash_mutex);

1629

mutex_lock(&hash_mutex);

1630

1631

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1631

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1632

1633

hlist_for_each(n, h) {

1633

hlist_for_each(n, h) {

1634

i = hlist_entry(n, struct irq_info, node);

1634

i = hlist_entry(n, struct irq_info, node);

1635

if (i->irq == up->port.irq)

1635

if (i->irq == up->port.irq)

1636

break;

1636

break;

1637

}

1637

}

1638

1639

if (n == NULL) {

1639

if (n == NULL) {

1640

i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);

1640

i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);

1641

if (i == NULL) {

1641

if (i == NULL) {

1642

mutex_unlock(&hash_mutex);

1642

mutex_unlock(&hash_mutex);

1643

return -ENOMEM;

1643

return -ENOMEM;

1644

}

1644

}

1645

spin_lock_init(&i->lock);

1645

spin_lock_init(&i->lock);

1646

i->irq = up->port.irq;

1646

i->irq = up->port.irq;

1647

hlist_add_head(&i->node, h);

1647

hlist_add_head(&i->node, h);

1648

}

1648

}

1649

mutex_unlock(&hash_mutex);

1649

mutex_unlock(&hash_mutex);

1650

1651

spin_lock_irq(&i->lock);

1651

spin_lock_irq(&i->lock);

1652

1653

if (i->head) {

1653

if (i->head) {

1654

list_add(&up->list, i->head);

1654

list_add(&up->list, i->head);

1655

spin_unlock_irq(&i->lock);

1655

spin_unlock_irq(&i->lock);

1656

1657

ret = 0;

1657

ret = 0;

1658

} else {

1658

} else {

1659

INIT_LIST_HEAD(&up->list);

1659

INIT_LIST_HEAD(&up->list);

1660

i->head = &up->list;

1660

i->head = &up->list;

1661

spin_unlock_irq(&i->lock);

1661

spin_unlock_irq(&i->lock);

1662

1663

ret = request_irq(up->port.irq, serial8250_interrupt,

1663

ret = request_irq(up->port.irq, serial8250_interrupt,

1664

irq_flags, "serial", i);

1664

irq_flags, "serial", i);

1665

if (ret < 0)

1665

if (ret < 0)

1666

serial_do_unlink(i, up);

1666

serial_do_unlink(i, up);

1667

}

1667

}

1668

1669

return ret;

1669

return ret;

1670

}

1670

}

1671

1672

static void serial_unlink_irq_chain(struct uart_8250_port *up)

1672

static void serial_unlink_irq_chain(struct uart_8250_port *up)

1673

{

1673

{

1674

struct irq_info *i;

1674

struct irq_info *i;

1675

struct hlist_node *n;

1675

struct hlist_node *n;

1676

struct hlist_head *h;

1676

struct hlist_head *h;

1677

1678

mutex_lock(&hash_mutex);

1678

mutex_lock(&hash_mutex);

1679

1680

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1680

h = &irq_lists[up->port.irq % NR_IRQ_HASH];

1681

1682

hlist_for_each(n, h) {

1682

hlist_for_each(n, h) {

1683

i = hlist_entry(n, struct irq_info, node);

1683

i = hlist_entry(n, struct irq_info, node);

1684

if (i->irq == up->port.irq)

1684

if (i->irq == up->port.irq)

1685

break;

1685

break;

1686

}

1686

}

1687

1688

BUG_ON(n == NULL);

1688

BUG_ON(n == NULL);

1689

BUG_ON(i->head == NULL);

1689

BUG_ON(i->head == NULL);

1690

1691

if (list_empty(i->head))

1691

if (list_empty(i->head))

1692

free_irq(up->port.irq, i);

1692

free_irq(up->port.irq, i);

1693

1694

serial_do_unlink(i, up);

1694

serial_do_unlink(i, up);

1695

mutex_unlock(&hash_mutex);

1695

mutex_unlock(&hash_mutex);

1696

}

1696

}

1697

1698

/* Base timer interval for polling */

1698

/* Base timer interval for polling */

1699

static inline int poll_timeout(int timeout)

1699

static inline int poll_timeout(int timeout)

1700

{

1700

{

1701

return timeout > 6 ? (timeout / 2 - 2) : 1;

1701

return timeout > 6 ? (timeout / 2 - 2) : 1;

1702

}

1702

}

1703

1704

/*

1704

/*

1705

* This function is used to handle ports that do not have an

1705

* This function is used to handle ports that do not have an

1706

* interrupt. This doesn't work very well for 16450's, but gives

1706

* interrupt. This doesn't work very well for 16450's, but gives

1707

* barely passable results for a 16550A. (Although at the expense

1707

* barely passable results for a 16550A. (Although at the expense

1708

* of much CPU overhead).

1708

* of much CPU overhead).

1709

*/

1709

*/

1710

static void serial8250_timeout(unsigned long data)

1710

static void serial8250_timeout(unsigned long data)

1711

{

1711

{

1712

struct uart_8250_port *up = (struct uart_8250_port *)data;

1712

struct uart_8250_port *up = (struct uart_8250_port *)data;

1713

unsigned int iir;

1713

unsigned int iir;

1714

1715

iir = serial_in(up, UART_IIR);

1715

iir = serial_in(up, UART_IIR);

1716

if (!(iir & UART_IIR_NO_INT))

1716

if (!(iir & UART_IIR_NO_INT))

1717

serial8250_handle_port(up);

1717

serial8250_handle_port(up);

1718

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

1718

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

1719

}

1719

}

1720

1721

static void serial8250_backup_timeout(unsigned long data)

1721

static void serial8250_backup_timeout(unsigned long data)

1722

{

1722

{

1723

struct uart_8250_port *up = (struct uart_8250_port *)data;

1723

struct uart_8250_port *up = (struct uart_8250_port *)data;

1724

unsigned int iir, ier = 0, lsr;

1724

unsigned int iir, ier = 0, lsr;

1725

unsigned long flags;

1725

unsigned long flags;

1726

1727

/*

1727

/*

1728

* Must disable interrupts or else we risk racing with the interrupt

1728

* Must disable interrupts or else we risk racing with the interrupt

1729

* based handler.

1729

* based handler.

1730

*/

1730

*/

1731

if (is_real_interrupt(up->port.irq)) {

1731

if (is_real_interrupt(up->port.irq)) {

1732

ier = serial_in(up, UART_IER);

1732

ier = serial_in(up, UART_IER);

1733

serial_out(up, UART_IER, 0);

1733

serial_out(up, UART_IER, 0);

1734

}

1734

}

1735

1736

iir = serial_in(up, UART_IIR);

1736

iir = serial_in(up, UART_IIR);

1737

1738

/*

1738

/*

1739

* This should be a safe test for anyone who doesn't trust the

1739

* This should be a safe test for anyone who doesn't trust the

1740

* IIR bits on their UART, but it's specifically designed for

1740

* IIR bits on their UART, but it's specifically designed for

1741

* the "Diva" UART used on the management processor on many HP

1741

* the "Diva" UART used on the management processor on many HP

1742

* ia64 and parisc boxes.

1742

* ia64 and parisc boxes.

1743

*/

1743

*/

1744

spin_lock_irqsave(&up->port.lock, flags);

1744

spin_lock_irqsave(&up->port.lock, flags);

1745

lsr = serial_in(up, UART_LSR);

1745

lsr = serial_in(up, UART_LSR);

1746

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1746

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1747

spin_unlock_irqrestore(&up->port.lock, flags);

1747

spin_unlock_irqrestore(&up->port.lock, flags);

1748

if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&

1748

if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&

1749

(!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&

1749

(!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&

1750

(lsr & UART_LSR_THRE)) {

1750

(lsr & UART_LSR_THRE)) {

1751

iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);

1751

iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);

1752

iir |= UART_IIR_THRI;

1752

iir |= UART_IIR_THRI;

1753

}

1753

}

1754

1755

if (!(iir & UART_IIR_NO_INT))

1755

if (!(iir & UART_IIR_NO_INT))

1756

serial8250_handle_port(up);

1756

serial8250_handle_port(up);

1757

1758

if (is_real_interrupt(up->port.irq))

1758

if (is_real_interrupt(up->port.irq))

1759

serial_out(up, UART_IER, ier);

1759

serial_out(up, UART_IER, ier);

1760

1761

/* Standard timer interval plus 0.2s to keep the port running */

1761

/* Standard timer interval plus 0.2s to keep the port running */

1762

mod_timer(&up->timer,

1762

mod_timer(&up->timer,

1763

jiffies + poll_timeout(up->port.timeout) + HZ / 5);

1763

jiffies + poll_timeout(up->port.timeout) + HZ / 5);

1764

}

1764

}

1765

1766

static unsigned int serial8250_tx_empty(struct uart_port *port)

1766

static unsigned int serial8250_tx_empty(struct uart_port *port)

1767

{

1767

{

1768

struct uart_8250_port *up = (struct uart_8250_port *)port;

1768

struct uart_8250_port *up = (struct uart_8250_port *)port;

1769

unsigned long flags;

1769

unsigned long flags;

1770

unsigned int lsr;

1770

unsigned int lsr;

1771

1772

spin_lock_irqsave(&up->port.lock, flags);

1772

spin_lock_irqsave(&up->port.lock, flags);

1773

lsr = serial_in(up, UART_LSR);

1773

lsr = serial_in(up, UART_LSR);

1774

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1774

up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;

1775

spin_unlock_irqrestore(&up->port.lock, flags);

1775

spin_unlock_irqrestore(&up->port.lock, flags);

1776

1777

return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;

1777

return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;

1778

}

1778

}

1779

1780

static unsigned int serial8250_get_mctrl(struct uart_port *port)

1780

static unsigned int serial8250_get_mctrl(struct uart_port *port)

1781

{

1781

{

1782

struct uart_8250_port *up = (struct uart_8250_port *)port;

1782

struct uart_8250_port *up = (struct uart_8250_port *)port;

1783

unsigned int status;

1783

unsigned int status;

1784

unsigned int ret;

1784

unsigned int ret;

1785

1786

status = check_modem_status(up);

1786

status = check_modem_status(up);

1787

1788

ret = 0;

1788

ret = 0;

1789

if (status & UART_MSR_DCD)

1789

if (status & UART_MSR_DCD)

1790

ret |= TIOCM_CAR;

1790

ret |= TIOCM_CAR;

1791

if (status & UART_MSR_RI)

1791

if (status & UART_MSR_RI)

1792

ret |= TIOCM_RNG;

1792

ret |= TIOCM_RNG;

1793

if (status & UART_MSR_DSR)

1793

if (status & UART_MSR_DSR)

1794

ret |= TIOCM_DSR;

1794

ret |= TIOCM_DSR;

1795

if (status & UART_MSR_CTS)

1795

if (status & UART_MSR_CTS)

1796

ret |= TIOCM_CTS;

1796

ret |= TIOCM_CTS;

1797

return ret;

1797

return ret;

1798

}

1798

}

1799

1800

static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)

1800

static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)

1801

{

1801

{

1802

struct uart_8250_port *up = (struct uart_8250_port *)port;

1802

struct uart_8250_port *up = (struct uart_8250_port *)port;

1803

unsigned char mcr = 0;

1803

unsigned char mcr = 0;

1804

1805

if (mctrl & TIOCM_RTS)

1805

if (mctrl & TIOCM_RTS)

1806

mcr |= UART_MCR_RTS;

1806

mcr |= UART_MCR_RTS;

1807

if (mctrl & TIOCM_DTR)

1807

if (mctrl & TIOCM_DTR)

1808

mcr |= UART_MCR_DTR;

1808

mcr |= UART_MCR_DTR;

1809

if (mctrl & TIOCM_OUT1)

1809

if (mctrl & TIOCM_OUT1)

1810

mcr |= UART_MCR_OUT1;

1810

mcr |= UART_MCR_OUT1;

1811

if (mctrl & TIOCM_OUT2)

1811

if (mctrl & TIOCM_OUT2)

1812

mcr |= UART_MCR_OUT2;

1812

mcr |= UART_MCR_OUT2;

1813

if (mctrl & TIOCM_LOOP)

1813

if (mctrl & TIOCM_LOOP)

1814

mcr |= UART_MCR_LOOP;

1814

mcr |= UART_MCR_LOOP;

1815

1816

mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;

1816

mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;

1817

1818

serial_out(up, UART_MCR, mcr);

1818

serial_out(up, UART_MCR, mcr);

1819

}

1819

}

1820

1821

static void serial8250_break_ctl(struct uart_port *port, int break_state)

1821

static void serial8250_break_ctl(struct uart_port *port, int break_state)

1822

{

1822

{

1823

struct uart_8250_port *up = (struct uart_8250_port *)port;

1823

struct uart_8250_port *up = (struct uart_8250_port *)port;

1824

unsigned long flags;

1824

unsigned long flags;

1825

1826

spin_lock_irqsave(&up->port.lock, flags);

1826

spin_lock_irqsave(&up->port.lock, flags);

1827

if (break_state == -1)

1827

if (break_state == -1)

1828

up->lcr |= UART_LCR_SBC;

1828

up->lcr |= UART_LCR_SBC;

1829

else

1829

else

1830

up->lcr &= ~UART_LCR_SBC;

1830

up->lcr &= ~UART_LCR_SBC;

1831

serial_out(up, UART_LCR, up->lcr);

1831

serial_out(up, UART_LCR, up->lcr);

1832

spin_unlock_irqrestore(&up->port.lock, flags);

1832

spin_unlock_irqrestore(&up->port.lock, flags);

1833

}

1833

}

1834

1835

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

1835

#define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)

1836

1837

/*

1837

/*

1838

* Wait for transmitter & holding register to empty

1838

* Wait for transmitter & holding register to empty

1839

*/

1839

*/

1840

static void wait_for_xmitr(struct uart_8250_port *up, int bits)

1840

static void wait_for_xmitr(struct uart_8250_port *up, int bits)

1841

{

1841

{

1842

unsigned int status, tmout = 10000;

1842

unsigned int status, tmout = 10000;

1843

1844

/* Wait up to 10ms for the character(s) to be sent. */

1844

/* Wait up to 10ms for the character(s) to be sent. */

1845

do {

1845

do {

1846

status = serial_in(up, UART_LSR);

1846

status = serial_in(up, UART_LSR);

1847

1848

up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;

1848

up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;

1849

1850

if (--tmout == 0)

1850

if (--tmout == 0)

1851

break;

1851

break;

1852

udelay(1);

1852

udelay(1);

1853

} while ((status & bits) != bits);

1853

} while ((status & bits) != bits);

1854

1855

/* Wait up to 1s for flow control if necessary */

1855

/* Wait up to 1s for flow control if necessary */

1856

if (up->port.flags & UPF_CONS_FLOW) {

1856

if (up->port.flags & UPF_CONS_FLOW) {

1857

unsigned int tmout;

1857

unsigned int tmout;

1858

for (tmout = 1000000; tmout; tmout--) {

1858

for (tmout = 1000000; tmout; tmout--) {

1859

unsigned int msr = serial_in(up, UART_MSR);

1859

unsigned int msr = serial_in(up, UART_MSR);

1860

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

1860

up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;

1861

if (msr & UART_MSR_CTS)

1861

if (msr & UART_MSR_CTS)

1862

break;

1862

break;

1863

udelay(1);

1863

udelay(1);

1864

touch_nmi_watchdog();

1864

touch_nmi_watchdog();

1865

}

1865

}

1866

}

1866

}

1867

}

1867

}

1868

1869

#ifdef CONFIG_CONSOLE_POLL

1869

#ifdef CONFIG_CONSOLE_POLL

1870

/*

1870

/*

1871

* Console polling routines for writing and reading from the uart while

1871

* Console polling routines for writing and reading from the uart while

1872

* in an interrupt or debug context.

1872

* in an interrupt or debug context.

1873

*/

1873

*/

1874

1875

static int serial8250_get_poll_char(struct uart_port *port)

1875

static int serial8250_get_poll_char(struct uart_port *port)

1876

{

1876

{

1877

struct uart_8250_port *up = (struct uart_8250_port *)port;

1877

struct uart_8250_port *up = (struct uart_8250_port *)port;

1878

unsigned char lsr = serial_inp(up, UART_LSR);

1878

unsigned char lsr = serial_inp(up, UART_LSR);

1879

1880

while (!(lsr & UART_LSR_DR))

1880

while (!(lsr & UART_LSR_DR))

1881

lsr = serial_inp(up, UART_LSR);

1881

lsr = serial_inp(up, UART_LSR);

1882

1883

return serial_inp(up, UART_RX);

1883

return serial_inp(up, UART_RX);

1884

}

1884

}

1885

1886

1887

static void serial8250_put_poll_char(struct uart_port *port,

1887

static void serial8250_put_poll_char(struct uart_port *port,

1888

unsigned char c)

1888

unsigned char c)

1889

{

1889

{

1890

unsigned int ier;

1890

unsigned int ier;

1891

struct uart_8250_port *up = (struct uart_8250_port *)port;

1891

struct uart_8250_port *up = (struct uart_8250_port *)port;

1892

1893

/*

1893

/*

1894

* First save the IER then disable the interrupts

1894

* First save the IER then disable the interrupts

1895

*/

1895

*/

1896

ier = serial_in(up, UART_IER);

1896

ier = serial_in(up, UART_IER);

1897

if (up->capabilities & UART_CAP_UUE)

1897

if (up->capabilities & UART_CAP_UUE)

1898

serial_out(up, UART_IER, UART_IER_UUE);

1898

serial_out(up, UART_IER, UART_IER_UUE);

1899

else

1899

else

1900

serial_out(up, UART_IER, 0);

1900

serial_out(up, UART_IER, 0);

1901

1902

wait_for_xmitr(up, BOTH_EMPTY);

1902

wait_for_xmitr(up, BOTH_EMPTY);

1903

/*

1903

/*

1904

* Send the character out.

1904

* Send the character out.

1905

* If a LF, also do CR...

1905

* If a LF, also do CR...

1906

*/

1906

*/

1907

serial_out(up, UART_TX, c);

1907

serial_out(up, UART_TX, c);

1908

if (c == 10) {

1908

if (c == 10) {

1909

wait_for_xmitr(up, BOTH_EMPTY);

1909

wait_for_xmitr(up, BOTH_EMPTY);

1910

serial_out(up, UART_TX, 13);

1910

serial_out(up, UART_TX, 13);

1911

}

1911

}

1912

1913

/*

1913

/*

1914

* Finally, wait for transmitter to become empty

1914

* Finally, wait for transmitter to become empty

1915

* and restore the IER

1915

* and restore the IER

1916

*/

1916

*/

1917

wait_for_xmitr(up, BOTH_EMPTY);

1917

wait_for_xmitr(up, BOTH_EMPTY);

1918

serial_out(up, UART_IER, ier);

1918

serial_out(up, UART_IER, ier);

1919

}

1919

}

1920

1921

#endif /* CONFIG_CONSOLE_POLL */

1921

#endif /* CONFIG_CONSOLE_POLL */

1922

1923

static int serial8250_startup(struct uart_port *port)

1923

static int serial8250_startup(struct uart_port *port)

1924

{

1924

{

1925

struct uart_8250_port *up = (struct uart_8250_port *)port;

1925

struct uart_8250_port *up = (struct uart_8250_port *)port;

1926

unsigned long flags;

1926

unsigned long flags;

1927

unsigned char lsr, iir;

1927

unsigned char lsr, iir;

1928

int retval;

1928

int retval;

1929

1930

up->capabilities = uart_config[up->port.type].flags;

1930

up->capabilities = uart_config[up->port.type].flags;

1931

up->mcr = 0;

1931

up->mcr = 0;

1932

1933

if (up->port.type == PORT_16C950) {

1933

if (up->port.type == PORT_16C950) {

1934

/* Wake up and initialize UART */

1934

/* Wake up and initialize UART */

1935

up->acr = 0;

1935

up->acr = 0;

1936

serial_outp(up, UART_LCR, 0xBF);

1936

serial_outp(up, UART_LCR, 0xBF);

1937

serial_outp(up, UART_EFR, UART_EFR_ECB);

1937

serial_outp(up, UART_EFR, UART_EFR_ECB);

1938

serial_outp(up, UART_IER, 0);

1938

serial_outp(up, UART_IER, 0);

1939

serial_outp(up, UART_LCR, 0);

1939

serial_outp(up, UART_LCR, 0);

1940

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

1940

serial_icr_write(up, UART_CSR, 0); /* Reset the UART */

1941

serial_outp(up, UART_LCR, 0xBF);

1941

serial_outp(up, UART_LCR, 0xBF);

1942

serial_outp(up, UART_EFR, UART_EFR_ECB);

1942

serial_outp(up, UART_EFR, UART_EFR_ECB);

1943

serial_outp(up, UART_LCR, 0);

1943

serial_outp(up, UART_LCR, 0);

1944

}

1944

}

1945

1946

#ifdef CONFIG_SERIAL_8250_RSA

1946

#ifdef CONFIG_SERIAL_8250_RSA

1947

/*

1947

/*

1948

* If this is an RSA port, see if we can kick it up to the

1948

* If this is an RSA port, see if we can kick it up to the

1949

* higher speed clock.

1949

* higher speed clock.

1950

*/

1950

*/

1951

enable_rsa(up);

1951

enable_rsa(up);

1952

#endif

1952

#endif

1953

1954

/*

1954

/*

1955

* Clear the FIFO buffers and disable them.

1955

* Clear the FIFO buffers and disable them.

1956

* (they will be reenabled in set_termios())

1956

* (they will be reenabled in set_termios())

1957

*/

1957

*/

1958

serial8250_clear_fifos(up);

1958

serial8250_clear_fifos(up);

1959

1960

/*

1960

/*

1961

* Clear the interrupt registers.

1961

* Clear the interrupt registers.

1962

*/

1962

*/

1963

(void) serial_inp(up, UART_LSR);

1963

(void) serial_inp(up, UART_LSR);

1964

(void) serial_inp(up, UART_RX);

1964

(void) serial_inp(up, UART_RX);

1965

(void) serial_inp(up, UART_IIR);

1965

(void) serial_inp(up, UART_IIR);

1966

(void) serial_inp(up, UART_MSR);

1966

(void) serial_inp(up, UART_MSR);

1967

1968

/*

1968

/*

1969

* At this point, there's no way the LSR could still be 0xff;

1969

* At this point, there's no way the LSR could still be 0xff;

1970

* if it is, then bail out, because there's likely no UART

1970

* if it is, then bail out, because there's likely no UART

1971

* here.

1971

* here.

1972

*/

1972

*/

1973

if (!(up->port.flags & UPF_BUGGY_UART) &&

1973

if (!(up->port.flags & UPF_BUGGY_UART) &&

1974

(serial_inp(up, UART_LSR) == 0xff)) {

1974

(serial_inp(up, UART_LSR) == 0xff)) {

1975

printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",

1975

printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",

1976

serial_index(&up->port));

1976

serial_index(&up->port));

1977

return -ENODEV;

1977

return -ENODEV;

1978

}

1978

}

1979

1980

/*

1980

/*

1981

* For a XR16C850, we need to set the trigger levels

1981

* For a XR16C850, we need to set the trigger levels

1982

*/

1982

*/

1983

if (up->port.type == PORT_16850) {

1983

if (up->port.type == PORT_16850) {

1984

unsigned char fctr;

1984

unsigned char fctr;

1985

1986

serial_outp(up, UART_LCR, 0xbf);

1986

serial_outp(up, UART_LCR, 0xbf);

1987

1988

fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);

1988

fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);

1989

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);

1989

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);

1990

serial_outp(up, UART_TRG, UART_TRG_96);

1990

serial_outp(up, UART_TRG, UART_TRG_96);

1991

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);

1991

serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);

1992

serial_outp(up, UART_TRG, UART_TRG_96);

1992

serial_outp(up, UART_TRG, UART_TRG_96);

1993

1994

serial_outp(up, UART_LCR, 0);

1994

serial_outp(up, UART_LCR, 0);

1995

}

1995

}

1996

1997

if (is_real_interrupt(up->port.irq)) {

1997

if (is_real_interrupt(up->port.irq)) {

1998

unsigned char iir1;

1998

unsigned char iir1;

1999

/*

1999

/*

2000

* Test for UARTs that do not reassert THRE when the

2000

* Test for UARTs that do not reassert THRE when the

2001

* transmitter is idle and the interrupt has already

2001

* transmitter is idle and the interrupt has already

2002

* been cleared. Real 16550s should always reassert

2002

* been cleared. Real 16550s should always reassert

2003

* this interrupt whenever the transmitter is idle and

2003

* this interrupt whenever the transmitter is idle and

2004

* the interrupt is enabled. Delays are necessary to

2004

* the interrupt is enabled. Delays are necessary to

2005

* allow register changes to become visible.

2005

* allow register changes to become visible.

2006

*/

2006

*/

2007

spin_lock_irqsave(&up->port.lock, flags);

2007

spin_lock_irqsave(&up->port.lock, flags);

2008

if (up->port.flags & UPF_SHARE_IRQ)

2008

if (up->port.flags & UPF_SHARE_IRQ)

2009

disable_irq_nosync(up->port.irq);

2009

disable_irq_nosync(up->port.irq);

2010

2011

wait_for_xmitr(up, UART_LSR_THRE);

2011

wait_for_xmitr(up, UART_LSR_THRE);

2012

serial_out_sync(up, UART_IER, UART_IER_THRI);

2012

serial_out_sync(up, UART_IER, UART_IER_THRI);

2013

udelay(1); /* allow THRE to set */

2013

udelay(1); /* allow THRE to set */

2014

iir1 = serial_in(up, UART_IIR);

2014

iir1 = serial_in(up, UART_IIR);

2015

serial_out(up, UART_IER, 0);

2015

serial_out(up, UART_IER, 0);

2016

serial_out_sync(up, UART_IER, UART_IER_THRI);

2016

serial_out_sync(up, UART_IER, UART_IER_THRI);

2017

udelay(1); /* allow a working UART time to re-assert THRE */

2017

udelay(1); /* allow a working UART time to re-assert THRE */

2018

iir = serial_in(up, UART_IIR);

2018

iir = serial_in(up, UART_IIR);

2019

serial_out(up, UART_IER, 0);

2019

serial_out(up, UART_IER, 0);

2020

2021

if (up->port.flags & UPF_SHARE_IRQ)

2021

if (up->port.flags & UPF_SHARE_IRQ)

2022

enable_irq(up->port.irq);

2022

enable_irq(up->port.irq);

2023

spin_unlock_irqrestore(&up->port.lock, flags);

2023

spin_unlock_irqrestore(&up->port.lock, flags);

2024

2025

/*

2025

/*

2026

* If the interrupt is not reasserted, setup a timer to

2026

* If the interrupt is not reasserted, setup a timer to

2027

* kick the UART on a regular basis.

2027

* kick the UART on a regular basis.

2028

*/

2028

*/

2029

if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {

2029

if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {

2030

up->bugs |= UART_BUG_THRE;

2030

up->bugs |= UART_BUG_THRE;

2031

pr_debug("ttyS%d - using backup timer\n",

2031

pr_debug("ttyS%d - using backup timer\n",

2032

serial_index(port));

2032

serial_index(port));

2033

}

2033

}

2034

}

2034

}

2035

2036

/*

2036

/*

2037

* The above check will only give an accurate result the first time

2037

* The above check will only give an accurate result the first time

2038

* the port is opened so this value needs to be preserved.

2038

* the port is opened so this value needs to be preserved.

2039

*/

2039

*/

2040

if (up->bugs & UART_BUG_THRE) {

2040

if (up->bugs & UART_BUG_THRE) {

2041

up->timer.function = serial8250_backup_timeout;

2041

up->timer.function = serial8250_backup_timeout;

2042

up->timer.data = (unsigned long)up;

2042

up->timer.data = (unsigned long)up;

2043

mod_timer(&up->timer, jiffies +

2043

mod_timer(&up->timer, jiffies +

2044

poll_timeout(up->port.timeout) + HZ / 5);

2044

poll_timeout(up->port.timeout) + HZ / 5);

2045

}

2045

}

2046

2047

/*

2047

/*

2048

* If the "interrupt" for this port doesn't correspond with any

2048

* If the "interrupt" for this port doesn't correspond with any

2049

* hardware interrupt, we use a timer-based system. The original

2049

* hardware interrupt, we use a timer-based system. The original

2050

* driver used to do this with IRQ0.

2050

* driver used to do this with IRQ0.

2051

*/

2051

*/

2052

if (!is_real_interrupt(up->port.irq)) {

2052

if (!is_real_interrupt(up->port.irq)) {

2053

up->timer.data = (unsigned long)up;

2053

up->timer.data = (unsigned long)up;

2054

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

2054

mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));

2055

} else {

2055

} else {

2056

retval = serial_link_irq_chain(up);

2056

retval = serial_link_irq_chain(up);

2057

if (retval)

2057

if (retval)

2058

return retval;

2058

return retval;

2059

}

2059

}

2060

2061

/*

2061

/*

2062

* Now, initialize the UART

2062

* Now, initialize the UART

2063

*/

2063

*/

2064

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

2064

serial_outp(up, UART_LCR, UART_LCR_WLEN8);

2065

2066

spin_lock_irqsave(&up->port.lock, flags);

2066

spin_lock_irqsave(&up->port.lock, flags);

2067

if (up->port.flags & UPF_FOURPORT) {

2067

if (up->port.flags & UPF_FOURPORT) {

2068

if (!is_real_interrupt(up->port.irq))

2068

if (!is_real_interrupt(up->port.irq))

2069

up->port.mctrl |= TIOCM_OUT1;

2069

up->port.mctrl |= TIOCM_OUT1;

2070

} else

2070

} else

2071

/*

2071

/*

2072

* Most PC uarts need OUT2 raised to enable interrupts.

2072

* Most PC uarts need OUT2 raised to enable interrupts.

2073

*/

2073

*/

2074

if (is_real_interrupt(up->port.irq))

2074

if (is_real_interrupt(up->port.irq))

2075

up->port.mctrl |= TIOCM_OUT2;

2075

up->port.mctrl |= TIOCM_OUT2;

2076

2077

serial8250_set_mctrl(&up->port, up->port.mctrl);

2077

serial8250_set_mctrl(&up->port, up->port.mctrl);

2078

2079

/*

2079

/*

2080

* Do a quick test to see if we receive an

2080

* Do a quick test to see if we receive an

2081

* interrupt when we enable the TX irq.

2081

* interrupt when we enable the TX irq.

2082

*/

2082

*/

2083

serial_outp(up, UART_IER, UART_IER_THRI);

2083

serial_outp(up, UART_IER, UART_IER_THRI);

2084

lsr = serial_in(up, UART_LSR);

2084

lsr = serial_in(up, UART_LSR);

2085

iir = serial_in(up, UART_IIR);

2085

iir = serial_in(up, UART_IIR);

2086

serial_outp(up, UART_IER, 0);

2086

serial_outp(up, UART_IER, 0);

2087

2088

if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {

2088

if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {

2089

if (!(up->bugs & UART_BUG_TXEN)) {

2089

if (!(up->bugs & UART_BUG_TXEN)) {

2090

up->bugs |= UART_BUG_TXEN;

2090

up->bugs |= UART_BUG_TXEN;

2091

pr_debug("ttyS%d - enabling bad tx status workarounds\n",

2091

pr_debug("ttyS%d - enabling bad tx status workarounds\n",

2092

serial_index(port));

2092

serial_index(port));

2093

}

2093

}

2094

} else {

2094

} else {

2095

up->bugs &= ~UART_BUG_TXEN;

2095

up->bugs &= ~UART_BUG_TXEN;

2096

}

2096

}

2097

2098

spin_unlock_irqrestore(&up->port.lock, flags);

2098

spin_unlock_irqrestore(&up->port.lock, flags);

2099

2100

/*

2100

/*

2101

* Clear the interrupt registers again for luck, and clear the

2101

* Clear the interrupt registers again for luck, and clear the

2102

* saved flags to avoid getting false values from polling

2102

* saved flags to avoid getting false values from polling

2103

* routines or the previous session.

2103

* routines or the previous session.

2104

*/

2104

*/

2105

serial_inp(up, UART_LSR);

2105

serial_inp(up, UART_LSR);

2106

serial_inp(up, UART_RX);

2106

serial_inp(up, UART_RX);

2107

serial_inp(up, UART_IIR);

2107

serial_inp(up, UART_IIR);

2108

serial_inp(up, UART_MSR);

2108

serial_inp(up, UART_MSR);

2109

up->lsr_saved_flags = 0;

2109

up->lsr_saved_flags = 0;

2110

up->msr_saved_flags = 0;

2110

up->msr_saved_flags = 0;

2111

2112

/*

2112

/*

2113

* Finally, enable interrupts. Note: Modem status interrupts

2113

* Finally, enable interrupts. Note: Modem status interrupts

2114

* are set via set_termios(), which will be occurring imminently

2114

* are set via set_termios(), which will be occurring imminently

2115

* anyway, so we don't enable them here.

2115

* anyway, so we don't enable them here.

2116

*/

2116

*/

2117

up->ier = UART_IER_RLSI | UART_IER_RDI;

2117

up->ier = UART_IER_RLSI | UART_IER_RDI;

2118

serial_outp(up, UART_IER, up->ier);

2118

serial_outp(up, UART_IER, up->ier);

2119

2120

if (up->port.flags & UPF_FOURPORT) {

2120

if (up->port.flags & UPF_FOURPORT) {

2121

unsigned int icp;

2121

unsigned int icp;

2122

/*

2122

/*

2123

* Enable interrupts on the AST Fourport board

2123

* Enable interrupts on the AST Fourport board

2124

*/

2124

*/

2125

icp = (up->port.iobase & 0xfe0) | 0x01f;

2125

icp = (up->port.iobase & 0xfe0) | 0x01f;

2126

outb_p(0x80, icp);

2126

outb_p(0x80, icp);

2127

(void) inb_p(icp);

2127

(void) inb_p(icp);

2128

}

2128

}

2129

2130

return 0;

2130

return 0;

2131

}

2131

}

2132

2133

static void serial8250_shutdown(struct uart_port *port)

2133

static void serial8250_shutdown(struct uart_port *port)

2134

{

2134

{

2135

struct uart_8250_port *up = (struct uart_8250_port *)port;

2135

struct uart_8250_port *up = (struct uart_8250_port *)port;

2136

unsigned long flags;

2136

unsigned long flags;

2137

2138

/*

2138

/*

2139

* Disable interrupts from this port

2139

* Disable interrupts from this port

2140

*/

2140

*/

2141

up->ier = 0;

2141

up->ier = 0;

2142

serial_outp(up, UART_IER, 0);

2142

serial_outp(up, UART_IER, 0);

2143

2144

spin_lock_irqsave(&up->port.lock, flags);

2144

spin_lock_irqsave(&up->port.lock, flags);

2145

if (up->port.flags & UPF_FOURPORT) {

2145

if (up->port.flags & UPF_FOURPORT) {

2146

/* reset interrupts on the AST Fourport board */

2146

/* reset interrupts on the AST Fourport board */

2147

inb((up->port.iobase & 0xfe0) | 0x1f);

2147

inb((up->port.iobase & 0xfe0) | 0x1f);

2148

up->port.mctrl |= TIOCM_OUT1;

2148

up->port.mctrl |= TIOCM_OUT1;

2149

} else

2149

} else

2150

up->port.mctrl &= ~TIOCM_OUT2;

2150

up->port.mctrl &= ~TIOCM_OUT2;

2151

2152

serial8250_set_mctrl(&up->port, up->port.mctrl);

2152

serial8250_set_mctrl(&up->port, up->port.mctrl);

2153

spin_unlock_irqrestore(&up->port.lock, flags);

2153

spin_unlock_irqrestore(&up->port.lock, flags);

2154

2155

/*

2155

/*

2156

* Disable break condition and FIFOs

2156

* Disable break condition and FIFOs

2157

*/

2157

*/

2158

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

2158

serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);

2159

serial8250_clear_fifos(up);

2159

serial8250_clear_fifos(up);

2160

2161

#ifdef CONFIG_SERIAL_8250_RSA

2161

#ifdef CONFIG_SERIAL_8250_RSA

2162

/*

2162

/*

2163

* Reset the RSA board back to 115kbps compat mode.

2163

* Reset the RSA board back to 115kbps compat mode.

2164

*/

2164

*/

2165

disable_rsa(up);

2165

disable_rsa(up);

2166

#endif

2166

#endif

2167

2168

/*

2168

/*

2169

* Read data port to reset things, and then unlink from

2169

* Read data port to reset things, and then unlink from

2170

* the IRQ chain.

2170

* the IRQ chain.

2171

*/

2171

*/

2172

(void) serial_in(up, UART_RX);

2172

(void) serial_in(up, UART_RX);

2173

2174

del_timer_sync(&up->timer);

2174

del_timer_sync(&up->timer);

2175

up->timer.function = serial8250_timeout;

2175

up->timer.function = serial8250_timeout;

2176

if (is_real_interrupt(up->port.irq))

2176

if (is_real_interrupt(up->port.irq))

2177

serial_unlink_irq_chain(up);

2177

serial_unlink_irq_chain(up);

2178

}

2178

}

2179

2180

static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)

2180

static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)

2181

{

2181

{

2182

unsigned int quot;

2182

unsigned int quot;

2183

2184

/*

2184

/*

2185

* Handle magic divisors for baud rates above baud_base on

2185

* Handle magic divisors for baud rates above baud_base on

2186

* SMSC SuperIO chips.

2186

* SMSC SuperIO chips.

2187

*/

2187

*/

2188

if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2188

if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2189

baud == (port->uartclk/4))

2189

baud == (port->uartclk/4))

2190

quot = 0x8001;

2190

quot = 0x8001;

2191

else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2191

else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&

2192

baud == (port->uartclk/8))

2192

baud == (port->uartclk/8))

2193

quot = 0x8002;

2193

quot = 0x8002;

2194

else

2194

else

2195

quot = uart_get_divisor(port, baud);

2195

quot = uart_get_divisor(port, baud);

2196

2197

return quot;

2197

return quot;

2198

}

2198

}

2199

2200

static void

2200

static void

2201

serial8250_set_termios(struct uart_port *port, struct ktermios *termios,

2201

serial8250_set_termios(struct uart_port *port, struct ktermios *termios,

2202

struct ktermios *old)

2202

struct ktermios *old)

2203

{

2203

{

2204

struct uart_8250_port *up = (struct uart_8250_port *)port;

2204

struct uart_8250_port *up = (struct uart_8250_port *)port;

2205

unsigned char cval, fcr = 0;

2205

unsigned char cval, fcr = 0;

2206

unsigned long flags;

2206

unsigned long flags;

2207

unsigned int baud, quot;

2207

unsigned int baud, quot;

2208

2209

switch (termios->c_cflag & CSIZE) {

2209

switch (termios->c_cflag & CSIZE) {

2210

case CS5:

2210

case CS5:

2211

cval = UART_LCR_WLEN5;

2211

cval = UART_LCR_WLEN5;

2212

break;

2212

break;

2213

case CS6:

2213

case CS6:

2214

cval = UART_LCR_WLEN6;

2214

cval = UART_LCR_WLEN6;

2215

break;

2215

break;

2216

case CS7:

2216

case CS7:

2217

cval = UART_LCR_WLEN7;

2217

cval = UART_LCR_WLEN7;

2218

break;

2218

break;

2219

default:

2219

default:

2220

case CS8:

2220

case CS8:

2221

cval = UART_LCR_WLEN8;

2221

cval = UART_LCR_WLEN8;

2222

break;

2222

break;

2223

}

2223

}

2224

2225

if (termios->c_cflag & CSTOPB)

2225

if (termios->c_cflag & CSTOPB)

2226

cval |= UART_LCR_STOP;

2226

cval |= UART_LCR_STOP;

2227

if (termios->c_cflag & PARENB)

2227

if (termios->c_cflag & PARENB)

2228

cval |= UART_LCR_PARITY;

2228

cval |= UART_LCR_PARITY;

2229

if (!(termios->c_cflag & PARODD))

2229

if (!(termios->c_cflag & PARODD))

2230

cval |= UART_LCR_EPAR;

2230

cval |= UART_LCR_EPAR;

2231

#ifdef CMSPAR

2231

#ifdef CMSPAR

2232

if (termios->c_cflag & CMSPAR)

2232

if (termios->c_cflag & CMSPAR)

2233

cval |= UART_LCR_SPAR;

2233

cval |= UART_LCR_SPAR;

2234

#endif

2234

#endif

2235

2236

/*

2236

/*

2237

* Ask the core to calculate the divisor for us.

2237

* Ask the core to calculate the divisor for us.

2238

*/

2238

*/

2239

baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);

2239

baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);

2240

quot = serial8250_get_divisor(port, baud);

2240

quot = serial8250_get_divisor(port, baud);

2241

2242

/*

2242

/*

2243

* Oxford Semi 952 rev B workaround

2243

* Oxford Semi 952 rev B workaround

2244

*/

2244

*/

2245

if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)

2245

if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)

2246

quot++;

2246

quot++;

2247

2248

if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {

2248

if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {

2249

if (baud < 2400)

2249

if (baud < 2400)

2250

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

2250

fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;

2251

else

2251

else

2252

fcr = uart_config[up->port.type].fcr;

2252

fcr = uart_config[up->port.type].fcr;

2253

}

2253

}

2254

2255

/*

2255

/*

2256

* MCR-based auto flow control. When AFE is enabled, RTS will be

2256

* MCR-based auto flow control. When AFE is enabled, RTS will be

2257

* deasserted when the receive FIFO contains more characters than

2257

* deasserted when the receive FIFO contains more characters than

2258

* the trigger, or the MCR RTS bit is cleared. In the case where

2258

* the trigger, or the MCR RTS bit is cleared. In the case where

2259

* the remote UART is not using CTS auto flow control, we must

2259

* the remote UART is not using CTS auto flow control, we must

2260

* have sufficient FIFO entries for the latency of the remote

2260

* have sufficient FIFO entries for the latency of the remote

2261

* UART to respond. IOW, at least 32 bytes of FIFO.

2261

* UART to respond. IOW, at least 32 bytes of FIFO.

2262

*/

2262

*/

2263

if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {

2263

if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {

2264

up->mcr &= ~UART_MCR_AFE;

2264

up->mcr &= ~UART_MCR_AFE;

2265

if (termios->c_cflag & CRTSCTS)

2265

if (termios->c_cflag & CRTSCTS)

2266

up->mcr |= UART_MCR_AFE;

2266

up->mcr |= UART_MCR_AFE;

2267

}

2267

}

2268

2269

/*

2269

/*

2270

* Ok, we're now changing the port state. Do it with

2270

* Ok, we're now changing the port state. Do it with

2271

* interrupts disabled.

2271

* interrupts disabled.

2272

*/

2272

*/

2273

spin_lock_irqsave(&up->port.lock, flags);

2273

spin_lock_irqsave(&up->port.lock, flags);

2274

2275

/*

2275

/*

2276

* Update the per-port timeout.

2276

* Update the per-port timeout.

2277

*/

2277

*/

2278

uart_update_timeout(port, termios->c_cflag, baud);

2278

uart_update_timeout(port, termios->c_cflag, baud);

2279

2280

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

2280

up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;

2281

if (termios->c_iflag & INPCK)

2281

if (termios->c_iflag & INPCK)

2282

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

2282

up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;

2283

if (termios->c_iflag & (BRKINT | PARMRK))

2283

if (termios->c_iflag & (BRKINT | PARMRK))

2284

up->port.read_status_mask |= UART_LSR_BI;

2284

up->port.read_status_mask |= UART_LSR_BI;

2285

2286

/*

2286

/*

2287

* Characteres to ignore

2287

* Characteres to ignore

2288

*/

2288

*/

2289

up->port.ignore_status_mask = 0;

2289

up->port.ignore_status_mask = 0;

2290

if (termios->c_iflag & IGNPAR)

2290

if (termios->c_iflag & IGNPAR)

2291

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

2291

up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;

2292

if (termios->c_iflag & IGNBRK) {

2292

if (termios->c_iflag & IGNBRK) {

2293

up->port.ignore_status_mask |= UART_LSR_BI;

2293

up->port.ignore_status_mask |= UART_LSR_BI;

2294

/*

2294

/*

2295

* If we're ignoring parity and break indicators,

2295

* If we're ignoring parity and break indicators,

2296

* ignore overruns too (for real raw support).

2296

* ignore overruns too (for real raw support).

2297

*/

2297

*/

2298

if (termios->c_iflag & IGNPAR)

2298

if (termios->c_iflag & IGNPAR)

2299

up->port.ignore_status_mask |= UART_LSR_OE;

2299

up->port.ignore_status_mask |= UART_LSR_OE;

2300

}

2300

}

2301

2302

/*

2302

/*

2303

* ignore all characters if CREAD is not set

2303

* ignore all characters if CREAD is not set

2304

*/

2304

*/

2305

if ((termios->c_cflag & CREAD) == 0)

2305

if ((termios->c_cflag & CREAD) == 0)

2306

up->port.ignore_status_mask |= UART_LSR_DR;

2306

up->port.ignore_status_mask |= UART_LSR_DR;

2307

2308

/*

2308

/*

2309

* CTS flow control flag and modem status interrupts

2309

* CTS flow control flag and modem status interrupts

2310

*/

2310

*/

2311

up->ier &= ~UART_IER_MSI;

2311

up->ier &= ~UART_IER_MSI;

2312

if (!(up->bugs & UART_BUG_NOMSR) &&

2312

if (!(up->bugs & UART_BUG_NOMSR) &&

2313

UART_ENABLE_MS(&up->port, termios->c_cflag))

2313

UART_ENABLE_MS(&up->port, termios->c_cflag))

2314

up->ier |= UART_IER_MSI;

2314

up->ier |= UART_IER_MSI;

2315

if (up->capabilities & UART_CAP_UUE)

2315

if (up->capabilities & UART_CAP_UUE)

2316

up->ier |= UART_IER_UUE | UART_IER_RTOIE;

2316

up->ier |= UART_IER_UUE | UART_IER_RTOIE;

2317

2318

serial_out(up, UART_IER, up->ier);

2318

serial_out(up, UART_IER, up->ier);

2319

2320

if (up->capabilities & UART_CAP_EFR) {

2320

if (up->capabilities & UART_CAP_EFR) {

2321

unsigned char efr = 0;

2321

unsigned char efr = 0;

2322

/*

2322

/*

2323

* TI16C752/Startech hardware flow control. FIXME:

2323

* TI16C752/Startech hardware flow control. FIXME:

2324

* - TI16C752 requires control thresholds to be set.

2324

* - TI16C752 requires control thresholds to be set.

2325

* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.

2325

* - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.

2326

*/

2326

*/

2327

if (termios->c_cflag & CRTSCTS)

2327

if (termios->c_cflag & CRTSCTS)

2328

efr |= UART_EFR_CTS;

2328

efr |= UART_EFR_CTS;

2329

2330

serial_outp(up, UART_LCR, 0xBF);

2330

serial_outp(up, UART_LCR, 0xBF);

2331

serial_outp(up, UART_EFR, efr);

2331

serial_outp(up, UART_EFR, efr);

2332

}

2332

}

2333

2334

#ifdef CONFIG_ARCH_OMAP

2334

#ifdef CONFIG_ARCH_OMAP

2335

/* Workaround to enable 115200 baud on OMAP1510 internal ports */

2335

/* Workaround to enable 115200 baud on OMAP1510 internal ports */

2336

if (cpu_is_omap1510() && is_omap_port(up)) {

2336

if (cpu_is_omap1510() && is_omap_port(up)) {

2337

if (baud == 115200) {

2337

if (baud == 115200) {

2338

quot = 1;

2338

quot = 1;

2339

serial_out(up, UART_OMAP_OSC_12M_SEL, 1);

2339

serial_out(up, UART_OMAP_OSC_12M_SEL, 1);

2340

} else

2340

} else

2341

serial_out(up, UART_OMAP_OSC_12M_SEL, 0);

2341

serial_out(up, UART_OMAP_OSC_12M_SEL, 0);

2342

}

2342

}

2343

#endif

2343

#endif

2344

2345

if (up->capabilities & UART_NATSEMI) {

2345

if (up->capabilities & UART_NATSEMI) {

2346

/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */

2346

/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */

2347

serial_outp(up, UART_LCR, 0xe0);

2347

serial_outp(up, UART_LCR, 0xe0);

2348

} else {

2348

} else {

2349

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

2349

serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */

2350

}

2350

}

2351

2352

serial_dl_write(up, quot);

2352

serial_dl_write(up, quot);

2353

2354

/*

2354

/*

2355

* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR

2355

* LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR

2356

* is written without DLAB set, this mode will be disabled.

2356

* is written without DLAB set, this mode will be disabled.

2357

*/

2357

*/

2358

if (up->port.type == PORT_16750)

2358

if (up->port.type == PORT_16750)

2359

serial_outp(up, UART_FCR, fcr);

2359

serial_outp(up, UART_FCR, fcr);

2360

2361

serial_outp(up, UART_LCR, cval); /* reset DLAB */

2361

serial_outp(up, UART_LCR, cval); /* reset DLAB */

2362

up->lcr = cval; /* Save LCR */

2362

up->lcr = cval; /* Save LCR */

2363

if (up->port.type != PORT_16750) {

2363

if (up->port.type != PORT_16750) {

2364

if (fcr & UART_FCR_ENABLE_FIFO) {

2364

if (fcr & UART_FCR_ENABLE_FIFO) {

2365

/* emulated UARTs (Lucent Venus 167x) need two steps */

2365

/* emulated UARTs (Lucent Venus 167x) need two steps */

2366

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

2366

serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);

2367

}

2367

}

2368

serial_outp(up, UART_FCR, fcr); /* set fcr */

2368

serial_outp(up, UART_FCR, fcr); /* set fcr */

2369

}

2369

}

2370

serial8250_set_mctrl(&up->port, up->port.mctrl);

2370

serial8250_set_mctrl(&up->port, up->port.mctrl);

2371

spin_unlock_irqrestore(&up->port.lock, flags);

2371

spin_unlock_irqrestore(&up->port.lock, flags);

2372

/* Don't rewrite B0 */

2372

/* Don't rewrite B0 */

2373

if (tty_termios_baud_rate(termios))

2373

if (tty_termios_baud_rate(termios))

2374

tty_termios_encode_baud_rate(termios, baud, baud);

2374

tty_termios_encode_baud_rate(termios, baud, baud);

2375

}

2375

}

2376

2377

static void

2377

static void

2378

serial8250_pm(struct uart_port *port, unsigned int state,

2378

serial8250_pm(struct uart_port *port, unsigned int state,

2379

unsigned int oldstate)

2379

unsigned int oldstate)

2380

{

2380

{

2381

struct uart_8250_port *p = (struct uart_8250_port *)port;

2381

struct uart_8250_port *p = (struct uart_8250_port *)port;

2382

2383

serial8250_set_sleep(p, state != 0);

2383

serial8250_set_sleep(p, state != 0);

2384

2385

if (p->pm)

2385

if (p->pm)

2386

p->pm(port, state, oldstate);

2386

p->pm(port, state, oldstate);

2387

}

2387

}

2388

2389

static unsigned int serial8250_port_size(struct uart_8250_port *pt)

2389

static unsigned int serial8250_port_size(struct uart_8250_port *pt)

2390

{

2390

{

2391

if (pt->port.iotype == UPIO_AU)

2391

if (pt->port.iotype == UPIO_AU)

2392

return 0x100000;

2392

return 0x100000;

2393

#ifdef CONFIG_ARCH_OMAP

2393

#ifdef CONFIG_ARCH_OMAP

2394

if (is_omap_port(pt))

2394

if (is_omap_port(pt))

2395

return 0x16 << pt->port.regshift;

2395

return 0x16 << pt->port.regshift;

2396

#endif

2396

#endif

2397

return 8 << pt->port.regshift;

2397

return 8 << pt->port.regshift;

2398

}

2398

}

2399

2400

/*

2400

/*

2401

* Resource handling.

2401

* Resource handling.

2402

*/

2402

*/

2403

static int serial8250_request_std_resource(struct uart_8250_port *up)

2403

static int serial8250_request_std_resource(struct uart_8250_port *up)

2404

{

2404

{

2405

unsigned int size = serial8250_port_size(up);

2405

unsigned int size = serial8250_port_size(up);

2406

int ret = 0;

2406

int ret = 0;

2407

2408

switch (up->port.iotype) {

2408

switch (up->port.iotype) {

2409

case UPIO_AU:

2409

case UPIO_AU:

2410

case UPIO_TSI:

2410

case UPIO_TSI:

2411

case UPIO_MEM32:

2411

case UPIO_MEM32:

2412

case UPIO_MEM:

2412

case UPIO_MEM:

2413

case UPIO_DWAPB:

2413

case UPIO_DWAPB:

2414

if (!up->port.mapbase)

2414

if (!up->port.mapbase)

2415

break;

2415

break;

2416

2417

if (!request_mem_region(up->port.mapbase, size, "serial")) {

2417

if (!request_mem_region(up->port.mapbase, size, "serial")) {

2418

ret = -EBUSY;

2418

ret = -EBUSY;

2419

break;

2419

break;

2420

}

2420

}

2421

2422

if (up->port.flags & UPF_IOREMAP) {

2422

if (up->port.flags & UPF_IOREMAP) {

2423

up->port.membase = ioremap_nocache(up->port.mapbase,

2423

up->port.membase = ioremap_nocache(up->port.mapbase,

2424

size);

2424

size);

2425

if (!up->port.membase) {

2425

if (!up->port.membase) {

2426

release_mem_region(up->port.mapbase, size);

2426

release_mem_region(up->port.mapbase, size);

2427

ret = -ENOMEM;

2427

ret = -ENOMEM;

2428

}

2428

}

2429

}

2429

}

2430

break;

2430

break;

2431

2432

case UPIO_HUB6:

2432

case UPIO_HUB6:

2433

case UPIO_PORT:

2433

case UPIO_PORT:

2434

if (!request_region(up->port.iobase, size, "serial"))

2434

if (!request_region(up->port.iobase, size, "serial"))

2435

ret = -EBUSY;

2435

ret = -EBUSY;

2436

break;

2436

break;

2437

}

2437

}

2438

return ret;

2438

return ret;

2439

}

2439

}

2440

2441

static void serial8250_release_std_resource(struct uart_8250_port *up)

2441

static void serial8250_release_std_resource(struct uart_8250_port *up)

2442

{

2442

{

2443

unsigned int size = serial8250_port_size(up);

2443

unsigned int size = serial8250_port_size(up);

2444

2445

switch (up->port.iotype) {

2445

switch (up->port.iotype) {

2446

case UPIO_AU:

2446

case UPIO_AU:

2447

case UPIO_TSI:

2447

case UPIO_TSI:

2448

case UPIO_MEM32:

2448

case UPIO_MEM32:

2449

case UPIO_MEM:

2449

case UPIO_MEM:

2450

case UPIO_DWAPB:

2450

case UPIO_DWAPB:

2451

if (!up->port.mapbase)

2451

if (!up->port.mapbase)

2452

break;

2452

break;

2453

2454

if (up->port.flags & UPF_IOREMAP) {

2454

if (up->port.flags & UPF_IOREMAP) {

2455

iounmap(up->port.membase);

2455

iounmap(up->port.membase);

2456

up->port.membase = NULL;

2456

up->port.membase = NULL;

2457

}

2457

}

2458

2459

release_mem_region(up->port.mapbase, size);

2459

release_mem_region(up->port.mapbase, size);

2460

break;

2460

break;

2461

2462

case UPIO_HUB6:

2462

case UPIO_HUB6:

2463

case UPIO_PORT:

2463

case UPIO_PORT:

2464

release_region(up->port.iobase, size);

2464

release_region(up->port.iobase, size);

2465

break;

2465

break;

2466

}

2466

}

2467

}

2467

}

2468

2469

static int serial8250_request_rsa_resource(struct uart_8250_port *up)

2469

static int serial8250_request_rsa_resource(struct uart_8250_port *up)

2470

{

2470

{

2471

unsigned long start = UART_RSA_BASE << up->port.regshift;

2471

unsigned long start = UART_RSA_BASE << up->port.regshift;

2472

unsigned int size = 8 << up->port.regshift;

2472

unsigned int size = 8 << up->port.regshift;

2473

int ret = -EINVAL;

2473

int ret = -EINVAL;

2474

2475

switch (up->port.iotype) {

2475

switch (up->port.iotype) {

2476

case UPIO_HUB6:

2476

case UPIO_HUB6:

2477

case UPIO_PORT:

2477

case UPIO_PORT:

2478

start += up->port.iobase;

2478

start += up->port.iobase;

2479

if (request_region(start, size, "serial-rsa"))

2479

if (request_region(start, size, "serial-rsa"))

2480

ret = 0;

2480

ret = 0;

2481

else

2481

else

2482

ret = -EBUSY;

2482

ret = -EBUSY;

2483

break;

2483

break;

2484

}

2484

}

2485

2486

return ret;

2486

return ret;

2487

}

2487

}

2488

2489

static void serial8250_release_rsa_resource(struct uart_8250_port *up)

2489

static void serial8250_release_rsa_resource(struct uart_8250_port *up)

2490

{

2490

{

2491

unsigned long offset = UART_RSA_BASE << up->port.regshift;

2491

unsigned long offset = UART_RSA_BASE << up->port.regshift;

2492

unsigned int size = 8 << up->port.regshift;

2492

unsigned int size = 8 << up->port.regshift;

2493

2494

switch (up->port.iotype) {

2494

switch (up->port.iotype) {

2495

case UPIO_HUB6:

2495

case UPIO_HUB6:

2496

case UPIO_PORT:

2496

case UPIO_PORT:

2497

release_region(up->port.iobase + offset, size);

2497

release_region(up->port.iobase + offset, size);

2498

break;

2498

break;

2499

}

2499

}

2500

}

2500

}

2501

2502

static void serial8250_release_port(struct uart_port *port)

2502

static void serial8250_release_port(struct uart_port *port)

2503

{

2503

{

2504

struct uart_8250_port *up = (struct uart_8250_port *)port;

2504

struct uart_8250_port *up = (struct uart_8250_port *)port;

2505

2506

serial8250_release_std_resource(up);

2506

serial8250_release_std_resource(up);

2507

if (up->port.type == PORT_RSA)

2507

if (up->port.type == PORT_RSA)

2508

serial8250_release_rsa_resource(up);

2508

serial8250_release_rsa_resource(up);

2509

}

2509

}

2510

2511

static int serial8250_request_port(struct uart_port *port)

2511

static int serial8250_request_port(struct uart_port *port)

2512

{

2512

{

2513

struct uart_8250_port *up = (struct uart_8250_port *)port;

2513

struct uart_8250_port *up = (struct uart_8250_port *)port;

2514

int ret = 0;

2514

int ret = 0;

2515

2516

ret = serial8250_request_std_resource(up);

2516

ret = serial8250_request_std_resource(up);

2517

if (ret == 0 && up->port.type == PORT_RSA) {

2517

if (ret == 0 && up->port.type == PORT_RSA) {

2518

ret = serial8250_request_rsa_resource(up);

2518

ret = serial8250_request_rsa_resource(up);

2519

if (ret < 0)

2519

if (ret < 0)

2520

serial8250_release_std_resource(up);

2520

serial8250_release_std_resource(up);

2521

}

2521

}

2522

2523

return ret;

2523

return ret;

2524

}

2524

}

2525

2526

static void serial8250_config_port(struct uart_port *port, int flags)

2526

static void serial8250_config_port(struct uart_port *port, int flags)

2527

{

2527

{

2528

struct uart_8250_port *up = (struct uart_8250_port *)port;

2528

struct uart_8250_port *up = (struct uart_8250_port *)port;

2529

int probeflags = PROBE_ANY;

2529

int probeflags = PROBE_ANY;

2530

int ret;

2530

int ret;

2531

2532

/*

2532

/*

2533

* Find the region that we can probe for. This in turn

2533

* Find the region that we can probe for. This in turn

2534

* tells us whether we can probe for the type of port.

2534

* tells us whether we can probe for the type of port.

2535

*/

2535

*/

2536

ret = serial8250_request_std_resource(up);

2536

ret = serial8250_request_std_resource(up);

2537

if (ret < 0)

2537

if (ret < 0)

2538

return;

2538

return;

2539

2540

ret = serial8250_request_rsa_resource(up);

2540

ret = serial8250_request_rsa_resource(up);

2541

if (ret < 0)

2541

if (ret < 0)

2542

probeflags &= ~PROBE_RSA;

2542

probeflags &= ~PROBE_RSA;

2543

2544

if (flags & UART_CONFIG_TYPE)

2544

if (flags & UART_CONFIG_TYPE)

2545

autoconfig(up, probeflags);

2545

autoconfig(up, probeflags);

2546

if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)

2546

if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)

2547

autoconfig_irq(up);

2547

autoconfig_irq(up);

2548

2549

if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)

2549

if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)

2550

serial8250_release_rsa_resource(up);

2550

serial8250_release_rsa_resource(up);

2551

if (up->port.type == PORT_UNKNOWN)

2551

if (up->port.type == PORT_UNKNOWN)

2552

serial8250_release_std_resource(up);

2552

serial8250_release_std_resource(up);

2553

}

2553

}

2554

2555

static int

2555

static int

2556

serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)

2556

serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)

2557

{

2557

{

2558

if (ser->irq >= nr_irqs || ser->irq < 0 ||

2558

if (ser->irq >= nr_irqs || ser->irq < 0 ||

2559

ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||

2559

ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||

2560

ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||

2560

ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||

2561

ser->type == PORT_STARTECH)

2561

ser->type == PORT_STARTECH)

2562

return -EINVAL;

2562

return -EINVAL;

2563

return 0;

2563

return 0;

2564

}

2564

}

2565

2566

static const char *

2566

static const char *

2567

serial8250_type(struct uart_port *port)

2567

serial8250_type(struct uart_port *port)

2568

{

2568

{

2569

int type = port->type;

2569

int type = port->type;

2570

2571

if (type >= ARRAY_SIZE(uart_config))

2571

if (type >= ARRAY_SIZE(uart_config))

2572

type = 0;

2572

type = 0;

2573

return uart_config[type].name;

2573

return uart_config[type].name;

2574

}

2574

}

2575

2576

static struct uart_ops serial8250_pops = {

2576

static struct uart_ops serial8250_pops = {

2577

.tx_empty = serial8250_tx_empty,

2577

.tx_empty = serial8250_tx_empty,

2578

.set_mctrl = serial8250_set_mctrl,

2578

.set_mctrl = serial8250_set_mctrl,

2579

.get_mctrl = serial8250_get_mctrl,

2579

.get_mctrl = serial8250_get_mctrl,

2580

.stop_tx = serial8250_stop_tx,

2580

.stop_tx = serial8250_stop_tx,

2581

.start_tx = serial8250_start_tx,

2581

.start_tx = serial8250_start_tx,

2582

.stop_rx = serial8250_stop_rx,

2582

.stop_rx = serial8250_stop_rx,

2583

.enable_ms = serial8250_enable_ms,

2583

.enable_ms = serial8250_enable_ms,

2584

.break_ctl = serial8250_break_ctl,

2584

.break_ctl = serial8250_break_ctl,

2585

.startup = serial8250_startup,

2585

.startup = serial8250_startup,

2586

.shutdown = serial8250_shutdown,

2586

.shutdown = serial8250_shutdown,

2587

.set_termios = serial8250_set_termios,

2587

.set_termios = serial8250_set_termios,

2588

.pm = serial8250_pm,

2588

.pm = serial8250_pm,

2589

.type = serial8250_type,

2589

.type = serial8250_type,

2590

.release_port = serial8250_release_port,

2590

.release_port = serial8250_release_port,

2591

.request_port = serial8250_request_port,

2591

.request_port = serial8250_request_port,

2592

.config_port = serial8250_config_port,

2592

.config_port = serial8250_config_port,

2593

.verify_port = serial8250_verify_port,

2593

.verify_port = serial8250_verify_port,

2594

#ifdef CONFIG_CONSOLE_POLL

2594

#ifdef CONFIG_CONSOLE_POLL

2595

.poll_get_char = serial8250_get_poll_char,

2595

.poll_get_char = serial8250_get_poll_char,

2596

.poll_put_char = serial8250_put_poll_char,

2596

.poll_put_char = serial8250_put_poll_char,

2597

#endif

2597

#endif

2598

};

2598

};

2599

2600

static struct uart_8250_port serial8250_ports[UART_NR];

2600

static struct uart_8250_port serial8250_ports[UART_NR];

2601

2602

static void __init serial8250_isa_init_ports(void)

2602

static void __init serial8250_isa_init_ports(void)

2603

{

2603

{

2604

struct uart_8250_port *up;

2604

struct uart_8250_port *up;

2605

static int first = 1;

2605

static int first = 1;

2606

int i;

2606

int i;

2607

2608

if (!first)

2608

if (!first)

2609

return;

2609

return;

2610

first = 0;

2610

first = 0;

2611

2612

for (i = 0; i < nr_uarts; i++) {

2612

for (i = 0; i < nr_uarts; i++) {

2613

struct uart_8250_port *up = &serial8250_ports[i];

2613

struct uart_8250_port *up = &serial8250_ports[i];

2614

2615

up->port.line = i;

2615

up->port.line = i;

2616

spin_lock_init(&up->port.lock);

2616

spin_lock_init(&up->port.lock);

2617

2618

init_timer(&up->timer);

2618

init_timer(&up->timer);

2619

up->timer.function = serial8250_timeout;

2619

up->timer.function = serial8250_timeout;

2620

2621

/*

2621

/*

2622

* ALPHA_KLUDGE_MCR needs to be killed.

2622

* ALPHA_KLUDGE_MCR needs to be killed.

2623

*/

2623

*/

2624

up->mcr_mask = ~ALPHA_KLUDGE_MCR;

2624

up->mcr_mask = ~ALPHA_KLUDGE_MCR;

2625

up->mcr_force = ALPHA_KLUDGE_MCR;

2625

up->mcr_force = ALPHA_KLUDGE_MCR;

2626

2627

up->port.ops = &serial8250_pops;

2627

up->port.ops = &serial8250_pops;

2628

}

2628

}

2629

2630

for (i = 0, up = serial8250_ports;

2630

for (i = 0, up = serial8250_ports;

2631

i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;

2631

i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;

2632

i++, up++) {

2632

i++, up++) {

2633

up->port.iobase = old_serial_port[i].port;

2633

up->port.iobase = old_serial_port[i].port;

2634

up->port.irq = irq_canonicalize(old_serial_port[i].irq);

2634

up->port.irq = irq_canonicalize(old_serial_port[i].irq);

2635

up->port.uartclk = old_serial_port[i].baud_base * 16;

2635

up->port.uartclk = old_serial_port[i].baud_base * 16;

2636

up->port.flags = old_serial_port[i].flags;

2636

up->port.flags = old_serial_port[i].flags;

2637

up->port.hub6 = old_serial_port[i].hub6;

2637

up->port.hub6 = old_serial_port[i].hub6;

2638

up->port.membase = old_serial_port[i].iomem_base;

2638

up->port.membase = old_serial_port[i].iomem_base;

2639

up->port.iotype = old_serial_port[i].io_type;

2639

up->port.iotype = old_serial_port[i].io_type;

2640

up->port.regshift = old_serial_port[i].iomem_reg_shift;

2640

up->port.regshift = old_serial_port[i].iomem_reg_shift;

2641

set_io_from_upio(&up->port);

2641

set_io_from_upio(&up->port);

2642

if (share_irqs)

2642

if (share_irqs)

2643

up->port.flags |= UPF_SHARE_IRQ;

2643

up->port.flags |= UPF_SHARE_IRQ;

2644

}

2644

}

2645

}

2645

}

2646

2647

static void __init

2647

static void __init

2648

serial8250_register_ports(struct uart_driver *drv, struct device *dev)

2648

serial8250_register_ports(struct uart_driver *drv, struct device *dev)

2649

{

2649

{

2650

int i;

2650

int i;

2651

2652

serial8250_isa_init_ports();

2652

serial8250_isa_init_ports();

2653

2654

for (i = 0; i < nr_uarts; i++) {

2654

for (i = 0; i < nr_uarts; i++) {

2655

struct uart_8250_port *up = &serial8250_ports[i];

2655

struct uart_8250_port *up = &serial8250_ports[i];

2656

2657

up->port.dev = dev;

2657

up->port.dev = dev;

2658

uart_add_one_port(drv, &up->port);

2658

uart_add_one_port(drv, &up->port);

2659

}

2659

}

2660

}

2660

}

2661

2662

#ifdef CONFIG_SERIAL_8250_CONSOLE

2662

#ifdef CONFIG_SERIAL_8250_CONSOLE

2663

2664

static void serial8250_console_putchar(struct uart_port *port, int ch)

2664

static void serial8250_console_putchar(struct uart_port *port, int ch)

2665

{

2665

{

2666

struct uart_8250_port *up = (struct uart_8250_port *)port;

2666

struct uart_8250_port *up = (struct uart_8250_port *)port;

2667

2668

wait_for_xmitr(up, UART_LSR_THRE);

2668

wait_for_xmitr(up, UART_LSR_THRE);

2669

serial_out(up, UART_TX, ch);

2669

serial_out(up, UART_TX, ch);

2670

}

2670

}

2671

2672

/*

2672

/*

2673

* Print a string to the serial port trying not to disturb

2673

* Print a string to the serial port trying not to disturb

2674

* any possible real use of the port...

2674

* any possible real use of the port...

2675

*

2675

*

2676

* The console_lock must be held when we get here.

2676

* The console_lock must be held when we get here.

2677

*/

2677

*/

2678

static void

2678

static void

2679

serial8250_console_write(struct console *co, const char *s, unsigned int count)

2679

serial8250_console_write(struct console *co, const char *s, unsigned int count)

2680

{

2680

{

2681

struct uart_8250_port *up = &serial8250_ports[co->index];

2681

struct uart_8250_port *up = &serial8250_ports[co->index];

2682

unsigned long flags;

2682

unsigned long flags;

2683

unsigned int ier;

2683

unsigned int ier;

2684

int locked = 1;

2684

int locked = 1;

2685

2686

touch_nmi_watchdog();

2686

touch_nmi_watchdog();

2687

2688

local_irq_save(flags);

2688

local_irq_save(flags);

2689

if (up->port.sysrq) {

2689

if (up->port.sysrq) {

2690

/* serial8250_handle_port() already took the lock */

2690

/* serial8250_handle_port() already took the lock */

2691

locked = 0;

2691

locked = 0;

2692

} else if (oops_in_progress) {

2692

} else if (oops_in_progress) {

2693

locked = spin_trylock(&up->port.lock);

2693

locked = spin_trylock(&up->port.lock);

2694

} else

2694

} else

2695

spin_lock(&up->port.lock);

2695

spin_lock(&up->port.lock);

2696

2697

/*

2697

/*

2698

* First save the IER then disable the interrupts

2698

* First save the IER then disable the interrupts

2699

*/

2699

*/

2700

ier = serial_in(up, UART_IER);

2700

ier = serial_in(up, UART_IER);

2701

2702

if (up->capabilities & UART_CAP_UUE)

2702

if (up->capabilities & UART_CAP_UUE)

2703

serial_out(up, UART_IER, UART_IER_UUE);

2703

serial_out(up, UART_IER, UART_IER_UUE);

2704

else

2704

else

2705

serial_out(up, UART_IER, 0);

2705

serial_out(up, UART_IER, 0);

2706

2707

uart_console_write(&up->port, s, count, serial8250_console_putchar);

2707

uart_console_write(&up->port, s, count, serial8250_console_putchar);

2708

2709

/*

2709

/*

2710

* Finally, wait for transmitter to become empty

2710

* Finally, wait for transmitter to become empty

2711

* and restore the IER

2711

* and restore the IER

2712

*/

2712

*/

2713

wait_for_xmitr(up, BOTH_EMPTY);

2713

wait_for_xmitr(up, BOTH_EMPTY);

2714

serial_out(up, UART_IER, ier);

2714

serial_out(up, UART_IER, ier);

2715

2716

/*

2716

/*

2717

* The receive handling will happen properly because the

2717

* The receive handling will happen properly because the

2718

* receive ready bit will still be set; it is not cleared

2718

* receive ready bit will still be set; it is not cleared

2719

* on read. However, modem control will not, we must

2719

* on read. However, modem control will not, we must

2720

* call it if we have saved something in the saved flags

2720

* call it if we have saved something in the saved flags

2721

* while processing with interrupts off.

2721

* while processing with interrupts off.

2722

*/

2722

*/

2723

if (up->msr_saved_flags)

2723

if (up->msr_saved_flags)

2724

check_modem_status(up);

2724

check_modem_status(up);

2725

2726

if (locked)

2726

if (locked)

2727

spin_unlock(&up->port.lock);

2727

spin_unlock(&up->port.lock);

2728

local_irq_restore(flags);

2728

local_irq_restore(flags);

2729

}

2729

}

2730

2731

static int __init serial8250_console_setup(struct console *co, char *options)

2731

static int __init serial8250_console_setup(struct console *co, char *options)

2732

{

2732

{

2733

struct uart_port *port;

2733

struct uart_port *port;

2734

int baud = 9600;

2734

int baud = 9600;

2735

int bits = 8;

2735

int bits = 8;

2736

int parity = 'n';

2736

int parity = 'n';

2737

int flow = 'n';

2737

int flow = 'n';

2738

2739

/*

2739

/*

2740

* Check whether an invalid uart number has been specified, and

2740

* Check whether an invalid uart number has been specified, and

2741

* if so, search for the first available port that does have

2741

* if so, search for the first available port that does have

2742

* console support.

2742

* console support.

2743

*/

2743

*/

2744

if (co->index >= nr_uarts)

2744

if (co->index >= nr_uarts)

2745

co->index = 0;

2745

co->index = 0;

2746

port = &serial8250_ports[co->index].port;

2746

port = &serial8250_ports[co->index].port;

2747

if (!port->iobase && !port->membase)

2747

if (!port->iobase && !port->membase)

2748

return -ENODEV;

2748

return -ENODEV;

2749

2750

if (options)

2750

if (options)

2751

uart_parse_options(options, &baud, &parity, &bits, &flow);

2751

uart_parse_options(options, &baud, &parity, &bits, &flow);

2752

2753

return uart_set_options(port, co, baud, parity, bits, flow);

2753

return uart_set_options(port, co, baud, parity, bits, flow);

2754

}

2754

}

2755

2756

static int serial8250_console_early_setup(void)

2756

static int serial8250_console_early_setup(void)

2757

{

2757

{

2758

return serial8250_find_port_for_earlycon();

2758

return serial8250_find_port_for_earlycon();

2759

}

2759

}

2760

2761

static struct console serial8250_console = {

2761

static struct console serial8250_console = {

2762

.name = "ttyS",

2762

.name = "ttyS",

2763

.write = serial8250_console_write,

2763

.write = serial8250_console_write,

2764

.device = uart_console_device,

2764

.device = uart_console_device,

2765

.setup = serial8250_console_setup,

2765

.setup = serial8250_console_setup,

2766

.early_setup = serial8250_console_early_setup,

2766

.early_setup = serial8250_console_early_setup,

2767

.flags = CON_PRINTBUFFER,

2767

.flags = CON_PRINTBUFFER,

2768

.index = -1,

2768

.index = -1,

2769

.data = &serial8250_reg,

2769

.data = &serial8250_reg,

2770

};

2770

};

2771

2772

static int __init serial8250_console_init(void)

2772

static int __init serial8250_console_init(void)

2773

{

2773

{

2774

if (nr_uarts > UART_NR)

2774

if (nr_uarts > UART_NR)

2775

nr_uarts = UART_NR;

2775

nr_uarts = UART_NR;

2776

2777

serial8250_isa_init_ports();

2777

serial8250_isa_init_ports();

2778

register_console(&serial8250_console);

2778

register_console(&serial8250_console);

2779

return 0;

2779

return 0;

2780

}

2780

}

2781

console_initcall(serial8250_console_init);

2781

console_initcall(serial8250_console_init);

2782

2783

int serial8250_find_port(struct uart_port *p)

2783

int serial8250_find_port(struct uart_port *p)

2784

{

2784

{

2785

int line;

2785

int line;

2786

struct uart_port *port;

2786

struct uart_port *port;

2787

2788

for (line = 0; line < nr_uarts; line++) {

2788

for (line = 0; line < nr_uarts; line++) {

2789

port = &serial8250_ports[line].port;

2789

port = &serial8250_ports[line].port;

2790

if (uart_match_port(p, port))

2790

if (uart_match_port(p, port))

2791

return line;

2791

return line;

2792

}

2792

}

2793

return -ENODEV;

2793

return -ENODEV;

2794

}

2794

}

2795

2796

#define SERIAL8250_CONSOLE &serial8250_console

2796

#define SERIAL8250_CONSOLE &serial8250_console

2797

#else

2797

#else

2798

#define SERIAL8250_CONSOLE NULL

2798

#define SERIAL8250_CONSOLE NULL

2799

#endif

2799

#endif

2800

2801

static struct uart_driver serial8250_reg = {

2801

static struct uart_driver serial8250_reg = {

2802

.owner = THIS_MODULE,

2802

.owner = THIS_MODULE,

2803

.driver_name = "serial",

2803

.driver_name = "serial",

2804

.dev_name = "ttyS",

2804

.dev_name = "ttyS",

2805

.major = TTY_MAJOR,

2805

.major = TTY_MAJOR,

2806

.minor = 64,

2806

.minor = 64,

2807

.cons = SERIAL8250_CONSOLE,

2807

.cons = SERIAL8250_CONSOLE,

2808

};

2808

};

2809

2810

/*

2810

/*

2811

* early_serial_setup - early registration for 8250 ports

2811

* early_serial_setup - early registration for 8250 ports

2812

*

2812

*

2813

* Setup an 8250 port structure prior to console initialisation. Use

2813

* Setup an 8250 port structure prior to console initialisation. Use

2814

* after console initialisation will cause undefined behaviour.

2814

* after console initialisation will cause undefined behaviour.

2815

*/

2815

*/

2816

int __init early_serial_setup(struct uart_port *port)

2816

int __init early_serial_setup(struct uart_port *port)

2817

{

2817

{

2818

struct uart_port *p;

2818

struct uart_port *p;

2819

2820

if (port->line >= ARRAY_SIZE(serial8250_ports))

2820

if (port->line >= ARRAY_SIZE(serial8250_ports))

2821

return -ENODEV;

2821

return -ENODEV;

2822

2823

serial8250_isa_init_ports();

2823

serial8250_isa_init_ports();

2824

p = &serial8250_ports[port->line].port;

2824

p = &serial8250_ports[port->line].port;

2825

p->iobase = port->iobase;

2825

p->iobase = port->iobase;

2826

p->membase = port->membase;

2826

p->membase = port->membase;

2827

p->irq = port->irq;

2827

p->irq = port->irq;

2828

p->uartclk = port->uartclk;

2828

p->uartclk = port->uartclk;

2829

p->fifosize = port->fifosize;

2829

p->fifosize = port->fifosize;

2830

p->regshift = port->regshift;

2830

p->regshift = port->regshift;

2831

p->iotype = port->iotype;

2831

p->iotype = port->iotype;

2832

p->flags = port->flags;

2832

p->flags = port->flags;

2833

p->mapbase = port->mapbase;

2833

p->mapbase = port->mapbase;

2834

p->private_data = port->private_data;

2834

p->private_data = port->private_data;

2835

2836

set_io_from_upio(p);

2836

set_io_from_upio(p);

2837

if (port->serial_in)

2837

if (port->serial_in)

2838

p->serial_in = port->serial_in;

2838

p->serial_in = port->serial_in;

2839

if (port->serial_out)

2839

if (port->serial_out)

2840

p->serial_out = port->serial_out;

2840

p->serial_out = port->serial_out;

2841

2842

return 0;

2842

return 0;

2843

}

2843

}

2844

2845

/**

2845

/**

2846

* serial8250_suspend_port - suspend one serial port

2846

* serial8250_suspend_port - suspend one serial port

2847

* @line: serial line number

2847

* @line: serial line number

2848

*

2848

*

2849

* Suspend one serial port.

2849

* Suspend one serial port.

2850

*/

2850

*/

2851

void serial8250_suspend_port(int line)

2851

void serial8250_suspend_port(int line)

2852

{

2852

{

2853

uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);

2853

uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);

2854

}

2854

}

2855

2856

/**

2856

/**

2857

* serial8250_resume_port - resume one serial port

2857

* serial8250_resume_port - resume one serial port

2858

* @line: serial line number

2858

* @line: serial line number

2859

*

2859

*

2860

* Resume one serial port.

2860

* Resume one serial port.

2861

*/

2861

*/

2862

void serial8250_resume_port(int line)

2862

void serial8250_resume_port(int line)

2863

{

2863

{

2864

struct uart_8250_port *up = &serial8250_ports[line];

2864

struct uart_8250_port *up = &serial8250_ports[line];

2865

2866

if (up->capabilities & UART_NATSEMI) {

2866

if (up->capabilities & UART_NATSEMI) {

2867

unsigned char tmp;

2867

unsigned char tmp;

2868

2869

/* Ensure it's still in high speed mode */

2869

/* Ensure it's still in high speed mode */

2870

serial_outp(up, UART_LCR, 0xE0);

2870

serial_outp(up, UART_LCR, 0xE0);

2871

2872

tmp = serial_in(up, 0x04); /* EXCR2 */

2872

tmp = serial_in(up, 0x04); /* EXCR2 */

2873

tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

2873

tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */

2874

tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

2874

tmp |= 0x10; /* 1.625 divisor for baud_base --> 921600 */

2875

serial_outp(up, 0x04, tmp);

2875

serial_outp(up, 0x04, tmp);

2876

2877

serial_outp(up, UART_LCR, 0);

2877

serial_outp(up, UART_LCR, 0);

2878

}

2878

}

2879

uart_resume_port(&serial8250_reg, &up->port);

2879

uart_resume_port(&serial8250_reg, &up->port);

2880

}

2880

}

2881

2882

/*

2882

/*

2883

* Register a set of serial devices attached to a platform device. The

2883

* Register a set of serial devices attached to a platform device. The

2884

* list is terminated with a zero flags entry, which means we expect

2884

* list is terminated with a zero flags entry, which means we expect

2885

* all entries to have at least UPF_BOOT_AUTOCONF set.

2885

* all entries to have at least UPF_BOOT_AUTOCONF set.

2886

*/

2886

*/

2887

static int __devinit serial8250_probe(struct platform_device *dev)

2887

static int __devinit serial8250_probe(struct platform_device *dev)

2888

{

2888

{

2889

struct plat_serial8250_port *p = dev->dev.platform_data;

2889

struct plat_serial8250_port *p = dev->dev.platform_data;

2890

struct uart_port port;

2890

struct uart_port port;

2891

int ret, i;

2891

int ret, i;

2892

2893

memset(&port, 0, sizeof(struct uart_port));

2893

memset(&port, 0, sizeof(struct uart_port));

2894

2895

for (i = 0; p && p->flags != 0; p++, i++) {

2895

for (i = 0; p && p->flags != 0; p++, i++) {

2896

port.iobase = p->iobase;

2896

port.iobase = p->iobase;

2897

port.membase = p->membase;

2897

port.membase = p->membase;

2898

port.irq = p->irq;

2898

port.irq = p->irq;

2899

port.uartclk = p->uartclk;

2899

port.uartclk = p->uartclk;

2900

port.regshift = p->regshift;

2900

port.regshift = p->regshift;

2901

port.iotype = p->iotype;

2901

port.iotype = p->iotype;

2902

port.flags = p->flags;

2902

port.flags = p->flags;

2903

port.mapbase = p->mapbase;

2903

port.mapbase = p->mapbase;

2904

port.hub6 = p->hub6;

2904

port.hub6 = p->hub6;

2905

port.private_data = p->private_data;

2905

port.private_data = p->private_data;

2906

port.type = p->type;

2906

port.serial_in = p->serial_in;

2907

port.serial_in = p->serial_in;

2907

port.serial_out = p->serial_out;

2908

port.serial_out = p->serial_out;

2908

port.dev = &dev->dev;

2909

port.dev = &dev->dev;

2909

if (share_irqs)

2910

if (share_irqs)

2910

port.flags |= UPF_SHARE_IRQ;

2911

port.flags |= UPF_SHARE_IRQ;

2911

ret = serial8250_register_port(&port);

2912

ret = serial8250_register_port(&port);

2912

if (ret < 0) {

2913

if (ret < 0) {

2913

dev_err(&dev->dev, "unable to register port at index %d "

2914

dev_err(&dev->dev, "unable to register port at index %d "

2914

"(IO%lx MEM%llx IRQ%d): %d\n", i,

2915

"(IO%lx MEM%llx IRQ%d): %d\n", i,

2915

p->iobase, (unsigned long long)p->mapbase,

2916

p->iobase, (unsigned long long)p->mapbase,

2916

p->irq, ret);

2917

p->irq, ret);

2917

}

2918

}

2918

}

2919

}

2919

return 0;

2920

return 0;

2920

}

2921

}

2921

2922

/*

2923

/*

2923

* Remove serial ports registered against a platform device.

2924

* Remove serial ports registered against a platform device.

2924

*/

2925

*/

2925

static int __devexit serial8250_remove(struct platform_device *dev)

2926

static int __devexit serial8250_remove(struct platform_device *dev)

2926

{

2927

{

2927

int i;

2928

int i;

2928

2929

for (i = 0; i < nr_uarts; i++) {

2930

for (i = 0; i < nr_uarts; i++) {

2930

struct uart_8250_port *up = &serial8250_ports[i];

2931

struct uart_8250_port *up = &serial8250_ports[i];

2931

2932

if (up->port.dev == &dev->dev)

2933

if (up->port.dev == &dev->dev)

2933

serial8250_unregister_port(i);

2934

serial8250_unregister_port(i);

2934

}

2935

}

2935

return 0;

2936

return 0;

2936

}

2937

}

2937

2938

static int serial8250_suspend(struct platform_device *dev, pm_message_t state)

2939

static int serial8250_suspend(struct platform_device *dev, pm_message_t state)

2939

{

2940

{

2940

int i;

2941

int i;

2941

2942

for (i = 0; i < UART_NR; i++) {

2943

for (i = 0; i < UART_NR; i++) {

2943

struct uart_8250_port *up = &serial8250_ports[i];

2944

struct uart_8250_port *up = &serial8250_ports[i];

2944

2945

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

2946

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

2946

uart_suspend_port(&serial8250_reg, &up->port);

2947

uart_suspend_port(&serial8250_reg, &up->port);

2947

}

2948

}

2948

2949

return 0;

2950

return 0;

2950

}

2951

}

2951

2952

static int serial8250_resume(struct platform_device *dev)

2953

static int serial8250_resume(struct platform_device *dev)

2953

{

2954

{

2954

int i;

2955

int i;

2955

2956

for (i = 0; i < UART_NR; i++) {

2957

for (i = 0; i < UART_NR; i++) {

2957

struct uart_8250_port *up = &serial8250_ports[i];

2958

struct uart_8250_port *up = &serial8250_ports[i];

2958

2959

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

2960

if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)

2960

serial8250_resume_port(i);

2961

serial8250_resume_port(i);

2961

}

2962

}

2962

2963

return 0;

2964

return 0;

2964

}

2965

}

2965

2966

static struct platform_driver serial8250_isa_driver = {

2967

static struct platform_driver serial8250_isa_driver = {

2967

.probe = serial8250_probe,

2968

.probe = serial8250_probe,

2968

.remove = __devexit_p(serial8250_remove),

2969

.remove = __devexit_p(serial8250_remove),

2969

.suspend = serial8250_suspend,

2970

.suspend = serial8250_suspend,

2970

.resume = serial8250_resume,

2971

.resume = serial8250_resume,

2971

.driver = {

2972

.driver = {

2972

.name = "serial8250",

2973

.name = "serial8250",

2973

.owner = THIS_MODULE,

2974

.owner = THIS_MODULE,

2974

},

2975

},

2975

};

2976

};

2976

2977

/*

2978

/*

2978

* This "device" covers _all_ ISA 8250-compatible serial devices listed

2979

* This "device" covers _all_ ISA 8250-compatible serial devices listed

2979

* in the table in include/asm/serial.h

2980

* in the table in include/asm/serial.h

2980

*/

2981

*/

2981

static struct platform_device *serial8250_isa_devs;

2982

static struct platform_device *serial8250_isa_devs;

2982

2983

/*

2984

/*

2984

* serial8250_register_port and serial8250_unregister_port allows for

2985

* serial8250_register_port and serial8250_unregister_port allows for

2985

* 16x50 serial ports to be configured at run-time, to support PCMCIA

2986

* 16x50 serial ports to be configured at run-time, to support PCMCIA

2986

* modems and PCI multiport cards.

2987

* modems and PCI multiport cards.

2987

*/

2988

*/

2988

static DEFINE_MUTEX(serial_mutex);

2989

static DEFINE_MUTEX(serial_mutex);

2989

2990

static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)

2991

static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)

2991

{

2992

{

2992

int i;

2993

int i;

2993

2994

/*

2995

/*

2995

* First, find a port entry which matches.

2996

* First, find a port entry which matches.

2996

*/

2997

*/

2997

for (i = 0; i < nr_uarts; i++)

2998

for (i = 0; i < nr_uarts; i++)

2998

if (uart_match_port(&serial8250_ports[i].port, port))

2999

if (uart_match_port(&serial8250_ports[i].port, port))

2999

return &serial8250_ports[i];

3000

return &serial8250_ports[i];

3000

3001

/*

3002

/*

3002

* We didn't find a matching entry, so look for the first

3003

* We didn't find a matching entry, so look for the first

3003

* free entry. We look for one which hasn't been previously

3004

* free entry. We look for one which hasn't been previously

3004

* used (indicated by zero iobase).

3005

* used (indicated by zero iobase).

3005

*/

3006

*/

3006

for (i = 0; i < nr_uarts; i++)

3007

for (i = 0; i < nr_uarts; i++)

3007

if (serial8250_ports[i].port.type == PORT_UNKNOWN &&

3008

if (serial8250_ports[i].port.type == PORT_UNKNOWN &&

3008

serial8250_ports[i].port.iobase == 0)

3009

serial8250_ports[i].port.iobase == 0)

3009

return &serial8250_ports[i];

3010

return &serial8250_ports[i];

3010

3011

/*

3012

/*

3012

* That also failed. Last resort is to find any entry which

3013

* That also failed. Last resort is to find any entry which

3013

* doesn't have a real port associated with it.

3014

* doesn't have a real port associated with it.

3014

*/

3015

*/

3015

for (i = 0; i < nr_uarts; i++)

3016

for (i = 0; i < nr_uarts; i++)

3016

if (serial8250_ports[i].port.type == PORT_UNKNOWN)

3017

if (serial8250_ports[i].port.type == PORT_UNKNOWN)

3017

return &serial8250_ports[i];

3018

return &serial8250_ports[i];

3018

3019

return NULL;

3020

return NULL;

3020

}

3021

}

3021

3022

/**

3023

/**

3023

* serial8250_register_port - register a serial port

3024

* serial8250_register_port - register a serial port

3024

* @port: serial port template

3025

* @port: serial port template

3025

*

3026

*

3026

* Configure the serial port specified by the request. If the

3027

* Configure the serial port specified by the request. If the

3027

* port exists and is in use, it is hung up and unregistered

3028

* port exists and is in use, it is hung up and unregistered

3028

* first.

3029

* first.

3029

*

3030

*

3030

* The port is then probed and if necessary the IRQ is autodetected

3031

* The port is then probed and if necessary the IRQ is autodetected

3031

* If this fails an error is returned.

3032

* If this fails an error is returned.

3032

*

3033

*

3033

* On success the port is ready to use and the line number is returned.

3034

* On success the port is ready to use and the line number is returned.

3034

*/

3035

*/

3035

int serial8250_register_port(struct uart_port *port)

3036

int serial8250_register_port(struct uart_port *port)

3036

{

3037

{

3037

struct uart_8250_port *uart;

3038

struct uart_8250_port *uart;

3038

int ret = -ENOSPC;

3039

int ret = -ENOSPC;

3039

3040

if (port->uartclk == 0)

3041

if (port->uartclk == 0)

3041

return -EINVAL;

3042

return -EINVAL;

3042

3043

mutex_lock(&serial_mutex);

3044

mutex_lock(&serial_mutex);

3044

3045

uart = serial8250_find_match_or_unused(port);

3046

uart = serial8250_find_match_or_unused(port);

3046

if (uart) {

3047

if (uart) {

3047

uart_remove_one_port(&serial8250_reg, &uart->port);

3048

uart_remove_one_port(&serial8250_reg, &uart->port);

3048

3049

uart->port.iobase = port->iobase;

3050

uart->port.iobase = port->iobase;

3050

uart->port.membase = port->membase;

3051

uart->port.membase = port->membase;

3051

uart->port.irq = port->irq;

3052

uart->port.irq = port->irq;

3052

uart->port.uartclk = port->uartclk;

3053

uart->port.uartclk = port->uartclk;

3053

uart->port.fifosize = port->fifosize;

3054

uart->port.fifosize = port->fifosize;

3054

uart->port.regshift = port->regshift;

3055

uart->port.regshift = port->regshift;

3055

uart->port.iotype = port->iotype;

3056

uart->port.iotype = port->iotype;

3056

uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;

3057

uart->port.flags = port->flags | UPF_BOOT_AUTOCONF;

3057

uart->port.mapbase = port->mapbase;

3058

uart->port.mapbase = port->mapbase;

3058

uart->port.private_data = port->private_data;

3059

uart->port.private_data = port->private_data;

3059

if (port->dev)

3060

if (port->dev)

3060

uart->port.dev = port->dev;

3061

uart->port.dev = port->dev;

3062

3063

if (port->flags & UPF_FIXED_TYPE) {

3064

uart->port.type = port->type;

3065

uart->port.fifosize = uart_config[port->type].fifo_size;

3066

uart->capabilities = uart_config[port->type].flags;

3067

uart->tx_loadsz = uart_config[port->type].tx_loadsz;

3068

}

3069

3061

set_io_from_upio(&uart->port);

3070

set_io_from_upio(&uart->port);

3062

/* Possibly override default I/O functions. */

3071

/* Possibly override default I/O functions. */

3063

if (port->serial_in)

3072

if (port->serial_in)

3064

uart->port.serial_in = port->serial_in;

3073

uart->port.serial_in = port->serial_in;

3065

if (port->serial_out)

3074

if (port->serial_out)

3066

uart->port.serial_out = port->serial_out;

3075

uart->port.serial_out = port->serial_out;

3067

3076

3068

ret = uart_add_one_port(&serial8250_reg, &uart->port);

3077

ret = uart_add_one_port(&serial8250_reg, &uart->port);

3069

if (ret == 0)

3078

if (ret == 0)

3070

ret = uart->port.line;

3079

ret = uart->port.line;

3071

}

3080

}

3072

mutex_unlock(&serial_mutex);

3081

mutex_unlock(&serial_mutex);

3073

3082

3074

return ret;

3083

return ret;

3075

}

3084

}

3076

EXPORT_SYMBOL(serial8250_register_port);

3085

EXPORT_SYMBOL(serial8250_register_port);

3077

3086

3078

/**

3087

/**

3079

* serial8250_unregister_port - remove a 16x50 serial port at runtime

3088

* serial8250_unregister_port - remove a 16x50 serial port at runtime

3080

* @line: serial line number

3089

* @line: serial line number

3081

*

3090

*

3082

* Remove one serial port. This may not be called from interrupt

3091

* Remove one serial port. This may not be called from interrupt

3083

* context. We hand the port back to the our control.

3092

* context. We hand the port back to the our control.

3084

*/

3093

*/

3085

void serial8250_unregister_port(int line)

3094

void serial8250_unregister_port(int line)

3086

{

3095

{

3087

struct uart_8250_port *uart = &serial8250_ports[line];

3096

struct uart_8250_port *uart = &serial8250_ports[line];

3088

3097

3089

mutex_lock(&serial_mutex);

3098

mutex_lock(&serial_mutex);

3090

uart_remove_one_port(&serial8250_reg, &uart->port);

3099

uart_remove_one_port(&serial8250_reg, &uart->port);

3091

if (serial8250_isa_devs) {

3100

if (serial8250_isa_devs) {

3092

uart->port.flags &= ~UPF_BOOT_AUTOCONF;

3101

uart->port.flags &= ~UPF_BOOT_AUTOCONF;

3093

uart->port.type = PORT_UNKNOWN;

3102

uart->port.type = PORT_UNKNOWN;

3094

uart->port.dev = &serial8250_isa_devs->dev;

3103

uart->port.dev = &serial8250_isa_devs->dev;

3095

uart_add_one_port(&serial8250_reg, &uart->port);

3104

uart_add_one_port(&serial8250_reg, &uart->port);

3096

} else {

3105

} else {

3097

uart->port.dev = NULL;

3106

uart->port.dev = NULL;

3098

}

3107

}

3099

mutex_unlock(&serial_mutex);

3108

mutex_unlock(&serial_mutex);

3100

}

3109

}

3101

EXPORT_SYMBOL(serial8250_unregister_port);

3110

EXPORT_SYMBOL(serial8250_unregister_port);

3102

3111

3103

static int __init serial8250_init(void)

3112

static int __init serial8250_init(void)

3104

{

3113

{

3105

int ret;

3114

int ret;

3106

3115

3107

if (nr_uarts > UART_NR)

3116

if (nr_uarts > UART_NR)

3108

nr_uarts = UART_NR;

3117

nr_uarts = UART_NR;

3109

3118

3110

printk(KERN_INFO "Serial: 8250/16550 driver"

3119

printk(KERN_INFO "Serial: 8250/16550 driver"

3111

"%d ports, IRQ sharing %sabled\n", nr_uarts,

3120

"%d ports, IRQ sharing %sabled\n", nr_uarts,

3112

share_irqs ? "en" : "dis");

3121

share_irqs ? "en" : "dis");

3113

3122

3114

#ifdef CONFIG_SPARC

3123

#ifdef CONFIG_SPARC

3115

ret = sunserial_register_minors(&serial8250_reg, UART_NR);

3124

ret = sunserial_register_minors(&serial8250_reg, UART_NR);

3116

#else

3125

#else

3117

serial8250_reg.nr = UART_NR;

3126

serial8250_reg.nr = UART_NR;

3118

ret = uart_register_driver(&serial8250_reg);

3127

ret = uart_register_driver(&serial8250_reg);

3119

#endif

3128

#endif

3120

if (ret)

3129

if (ret)

3121

goto out;

3130

goto out;

3122

3131

3123

serial8250_isa_devs = platform_device_alloc("serial8250",

3132

serial8250_isa_devs = platform_device_alloc("serial8250",

3124

PLAT8250_DEV_LEGACY);

3133

PLAT8250_DEV_LEGACY);

3125

if (!serial8250_isa_devs) {

3134

if (!serial8250_isa_devs) {

3126

ret = -ENOMEM;

3135

ret = -ENOMEM;

3127

goto unreg_uart_drv;

3136

goto unreg_uart_drv;

3128

}

3137

}

3129

3138

3130

ret = platform_device_add(serial8250_isa_devs);

3139

ret = platform_device_add(serial8250_isa_devs);

3131

if (ret)

3140

if (ret)

3132

goto put_dev;

3141

goto put_dev;

3133

3142

3134

serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);

3143

serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);

3135

3144

3136

ret = platform_driver_register(&serial8250_isa_driver);

3145

ret = platform_driver_register(&serial8250_isa_driver);

3137

if (ret == 0)

3146

if (ret == 0)

3138

goto out;

3147

goto out;

3139

3148

3140

platform_device_del(serial8250_isa_devs);

3149

platform_device_del(serial8250_isa_devs);

3141

put_dev:

3150

put_dev:

3142

platform_device_put(serial8250_isa_devs);

3151

platform_device_put(serial8250_isa_devs);

3143

unreg_uart_drv:

3152

unreg_uart_drv:

3144

#ifdef CONFIG_SPARC

3153

#ifdef CONFIG_SPARC

3145

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3154

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3146

#else

3155

#else

3147

uart_unregister_driver(&serial8250_reg);

3156

uart_unregister_driver(&serial8250_reg);

3148

#endif

3157

#endif

3149

out:

3158

out:

3150

return ret;

3159

return ret;

3151

}

3160

}

3152

3161

3153

static void __exit serial8250_exit(void)

3162

static void __exit serial8250_exit(void)

3154

{

3163

{

3155

struct platform_device *isa_dev = serial8250_isa_devs;

3164

struct platform_device *isa_dev = serial8250_isa_devs;

3156

3165

3157

/*

3166

/*

3158

* This tells serial8250_unregister_port() not to re-register

3167

* This tells serial8250_unregister_port() not to re-register

3159

* the ports (thereby making serial8250_isa_driver permanently

3168

* the ports (thereby making serial8250_isa_driver permanently

3160

* in use.)

3169

* in use.)

3161

*/

3170

*/

3162

serial8250_isa_devs = NULL;

3171

serial8250_isa_devs = NULL;

3163

3172

3164

platform_driver_unregister(&serial8250_isa_driver);

3173

platform_driver_unregister(&serial8250_isa_driver);

3165

platform_device_unregister(isa_dev);

3174

platform_device_unregister(isa_dev);

3166

3175

3167

#ifdef CONFIG_SPARC

3176

#ifdef CONFIG_SPARC

3168

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3177

sunserial_unregister_minors(&serial8250_reg, UART_NR);

3169

#else

3178

#else

3170

uart_unregister_driver(&serial8250_reg);

3179

uart_unregister_driver(&serial8250_reg);

3171

#endif

3180

#endif

3172

}

3181

}

3173

3182

3174

module_init(serial8250_init);

3183

module_init(serial8250_init);

3175

module_exit(serial8250_exit);

3184

module_exit(serial8250_exit);

3176

3185

3177

EXPORT_SYMBOL(serial8250_suspend_port);

3186

EXPORT_SYMBOL(serial8250_suspend_port);

3178

EXPORT_SYMBOL(serial8250_resume_port);

3187

EXPORT_SYMBOL(serial8250_resume_port);

3179

3188

3180

MODULE_LICENSE("GPL");

3189

MODULE_LICENSE("GPL");

3181

MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");

3190

MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");

3182

3191

3183

module_param(share_irqs, uint, 0644);

3192

module_param(share_irqs, uint, 0644);

3184

MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"

3193

MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"

3185

" (unsafe)");

3194

" (unsafe)");

3186

3195

3187

module_param(nr_uarts, uint, 0644);

3196

module_param(nr_uarts, uint, 0644);

3188

MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");

3197

MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");

3189

3198

3190

#ifdef CONFIG_SERIAL_8250_RSA

3199

#ifdef CONFIG_SERIAL_8250_RSA

3191

module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);

3200

module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);

3192

MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");

3201

MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");

3193

#endif

3202

#endif

3194

MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);

3203

MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);

3195

3204

GITLAB

Eric Lee / linux-smarc-t335x-v3.2

Serial: Allow port type to be specified when calling serial8250_register_port.

 /*
  *  linux/drivers/char/8250.c
  *
  *  Driver for 8250/16550-type serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  *
  *  Copyright (C) 2001 Russell King.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * A note about mapbase / membase
  *
  *  mapbase is the physical address of the IO port.
  *  membase is an 'ioremapped' cookie.
  */
 #if defined(CONFIG_SERIAL_8250_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ)
 #define SUPPORT_SYSRQ
 #endif
 #include <linux/module.h>
 #include <linux/moduleparam.h>
 #include <linux/ioport.h>
 #include <linux/init.h>
 #include <linux/console.h>
 #include <linux/sysrq.h>
 #include <linux/delay.h>
 #include <linux/platform_device.h>
 #include <linux/tty.h>
 #include <linux/tty_flip.h>
 #include <linux/serial_reg.h>
 #include <linux/serial_core.h>
 #include <linux/serial.h>
 #include <linux/serial_8250.h>
 #include <linux/nmi.h>
 #include <linux/mutex.h>
 #include <asm/io.h>
 #include <asm/irq.h>
 #include "8250.h"
 #ifdef CONFIG_SPARC
 #include "suncore.h"
 #endif
 /*
  * Configuration:
  *   share_irqs - whether we pass IRQF_SHARED to request_irq().  This option
  *                is unsafe when used on edge-triggered interrupts.
  */
 static unsigned int share_irqs = SERIAL8250_SHARE_IRQS;
 static unsigned int nr_uarts = CONFIG_SERIAL_8250_RUNTIME_UARTS;
 static struct uart_driver serial8250_reg;
 static int serial_index(struct uart_port *port)
 {
 	return (serial8250_reg.minor - 64) + port->line;
 }
 /*
  * Debugging.
  */
 #if 0
 #define DEBUG_AUTOCONF(fmt...)	printk(fmt)
 #else
 #define DEBUG_AUTOCONF(fmt...)	do { } while (0)
 #endif
 #if 0
 #define DEBUG_INTR(fmt...)	printk(fmt)
 #else
 #define DEBUG_INTR(fmt...)	do { } while (0)
 #endif
 #define PASS_LIMIT	256
 /*
  * We default to IRQ0 for the "no irq" hack.   Some
  * machine types want others as well - they're free
  * to redefine this in their header file.
  */
 #define is_real_interrupt(irq)	((irq) != 0)
 #ifdef CONFIG_SERIAL_8250_DETECT_IRQ
 #define CONFIG_SERIAL_DETECT_IRQ 1
 #endif
 #ifdef CONFIG_SERIAL_8250_MANY_PORTS
 #define CONFIG_SERIAL_MANY_PORTS 1
 #endif
 /*
  * HUB6 is always on.  This will be removed once the header
  * files have been cleaned.
  */
 #define CONFIG_HUB6 1
 #include <asm/serial.h>
 /*
  * SERIAL_PORT_DFNS tells us about built-in ports that have no
  * standard enumeration mechanism.   Platforms that can find all
  * serial ports via mechanisms like ACPI or PCI need not supply it.
  */
 #ifndef SERIAL_PORT_DFNS
 #define SERIAL_PORT_DFNS
 #endif
 static const struct old_serial_port old_serial_port[] = {
 	SERIAL_PORT_DFNS /* defined in asm/serial.h */
 };
 #define UART_NR	CONFIG_SERIAL_8250_NR_UARTS
 #ifdef CONFIG_SERIAL_8250_RSA
 #define PORT_RSA_MAX 4
 static unsigned long probe_rsa[PORT_RSA_MAX];
 static unsigned int probe_rsa_count;
 #endif /* CONFIG_SERIAL_8250_RSA  */
 struct uart_8250_port {
 	struct uart_port	port;
 	struct timer_list	timer;		/* "no irq" timer */
 	struct list_head	list;		/* ports on this IRQ */
 	unsigned short		capabilities;	/* port capabilities */
 	unsigned short		bugs;		/* port bugs */
 	unsigned int		tx_loadsz;	/* transmit fifo load size */
 	unsigned char		acr;
 	unsigned char		ier;
 	unsigned char		lcr;
 	unsigned char		mcr;
 	unsigned char		mcr_mask;	/* mask of user bits */
 	unsigned char		mcr_force;	/* mask of forced bits */
 	/*
 	 * Some bits in registers are cleared on a read, so they must
 	 * be saved whenever the register is read but the bits will not
 	 * be immediately processed.
 	 */
 #define LSR_SAVE_FLAGS UART_LSR_BRK_ERROR_BITS
 	unsigned char		lsr_saved_flags;
 #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA
 	unsigned char		msr_saved_flags;
 	/*
 	 * We provide a per-port pm hook.
 	 */
 	void			(*pm)(struct uart_port *port,
 				      unsigned int state, unsigned int old);
 };
 struct irq_info {
 	struct			hlist_node node;
 	int			irq;
 	spinlock_t		lock;	/* Protects list not the hash */
 	struct list_head	*head;
 };
 #define NR_IRQ_HASH		32	/* Can be adjusted later */
 static struct hlist_head irq_lists[NR_IRQ_HASH];
 static DEFINE_MUTEX(hash_mutex);	/* Used to walk the hash */
 /*
  * Here we define the default xmit fifo size used for each type of UART.
  */
 static const struct serial8250_config uart_config[] = {
 	[PORT_UNKNOWN] = {
 		.name		= "unknown",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_8250] = {
 		.name		= "8250",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16450] = {
 		.name		= "16450",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16550] = {
 		.name		= "16550",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16550A] = {
 		.name		= "16550A",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_CIRRUS] = {
 		.name		= "Cirrus",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16650] = {
 		.name		= "ST16650",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16650V2] = {
 		.name		= "ST16650V2",
 		.fifo_size	= 32,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
 				  UART_FCR_T_TRIG_00,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16750] = {
 		.name		= "TI16750",
 		.fifo_size	= 64,
 		.tx_loadsz	= 64,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10 |
 				  UART_FCR7_64BYTE,
 		.flags		= UART_CAP_FIFO | UART_CAP_SLEEP | UART_CAP_AFE,
 	},
 	[PORT_STARTECH] = {
 		.name		= "Startech",
 		.fifo_size	= 1,
 		.tx_loadsz	= 1,
 	},
 	[PORT_16C950] = {
 		.name		= "16C950/954",
 		.fifo_size	= 128,
 		.tx_loadsz	= 128,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_16654] = {
 		.name		= "ST16654",
 		.fifo_size	= 64,
 		.tx_loadsz	= 32,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_01 |
 				  UART_FCR_T_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_16850] = {
 		.name		= "XR16850",
 		.fifo_size	= 128,
 		.tx_loadsz	= 128,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_EFR | UART_CAP_SLEEP,
 	},
 	[PORT_RSA] = {
 		.name		= "RSA",
 		.fifo_size	= 2048,
 		.tx_loadsz	= 2048,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_11,
 		.flags		= UART_CAP_FIFO,
 	},
 	[PORT_NS16550A] = {
 		.name		= "NS16550A",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_NATSEMI,
 	},
 	[PORT_XSCALE] = {
 		.name		= "XScale",
 		.fifo_size	= 32,
 		.tx_loadsz	= 32,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO | UART_CAP_UUE,
 	},
 	[PORT_RM9000] = {
 		.name		= "RM9000",
 		.fifo_size	= 16,
 		.tx_loadsz	= 16,
 		.fcr		= UART_FCR_ENABLE_FIFO | UART_FCR_R_TRIG_10,
 		.flags		= UART_CAP_FIFO,
 	},
 };
 #if defined (CONFIG_SERIAL_8250_AU1X00)
 /* Au1x00 UART hardware has a weird register layout */
 static const u8 au_io_in_map[] = {
 	[UART_RX]  = 0,
 	[UART_IER] = 2,
 	[UART_IIR] = 3,
 	[UART_LCR] = 5,
 	[UART_MCR] = 6,
 	[UART_LSR] = 7,
 	[UART_MSR] = 8,
 };
 static const u8 au_io_out_map[] = {
 	[UART_TX]  = 1,
 	[UART_IER] = 2,
 	[UART_FCR] = 4,
 	[UART_LCR] = 5,
 	[UART_MCR] = 6,
 };
 /* sane hardware needs no mapping */
 static inline int map_8250_in_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_AU)
 		return offset;
 	return au_io_in_map[offset];
 }
 static inline int map_8250_out_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_AU)
 		return offset;
 	return au_io_out_map[offset];
 }
 #elif defined(CONFIG_SERIAL_8250_RM9K)
 static const u8
 	regmap_in[8] = {
 		[UART_RX]	= 0x00,
 		[UART_IER]	= 0x0c,
 		[UART_IIR]	= 0x14,
 		[UART_LCR]	= 0x1c,
 		[UART_MCR]	= 0x20,
 		[UART_LSR]	= 0x24,
 		[UART_MSR]	= 0x28,
 		[UART_SCR]	= 0x2c
 	},
 	regmap_out[8] = {
 		[UART_TX] 	= 0x04,
 		[UART_IER]	= 0x0c,
 		[UART_FCR]	= 0x18,
 		[UART_LCR]	= 0x1c,
 		[UART_MCR]	= 0x20,
 		[UART_LSR]	= 0x24,
 		[UART_MSR]	= 0x28,
 		[UART_SCR]	= 0x2c
 	};
 static inline int map_8250_in_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_RM9000)
 		return offset;
 	return regmap_in[offset];
 }
 static inline int map_8250_out_reg(struct uart_port *p, int offset)
 {
 	if (p->iotype != UPIO_RM9000)
 		return offset;
 	return regmap_out[offset];
 }
 #else
 /* sane hardware needs no mapping */
 #define map_8250_in_reg(up, offset) (offset)
 #define map_8250_out_reg(up, offset) (offset)
 #endif
 static unsigned int hub6_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	outb(p->hub6 - 1 + offset, p->iobase);
 	return inb(p->iobase + 1);
 }
 static void hub6_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	outb(p->hub6 - 1 + offset, p->iobase);
 	outb(value, p->iobase + 1);
 }
 static unsigned int mem_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return readb(p->membase + offset);
 }
 static void mem_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	writeb(value, p->membase + offset);
 }
 static void mem32_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	writel(value, p->membase + offset);
 }
 static unsigned int mem32_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return readl(p->membase + offset);
 }
 #ifdef CONFIG_SERIAL_8250_AU1X00
 static unsigned int au_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return __raw_readl(p->membase + offset);
 }
 static void au_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	__raw_writel(value, p->membase + offset);
 }
 #endif
 static unsigned int tsi_serial_in(struct uart_port *p, int offset)
 {
 	unsigned int tmp;
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	if (offset == UART_IIR) {
 		tmp = readl(p->membase + (UART_IIR & ~3));
 		return (tmp >> 16) & 0xff; /* UART_IIR % 4 == 2 */
 	} else
 		return readb(p->membase + offset);
 }
 static void tsi_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	if (!((offset == UART_IER) && (value & UART_IER_UUE)))
 		writeb(value, p->membase + offset);
 }
 static void dwapb_serial_out(struct uart_port *p, int offset, int value)
 {
 	int save_offset = offset;
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	/* Save the LCR value so it can be re-written when a
 	 * Busy Detect interrupt occurs. */
 	if (save_offset == UART_LCR) {
 		struct uart_8250_port *up = (struct uart_8250_port *)p;
 		up->lcr = value;
 	}
 	writeb(value, p->membase + offset);
 	/* Read the IER to ensure any interrupt is cleared before
 	 * returning from ISR. */
 	if (save_offset == UART_TX || save_offset == UART_IER)
 		value = p->serial_in(p, UART_IER);
 }
 static unsigned int io_serial_in(struct uart_port *p, int offset)
 {
 	offset = map_8250_in_reg(p, offset) << p->regshift;
 	return inb(p->iobase + offset);
 }
 static void io_serial_out(struct uart_port *p, int offset, int value)
 {
 	offset = map_8250_out_reg(p, offset) << p->regshift;
 	outb(value, p->iobase + offset);
 }
 static void set_io_from_upio(struct uart_port *p)
 {
 	switch (p->iotype) {
 	case UPIO_HUB6:
 		p->serial_in = hub6_serial_in;
 		p->serial_out = hub6_serial_out;
 		break;
 	case UPIO_MEM:
 		p->serial_in = mem_serial_in;
 		p->serial_out = mem_serial_out;
 		break;
 	case UPIO_RM9000:
 	case UPIO_MEM32:
 		p->serial_in = mem32_serial_in;
 		p->serial_out = mem32_serial_out;
 		break;
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	case UPIO_AU:
 		p->serial_in = au_serial_in;
 		p->serial_out = au_serial_out;
 		break;
 #endif
 	case UPIO_TSI:
 		p->serial_in = tsi_serial_in;
 		p->serial_out = tsi_serial_out;
 		break;
 	case UPIO_DWAPB:
 		p->serial_in = mem_serial_in;
 		p->serial_out = dwapb_serial_out;
 		break;
 	default:
 		p->serial_in = io_serial_in;
 		p->serial_out = io_serial_out;
 		break;
 	}
 }
 static void
 serial_out_sync(struct uart_8250_port *up, int offset, int value)
 {
 	struct uart_port *p = &up->port;
 	switch (p->iotype) {
 	case UPIO_MEM:
 	case UPIO_MEM32:
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	case UPIO_AU:
 #endif
 	case UPIO_DWAPB:
 		p->serial_out(p, offset, value);
 		p->serial_in(p, UART_LCR);	/* safe, no side-effects */
 		break;
 	default:
 		p->serial_out(p, offset, value);
 	}
 }
 #define serial_in(up, offset)		\
 	(up->port.serial_in(&(up)->port, (offset)))
 #define serial_out(up, offset, value)	\
 	(up->port.serial_out(&(up)->port, (offset), (value)))
 /*
  * We used to support using pause I/O for certain machines.  We
  * haven't supported this for a while, but just in case it's badly
  * needed for certain old 386 machines, I've left these #define's
  * in....
  */
 #define serial_inp(up, offset)		serial_in(up, offset)
 #define serial_outp(up, offset, value)	serial_out(up, offset, value)
 /* Uart divisor latch read */
 static inline int _serial_dl_read(struct uart_8250_port *up)
 {
 	return serial_inp(up, UART_DLL) | serial_inp(up, UART_DLM) << 8;
 }
 /* Uart divisor latch write */
 static inline void _serial_dl_write(struct uart_8250_port *up, int value)
 {
 	serial_outp(up, UART_DLL, value & 0xff);
 	serial_outp(up, UART_DLM, value >> 8 & 0xff);
 }
 #if defined(CONFIG_SERIAL_8250_AU1X00)
 /* Au1x00 haven't got a standard divisor latch */
 static int serial_dl_read(struct uart_8250_port *up)
 {
 	if (up->port.iotype == UPIO_AU)
 		return __raw_readl(up->port.membase + 0x28);
 	else
 		return _serial_dl_read(up);
 }
 static void serial_dl_write(struct uart_8250_port *up, int value)
 {
 	if (up->port.iotype == UPIO_AU)
 		__raw_writel(value, up->port.membase + 0x28);
 	else
 		_serial_dl_write(up, value);
 }
 #elif defined(CONFIG_SERIAL_8250_RM9K)
 static int serial_dl_read(struct uart_8250_port *up)
 {
 	return	(up->port.iotype == UPIO_RM9000) ?
 		(((__raw_readl(up->port.membase + 0x10) << 8) |
 		(__raw_readl(up->port.membase + 0x08) & 0xff)) & 0xffff) :
 		_serial_dl_read(up);
 }
 static void serial_dl_write(struct uart_8250_port *up, int value)
 {
 	if (up->port.iotype == UPIO_RM9000) {
 		__raw_writel(value, up->port.membase + 0x08);
 		__raw_writel(value >> 8, up->port.membase + 0x10);
 	} else {
 		_serial_dl_write(up, value);
 	}
 }
 #else
 #define serial_dl_read(up) _serial_dl_read(up)
 #define serial_dl_write(up, value) _serial_dl_write(up, value)
 #endif
 /*
  * For the 16C950
  */
 static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
 {
 	serial_out(up, UART_SCR, offset);
 	serial_out(up, UART_ICR, value);
 }
 static unsigned int serial_icr_read(struct uart_8250_port *up, int offset)
 {
 	unsigned int value;
 	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
 	serial_out(up, UART_SCR, offset);
 	value = serial_in(up, UART_ICR);
 	serial_icr_write(up, UART_ACR, up->acr);
 	return value;
 }
 /*
  * FIFO support.
  */
 static void serial8250_clear_fifos(struct uart_8250_port *p)
 {
 	if (p->capabilities & UART_CAP_FIFO) {
 		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO);
 		serial_outp(p, UART_FCR, UART_FCR_ENABLE_FIFO |
 			       UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 		serial_outp(p, UART_FCR, 0);
 	}
 }
 /*
  * IER sleep support.  UARTs which have EFRs need the "extended
  * capability" bit enabled.  Note that on XR16C850s, we need to
  * reset LCR to write to IER.
  */
 static void serial8250_set_sleep(struct uart_8250_port *p, int sleep)
 {
 	if (p->capabilities & UART_CAP_SLEEP) {
 		if (p->capabilities & UART_CAP_EFR) {
 			serial_outp(p, UART_LCR, 0xBF);
 			serial_outp(p, UART_EFR, UART_EFR_ECB);
 			serial_outp(p, UART_LCR, 0);
 		}
 		serial_outp(p, UART_IER, sleep ? UART_IERX_SLEEP : 0);
 		if (p->capabilities & UART_CAP_EFR) {
 			serial_outp(p, UART_LCR, 0xBF);
 			serial_outp(p, UART_EFR, 0);
 			serial_outp(p, UART_LCR, 0);
 		}
 	}
 }
 #ifdef CONFIG_SERIAL_8250_RSA
 /*
  * Attempts to turn on the RSA FIFO.  Returns zero on failure.
  * We set the port uart clock rate if we succeed.
  */
 static int __enable_rsa(struct uart_8250_port *up)
 {
 	unsigned char mode;
 	int result;
 	mode = serial_inp(up, UART_RSA_MSR);
 	result = mode & UART_RSA_MSR_FIFO;
 	if (!result) {
 		serial_outp(up, UART_RSA_MSR, mode | UART_RSA_MSR_FIFO);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = mode & UART_RSA_MSR_FIFO;
 	}
 	if (result)
 		up->port.uartclk = SERIAL_RSA_BAUD_BASE * 16;
 	return result;
 }
 static void enable_rsa(struct uart_8250_port *up)
 {
 	if (up->port.type == PORT_RSA) {
 		if (up->port.uartclk != SERIAL_RSA_BAUD_BASE * 16) {
 			spin_lock_irq(&up->port.lock);
 			__enable_rsa(up);
 			spin_unlock_irq(&up->port.lock);
 		}
 		if (up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16)
 			serial_outp(up, UART_RSA_FRR, 0);
 	}
 }
 /*
  * Attempts to turn off the RSA FIFO.  Returns zero on failure.
  * It is unknown why interrupts were disabled in here.  However,
  * the caller is expected to preserve this behaviour by grabbing
  * the spinlock before calling this function.
  */
 static void disable_rsa(struct uart_8250_port *up)
 {
 	unsigned char mode;
 	int result;
 	if (up->port.type == PORT_RSA &&
 	    up->port.uartclk == SERIAL_RSA_BAUD_BASE * 16) {
 		spin_lock_irq(&up->port.lock);
 		mode = serial_inp(up, UART_RSA_MSR);
 		result = !(mode & UART_RSA_MSR_FIFO);
 		if (!result) {
 			serial_outp(up, UART_RSA_MSR, mode & ~UART_RSA_MSR_FIFO);
 			mode = serial_inp(up, UART_RSA_MSR);
 			result = !(mode & UART_RSA_MSR_FIFO);
 		}
 		if (result)
 			up->port.uartclk = SERIAL_RSA_BAUD_BASE_LO * 16;
 		spin_unlock_irq(&up->port.lock);
 	}
 }
 #endif /* CONFIG_SERIAL_8250_RSA */
 /*
  * This is a quickie test to see how big the FIFO is.
  * It doesn't work at all the time, more's the pity.
  */
 static int size_fifo(struct uart_8250_port *up)
 {
 	unsigned char old_fcr, old_mcr, old_lcr;
 	unsigned short old_dl;
 	int count;
 	old_lcr = serial_inp(up, UART_LCR);
 	serial_outp(up, UART_LCR, 0);
 	old_fcr = serial_inp(up, UART_FCR);
 	old_mcr = serial_inp(up, UART_MCR);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO |
 		    UART_FCR_CLEAR_RCVR | UART_FCR_CLEAR_XMIT);
 	serial_outp(up, UART_MCR, UART_MCR_LOOP);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	old_dl = serial_dl_read(up);
 	serial_dl_write(up, 0x0001);
 	serial_outp(up, UART_LCR, 0x03);
 	for (count = 0; count < 256; count++)
 		serial_outp(up, UART_TX, count);
 	mdelay(20);/* FIXME - schedule_timeout */
 	for (count = 0; (serial_inp(up, UART_LSR) & UART_LSR_DR) &&
 	     (count < 256); count++)
 		serial_inp(up, UART_RX);
 	serial_outp(up, UART_FCR, old_fcr);
 	serial_outp(up, UART_MCR, old_mcr);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	serial_dl_write(up, old_dl);
 	serial_outp(up, UART_LCR, old_lcr);
 	return count;
 }
 /*
  * Read UART ID using the divisor method - set DLL and DLM to zero
  * and the revision will be in DLL and device type in DLM.  We
  * preserve the device state across this.
  */
 static unsigned int autoconfig_read_divisor_id(struct uart_8250_port *p)
 {
 	unsigned char old_dll, old_dlm, old_lcr;
 	unsigned int id;
 	old_lcr = serial_inp(p, UART_LCR);
 	serial_outp(p, UART_LCR, UART_LCR_DLAB);
 	old_dll = serial_inp(p, UART_DLL);
 	old_dlm = serial_inp(p, UART_DLM);
 	serial_outp(p, UART_DLL, 0);
 	serial_outp(p, UART_DLM, 0);
 	id = serial_inp(p, UART_DLL) | serial_inp(p, UART_DLM) << 8;
 	serial_outp(p, UART_DLL, old_dll);
 	serial_outp(p, UART_DLM, old_dlm);
 	serial_outp(p, UART_LCR, old_lcr);
 	return id;
 }
 /*
  * This is a helper routine to autodetect StarTech/Exar/Oxsemi UART's.
  * When this function is called we know it is at least a StarTech
  * 16650 V2, but it might be one of several StarTech UARTs, or one of
  * its clones.  (We treat the broken original StarTech 16650 V1 as a
  * 16550, and why not?  Startech doesn't seem to even acknowledge its
  * existence.)
  *
  * What evil have men's minds wrought...
  */
 static void autoconfig_has_efr(struct uart_8250_port *up)
 {
 	unsigned int id1, id2, id3, rev;
 	/*
 	 * Everything with an EFR has SLEEP
 	 */
 	up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
 	/*
 	 * First we check to see if it's an Oxford Semiconductor UART.
 	 *
 	 * If we have to do this here because some non-National
 	 * Semiconductor clone chips lock up if you try writing to the
 	 * LSR register (which serial_icr_read does)
 	 */
 	/*
 	 * Check for Oxford Semiconductor 16C950.
 	 *
 	 * EFR [4] must be set else this test fails.
 	 *
 	 * This shouldn't be necessary, but Mike Hudson (Exoray@isys.ca)
 	 * claims that it's needed for 952 dual UART's (which are not
 	 * recommended for new designs).
 	 */
 	up->acr = 0;
 	serial_out(up, UART_LCR, 0xBF);
 	serial_out(up, UART_EFR, UART_EFR_ECB);
 	serial_out(up, UART_LCR, 0x00);
 	id1 = serial_icr_read(up, UART_ID1);
 	id2 = serial_icr_read(up, UART_ID2);
 	id3 = serial_icr_read(up, UART_ID3);
 	rev = serial_icr_read(up, UART_REV);
 	DEBUG_AUTOCONF("950id=%02x:%02x:%02x:%02x ", id1, id2, id3, rev);
 	if (id1 == 0x16 && id2 == 0xC9 &&
 	    (id3 == 0x50 || id3 == 0x52 || id3 == 0x54)) {
 		up->port.type = PORT_16C950;
 		/*
 		 * Enable work around for the Oxford Semiconductor 952 rev B
 		 * chip which causes it to seriously miscalculate baud rates
 		 * when DLL is 0.
 		 */
 		if (id3 == 0x52 && rev == 0x01)
 			up->bugs |= UART_BUG_QUOT;
 		return;
 	}
 	/*
 	 * We check for a XR16C850 by setting DLL and DLM to 0, and then
 	 * reading back DLL and DLM.  The chip type depends on the DLM
 	 * value read back:
 	 *  0x10 - XR16C850 and the DLL contains the chip revision.
 	 *  0x12 - XR16C2850.
 	 *  0x14 - XR16C854.
 	 */
 	id1 = autoconfig_read_divisor_id(up);
 	DEBUG_AUTOCONF("850id=%04x ", id1);
 	id2 = id1 >> 8;
 	if (id2 == 0x10 || id2 == 0x12 || id2 == 0x14) {
 		up->port.type = PORT_16850;
 		return;
 	}
 	/*
 	 * It wasn't an XR16C850.
 	 *
 	 * We distinguish between the '654 and the '650 by counting
 	 * how many bytes are in the FIFO.  I'm using this for now,
 	 * since that's the technique that was sent to me in the
 	 * serial driver update, but I'm not convinced this works.
 	 * I've had problems doing this in the past.  -TYT
 	 */
 	if (size_fifo(up) == 64)
 		up->port.type = PORT_16654;
 	else
 		up->port.type = PORT_16650V2;
 }
 /*
  * We detected a chip without a FIFO.  Only two fall into
  * this category - the original 8250 and the 16450.  The
  * 16450 has a scratch register (accessible with LCR=0)
  */
 static void autoconfig_8250(struct uart_8250_port *up)
 {
 	unsigned char scratch, status1, status2;
 	up->port.type = PORT_8250;
 	scratch = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, 0xa5);
 	status1 = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, 0x5a);
 	status2 = serial_in(up, UART_SCR);
 	serial_outp(up, UART_SCR, scratch);
 	if (status1 == 0xa5 && status2 == 0x5a)
 		up->port.type = PORT_16450;
 }
 static int broken_efr(struct uart_8250_port *up)
 {
 	/*
 	 * Exar ST16C2550 "A2" devices incorrectly detect as
 	 * having an EFR, and report an ID of 0x0201.  See
 	 * http://www.exar.com/info.php?pdf=dan180_oct2004.pdf
 	 */
 	if (autoconfig_read_divisor_id(up) == 0x0201 && size_fifo(up) == 16)
 		return 1;
 	return 0;
 }
 /*
  * We know that the chip has FIFOs.  Does it have an EFR?  The
  * EFR is located in the same register position as the IIR and
  * we know the top two bits of the IIR are currently set.  The
  * EFR should contain zero.  Try to read the EFR.
  */
 static void autoconfig_16550a(struct uart_8250_port *up)
 {
 	unsigned char status1, status2;
 	unsigned int iersave;
 	up->port.type = PORT_16550A;
 	up->capabilities |= UART_CAP_FIFO;
 	/*
 	 * Check for presence of the EFR when DLAB is set.
 	 * Only ST16C650V1 UARTs pass this test.
 	 */
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	if (serial_in(up, UART_EFR) == 0) {
 		serial_outp(up, UART_EFR, 0xA8);
 		if (serial_in(up, UART_EFR) != 0) {
 			DEBUG_AUTOCONF("EFRv1 ");
 			up->port.type = PORT_16650;
 			up->capabilities |= UART_CAP_EFR | UART_CAP_SLEEP;
 		} else {
 			DEBUG_AUTOCONF("Motorola 8xxx DUART ");
 		}
 		serial_outp(up, UART_EFR, 0);
 		return;
 	}
 	/*
 	 * Maybe it requires 0xbf to be written to the LCR.
 	 * (other ST16C650V2 UARTs, TI16C752A, etc)
 	 */
 	serial_outp(up, UART_LCR, 0xBF);
 	if (serial_in(up, UART_EFR) == 0 && !broken_efr(up)) {
 		DEBUG_AUTOCONF("EFRv2 ");
 		autoconfig_has_efr(up);
 		return;
 	}
 	/*
 	 * Check for a National Semiconductor SuperIO chip.
 	 * Attempt to switch to bank 2, read the value of the LOOP bit
 	 * from EXCR1. Switch back to bank 0, change it in MCR. Then
 	 * switch back to bank 2, read it from EXCR1 again and check
 	 * it's changed. If so, set baud_base in EXCR2 to 921600. -- dwmw2
 	 */
 	serial_outp(up, UART_LCR, 0);
 	status1 = serial_in(up, UART_MCR);
 	serial_outp(up, UART_LCR, 0xE0);
 	status2 = serial_in(up, 0x02); /* EXCR1 */
 	if (!((status2 ^ status1) & UART_MCR_LOOP)) {
 		serial_outp(up, UART_LCR, 0);
 		serial_outp(up, UART_MCR, status1 ^ UART_MCR_LOOP);
 		serial_outp(up, UART_LCR, 0xE0);
 		status2 = serial_in(up, 0x02); /* EXCR1 */
 		serial_outp(up, UART_LCR, 0);
 		serial_outp(up, UART_MCR, status1);
 		if ((status2 ^ status1) & UART_MCR_LOOP) {
 			unsigned short quot;
 			serial_outp(up, UART_LCR, 0xE0);
 			quot = serial_dl_read(up);
 			quot <<= 3;
 			status1 = serial_in(up, 0x04); /* EXCR2 */
 			status1 &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
 			status1 |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
 			serial_outp(up, 0x04, status1);
 			serial_dl_write(up, quot);
 			serial_outp(up, UART_LCR, 0);
 			up->port.uartclk = 921600*16;
 			up->port.type = PORT_NS16550A;
 			up->capabilities |= UART_NATSEMI;
 			return;
 		}
 	}
 	/*
 	 * No EFR.  Try to detect a TI16750, which only sets bit 5 of
 	 * the IIR when 64 byte FIFO mode is enabled when DLAB is set.
 	 * Try setting it with and without DLAB set.  Cheap clones
 	 * set bit 5 without DLAB set.
 	 */
 	serial_outp(up, UART_LCR, 0);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 	status1 = serial_in(up, UART_IIR) >> 5;
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	serial_outp(up, UART_LCR, UART_LCR_DLAB);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO | UART_FCR7_64BYTE);
 	status2 = serial_in(up, UART_IIR) >> 5;
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	serial_outp(up, UART_LCR, 0);
 	DEBUG_AUTOCONF("iir1=%d iir2=%d ", status1, status2);
 	if (status1 == 6 && status2 == 7) {
 		up->port.type = PORT_16750;
 		up->capabilities |= UART_CAP_AFE | UART_CAP_SLEEP;
 		return;
 	}
 	/*
 	 * Try writing and reading the UART_IER_UUE bit (b6).
 	 * If it works, this is probably one of the Xscale platform's
 	 * internal UARTs.
 	 * We're going to explicitly set the UUE bit to 0 before
 	 * trying to write and read a 1 just to make sure it's not
 	 * already a 1 and maybe locked there before we even start start.
 	 */
 	iersave = serial_in(up, UART_IER);
 	serial_outp(up, UART_IER, iersave & ~UART_IER_UUE);
 	if (!(serial_in(up, UART_IER) & UART_IER_UUE)) {
 		/*
 		 * OK it's in a known zero state, try writing and reading
 		 * without disturbing the current state of the other bits.
 		 */
 		serial_outp(up, UART_IER, iersave | UART_IER_UUE);
 		if (serial_in(up, UART_IER) & UART_IER_UUE) {
 			/*
 			 * It's an Xscale.
 			 * We'll leave the UART_IER_UUE bit set to 1 (enabled).
 			 */
 			DEBUG_AUTOCONF("Xscale ");
 			up->port.type = PORT_XSCALE;
 			up->capabilities |= UART_CAP_UUE;
 			return;
 		}
 	} else {
 		/*
 		 * If we got here we couldn't force the IER_UUE bit to 0.
 		 * Log it and continue.
 		 */
 		DEBUG_AUTOCONF("Couldn't force IER_UUE to 0 ");
 	}
 	serial_outp(up, UART_IER, iersave);
 }
 /*
  * This routine is called by rs_init() to initialize a specific serial
  * port.  It determines what type of UART chip this serial port is
  * using: 8250, 16450, 16550, 16550A.  The important question is
  * whether or not this UART is a 16550A or not, since this will
  * determine whether or not we can use its FIFO features or not.
  */
 static void autoconfig(struct uart_8250_port *up, unsigned int probeflags)
 {
 	unsigned char status1, scratch, scratch2, scratch3;
 	unsigned char save_lcr, save_mcr;
 	unsigned long flags;
 	if (!up->port.iobase && !up->port.mapbase && !up->port.membase)
 		return;
 	DEBUG_AUTOCONF("ttyS%d: autoconf (0x%04x, 0x%p): ",
 		       serial_index(&up->port), up->port.iobase, up->port.membase);
 	/*
 	 * We really do need global IRQs disabled here - we're going to
 	 * be frobbing the chips IRQ enable register to see if it exists.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	up->capabilities = 0;
 	up->bugs = 0;
 	if (!(up->port.flags & UPF_BUGGY_UART)) {
 		/*
 		 * Do a simple existence test first; if we fail this,
 		 * there's no point trying anything else.
 		 *
 		 * 0x80 is used as a nonsense port to prevent against
 		 * false positives due to ISA bus float.  The
 		 * assumption is that 0x80 is a non-existent port;
 		 * which should be safe since include/asm/io.h also
 		 * makes this assumption.
 		 *
 		 * Note: this is safe as long as MCR bit 4 is clear
 		 * and the device is in "PC" mode.
 		 */
 		scratch = serial_inp(up, UART_IER);
 		serial_outp(up, UART_IER, 0);
 #ifdef __i386__
 		outb(0xff, 0x080);
 #endif
 		/*
 		 * Mask out IER[7:4] bits for test as some UARTs (e.g. TL
 		 * 16C754B) allow only to modify them if an EFR bit is set.
 		 */
 		scratch2 = serial_inp(up, UART_IER) & 0x0f;
 		serial_outp(up, UART_IER, 0x0F);
 #ifdef __i386__
 		outb(0, 0x080);
 #endif
 		scratch3 = serial_inp(up, UART_IER) & 0x0f;
 		serial_outp(up, UART_IER, scratch);
 		if (scratch2 != 0 || scratch3 != 0x0F) {
 			/*
 			 * We failed; there's nothing here
 			 */
 			DEBUG_AUTOCONF("IER test failed (%02x, %02x) ",
 				       scratch2, scratch3);
 			goto out;
 		}
 	}
 	save_mcr = serial_in(up, UART_MCR);
 	save_lcr = serial_in(up, UART_LCR);
 	/*
 	 * Check to see if a UART is really there.  Certain broken
 	 * internal modems based on the Rockwell chipset fail this
 	 * test, because they apparently don't implement the loopback
 	 * test mode.  So this test is skipped on the COM 1 through
 	 * COM 4 ports.  This *should* be safe, since no board
 	 * manufacturer would be stupid enough to design a board
 	 * that conflicts with COM 1-4 --- we hope!
 	 */
 	if (!(up->port.flags & UPF_SKIP_TEST)) {
 		serial_outp(up, UART_MCR, UART_MCR_LOOP | 0x0A);
 		status1 = serial_inp(up, UART_MSR) & 0xF0;
 		serial_outp(up, UART_MCR, save_mcr);
 		if (status1 != 0x90) {
 			DEBUG_AUTOCONF("LOOP test failed (%02x) ",
 				       status1);
 			goto out;
 		}
 	}
 	/*
 	 * We're pretty sure there's a port here.  Lets find out what
 	 * type of port it is.  The IIR top two bits allows us to find
 	 * out if it's 8250 or 16450, 16550, 16550A or later.  This
 	 * determines what we test for next.
 	 *
 	 * We also initialise the EFR (if any) to zero for later.  The
 	 * EFR occupies the same register location as the FCR and IIR.
 	 */
 	serial_outp(up, UART_LCR, 0xBF);
 	serial_outp(up, UART_EFR, 0);
 	serial_outp(up, UART_LCR, 0);
 	serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 	scratch = serial_in(up, UART_IIR) >> 6;
 	DEBUG_AUTOCONF("iir=%d ", scratch);
 	switch (scratch) {
 	case 0:
 		autoconfig_8250(up);
 		break;
 	case 1:
 		up->port.type = PORT_UNKNOWN;
 		break;
 	case 2:
 		up->port.type = PORT_16550;
 		break;
 	case 3:
 		autoconfig_16550a(up);
 		break;
 	}
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * Only probe for RSA ports if we got the region.
 	 */
 	if (up->port.type == PORT_16550A && probeflags & PROBE_RSA) {
 		int i;
 		for (i = 0 ; i < probe_rsa_count; ++i) {
 			if (probe_rsa[i] == up->port.iobase &&
 			    __enable_rsa(up)) {
 				up->port.type = PORT_RSA;
 				break;
 			}
 		}
 	}
 #endif
 #ifdef CONFIG_SERIAL_8250_AU1X00
 	/* if access method is AU, it is a 16550 with a quirk */
 	if (up->port.type == PORT_16550A && up->port.iotype == UPIO_AU)
 		up->bugs |= UART_BUG_NOMSR;
 #endif
 	serial_outp(up, UART_LCR, save_lcr);
 	if (up->capabilities != uart_config[up->port.type].flags) {
 		printk(KERN_WARNING
 		       "ttyS%d: detected caps %08x should be %08x\n",
 		       serial_index(&up->port), up->capabilities,
 		       uart_config[up->port.type].flags);
 	}
 	up->port.fifosize = uart_config[up->port.type].fifo_size;
 	up->capabilities = uart_config[up->port.type].flags;
 	up->tx_loadsz = uart_config[up->port.type].tx_loadsz;
 	if (up->port.type == PORT_UNKNOWN)
 		goto out;
 	/*
 	 * Reset the UART.
 	 */
 #ifdef CONFIG_SERIAL_8250_RSA
 	if (up->port.type == PORT_RSA)
 		serial_outp(up, UART_RSA_FRR, 0);
 #endif
 	serial_outp(up, UART_MCR, save_mcr);
 	serial8250_clear_fifos(up);
 	serial_in(up, UART_RX);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_outp(up, UART_IER, UART_IER_UUE);
 	else
 		serial_outp(up, UART_IER, 0);
  out:
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	DEBUG_AUTOCONF("type=%s\n", uart_config[up->port.type].name);
 }
 static void autoconfig_irq(struct uart_8250_port *up)
 {
 	unsigned char save_mcr, save_ier;
 	unsigned char save_ICP = 0;
 	unsigned int ICP = 0;
 	unsigned long irqs;
 	int irq;
 	if (up->port.flags & UPF_FOURPORT) {
 		ICP = (up->port.iobase & 0xfe0) | 0x1f;
 		save_ICP = inb_p(ICP);
 		outb_p(0x80, ICP);
 		(void) inb_p(ICP);
 	}
 	/* forget possible initially masked and pending IRQ */
 	probe_irq_off(probe_irq_on());
 	save_mcr = serial_inp(up, UART_MCR);
 	save_ier = serial_inp(up, UART_IER);
 	serial_outp(up, UART_MCR, UART_MCR_OUT1 | UART_MCR_OUT2);
 	irqs = probe_irq_on();
 	serial_outp(up, UART_MCR, 0);
 	udelay(10);
 	if (up->port.flags & UPF_FOURPORT) {
 		serial_outp(up, UART_MCR,
 			    UART_MCR_DTR | UART_MCR_RTS);
 	} else {
 		serial_outp(up, UART_MCR,
 			    UART_MCR_DTR | UART_MCR_RTS | UART_MCR_OUT2);
 	}
 	serial_outp(up, UART_IER, 0x0f);	/* enable all intrs */
 	(void)serial_inp(up, UART_LSR);
 	(void)serial_inp(up, UART_RX);
 	(void)serial_inp(up, UART_IIR);
 	(void)serial_inp(up, UART_MSR);
 	serial_outp(up, UART_TX, 0xFF);
 	udelay(20);
 	irq = probe_irq_off(irqs);
 	serial_outp(up, UART_MCR, save_mcr);
 	serial_outp(up, UART_IER, save_ier);
 	if (up->port.flags & UPF_FOURPORT)
 		outb_p(save_ICP, ICP);
 	up->port.irq = (irq > 0) ? irq : 0;
 }
 static inline void __stop_tx(struct uart_8250_port *p)
 {
 	if (p->ier & UART_IER_THRI) {
 		p->ier &= ~UART_IER_THRI;
 		serial_out(p, UART_IER, p->ier);
 	}
 }
 static void serial8250_stop_tx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	__stop_tx(up);
 	/*
 	 * We really want to stop the transmitter from sending.
 	 */
 	if (up->port.type == PORT_16C950) {
 		up->acr |= UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void transmit_chars(struct uart_8250_port *up);
 static void serial8250_start_tx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	if (!(up->ier & UART_IER_THRI)) {
 		up->ier |= UART_IER_THRI;
 		serial_out(up, UART_IER, up->ier);
 		if (up->bugs & UART_BUG_TXEN) {
 			unsigned char lsr, iir;
 			lsr = serial_in(up, UART_LSR);
 			up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 			iir = serial_in(up, UART_IIR) & 0x0f;
 			if ((up->port.type == PORT_RM9000) ?
 				(lsr & UART_LSR_THRE &&
 				(iir == UART_IIR_NO_INT || iir == UART_IIR_THRI)) :
 				(lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT))
 				transmit_chars(up);
 		}
 	}
 	/*
 	 * Re-enable the transmitter if we disabled it.
 	 */
 	if (up->port.type == PORT_16C950 && up->acr & UART_ACR_TXDIS) {
 		up->acr &= ~UART_ACR_TXDIS;
 		serial_icr_write(up, UART_ACR, up->acr);
 	}
 }
 static void serial8250_stop_rx(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	up->ier &= ~UART_IER_RLSI;
 	up->port.read_status_mask &= ~UART_LSR_DR;
 	serial_out(up, UART_IER, up->ier);
 }
 static void serial8250_enable_ms(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	/* no MSR capabilities */
 	if (up->bugs & UART_BUG_NOMSR)
 		return;
 	up->ier |= UART_IER_MSI;
 	serial_out(up, UART_IER, up->ier);
 }
 static void
 receive_chars(struct uart_8250_port *up, unsigned int *status)
 {
 	struct tty_struct *tty = up->port.info->port.tty;
 	unsigned char ch, lsr = *status;
 	int max_count = 256;
 	char flag;
 	do {
 		if (likely(lsr & UART_LSR_DR))
 			ch = serial_inp(up, UART_RX);
 		else
 			/*
 			 * Intel 82571 has a Serial Over Lan device that will
 			 * set UART_LSR_BI without setting UART_LSR_DR when
 			 * it receives a break. To avoid reading from the
 			 * receive buffer without UART_LSR_DR bit set, we
 			 * just force the read character to be 0
 			 */
 			ch = 0;
 		flag = TTY_NORMAL;
 		up->port.icount.rx++;
 		lsr |= up->lsr_saved_flags;
 		up->lsr_saved_flags = 0;
 		if (unlikely(lsr & UART_LSR_BRK_ERROR_BITS)) {
 			/*
 			 * For statistics only
 			 */
 			if (lsr & UART_LSR_BI) {
 				lsr &= ~(UART_LSR_FE | UART_LSR_PE);
 				up->port.icount.brk++;
 				/*
 				 * We do the SysRQ and SAK checking
 				 * here because otherwise the break
 				 * may get masked by ignore_status_mask
 				 * or read_status_mask.
 				 */
 				if (uart_handle_break(&up->port))
 					goto ignore_char;
 			} else if (lsr & UART_LSR_PE)
 				up->port.icount.parity++;
 			else if (lsr & UART_LSR_FE)
 				up->port.icount.frame++;
 			if (lsr & UART_LSR_OE)
 				up->port.icount.overrun++;
 			/*
 			 * Mask off conditions which should be ignored.
 			 */
 			lsr &= up->port.read_status_mask;
 			if (lsr & UART_LSR_BI) {
 				DEBUG_INTR("handling break....");
 				flag = TTY_BREAK;
 			} else if (lsr & UART_LSR_PE)
 				flag = TTY_PARITY;
 			else if (lsr & UART_LSR_FE)
 				flag = TTY_FRAME;
 		}
 		if (uart_handle_sysrq_char(&up->port, ch))
 			goto ignore_char;
 		uart_insert_char(&up->port, lsr, UART_LSR_OE, ch, flag);
 ignore_char:
 		lsr = serial_inp(up, UART_LSR);
 	} while ((lsr & (UART_LSR_DR | UART_LSR_BI)) && (max_count-- > 0));
 	spin_unlock(&up->port.lock);
 	tty_flip_buffer_push(tty);
 	spin_lock(&up->port.lock);
 	*status = lsr;
 }
 static void transmit_chars(struct uart_8250_port *up)
 {
 	struct circ_buf *xmit = &up->port.info->xmit;
 	int count;
 	if (up->port.x_char) {
 		serial_outp(up, UART_TX, up->port.x_char);
 		up->port.icount.tx++;
 		up->port.x_char = 0;
 		return;
 	}
 	if (uart_tx_stopped(&up->port)) {
 		serial8250_stop_tx(&up->port);
 		return;
 	}
 	if (uart_circ_empty(xmit)) {
 		__stop_tx(up);
 		return;
 	}
 	count = up->tx_loadsz;
 	do {
 		serial_out(up, UART_TX, xmit->buf[xmit->tail]);
 		xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
 		up->port.icount.tx++;
 		if (uart_circ_empty(xmit))
 			break;
 	} while (--count > 0);
 	if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
 		uart_write_wakeup(&up->port);
 	DEBUG_INTR("THRE...");
 	if (uart_circ_empty(xmit))
 		__stop_tx(up);
 }
 static unsigned int check_modem_status(struct uart_8250_port *up)
 {
 	unsigned int status = serial_in(up, UART_MSR);
 	status |= up->msr_saved_flags;
 	up->msr_saved_flags = 0;
 	if (status & UART_MSR_ANY_DELTA && up->ier & UART_IER_MSI &&
 	    up->port.info != NULL) {
 		if (status & UART_MSR_TERI)
 			up->port.icount.rng++;
 		if (status & UART_MSR_DDSR)
 			up->port.icount.dsr++;
 		if (status & UART_MSR_DDCD)
 			uart_handle_dcd_change(&up->port, status & UART_MSR_DCD);
 		if (status & UART_MSR_DCTS)
 			uart_handle_cts_change(&up->port, status & UART_MSR_CTS);
 		wake_up_interruptible(&up->port.info->delta_msr_wait);
 	}
 	return status;
 }
 /*
  * This handles the interrupt from one port.
  */
 static void serial8250_handle_port(struct uart_8250_port *up)
 {
 	unsigned int status;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	status = serial_inp(up, UART_LSR);
 	DEBUG_INTR("status = %x...", status);
 	if (status & (UART_LSR_DR | UART_LSR_BI))
 		receive_chars(up, &status);
 	check_modem_status(up);
 	if (status & UART_LSR_THRE)
 		transmit_chars(up);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 /*
  * This is the serial driver's interrupt routine.
  *
  * Arjan thinks the old way was overly complex, so it got simplified.
  * Alan disagrees, saying that need the complexity to handle the weird
  * nature of ISA shared interrupts.  (This is a special exception.)
  *
  * In order to handle ISA shared interrupts properly, we need to check
  * that all ports have been serviced, and therefore the ISA interrupt
  * line has been de-asserted.
  *
  * This means we need to loop through all ports. checking that they
  * don't have an interrupt pending.
  */
 static irqreturn_t serial8250_interrupt(int irq, void *dev_id)
 {
 	struct irq_info *i = dev_id;
 	struct list_head *l, *end = NULL;
 	int pass_counter = 0, handled = 0;
 	DEBUG_INTR("serial8250_interrupt(%d)...", irq);
 	spin_lock(&i->lock);
 	l = i->head;
 	do {
 		struct uart_8250_port *up;
 		unsigned int iir;
 		up = list_entry(l, struct uart_8250_port, list);
 		iir = serial_in(up, UART_IIR);
 		if (!(iir & UART_IIR_NO_INT)) {
 			serial8250_handle_port(up);
 			handled = 1;
 			end = NULL;
 		} else if (up->port.iotype == UPIO_DWAPB &&
 			  (iir & UART_IIR_BUSY) == UART_IIR_BUSY) {
 			/* The DesignWare APB UART has an Busy Detect (0x07)
 			 * interrupt meaning an LCR write attempt occured while the
 			 * UART was busy. The interrupt must be cleared by reading
 			 * the UART status register (USR) and the LCR re-written. */
 			unsigned int status;
 			status = *(volatile u32 *)up->port.private_data;
 			serial_out(up, UART_LCR, up->lcr);
 			handled = 1;
 			end = NULL;
 		} else if (end == NULL)
 			end = l;
 		l = l->next;
 		if (l == i->head && pass_counter++ > PASS_LIMIT) {
 			/* If we hit this, we're dead. */
 			printk(KERN_ERR "serial8250: too much work for "
 				"irq%d\n", irq);
 			break;
 		}
 	} while (l != end);
 	spin_unlock(&i->lock);
 	DEBUG_INTR("end.\n");
 	return IRQ_RETVAL(handled);
 }
 /*
  * To support ISA shared interrupts, we need to have one interrupt
  * handler that ensures that the IRQ line has been deasserted
  * before returning.  Failing to do this will result in the IRQ
  * line being stuck active, and, since ISA irqs are edge triggered,
  * no more IRQs will be seen.
  */
 static void serial_do_unlink(struct irq_info *i, struct uart_8250_port *up)
 {
 	spin_lock_irq(&i->lock);
 	if (!list_empty(i->head)) {
 		if (i->head == &up->list)
 			i->head = i->head->next;
 		list_del(&up->list);
 	} else {
 		BUG_ON(i->head != &up->list);
 		i->head = NULL;
 	}
 	spin_unlock_irq(&i->lock);
 	/* List empty so throw away the hash node */
 	if (i->head == NULL) {
 		hlist_del(&i->node);
 		kfree(i);
 	}
 }
 static int serial_link_irq_chain(struct uart_8250_port *up)
 {
 	struct hlist_head *h;
 	struct hlist_node *n;
 	struct irq_info *i;
 	int ret, irq_flags = up->port.flags & UPF_SHARE_IRQ ? IRQF_SHARED : 0;
 	mutex_lock(&hash_mutex);
 	h = &irq_lists[up->port.irq % NR_IRQ_HASH];
 	hlist_for_each(n, h) {
 		i = hlist_entry(n, struct irq_info, node);
 		if (i->irq == up->port.irq)
 			break;
 	}
 	if (n == NULL) {
 		i = kzalloc(sizeof(struct irq_info), GFP_KERNEL);
 		if (i == NULL) {
 			mutex_unlock(&hash_mutex);
 			return -ENOMEM;
 		}
 		spin_lock_init(&i->lock);
 		i->irq = up->port.irq;
 		hlist_add_head(&i->node, h);
 	}
 	mutex_unlock(&hash_mutex);
 	spin_lock_irq(&i->lock);
 	if (i->head) {
 		list_add(&up->list, i->head);
 		spin_unlock_irq(&i->lock);
 		ret = 0;
 	} else {
 		INIT_LIST_HEAD(&up->list);
 		i->head = &up->list;
 		spin_unlock_irq(&i->lock);
 		ret = request_irq(up->port.irq, serial8250_interrupt,
 				  irq_flags, "serial", i);
 		if (ret < 0)
 			serial_do_unlink(i, up);
 	}
 	return ret;
 }
 static void serial_unlink_irq_chain(struct uart_8250_port *up)
 {
 	struct irq_info *i;
 	struct hlist_node *n;
 	struct hlist_head *h;
 	mutex_lock(&hash_mutex);
 	h = &irq_lists[up->port.irq % NR_IRQ_HASH];
 	hlist_for_each(n, h) {
 		i = hlist_entry(n, struct irq_info, node);
 		if (i->irq == up->port.irq)
 			break;
 	}
 	BUG_ON(n == NULL);
 	BUG_ON(i->head == NULL);
 	if (list_empty(i->head))
 		free_irq(up->port.irq, i);
 	serial_do_unlink(i, up);
 	mutex_unlock(&hash_mutex);
 }
 /* Base timer interval for polling */
 static inline int poll_timeout(int timeout)
 {
 	return timeout > 6 ? (timeout / 2 - 2) : 1;
 }
 /*
  * This function is used to handle ports that do not have an
  * interrupt.  This doesn't work very well for 16450's, but gives
  * barely passable results for a 16550A.  (Although at the expense
  * of much CPU overhead).
  */
 static void serial8250_timeout(unsigned long data)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)data;
 	unsigned int iir;
 	iir = serial_in(up, UART_IIR);
 	if (!(iir & UART_IIR_NO_INT))
 		serial8250_handle_port(up);
 	mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
 }
 static void serial8250_backup_timeout(unsigned long data)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)data;
 	unsigned int iir, ier = 0, lsr;
 	unsigned long flags;
 	/*
 	 * Must disable interrupts or else we risk racing with the interrupt
 	 * based handler.
 	 */
 	if (is_real_interrupt(up->port.irq)) {
 		ier = serial_in(up, UART_IER);
 		serial_out(up, UART_IER, 0);
 	}
 	iir = serial_in(up, UART_IIR);
 	/*
 	 * This should be a safe test for anyone who doesn't trust the
 	 * IIR bits on their UART, but it's specifically designed for
 	 * the "Diva" UART used on the management processor on many HP
 	 * ia64 and parisc boxes.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	lsr = serial_in(up, UART_LSR);
 	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	if ((iir & UART_IIR_NO_INT) && (up->ier & UART_IER_THRI) &&
 	    (!uart_circ_empty(&up->port.info->xmit) || up->port.x_char) &&
 	    (lsr & UART_LSR_THRE)) {
 		iir &= ~(UART_IIR_ID | UART_IIR_NO_INT);
 		iir |= UART_IIR_THRI;
 	}
 	if (!(iir & UART_IIR_NO_INT))
 		serial8250_handle_port(up);
 	if (is_real_interrupt(up->port.irq))
 		serial_out(up, UART_IER, ier);
 	/* Standard timer interval plus 0.2s to keep the port running */
 	mod_timer(&up->timer,
 		jiffies + poll_timeout(up->port.timeout) + HZ / 5);
 }
 static unsigned int serial8250_tx_empty(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	unsigned int lsr;
 	spin_lock_irqsave(&up->port.lock, flags);
 	lsr = serial_in(up, UART_LSR);
 	up->lsr_saved_flags |= lsr & LSR_SAVE_FLAGS;
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	return lsr & UART_LSR_TEMT ? TIOCSER_TEMT : 0;
 }
 static unsigned int serial8250_get_mctrl(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned int status;
 	unsigned int ret;
 	status = check_modem_status(up);
 	ret = 0;
 	if (status & UART_MSR_DCD)
 		ret |= TIOCM_CAR;
 	if (status & UART_MSR_RI)
 		ret |= TIOCM_RNG;
 	if (status & UART_MSR_DSR)
 		ret |= TIOCM_DSR;
 	if (status & UART_MSR_CTS)
 		ret |= TIOCM_CTS;
 	return ret;
 }
 static void serial8250_set_mctrl(struct uart_port *port, unsigned int mctrl)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char mcr = 0;
 	if (mctrl & TIOCM_RTS)
 		mcr |= UART_MCR_RTS;
 	if (mctrl & TIOCM_DTR)
 		mcr |= UART_MCR_DTR;
 	if (mctrl & TIOCM_OUT1)
 		mcr |= UART_MCR_OUT1;
 	if (mctrl & TIOCM_OUT2)
 		mcr |= UART_MCR_OUT2;
 	if (mctrl & TIOCM_LOOP)
 		mcr |= UART_MCR_LOOP;
 	mcr = (mcr & up->mcr_mask) | up->mcr_force | up->mcr;
 	serial_out(up, UART_MCR, mcr);
 }
 static void serial8250_break_ctl(struct uart_port *port, int break_state)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (break_state == -1)
 		up->lcr |= UART_LCR_SBC;
 	else
 		up->lcr &= ~UART_LCR_SBC;
 	serial_out(up, UART_LCR, up->lcr);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 }
 #define BOTH_EMPTY (UART_LSR_TEMT | UART_LSR_THRE)
 /*
  *	Wait for transmitter & holding register to empty
  */
 static void wait_for_xmitr(struct uart_8250_port *up, int bits)
 {
 	unsigned int status, tmout = 10000;
 	/* Wait up to 10ms for the character(s) to be sent. */
 	do {
 		status = serial_in(up, UART_LSR);
 		up->lsr_saved_flags |= status & LSR_SAVE_FLAGS;
 		if (--tmout == 0)
 			break;
 		udelay(1);
 	} while ((status & bits) != bits);
 	/* Wait up to 1s for flow control if necessary */
 	if (up->port.flags & UPF_CONS_FLOW) {
 		unsigned int tmout;
 		for (tmout = 1000000; tmout; tmout--) {
 			unsigned int msr = serial_in(up, UART_MSR);
 			up->msr_saved_flags |= msr & MSR_SAVE_FLAGS;
 			if (msr & UART_MSR_CTS)
 				break;
 			udelay(1);
 			touch_nmi_watchdog();
 		}
 	}
 }
 #ifdef CONFIG_CONSOLE_POLL
 /*
  * Console polling routines for writing and reading from the uart while
  * in an interrupt or debug context.
  */
 static int serial8250_get_poll_char(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char lsr = serial_inp(up, UART_LSR);
 	while (!(lsr & UART_LSR_DR))
 		lsr = serial_inp(up, UART_LSR);
 	return serial_inp(up, UART_RX);
 }
 static void serial8250_put_poll_char(struct uart_port *port,
 			 unsigned char c)
 {
 	unsigned int ier;
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	/*
 	 *	First save the IER then disable the interrupts
 	 */
 	ier = serial_in(up, UART_IER);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_out(up, UART_IER, UART_IER_UUE);
 	else
 		serial_out(up, UART_IER, 0);
 	wait_for_xmitr(up, BOTH_EMPTY);
 	/*
 	 *	Send the character out.
 	 *	If a LF, also do CR...
 	 */
 	serial_out(up, UART_TX, c);
 	if (c == 10) {
 		wait_for_xmitr(up, BOTH_EMPTY);
 		serial_out(up, UART_TX, 13);
 	}
 	/*
 	 *	Finally, wait for transmitter to become empty
 	 *	and restore the IER
 	 */
 	wait_for_xmitr(up, BOTH_EMPTY);
 	serial_out(up, UART_IER, ier);
 }
 #endif /* CONFIG_CONSOLE_POLL */
 static int serial8250_startup(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	unsigned char lsr, iir;
 	int retval;
 	up->capabilities = uart_config[up->port.type].flags;
 	up->mcr = 0;
 	if (up->port.type == PORT_16C950) {
 		/* Wake up and initialize UART */
 		up->acr = 0;
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_IER, 0);
 		serial_outp(up, UART_LCR, 0);
 		serial_icr_write(up, UART_CSR, 0); /* Reset the UART */
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, UART_EFR_ECB);
 		serial_outp(up, UART_LCR, 0);
 	}
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * If this is an RSA port, see if we can kick it up to the
 	 * higher speed clock.
 	 */
 	enable_rsa(up);
 #endif
 	/*
 	 * Clear the FIFO buffers and disable them.
 	 * (they will be reenabled in set_termios())
 	 */
 	serial8250_clear_fifos(up);
 	/*
 	 * Clear the interrupt registers.
 	 */
 	(void) serial_inp(up, UART_LSR);
 	(void) serial_inp(up, UART_RX);
 	(void) serial_inp(up, UART_IIR);
 	(void) serial_inp(up, UART_MSR);
 	/*
 	 * At this point, there's no way the LSR could still be 0xff;
 	 * if it is, then bail out, because there's likely no UART
 	 * here.
 	 */
 	if (!(up->port.flags & UPF_BUGGY_UART) &&
 	    (serial_inp(up, UART_LSR) == 0xff)) {
 		printk(KERN_INFO "ttyS%d: LSR safety check engaged!\n",
 		       serial_index(&up->port));
 		return -ENODEV;
 	}
 	/*
 	 * For a XR16C850, we need to set the trigger levels
 	 */
 	if (up->port.type == PORT_16850) {
 		unsigned char fctr;
 		serial_outp(up, UART_LCR, 0xbf);
 		fctr = serial_inp(up, UART_FCTR) & ~(UART_FCTR_RX|UART_FCTR_TX);
 		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_RX);
 		serial_outp(up, UART_TRG, UART_TRG_96);
 		serial_outp(up, UART_FCTR, fctr | UART_FCTR_TRGD | UART_FCTR_TX);
 		serial_outp(up, UART_TRG, UART_TRG_96);
 		serial_outp(up, UART_LCR, 0);
 	}
 	if (is_real_interrupt(up->port.irq)) {
 		unsigned char iir1;
 		/*
 		 * Test for UARTs that do not reassert THRE when the
 		 * transmitter is idle and the interrupt has already
 		 * been cleared.  Real 16550s should always reassert
 		 * this interrupt whenever the transmitter is idle and
 		 * the interrupt is enabled.  Delays are necessary to
 		 * allow register changes to become visible.
 		 */
 		spin_lock_irqsave(&up->port.lock, flags);
 		if (up->port.flags & UPF_SHARE_IRQ)
 			disable_irq_nosync(up->port.irq);
 		wait_for_xmitr(up, UART_LSR_THRE);
 		serial_out_sync(up, UART_IER, UART_IER_THRI);
 		udelay(1); /* allow THRE to set */
 		iir1 = serial_in(up, UART_IIR);
 		serial_out(up, UART_IER, 0);
 		serial_out_sync(up, UART_IER, UART_IER_THRI);
 		udelay(1); /* allow a working UART time to re-assert THRE */
 		iir = serial_in(up, UART_IIR);
 		serial_out(up, UART_IER, 0);
 		if (up->port.flags & UPF_SHARE_IRQ)
 			enable_irq(up->port.irq);
 		spin_unlock_irqrestore(&up->port.lock, flags);
 		/*
 		 * If the interrupt is not reasserted, setup a timer to
 		 * kick the UART on a regular basis.
 		 */
 		if (!(iir1 & UART_IIR_NO_INT) && (iir & UART_IIR_NO_INT)) {
 			up->bugs |= UART_BUG_THRE;
 			pr_debug("ttyS%d - using backup timer\n",
 				 serial_index(port));
 		}
 	}
 	/*
 	 * The above check will only give an accurate result the first time
 	 * the port is opened so this value needs to be preserved.
 	 */
 	if (up->bugs & UART_BUG_THRE) {
 		up->timer.function = serial8250_backup_timeout;
 		up->timer.data = (unsigned long)up;
 		mod_timer(&up->timer, jiffies +
 			  poll_timeout(up->port.timeout) + HZ / 5);
 	}
 	/*
 	 * If the "interrupt" for this port doesn't correspond with any
 	 * hardware interrupt, we use a timer-based system.  The original
 	 * driver used to do this with IRQ0.
 	 */
 	if (!is_real_interrupt(up->port.irq)) {
 		up->timer.data = (unsigned long)up;
 		mod_timer(&up->timer, jiffies + poll_timeout(up->port.timeout));
 	} else {
 		retval = serial_link_irq_chain(up);
 		if (retval)
 			return retval;
 	}
 	/*
 	 * Now, initialize the UART
 	 */
 	serial_outp(up, UART_LCR, UART_LCR_WLEN8);
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (up->port.flags & UPF_FOURPORT) {
 		if (!is_real_interrupt(up->port.irq))
 			up->port.mctrl |= TIOCM_OUT1;
 	} else
 		/*
 		 * Most PC uarts need OUT2 raised to enable interrupts.
 		 */
 		if (is_real_interrupt(up->port.irq))
 			up->port.mctrl |= TIOCM_OUT2;
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	/*
 	 * Do a quick test to see if we receive an
 	 * interrupt when we enable the TX irq.
 	 */
 	serial_outp(up, UART_IER, UART_IER_THRI);
 	lsr = serial_in(up, UART_LSR);
 	iir = serial_in(up, UART_IIR);
 	serial_outp(up, UART_IER, 0);
 	if (lsr & UART_LSR_TEMT && iir & UART_IIR_NO_INT) {
 		if (!(up->bugs & UART_BUG_TXEN)) {
 			up->bugs |= UART_BUG_TXEN;
 			pr_debug("ttyS%d - enabling bad tx status workarounds\n",
 				 serial_index(port));
 		}
 	} else {
 		up->bugs &= ~UART_BUG_TXEN;
 	}
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Clear the interrupt registers again for luck, and clear the
 	 * saved flags to avoid getting false values from polling
 	 * routines or the previous session.
 	 */
 	serial_inp(up, UART_LSR);
 	serial_inp(up, UART_RX);
 	serial_inp(up, UART_IIR);
 	serial_inp(up, UART_MSR);
 	up->lsr_saved_flags = 0;
 	up->msr_saved_flags = 0;
 	/*
 	 * Finally, enable interrupts.  Note: Modem status interrupts
 	 * are set via set_termios(), which will be occurring imminently
 	 * anyway, so we don't enable them here.
 	 */
 	up->ier = UART_IER_RLSI | UART_IER_RDI;
 	serial_outp(up, UART_IER, up->ier);
 	if (up->port.flags & UPF_FOURPORT) {
 		unsigned int icp;
 		/*
 		 * Enable interrupts on the AST Fourport board
 		 */
 		icp = (up->port.iobase & 0xfe0) | 0x01f;
 		outb_p(0x80, icp);
 		(void) inb_p(icp);
 	}
 	return 0;
 }
 static void serial8250_shutdown(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned long flags;
 	/*
 	 * Disable interrupts from this port
 	 */
 	up->ier = 0;
 	serial_outp(up, UART_IER, 0);
 	spin_lock_irqsave(&up->port.lock, flags);
 	if (up->port.flags & UPF_FOURPORT) {
 		/* reset interrupts on the AST Fourport board */
 		inb((up->port.iobase & 0xfe0) | 0x1f);
 		up->port.mctrl |= TIOCM_OUT1;
 	} else
 		up->port.mctrl &= ~TIOCM_OUT2;
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/*
 	 * Disable break condition and FIFOs
 	 */
 	serial_out(up, UART_LCR, serial_inp(up, UART_LCR) & ~UART_LCR_SBC);
 	serial8250_clear_fifos(up);
 #ifdef CONFIG_SERIAL_8250_RSA
 	/*
 	 * Reset the RSA board back to 115kbps compat mode.
 	 */
 	disable_rsa(up);
 #endif
 	/*
 	 * Read data port to reset things, and then unlink from
 	 * the IRQ chain.
 	 */
 	(void) serial_in(up, UART_RX);
 	del_timer_sync(&up->timer);
 	up->timer.function = serial8250_timeout;
 	if (is_real_interrupt(up->port.irq))
 		serial_unlink_irq_chain(up);
 }
 static unsigned int serial8250_get_divisor(struct uart_port *port, unsigned int baud)
 {
 	unsigned int quot;
 	/*
 	 * Handle magic divisors for baud rates above baud_base on
 	 * SMSC SuperIO chips.
 	 */
 	if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
 	    baud == (port->uartclk/4))
 		quot = 0x8001;
 	else if ((port->flags & UPF_MAGIC_MULTIPLIER) &&
 		 baud == (port->uartclk/8))
 		quot = 0x8002;
 	else
 		quot = uart_get_divisor(port, baud);
 	return quot;
 }
 static void
 serial8250_set_termios(struct uart_port *port, struct ktermios *termios,
 		       struct ktermios *old)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	unsigned char cval, fcr = 0;
 	unsigned long flags;
 	unsigned int baud, quot;
 	switch (termios->c_cflag & CSIZE) {
 	case CS5:
 		cval = UART_LCR_WLEN5;
 		break;
 	case CS6:
 		cval = UART_LCR_WLEN6;
 		break;
 	case CS7:
 		cval = UART_LCR_WLEN7;
 		break;
 	default:
 	case CS8:
 		cval = UART_LCR_WLEN8;
 		break;
 	}
 	if (termios->c_cflag & CSTOPB)
 		cval |= UART_LCR_STOP;
 	if (termios->c_cflag & PARENB)
 		cval |= UART_LCR_PARITY;
 	if (!(termios->c_cflag & PARODD))
 		cval |= UART_LCR_EPAR;
 #ifdef CMSPAR
 	if (termios->c_cflag & CMSPAR)
 		cval |= UART_LCR_SPAR;
 #endif
 	/*
 	 * Ask the core to calculate the divisor for us.
 	 */
 	baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
 	quot = serial8250_get_divisor(port, baud);
 	/*
 	 * Oxford Semi 952 rev B workaround
 	 */
 	if (up->bugs & UART_BUG_QUOT && (quot & 0xff) == 0)
 		quot++;
 	if (up->capabilities & UART_CAP_FIFO && up->port.fifosize > 1) {
 		if (baud < 2400)
 			fcr = UART_FCR_ENABLE_FIFO | UART_FCR_TRIGGER_1;
 		else
 			fcr = uart_config[up->port.type].fcr;
 	}
 	/*
 	 * MCR-based auto flow control.  When AFE is enabled, RTS will be
 	 * deasserted when the receive FIFO contains more characters than
 	 * the trigger, or the MCR RTS bit is cleared.  In the case where
 	 * the remote UART is not using CTS auto flow control, we must
 	 * have sufficient FIFO entries for the latency of the remote
 	 * UART to respond.  IOW, at least 32 bytes of FIFO.
 	 */
 	if (up->capabilities & UART_CAP_AFE && up->port.fifosize >= 32) {
 		up->mcr &= ~UART_MCR_AFE;
 		if (termios->c_cflag & CRTSCTS)
 			up->mcr |= UART_MCR_AFE;
 	}
 	/*
 	 * Ok, we're now changing the port state.  Do it with
 	 * interrupts disabled.
 	 */
 	spin_lock_irqsave(&up->port.lock, flags);
 	/*
 	 * Update the per-port timeout.
 	 */
 	uart_update_timeout(port, termios->c_cflag, baud);
 	up->port.read_status_mask = UART_LSR_OE | UART_LSR_THRE | UART_LSR_DR;
 	if (termios->c_iflag & INPCK)
 		up->port.read_status_mask |= UART_LSR_FE | UART_LSR_PE;
 	if (termios->c_iflag & (BRKINT | PARMRK))
 		up->port.read_status_mask |= UART_LSR_BI;
 	/*
 	 * Characteres to ignore
 	 */
 	up->port.ignore_status_mask = 0;
 	if (termios->c_iflag & IGNPAR)
 		up->port.ignore_status_mask |= UART_LSR_PE | UART_LSR_FE;
 	if (termios->c_iflag & IGNBRK) {
 		up->port.ignore_status_mask |= UART_LSR_BI;
 		/*
 		 * If we're ignoring parity and break indicators,
 		 * ignore overruns too (for real raw support).
 		 */
 		if (termios->c_iflag & IGNPAR)
 			up->port.ignore_status_mask |= UART_LSR_OE;
 	}
 	/*
 	 * ignore all characters if CREAD is not set
 	 */
 	if ((termios->c_cflag & CREAD) == 0)
 		up->port.ignore_status_mask |= UART_LSR_DR;
 	/*
 	 * CTS flow control flag and modem status interrupts
 	 */
 	up->ier &= ~UART_IER_MSI;
 	if (!(up->bugs & UART_BUG_NOMSR) &&
 			UART_ENABLE_MS(&up->port, termios->c_cflag))
 		up->ier |= UART_IER_MSI;
 	if (up->capabilities & UART_CAP_UUE)
 		up->ier |= UART_IER_UUE | UART_IER_RTOIE;
 	serial_out(up, UART_IER, up->ier);
 	if (up->capabilities & UART_CAP_EFR) {
 		unsigned char efr = 0;
 		/*
 		 * TI16C752/Startech hardware flow control.  FIXME:
 		 * - TI16C752 requires control thresholds to be set.
 		 * - UART_MCR_RTS is ineffective if auto-RTS mode is enabled.
 		 */
 		if (termios->c_cflag & CRTSCTS)
 			efr |= UART_EFR_CTS;
 		serial_outp(up, UART_LCR, 0xBF);
 		serial_outp(up, UART_EFR, efr);
 	}
 #ifdef CONFIG_ARCH_OMAP
 	/* Workaround to enable 115200 baud on OMAP1510 internal ports */
 	if (cpu_is_omap1510() && is_omap_port(up)) {
 		if (baud == 115200) {
 			quot = 1;
 			serial_out(up, UART_OMAP_OSC_12M_SEL, 1);
 		} else
 			serial_out(up, UART_OMAP_OSC_12M_SEL, 0);
 	}
 #endif
 	if (up->capabilities & UART_NATSEMI) {
 		/* Switch to bank 2 not bank 1, to avoid resetting EXCR2 */
 		serial_outp(up, UART_LCR, 0xe0);
 	} else {
 		serial_outp(up, UART_LCR, cval | UART_LCR_DLAB);/* set DLAB */
 	}
 	serial_dl_write(up, quot);
 	/*
 	 * LCR DLAB must be set to enable 64-byte FIFO mode. If the FCR
 	 * is written without DLAB set, this mode will be disabled.
 	 */
 	if (up->port.type == PORT_16750)
 		serial_outp(up, UART_FCR, fcr);
 	serial_outp(up, UART_LCR, cval);		/* reset DLAB */
 	up->lcr = cval;					/* Save LCR */
 	if (up->port.type != PORT_16750) {
 		if (fcr & UART_FCR_ENABLE_FIFO) {
 			/* emulated UARTs (Lucent Venus 167x) need two steps */
 			serial_outp(up, UART_FCR, UART_FCR_ENABLE_FIFO);
 		}
 		serial_outp(up, UART_FCR, fcr);		/* set fcr */
 	}
 	serial8250_set_mctrl(&up->port, up->port.mctrl);
 	spin_unlock_irqrestore(&up->port.lock, flags);
 	/* Don't rewrite B0 */
 	if (tty_termios_baud_rate(termios))
 		tty_termios_encode_baud_rate(termios, baud, baud);
 }
 static void
 serial8250_pm(struct uart_port *port, unsigned int state,
 	      unsigned int oldstate)
 {
 	struct uart_8250_port *p = (struct uart_8250_port *)port;
 	serial8250_set_sleep(p, state != 0);
 	if (p->pm)
 		p->pm(port, state, oldstate);
 }
 static unsigned int serial8250_port_size(struct uart_8250_port *pt)
 {
 	if (pt->port.iotype == UPIO_AU)
 		return 0x100000;
 #ifdef CONFIG_ARCH_OMAP
 	if (is_omap_port(pt))
 		return 0x16 << pt->port.regshift;
 #endif
 	return 8 << pt->port.regshift;
 }
 /*
  * Resource handling.
  */
 static int serial8250_request_std_resource(struct uart_8250_port *up)
 {
 	unsigned int size = serial8250_port_size(up);
 	int ret = 0;
 	switch (up->port.iotype) {
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_MEM32:
 	case UPIO_MEM:
 	case UPIO_DWAPB:
 		if (!up->port.mapbase)
 			break;
 		if (!request_mem_region(up->port.mapbase, size, "serial")) {
 			ret = -EBUSY;
 			break;
 		}
 		if (up->port.flags & UPF_IOREMAP) {
 			up->port.membase = ioremap_nocache(up->port.mapbase,
 									size);
 			if (!up->port.membase) {
 				release_mem_region(up->port.mapbase, size);
 				ret = -ENOMEM;
 			}
 		}
 		break;
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		if (!request_region(up->port.iobase, size, "serial"))
 			ret = -EBUSY;
 		break;
 	}
 	return ret;
 }
 static void serial8250_release_std_resource(struct uart_8250_port *up)
 {
 	unsigned int size = serial8250_port_size(up);
 	switch (up->port.iotype) {
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_MEM32:
 	case UPIO_MEM:
 	case UPIO_DWAPB:
 		if (!up->port.mapbase)
 			break;
 		if (up->port.flags & UPF_IOREMAP) {
 			iounmap(up->port.membase);
 			up->port.membase = NULL;
 		}
 		release_mem_region(up->port.mapbase, size);
 		break;
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		release_region(up->port.iobase, size);
 		break;
 	}
 }
 static int serial8250_request_rsa_resource(struct uart_8250_port *up)
 {
 	unsigned long start = UART_RSA_BASE << up->port.regshift;
 	unsigned int size = 8 << up->port.regshift;
 	int ret = -EINVAL;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		start += up->port.iobase;
 		if (request_region(start, size, "serial-rsa"))
 			ret = 0;
 		else
 			ret = -EBUSY;
 		break;
 	}
 	return ret;
 }
 static void serial8250_release_rsa_resource(struct uart_8250_port *up)
 {
 	unsigned long offset = UART_RSA_BASE << up->port.regshift;
 	unsigned int size = 8 << up->port.regshift;
 	switch (up->port.iotype) {
 	case UPIO_HUB6:
 	case UPIO_PORT:
 		release_region(up->port.iobase + offset, size);
 		break;
 	}
 }
 static void serial8250_release_port(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	serial8250_release_std_resource(up);
 	if (up->port.type == PORT_RSA)
 		serial8250_release_rsa_resource(up);
 }
 static int serial8250_request_port(struct uart_port *port)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	int ret = 0;
 	ret = serial8250_request_std_resource(up);
 	if (ret == 0 && up->port.type == PORT_RSA) {
 		ret = serial8250_request_rsa_resource(up);
 		if (ret < 0)
 			serial8250_release_std_resource(up);
 	}
 	return ret;
 }
 static void serial8250_config_port(struct uart_port *port, int flags)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	int probeflags = PROBE_ANY;
 	int ret;
 	/*
 	 * Find the region that we can probe for.  This in turn
 	 * tells us whether we can probe for the type of port.
 	 */
 	ret = serial8250_request_std_resource(up);
 	if (ret < 0)
 		return;
 	ret = serial8250_request_rsa_resource(up);
 	if (ret < 0)
 		probeflags &= ~PROBE_RSA;
 	if (flags & UART_CONFIG_TYPE)
 		autoconfig(up, probeflags);
 	if (up->port.type != PORT_UNKNOWN && flags & UART_CONFIG_IRQ)
 		autoconfig_irq(up);
 	if (up->port.type != PORT_RSA && probeflags & PROBE_RSA)
 		serial8250_release_rsa_resource(up);
 	if (up->port.type == PORT_UNKNOWN)
 		serial8250_release_std_resource(up);
 }
 static int
 serial8250_verify_port(struct uart_port *port, struct serial_struct *ser)
 {
 	if (ser->irq >= nr_irqs || ser->irq < 0 ||
 	    ser->baud_base < 9600 || ser->type < PORT_UNKNOWN ||
 	    ser->type >= ARRAY_SIZE(uart_config) || ser->type == PORT_CIRRUS ||
 	    ser->type == PORT_STARTECH)
 		return -EINVAL;
 	return 0;
 }
 static const char *
 serial8250_type(struct uart_port *port)
 {
 	int type = port->type;
 	if (type >= ARRAY_SIZE(uart_config))
 		type = 0;
 	return uart_config[type].name;
 }
 static struct uart_ops serial8250_pops = {
 	.tx_empty	= serial8250_tx_empty,
 	.set_mctrl	= serial8250_set_mctrl,
 	.get_mctrl	= serial8250_get_mctrl,
 	.stop_tx	= serial8250_stop_tx,
 	.start_tx	= serial8250_start_tx,
 	.stop_rx	= serial8250_stop_rx,
 	.enable_ms	= serial8250_enable_ms,
 	.break_ctl	= serial8250_break_ctl,
 	.startup	= serial8250_startup,
 	.shutdown	= serial8250_shutdown,
 	.set_termios	= serial8250_set_termios,
 	.pm		= serial8250_pm,
 	.type		= serial8250_type,
 	.release_port	= serial8250_release_port,
 	.request_port	= serial8250_request_port,
 	.config_port	= serial8250_config_port,
 	.verify_port	= serial8250_verify_port,
 #ifdef CONFIG_CONSOLE_POLL
 	.poll_get_char = serial8250_get_poll_char,
 	.poll_put_char = serial8250_put_poll_char,
 #endif
 };
 static struct uart_8250_port serial8250_ports[UART_NR];
 static void __init serial8250_isa_init_ports(void)
 {
 	struct uart_8250_port *up;
 	static int first = 1;
 	int i;
 	if (!first)
 		return;
 	first = 0;
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		up->port.line = i;
 		spin_lock_init(&up->port.lock);
 		init_timer(&up->timer);
 		up->timer.function = serial8250_timeout;
 		/*
 		 * ALPHA_KLUDGE_MCR needs to be killed.
 		 */
 		up->mcr_mask = ~ALPHA_KLUDGE_MCR;
 		up->mcr_force = ALPHA_KLUDGE_MCR;
 		up->port.ops = &serial8250_pops;
 	}
 	for (i = 0, up = serial8250_ports;
 	     i < ARRAY_SIZE(old_serial_port) && i < nr_uarts;
 	     i++, up++) {
 		up->port.iobase   = old_serial_port[i].port;
 		up->port.irq      = irq_canonicalize(old_serial_port[i].irq);
 		up->port.uartclk  = old_serial_port[i].baud_base * 16;
 		up->port.flags    = old_serial_port[i].flags;
 		up->port.hub6     = old_serial_port[i].hub6;
 		up->port.membase  = old_serial_port[i].iomem_base;
 		up->port.iotype   = old_serial_port[i].io_type;
 		up->port.regshift = old_serial_port[i].iomem_reg_shift;
 		set_io_from_upio(&up->port);
 		if (share_irqs)
 			up->port.flags |= UPF_SHARE_IRQ;
 	}
 }
 static void __init
 serial8250_register_ports(struct uart_driver *drv, struct device *dev)
 {
 	int i;
 	serial8250_isa_init_ports();
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		up->port.dev = dev;
 		uart_add_one_port(drv, &up->port);
 	}
 }
 #ifdef CONFIG_SERIAL_8250_CONSOLE
 static void serial8250_console_putchar(struct uart_port *port, int ch)
 {
 	struct uart_8250_port *up = (struct uart_8250_port *)port;
 	wait_for_xmitr(up, UART_LSR_THRE);
 	serial_out(up, UART_TX, ch);
 }
 /*
  *	Print a string to the serial port trying not to disturb
  *	any possible real use of the port...
  *
  *	The console_lock must be held when we get here.
  */
 static void
 serial8250_console_write(struct console *co, const char *s, unsigned int count)
 {
 	struct uart_8250_port *up = &serial8250_ports[co->index];
 	unsigned long flags;
 	unsigned int ier;
 	int locked = 1;
 	touch_nmi_watchdog();
 	local_irq_save(flags);
 	if (up->port.sysrq) {
 		/* serial8250_handle_port() already took the lock */
 		locked = 0;
 	} else if (oops_in_progress) {
 		locked = spin_trylock(&up->port.lock);
 	} else
 		spin_lock(&up->port.lock);
 	/*
 	 *	First save the IER then disable the interrupts
 	 */
 	ier = serial_in(up, UART_IER);
 	if (up->capabilities & UART_CAP_UUE)
 		serial_out(up, UART_IER, UART_IER_UUE);
 	else
 		serial_out(up, UART_IER, 0);
 	uart_console_write(&up->port, s, count, serial8250_console_putchar);
 	/*
 	 *	Finally, wait for transmitter to become empty
 	 *	and restore the IER
 	 */
 	wait_for_xmitr(up, BOTH_EMPTY);
 	serial_out(up, UART_IER, ier);
 	/*
 	 *	The receive handling will happen properly because the
 	 *	receive ready bit will still be set; it is not cleared
 	 *	on read.  However, modem control will not, we must
 	 *	call it if we have saved something in the saved flags
 	 *	while processing with interrupts off.
 	 */
 	if (up->msr_saved_flags)
 		check_modem_status(up);
 	if (locked)
 		spin_unlock(&up->port.lock);
 	local_irq_restore(flags);
 }
 static int __init serial8250_console_setup(struct console *co, char *options)
 {
 	struct uart_port *port;
 	int baud = 9600;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';
 	/*
 	 * Check whether an invalid uart number has been specified, and
 	 * if so, search for the first available port that does have
 	 * console support.
 	 */
 	if (co->index >= nr_uarts)
 		co->index = 0;
 	port = &serial8250_ports[co->index].port;
 	if (!port->iobase && !port->membase)
 		return -ENODEV;
 	if (options)
 		uart_parse_options(options, &baud, &parity, &bits, &flow);
 	return uart_set_options(port, co, baud, parity, bits, flow);
 }
 static int serial8250_console_early_setup(void)
 {
 	return serial8250_find_port_for_earlycon();
 }
 static struct console serial8250_console = {
 	.name		= "ttyS",
 	.write		= serial8250_console_write,
 	.device		= uart_console_device,
 	.setup		= serial8250_console_setup,
 	.early_setup	= serial8250_console_early_setup,
 	.flags		= CON_PRINTBUFFER,
 	.index		= -1,
 	.data		= &serial8250_reg,
 };
 static int __init serial8250_console_init(void)
 {
 	if (nr_uarts > UART_NR)
 		nr_uarts = UART_NR;
 	serial8250_isa_init_ports();
 	register_console(&serial8250_console);
 	return 0;
 }
 console_initcall(serial8250_console_init);
 int serial8250_find_port(struct uart_port *p)
 {
 	int line;
 	struct uart_port *port;
 	for (line = 0; line < nr_uarts; line++) {
 		port = &serial8250_ports[line].port;
 		if (uart_match_port(p, port))
 			return line;
 	}
 	return -ENODEV;
 }
 #define SERIAL8250_CONSOLE	&serial8250_console
 #else
 #define SERIAL8250_CONSOLE	NULL
 #endif
 static struct uart_driver serial8250_reg = {
 	.owner			= THIS_MODULE,
 	.driver_name		= "serial",
 	.dev_name		= "ttyS",
 	.major			= TTY_MAJOR,
 	.minor			= 64,
 	.cons			= SERIAL8250_CONSOLE,
 };
 /*
  * early_serial_setup - early registration for 8250 ports
  *
  * Setup an 8250 port structure prior to console initialisation.  Use
  * after console initialisation will cause undefined behaviour.
  */
 int __init early_serial_setup(struct uart_port *port)
 {
 	struct uart_port *p;
 	if (port->line >= ARRAY_SIZE(serial8250_ports))
 		return -ENODEV;
 	serial8250_isa_init_ports();
 	p = &serial8250_ports[port->line].port;
 	p->iobase       = port->iobase;
 	p->membase      = port->membase;
 	p->irq          = port->irq;
 	p->uartclk      = port->uartclk;
 	p->fifosize     = port->fifosize;
 	p->regshift     = port->regshift;
 	p->iotype       = port->iotype;
 	p->flags        = port->flags;
 	p->mapbase      = port->mapbase;
 	p->private_data = port->private_data;
 	set_io_from_upio(p);
 	if (port->serial_in)
 		p->serial_in = port->serial_in;
 	if (port->serial_out)
 		p->serial_out = port->serial_out;
 	return 0;
 }
 /**
  *	serial8250_suspend_port - suspend one serial port
  *	@line:  serial line number
  *
  *	Suspend one serial port.
  */
 void serial8250_suspend_port(int line)
 {
 	uart_suspend_port(&serial8250_reg, &serial8250_ports[line].port);
 }
 /**
  *	serial8250_resume_port - resume one serial port
  *	@line:  serial line number
  *
  *	Resume one serial port.
  */
 void serial8250_resume_port(int line)
 {
 	struct uart_8250_port *up = &serial8250_ports[line];
 	if (up->capabilities & UART_NATSEMI) {
 		unsigned char tmp;
 		/* Ensure it's still in high speed mode */
 		serial_outp(up, UART_LCR, 0xE0);
 		tmp = serial_in(up, 0x04); /* EXCR2 */
 		tmp &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
 		tmp |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
 		serial_outp(up, 0x04, tmp);
 		serial_outp(up, UART_LCR, 0);
 	}
 	uart_resume_port(&serial8250_reg, &up->port);
 }
 /*
  * Register a set of serial devices attached to a platform device.  The
  * list is terminated with a zero flags entry, which means we expect
  * all entries to have at least UPF_BOOT_AUTOCONF set.
  */
 static int __devinit serial8250_probe(struct platform_device *dev)
 {
 	struct plat_serial8250_port *p = dev->dev.platform_data;
 	struct uart_port port;
 	int ret, i;
 	memset(&port, 0, sizeof(struct uart_port));
 	for (i = 0; p && p->flags != 0; p++, i++) {
 		port.iobase		= p->iobase;
 		port.membase		= p->membase;
 		port.irq		= p->irq;
 		port.uartclk		= p->uartclk;
 		port.regshift		= p->regshift;
 		port.iotype		= p->iotype;
 		port.flags		= p->flags;
 		port.mapbase		= p->mapbase;
 		port.hub6		= p->hub6;
 		port.private_data	= p->private_data;
+		port.type		= p->type;
 		port.serial_in		= p->serial_in;
 		port.serial_out		= p->serial_out;
 		port.dev		= &dev->dev;
 		if (share_irqs)
 			port.flags |= UPF_SHARE_IRQ;
 		ret = serial8250_register_port(&port);
 		if (ret < 0) {
 			dev_err(&dev->dev, "unable to register port at index %d "
 				"(IO%lx MEM%llx IRQ%d): %d\n", i,
 				p->iobase, (unsigned long long)p->mapbase,
 				p->irq, ret);
 		}
 	}
 	return 0;
 }
 /*
  * Remove serial ports registered against a platform device.
  */
 static int __devexit serial8250_remove(struct platform_device *dev)
 {
 	int i;
 	for (i = 0; i < nr_uarts; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.dev == &dev->dev)
 			serial8250_unregister_port(i);
 	}
 	return 0;
 }
 static int serial8250_suspend(struct platform_device *dev, pm_message_t state)
 {
 	int i;
 	for (i = 0; i < UART_NR; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
 			uart_suspend_port(&serial8250_reg, &up->port);
 	}
 	return 0;
 }
 static int serial8250_resume(struct platform_device *dev)
 {
 	int i;
 	for (i = 0; i < UART_NR; i++) {
 		struct uart_8250_port *up = &serial8250_ports[i];
 		if (up->port.type != PORT_UNKNOWN && up->port.dev == &dev->dev)
 			serial8250_resume_port(i);
 	}
 	return 0;
 }
 static struct platform_driver serial8250_isa_driver = {
 	.probe		= serial8250_probe,
 	.remove		= __devexit_p(serial8250_remove),
 	.suspend	= serial8250_suspend,
 	.resume		= serial8250_resume,
 	.driver		= {
 		.name	= "serial8250",
 		.owner	= THIS_MODULE,
 	},
 };
 /*
  * This "device" covers _all_ ISA 8250-compatible serial devices listed
  * in the table in include/asm/serial.h
  */
 static struct platform_device *serial8250_isa_devs;
 /*
  * serial8250_register_port and serial8250_unregister_port allows for
  * 16x50 serial ports to be configured at run-time, to support PCMCIA
  * modems and PCI multiport cards.
  */
 static DEFINE_MUTEX(serial_mutex);
 static struct uart_8250_port *serial8250_find_match_or_unused(struct uart_port *port)
 {
 	int i;
 	/*
 	 * First, find a port entry which matches.
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (uart_match_port(&serial8250_ports[i].port, port))
 			return &serial8250_ports[i];
 	/*
 	 * We didn't find a matching entry, so look for the first
 	 * free entry.  We look for one which hasn't been previously
 	 * used (indicated by zero iobase).
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (serial8250_ports[i].port.type == PORT_UNKNOWN &&
 		    serial8250_ports[i].port.iobase == 0)
 			return &serial8250_ports[i];
 	/*
 	 * That also failed.  Last resort is to find any entry which
 	 * doesn't have a real port associated with it.
 	 */
 	for (i = 0; i < nr_uarts; i++)
 		if (serial8250_ports[i].port.type == PORT_UNKNOWN)
 			return &serial8250_ports[i];
 	return NULL;
 }
 /**
  *	serial8250_register_port - register a serial port
  *	@port: serial port template
  *
  *	Configure the serial port specified by the request. If the
  *	port exists and is in use, it is hung up and unregistered
  *	first.
  *
  *	The port is then probed and if necessary the IRQ is autodetected
  *	If this fails an error is returned.
  *
  *	On success the port is ready to use and the line number is returned.
  */
 int serial8250_register_port(struct uart_port *port)
 {
 	struct uart_8250_port *uart;
 	int ret = -ENOSPC;
 	if (port->uartclk == 0)
 		return -EINVAL;
 	mutex_lock(&serial_mutex);
 	uart = serial8250_find_match_or_unused(port);
 	if (uart) {
 		uart_remove_one_port(&serial8250_reg, &uart->port);
 		uart->port.iobase       = port->iobase;
 		uart->port.membase      = port->membase;
 		uart->port.irq          = port->irq;
 		uart->port.uartclk      = port->uartclk;
 		uart->port.fifosize     = port->fifosize;
 		uart->port.regshift     = port->regshift;
 		uart->port.iotype       = port->iotype;
 		uart->port.flags        = port->flags | UPF_BOOT_AUTOCONF;
 		uart->port.mapbase      = port->mapbase;
 		uart->port.private_data = port->private_data;
 		if (port->dev)
 			uart->port.dev = port->dev;
+		if (port->flags & UPF_FIXED_TYPE) {
+			uart->port.type = port->type;
+			uart->port.fifosize = uart_config[port->type].fifo_size;
+			uart->capabilities = uart_config[port->type].flags;
+			uart->tx_loadsz = uart_config[port->type].tx_loadsz;
+		}
 		set_io_from_upio(&uart->port);
 		/* Possibly override default I/O functions.  */
 		if (port->serial_in)
 			uart->port.serial_in = port->serial_in;
 		if (port->serial_out)
 			uart->port.serial_out = port->serial_out;
 		ret = uart_add_one_port(&serial8250_reg, &uart->port);
 		if (ret == 0)
 			ret = uart->port.line;
 	}
 	mutex_unlock(&serial_mutex);
 	return ret;
 }
 EXPORT_SYMBOL(serial8250_register_port);
 /**
  *	serial8250_unregister_port - remove a 16x50 serial port at runtime
  *	@line: serial line number
  *
  *	Remove one serial port.  This may not be called from interrupt
  *	context.  We hand the port back to the our control.
  */
 void serial8250_unregister_port(int line)
 {
 	struct uart_8250_port *uart = &serial8250_ports[line];
 	mutex_lock(&serial_mutex);
 	uart_remove_one_port(&serial8250_reg, &uart->port);
 	if (serial8250_isa_devs) {
 		uart->port.flags &= ~UPF_BOOT_AUTOCONF;
 		uart->port.type = PORT_UNKNOWN;
 		uart->port.dev = &serial8250_isa_devs->dev;
 		uart_add_one_port(&serial8250_reg, &uart->port);
 	} else {
 		uart->port.dev = NULL;
 	}
 	mutex_unlock(&serial_mutex);
 }
 EXPORT_SYMBOL(serial8250_unregister_port);
 static int __init serial8250_init(void)
 {
 	int ret;
 	if (nr_uarts > UART_NR)
 		nr_uarts = UART_NR;
 	printk(KERN_INFO "Serial: 8250/16550 driver"
 		"%d ports, IRQ sharing %sabled\n", nr_uarts,
 		share_irqs ? "en" : "dis");
 #ifdef CONFIG_SPARC
 	ret = sunserial_register_minors(&serial8250_reg, UART_NR);
 #else
 	serial8250_reg.nr = UART_NR;
 	ret = uart_register_driver(&serial8250_reg);
 #endif
 	if (ret)
 		goto out;
 	serial8250_isa_devs = platform_device_alloc("serial8250",
 						    PLAT8250_DEV_LEGACY);
 	if (!serial8250_isa_devs) {
 		ret = -ENOMEM;
 		goto unreg_uart_drv;
 	}
 	ret = platform_device_add(serial8250_isa_devs);
 	if (ret)
 		goto put_dev;
 	serial8250_register_ports(&serial8250_reg, &serial8250_isa_devs->dev);
 	ret = platform_driver_register(&serial8250_isa_driver);
 	if (ret == 0)
 		goto out;
 	platform_device_del(serial8250_isa_devs);
 put_dev:
 	platform_device_put(serial8250_isa_devs);
 unreg_uart_drv:
 #ifdef CONFIG_SPARC
 	sunserial_unregister_minors(&serial8250_reg, UART_NR);
 #else
 	uart_unregister_driver(&serial8250_reg);
 #endif
 out:
 	return ret;
 }
 static void __exit serial8250_exit(void)
 {
 	struct platform_device *isa_dev = serial8250_isa_devs;
 	/*
 	 * This tells serial8250_unregister_port() not to re-register
 	 * the ports (thereby making serial8250_isa_driver permanently
 	 * in use.)
 	 */
 	serial8250_isa_devs = NULL;
 	platform_driver_unregister(&serial8250_isa_driver);
 	platform_device_unregister(isa_dev);
 #ifdef CONFIG_SPARC
 	sunserial_unregister_minors(&serial8250_reg, UART_NR);
 #else
 	uart_unregister_driver(&serial8250_reg);
 #endif
 }
 module_init(serial8250_init);
 module_exit(serial8250_exit);
 EXPORT_SYMBOL(serial8250_suspend_port);
 EXPORT_SYMBOL(serial8250_resume_port);
 MODULE_LICENSE("GPL");
 MODULE_DESCRIPTION("Generic 8250/16x50 serial driver");
 module_param(share_irqs, uint, 0644);
 MODULE_PARM_DESC(share_irqs, "Share IRQs with other non-8250/16x50 devices"
 	" (unsafe)");
 module_param(nr_uarts, uint, 0644);
 MODULE_PARM_DESC(nr_uarts, "Maximum number of UARTs supported. (1-" __MODULE_STRING(CONFIG_SERIAL_8250_NR_UARTS) ")");
 #ifdef CONFIG_SERIAL_8250_RSA
 module_param_array(probe_rsa, ulong, &probe_rsa_count, 0444);
 MODULE_PARM_DESC(probe_rsa, "Probe I/O ports for RSA");
 #endif
 MODULE_ALIAS_CHARDEV_MAJOR(TTY_MAJOR);

 /*
  *  linux/drivers/char/core.c
  *
  *  Driver core for serial ports
  *
  *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
  *
  *  Copyright 1999 ARM Limited
  *  Copyright (C) 2000-2001 Deep Blue Solutions Ltd.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #include <linux/module.h>
 #include <linux/tty.h>
 #include <linux/slab.h>
 #include <linux/init.h>
 #include <linux/console.h>
 #include <linux/serial_core.h>
 #include <linux/smp_lock.h>
 #include <linux/device.h>
 #include <linux/serial.h> /* for serial_state and serial_icounter_struct */
 #include <linux/delay.h>
 #include <linux/mutex.h>
 #include <asm/irq.h>
 #include <asm/uaccess.h>
 /*
  * This is used to lock changes in serial line configuration.
  */
 static DEFINE_MUTEX(port_mutex);
 /*
  * lockdep: port->lock is initialized in two places, but we
  *          want only one lock-class:
  */
 static struct lock_class_key port_lock_key;
 #define HIGH_BITS_OFFSET	((sizeof(long)-sizeof(int))*8)
 #define uart_users(state)	((state)->count + (state)->info.port.blocked_open)
 #ifdef CONFIG_SERIAL_CORE_CONSOLE
 #define uart_console(port)	((port)->cons && (port)->cons->index == (port)->line)
 #else
 #define uart_console(port)	(0)
 #endif
 static void uart_change_speed(struct uart_state *state,
 					struct ktermios *old_termios);
 static void uart_wait_until_sent(struct tty_struct *tty, int timeout);
 static void uart_change_pm(struct uart_state *state, int pm_state);
 /*
  * This routine is used by the interrupt handler to schedule processing in
  * the software interrupt portion of the driver.
  */
 void uart_write_wakeup(struct uart_port *port)
 {
 	struct uart_info *info = port->info;
 	/*
 	 * This means you called this function _after_ the port was
 	 * closed.  No cookie for you.
 	 */
 	BUG_ON(!info);
 	tasklet_schedule(&info->tlet);
 }
 static void uart_stop(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	unsigned long flags;
 	spin_lock_irqsave(&port->lock, flags);
 	port->ops->stop_tx(port);
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 static void __uart_start(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	if (!uart_circ_empty(&state->info.xmit) && state->info.xmit.buf &&
 	    !tty->stopped && !tty->hw_stopped)
 		port->ops->start_tx(port);
 }
 static void uart_start(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	unsigned long flags;
 	spin_lock_irqsave(&port->lock, flags);
 	__uart_start(tty);
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 static void uart_tasklet_action(unsigned long data)
 {
 	struct uart_state *state = (struct uart_state *)data;
 	tty_wakeup(state->info.port.tty);
 }
 static inline void
 uart_update_mctrl(struct uart_port *port, unsigned int set, unsigned int clear)
 {
 	unsigned long flags;
 	unsigned int old;
 	spin_lock_irqsave(&port->lock, flags);
 	old = port->mctrl;
 	port->mctrl = (old & ~clear) | set;
 	if (old != port->mctrl)
 		port->ops->set_mctrl(port, port->mctrl);
 	spin_unlock_irqrestore(&port->lock, flags);
 }
 #define uart_set_mctrl(port, set)	uart_update_mctrl(port, set, 0)
 #define uart_clear_mctrl(port, clear)	uart_update_mctrl(port, 0, clear)
 /*
  * Startup the port.  This will be called once per open.  All calls
  * will be serialised by the per-port mutex.
  */
 static int uart_startup(struct uart_state *state, int init_hw)
 {
 	struct uart_info *info = &state->info;
 	struct uart_port *port = state->port;
 	unsigned long page;
 	int retval = 0;
 	if (info->flags & UIF_INITIALIZED)
 		return 0;
 	/*
 	 * Set the TTY IO error marker - we will only clear this
 	 * once we have successfully opened the port.  Also set
 	 * up the tty->alt_speed kludge
 	 */
 	set_bit(TTY_IO_ERROR, &info->port.tty->flags);
 	if (port->type == PORT_UNKNOWN)
 		return 0;
 	/*
 	 * Initialise and allocate the transmit and temporary
 	 * buffer.
 	 */
 	if (!info->xmit.buf) {
 		/* This is protected by the per port mutex */
 		page = get_zeroed_page(GFP_KERNEL);
 		if (!page)
 			return -ENOMEM;
 		info->xmit.buf = (unsigned char *) page;
 		uart_circ_clear(&info->xmit);
 	}
 	retval = port->ops->startup(port);
 	if (retval == 0) {
 		if (init_hw) {
 			/*
 			 * Initialise the hardware port settings.
 			 */
 			uart_change_speed(state, NULL);
 			/*
 			 * Setup the RTS and DTR signals once the
 			 * port is open and ready to respond.
 			 */
 			if (info->port.tty->termios->c_cflag & CBAUD)
 				uart_set_mctrl(port, TIOCM_RTS | TIOCM_DTR);
 		}
 		if (info->flags & UIF_CTS_FLOW) {
 			spin_lock_irq(&port->lock);
 			if (!(port->ops->get_mctrl(port) & TIOCM_CTS))
 				info->port.tty->hw_stopped = 1;
 			spin_unlock_irq(&port->lock);
 		}
 		info->flags |= UIF_INITIALIZED;
 		clear_bit(TTY_IO_ERROR, &info->port.tty->flags);
 	}
 	if (retval && capable(CAP_SYS_ADMIN))
 		retval = 0;
 	return retval;
 }
 /*
  * This routine will shutdown a serial port; interrupts are disabled, and
  * DTR is dropped if the hangup on close termio flag is on.  Calls to
  * uart_shutdown are serialised by the per-port semaphore.
  */
 static void uart_shutdown(struct uart_state *state)
 {
 	struct uart_info *info = &state->info;
 	struct uart_port *port = state->port;
 	struct tty_struct *tty = info->port.tty;
 	/*
 	 * Set the TTY IO error marker
 	 */
 	if (tty)
 		set_bit(TTY_IO_ERROR, &tty->flags);
 	if (info->flags & UIF_INITIALIZED) {
 		info->flags &= ~UIF_INITIALIZED;
 		/*
 		 * Turn off DTR and RTS early.
 		 */
 		if (!tty || (tty->termios->c_cflag & HUPCL))
 			uart_clear_mctrl(port, TIOCM_DTR | TIOCM_RTS);
 		/*
 		 * clear delta_msr_wait queue to avoid mem leaks: we may free
 		 * the irq here so the queue might never be woken up.  Note
 		 * that we won't end up waiting on delta_msr_wait again since
 		 * any outstanding file descriptors should be pointing at
 		 * hung_up_tty_fops now.
 		 */
 		wake_up_interruptible(&info->delta_msr_wait);
 		/*
 		 * Free the IRQ and disable the port.
 		 */
 		port->ops->shutdown(port);
 		/*
 		 * Ensure that the IRQ handler isn't running on another CPU.
 		 */
 		synchronize_irq(port->irq);
 	}
 	/*
 	 * kill off our tasklet
 	 */
 	tasklet_kill(&info->tlet);
 	/*
 	 * Free the transmit buffer page.
 	 */
 	if (info->xmit.buf) {
 		free_page((unsigned long)info->xmit.buf);
 		info->xmit.buf = NULL;
 	}
 }
 /**
  *	uart_update_timeout - update per-port FIFO timeout.
  *	@port:  uart_port structure describing the port
  *	@cflag: termios cflag value
  *	@baud:  speed of the port
  *
  *	Set the port FIFO timeout value.  The @cflag value should
  *	reflect the actual hardware settings.
  */
 void
 uart_update_timeout(struct uart_port *port, unsigned int cflag,
 		    unsigned int baud)
 {
 	unsigned int bits;
 	/* byte size and parity */
 	switch (cflag & CSIZE) {
 	case CS5:
 		bits = 7;
 		break;
 	case CS6:
 		bits = 8;
 		break;
 	case CS7:
 		bits = 9;
 		break;
 	default:
 		bits = 10;
 		break; /* CS8 */
 	}
 	if (cflag & CSTOPB)
 		bits++;
 	if (cflag & PARENB)
 		bits++;
 	/*
 	 * The total number of bits to be transmitted in the fifo.
 	 */
 	bits = bits * port->fifosize;
 	/*
 	 * Figure the timeout to send the above number of bits.
 	 * Add .02 seconds of slop
 	 */
 	port->timeout = (HZ * bits) / baud + HZ/50;
 }
 EXPORT_SYMBOL(uart_update_timeout);
 /**
  *	uart_get_baud_rate - return baud rate for a particular port
  *	@port: uart_port structure describing the port in question.
  *	@termios: desired termios settings.
  *	@old: old termios (or NULL)
  *	@min: minimum acceptable baud rate
  *	@max: maximum acceptable baud rate
  *
  *	Decode the termios structure into a numeric baud rate,
  *	taking account of the magic 38400 baud rate (with spd_*
  *	flags), and mapping the %B0 rate to 9600 baud.
  *
  *	If the new baud rate is invalid, try the old termios setting.
  *	If it's still invalid, we try 9600 baud.
  *
  *	Update the @termios structure to reflect the baud rate
  *	we're actually going to be using. Don't do this for the case
  *	where B0 is requested ("hang up").
  */
 unsigned int
 uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
 		   struct ktermios *old, unsigned int min, unsigned int max)
 {
 	unsigned int try, baud, altbaud = 38400;
 	int hung_up = 0;
 	upf_t flags = port->flags & UPF_SPD_MASK;
 	if (flags == UPF_SPD_HI)
 		altbaud = 57600;
 	if (flags == UPF_SPD_VHI)
 		altbaud = 115200;
 	if (flags == UPF_SPD_SHI)
 		altbaud = 230400;
 	if (flags == UPF_SPD_WARP)
 		altbaud = 460800;
 	for (try = 0; try < 2; try++) {
 		baud = tty_termios_baud_rate(termios);
 		/*
 		 * The spd_hi, spd_vhi, spd_shi, spd_warp kludge...
 		 * Die! Die! Die!
 		 */
 		if (baud == 38400)
 			baud = altbaud;
 		/*
 		 * Special case: B0 rate.
 		 */
 		if (baud == 0) {
 			hung_up = 1;
 			baud = 9600;
 		}
 		if (baud >= min && baud <= max)
 			return baud;
 		/*
 		 * Oops, the quotient was zero.  Try again with
 		 * the old baud rate if possible.
 		 */
 		termios->c_cflag &= ~CBAUD;
 		if (old) {
 			baud = tty_termios_baud_rate(old);
 			if (!hung_up)
 				tty_termios_encode_baud_rate(termios,
 								baud, baud);
 			old = NULL;
 			continue;
 		}
 		/*
 		 * As a last resort, if the quotient is zero,
 		 * default to 9600 bps
 		 */
 		if (!hung_up)
 			tty_termios_encode_baud_rate(termios, 9600, 9600);
 	}
 	return 0;
 }
 EXPORT_SYMBOL(uart_get_baud_rate);
 /**
  *	uart_get_divisor - return uart clock divisor
  *	@port: uart_port structure describing the port.
  *	@baud: desired baud rate
  *
  *	Calculate the uart clock divisor for the port.
  */
 unsigned int
 uart_get_divisor(struct uart_port *port, unsigned int baud)
 {
 	unsigned int quot;
 	/*
 	 * Old custom speed handling.
 	 */
 	if (baud == 38400 && (port->flags & UPF_SPD_MASK) == UPF_SPD_CUST)
 		quot = port->custom_divisor;
 	else
 		quot = (port->uartclk + (8 * baud)) / (16 * baud);
 	return quot;
 }
 EXPORT_SYMBOL(uart_get_divisor);
 /* FIXME: Consistent locking policy */
 static void
 uart_change_speed(struct uart_state *state, struct ktermios *old_termios)
 {
 	struct tty_struct *tty = state->info.port.tty;
 	struct uart_port *port = state->port;
 	struct ktermios *termios;
 	/*
 	 * If we have no tty, termios, or the port does not exist,
 	 * then we can't set the parameters for this port.
 	 */
 	if (!tty || !tty->termios || port->type == PORT_UNKNOWN)
 		return;
 	termios = tty->termios;
 	/*
 	 * Set flags based on termios cflag
 	 */
 	if (termios->c_cflag & CRTSCTS)
 		state->info.flags |= UIF_CTS_FLOW;
 	else
 		state->info.flags &= ~UIF_CTS_FLOW;
 	if (termios->c_cflag & CLOCAL)
 		state->info.flags &= ~UIF_CHECK_CD;
 	else
 		state->info.flags |= UIF_CHECK_CD;
 	port->ops->set_termios(port, termios, old_termios);
 }
 static inline int
 __uart_put_char(struct uart_port *port, struct circ_buf *circ, unsigned char c)
 {
 	unsigned long flags;
 	int ret = 0;
 	if (!circ->buf)
 		return 0;
 	spin_lock_irqsave(&port->lock, flags);
 	if (uart_circ_chars_free(circ) != 0) {
 		circ->buf[circ->head] = c;
 		circ->head = (circ->head + 1) & (UART_XMIT_SIZE - 1);
 		ret = 1;
 	}
 	spin_unlock_irqrestore(&port->lock, flags);
 	return ret;
 }
 static int uart_put_char(struct tty_struct *tty, unsigned char ch)
 {
 	struct uart_state *state = tty->driver_data;
 	return __uart_put_char(state->port, &state->info.xmit, ch);
 }
 static void uart_flush_chars(struct tty_struct *tty)
 {
 	uart_start(tty);
 }
 static int
 uart_write(struct tty_struct *tty, const unsigned char *buf, int count)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port;
 	struct circ_buf *circ;
 	unsigned long flags;
 	int c, ret = 0;
 	/*
 	 * This means you called this function _after_ the port was
 	 * closed.  No cookie for you.
 	 */
 	if (!state) {
 		WARN_ON(1);
 		return -EL3HLT;
 	}
 	port = state->port;
 	circ = &state->info.xmit;
 	if (!circ->buf)
 		return 0;
 	spin_lock_irqsave(&port->lock, flags);
 	while (1) {
 		c = CIRC_SPACE_TO_END(circ->head, circ->tail, UART_XMIT_SIZE);
 		if (count < c)
 			c = count;
 		if (c <= 0)
 			break;
 		memcpy(circ->buf + circ->head, buf, c);
 		circ->head = (circ->head + c) & (UART_XMIT_SIZE - 1);
 		buf += c;
 		count -= c;
 		ret += c;
 	}
 	spin_unlock_irqrestore(&port->lock, flags);
 	uart_start(tty);
 	return ret;
 }
 static int uart_write_room(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	unsigned long flags;
 	int ret;
 	spin_lock_irqsave(&state->port->lock, flags);
 	ret = uart_circ_chars_free(&state->info.xmit);
 	spin_unlock_irqrestore(&state->port->lock, flags);
 	return ret;
 }
 static int uart_chars_in_buffer(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	unsigned long flags;
 	int ret;
 	spin_lock_irqsave(&state->port->lock, flags);
 	ret = uart_circ_chars_pending(&state->info.xmit);
 	spin_unlock_irqrestore(&state->port->lock, flags);
 	return ret;
 }
 static void uart_flush_buffer(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port;
 	unsigned long flags;
 	/*
 	 * This means you called this function _after_ the port was
 	 * closed.  No cookie for you.
 	 */
 	if (!state) {
 		WARN_ON(1);
 		return;
 	}
 	port = state->port;
 	pr_debug("uart_flush_buffer(%d) called\n", tty->index);
 	spin_lock_irqsave(&port->lock, flags);
 	uart_circ_clear(&state->info.xmit);
 	if (port->ops->flush_buffer)
 		port->ops->flush_buffer(port);
 	spin_unlock_irqrestore(&port->lock, flags);
 	tty_wakeup(tty);
 }
 /*
  * This function is used to send a high-priority XON/XOFF character to
  * the device
  */
 static void uart_send_xchar(struct tty_struct *tty, char ch)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	unsigned long flags;
 	if (port->ops->send_xchar)
 		port->ops->send_xchar(port, ch);
 	else {
 		port->x_char = ch;
 		if (ch) {
 			spin_lock_irqsave(&port->lock, flags);
 			port->ops->start_tx(port);
 			spin_unlock_irqrestore(&port->lock, flags);
 		}
 	}
 }
 static void uart_throttle(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	if (I_IXOFF(tty))
 		uart_send_xchar(tty, STOP_CHAR(tty));
 	if (tty->termios->c_cflag & CRTSCTS)
 		uart_clear_mctrl(state->port, TIOCM_RTS);
 }
 static void uart_unthrottle(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	if (I_IXOFF(tty)) {
 		if (port->x_char)
 			port->x_char = 0;
 		else
 			uart_send_xchar(tty, START_CHAR(tty));
 	}
 	if (tty->termios->c_cflag & CRTSCTS)
 		uart_set_mctrl(port, TIOCM_RTS);
 }
 static int uart_get_info(struct uart_state *state,
 			 struct serial_struct __user *retinfo)
 {
 	struct uart_port *port = state->port;
 	struct serial_struct tmp;
 	memset(&tmp, 0, sizeof(tmp));
 	/* Ensure the state we copy is consistent and no hardware changes
 	   occur as we go */
 	mutex_lock(&state->mutex);
 	tmp.type	    = port->type;
 	tmp.line	    = port->line;
 	tmp.port	    = port->iobase;
 	if (HIGH_BITS_OFFSET)
 		tmp.port_high = (long) port->iobase >> HIGH_BITS_OFFSET;
 	tmp.irq		    = port->irq;
 	tmp.flags	    = port->flags;
 	tmp.xmit_fifo_size  = port->fifosize;
 	tmp.baud_base	    = port->uartclk / 16;
 	tmp.close_delay	    = state->close_delay / 10;
 	tmp.closing_wait    = state->closing_wait == USF_CLOSING_WAIT_NONE ?
 				ASYNC_CLOSING_WAIT_NONE :
 				state->closing_wait / 10;
 	tmp.custom_divisor  = port->custom_divisor;
 	tmp.hub6	    = port->hub6;
 	tmp.io_type         = port->iotype;
 	tmp.iomem_reg_shift = port->regshift;
 	tmp.iomem_base      = (void *)(unsigned long)port->mapbase;
 	mutex_unlock(&state->mutex);
 	if (copy_to_user(retinfo, &tmp, sizeof(*retinfo)))
 		return -EFAULT;
 	return 0;
 }
 static int uart_set_info(struct uart_state *state,
 			 struct serial_struct __user *newinfo)
 {
 	struct serial_struct new_serial;
 	struct uart_port *port = state->port;
 	unsigned long new_port;
 	unsigned int change_irq, change_port, closing_wait;
 	unsigned int old_custom_divisor, close_delay;
 	upf_t old_flags, new_flags;
 	int retval = 0;
 	if (copy_from_user(&new_serial, newinfo, sizeof(new_serial)))
 		return -EFAULT;
 	new_port = new_serial.port;
 	if (HIGH_BITS_OFFSET)
 		new_port += (unsigned long) new_serial.port_high << HIGH_BITS_OFFSET;
 	new_serial.irq = irq_canonicalize(new_serial.irq);
 	close_delay = new_serial.close_delay * 10;
 	closing_wait = new_serial.closing_wait == ASYNC_CLOSING_WAIT_NONE ?
 			USF_CLOSING_WAIT_NONE : new_serial.closing_wait * 10;
 	/*
 	 * This semaphore protects state->count.  It is also
 	 * very useful to prevent opens.  Also, take the
 	 * port configuration semaphore to make sure that a
 	 * module insertion/removal doesn't change anything
 	 * under us.
 	 */
 	mutex_lock(&state->mutex);
 	change_irq  = !(port->flags & UPF_FIXED_PORT)
 		&& new_serial.irq != port->irq;
 	/*
 	 * Since changing the 'type' of the port changes its resource
 	 * allocations, we should treat type changes the same as
 	 * IO port changes.
 	 */
 	change_port = !(port->flags & UPF_FIXED_PORT)
 		&& (new_port != port->iobase ||
 		    (unsigned long)new_serial.iomem_base != port->mapbase ||
 		    new_serial.hub6 != port->hub6 ||
 		    new_serial.io_type != port->iotype ||
 		    new_serial.iomem_reg_shift != port->regshift ||
 		    new_serial.type != port->type);
 	old_flags = port->flags;
 	new_flags = new_serial.flags;
 	old_custom_divisor = port->custom_divisor;
 	if (!capable(CAP_SYS_ADMIN)) {
 		retval = -EPERM;
 		if (change_irq || change_port ||
 		    (new_serial.baud_base != port->uartclk / 16) ||
 		    (close_delay != state->close_delay) ||
 		    (closing_wait != state->closing_wait) ||
 		    (new_serial.xmit_fifo_size &&
 		     new_serial.xmit_fifo_size != port->fifosize) ||
 		    (((new_flags ^ old_flags) & ~UPF_USR_MASK) != 0))
 			goto exit;
 		port->flags = ((port->flags & ~UPF_USR_MASK) |
 			       (new_flags & UPF_USR_MASK));
 		port->custom_divisor = new_serial.custom_divisor;
 		goto check_and_exit;
 	}
 	/*
 	 * Ask the low level driver to verify the settings.
 	 */
 	if (port->ops->verify_port)
 		retval = port->ops->verify_port(port, &new_serial);
 	if ((new_serial.irq >= nr_irqs) || (new_serial.irq < 0) ||
 	    (new_serial.baud_base < 9600))
 		retval = -EINVAL;
 	if (retval)
 		goto exit;
 	if (change_port || change_irq) {
 		retval = -EBUSY;
 		/*
 		 * Make sure that we are the sole user of this port.
 		 */
 		if (uart_users(state) > 1)
 			goto exit;
 		/*
 		 * We need to shutdown the serial port at the old
 		 * port/type/irq combination.
 		 */
 		uart_shutdown(state);
 	}
 	if (change_port) {
 		unsigned long old_iobase, old_mapbase;
 		unsigned int old_type, old_iotype, old_hub6, old_shift;
 		old_iobase = port->iobase;
 		old_mapbase = port->mapbase;
 		old_type = port->type;
 		old_hub6 = port->hub6;
 		old_iotype = port->iotype;
 		old_shift = port->regshift;
 		/*
 		 * Free and release old regions
 		 */
 		if (old_type != PORT_UNKNOWN)
 			port->ops->release_port(port);
 		port->iobase = new_port;
 		port->type = new_serial.type;
 		port->hub6 = new_serial.hub6;
 		port->iotype = new_serial.io_type;
 		port->regshift = new_serial.iomem_reg_shift;
 		port->mapbase = (unsigned long)new_serial.iomem_base;
 		/*
 		 * Claim and map the new regions
 		 */
 		if (port->type != PORT_UNKNOWN) {
 			retval = port->ops->request_port(port);
 		} else {
 			/* Always success - Jean II */
 			retval = 0;
 		}
 		/*
 		 * If we fail to request resources for the
 		 * new port, try to restore the old settings.
 		 */
 		if (retval && old_type != PORT_UNKNOWN) {
 			port->iobase = old_iobase;
 			port->type = old_type;
 			port->hub6 = old_hub6;
 			port->iotype = old_iotype;
 			port->regshift = old_shift;
 			port->mapbase = old_mapbase;
 			retval = port->ops->request_port(port);
 			/*
 			 * If we failed to restore the old settings,
 			 * we fail like this.
 			 */
 			if (retval)
 				port->type = PORT_UNKNOWN;
 			/*
 			 * We failed anyway.
 			 */
 			retval = -EBUSY;
 			/* Added to return the correct error -Ram Gupta */
 			goto exit;
 		}
 	}
 	if (change_irq)
 		port->irq      = new_serial.irq;
 	if (!(port->flags & UPF_FIXED_PORT))
 		port->uartclk  = new_serial.baud_base * 16;
 	port->flags            = (port->flags & ~UPF_CHANGE_MASK) |
 				 (new_flags & UPF_CHANGE_MASK);
 	port->custom_divisor   = new_serial.custom_divisor;
 	state->close_delay     = close_delay;
 	state->closing_wait    = closing_wait;
 	if (new_serial.xmit_fifo_size)
 		port->fifosize = new_serial.xmit_fifo_size;
 	if (state->info.port.tty)
 		state->info.port.tty->low_latency =
 			(port->flags & UPF_LOW_LATENCY) ? 1 : 0;
  check_and_exit:
 	retval = 0;
 	if (port->type == PORT_UNKNOWN)
 		goto exit;
 	if (state->info.flags & UIF_INITIALIZED) {
 		if (((old_flags ^ port->flags) & UPF_SPD_MASK) ||
 		    old_custom_divisor != port->custom_divisor) {
 			/*
 			 * If they're setting up a custom divisor or speed,
 			 * instead of clearing it, then bitch about it. No
 			 * need to rate-limit; it's CAP_SYS_ADMIN only.
 			 */
 			if (port->flags & UPF_SPD_MASK) {
 				char buf[64];
 				printk(KERN_NOTICE
 				       "%s sets custom speed on %s. This "
 				       "is deprecated.\n", current->comm,
 				       tty_name(state->info.port.tty, buf));
 			}
 			uart_change_speed(state, NULL);
 		}
 	} else
 		retval = uart_startup(state, 1);
  exit:
 	mutex_unlock(&state->mutex);
 	return retval;
 }
 /*
  * uart_get_lsr_info - get line status register info.
  * Note: uart_ioctl protects us against hangups.
  */
 static int uart_get_lsr_info(struct uart_state *state,
 			     unsigned int __user *value)
 {
 	struct uart_port *port = state->port;
 	unsigned int result;
 	result = port->ops->tx_empty(port);
 	/*
 	 * If we're about to load something into the transmit
 	 * register, we'll pretend the transmitter isn't empty to
 	 * avoid a race condition (depending on when the transmit
 	 * interrupt happens).
 	 */
 	if (port->x_char ||
 	    ((uart_circ_chars_pending(&state->info.xmit) > 0) &&
 	     !state->info.port.tty->stopped && !state->info.port.tty->hw_stopped))
 		result &= ~TIOCSER_TEMT;
 	return put_user(result, value);
 }
 static int uart_tiocmget(struct tty_struct *tty, struct file *file)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	int result = -EIO;
 	mutex_lock(&state->mutex);
 	if ((!file || !tty_hung_up_p(file)) &&
 	    !(tty->flags & (1 << TTY_IO_ERROR))) {
 		result = port->mctrl;
 		spin_lock_irq(&port->lock);
 		result |= port->ops->get_mctrl(port);
 		spin_unlock_irq(&port->lock);
 	}
 	mutex_unlock(&state->mutex);
 	return result;
 }
 static int
 uart_tiocmset(struct tty_struct *tty, struct file *file,
 	      unsigned int set, unsigned int clear)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	int ret = -EIO;
 	mutex_lock(&state->mutex);
 	if ((!file || !tty_hung_up_p(file)) &&
 	    !(tty->flags & (1 << TTY_IO_ERROR))) {
 		uart_update_mctrl(port, set, clear);
 		ret = 0;
 	}
 	mutex_unlock(&state->mutex);
 	return ret;
 }
 static int uart_break_ctl(struct tty_struct *tty, int break_state)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	mutex_lock(&state->mutex);
 	if (port->type != PORT_UNKNOWN)
 		port->ops->break_ctl(port, break_state);
 	mutex_unlock(&state->mutex);
 	return 0;
 }
 static int uart_do_autoconfig(struct uart_state *state)
 {
 	struct uart_port *port = state->port;
 	int flags, ret;
 	if (!capable(CAP_SYS_ADMIN))
 		return -EPERM;
 	/*
 	 * Take the per-port semaphore.  This prevents count from
 	 * changing, and hence any extra opens of the port while
 	 * we're auto-configuring.
 	 */
 	if (mutex_lock_interruptible(&state->mutex))
 		return -ERESTARTSYS;
 	ret = -EBUSY;
 	if (uart_users(state) == 1) {
 		uart_shutdown(state);
 		/*
 		 * If we already have a port type configured,
 		 * we must release its resources.
 		 */
 		if (port->type != PORT_UNKNOWN)
 			port->ops->release_port(port);
 		flags = UART_CONFIG_TYPE;
 		if (port->flags & UPF_AUTO_IRQ)
 			flags |= UART_CONFIG_IRQ;
 		/*
 		 * This will claim the ports resources if
 		 * a port is found.
 		 */
 		port->ops->config_port(port, flags);
 		ret = uart_startup(state, 1);
 	}
 	mutex_unlock(&state->mutex);
 	return ret;
 }
 /*
  * Wait for any of the 4 modem inputs (DCD,RI,DSR,CTS) to change
  * - mask passed in arg for lines of interest
  *   (use |'ed TIOCM_RNG/DSR/CD/CTS for masking)
  * Caller should use TIOCGICOUNT to see which one it was
  */
 static int
 uart_wait_modem_status(struct uart_state *state, unsigned long arg)
 {
 	struct uart_port *port = state->port;
 	DECLARE_WAITQUEUE(wait, current);
 	struct uart_icount cprev, cnow;
 	int ret;
 	/*
 	 * note the counters on entry
 	 */
 	spin_lock_irq(&port->lock);
 	memcpy(&cprev, &port->icount, sizeof(struct uart_icount));
 	/*
 	 * Force modem status interrupts on
 	 */
 	port->ops->enable_ms(port);
 	spin_unlock_irq(&port->lock);
 	add_wait_queue(&state->info.delta_msr_wait, &wait);
 	for (;;) {
 		spin_lock_irq(&port->lock);
 		memcpy(&cnow, &port->icount, sizeof(struct uart_icount));
 		spin_unlock_irq(&port->lock);
 		set_current_state(TASK_INTERRUPTIBLE);
 		if (((arg & TIOCM_RNG) && (cnow.rng != cprev.rng)) ||
 		    ((arg & TIOCM_DSR) && (cnow.dsr != cprev.dsr)) ||
 		    ((arg & TIOCM_CD)  && (cnow.dcd != cprev.dcd)) ||
 		    ((arg & TIOCM_CTS) && (cnow.cts != cprev.cts))) {
 			ret = 0;
 			break;
 		}
 		schedule();
 		/* see if a signal did it */
 		if (signal_pending(current)) {
 			ret = -ERESTARTSYS;
 			break;
 		}
 		cprev = cnow;
 	}
 	current->state = TASK_RUNNING;
 	remove_wait_queue(&state->info.delta_msr_wait, &wait);
 	return ret;
 }
 /*
  * Get counter of input serial line interrupts (DCD,RI,DSR,CTS)
  * Return: write counters to the user passed counter struct
  * NB: both 1->0 and 0->1 transitions are counted except for
  *     RI where only 0->1 is counted.
  */
 static int uart_get_count(struct uart_state *state,
 			  struct serial_icounter_struct __user *icnt)
 {
 	struct serial_icounter_struct icount;
 	struct uart_icount cnow;
 	struct uart_port *port = state->port;
 	spin_lock_irq(&port->lock);
 	memcpy(&cnow, &port->icount, sizeof(struct uart_icount));
 	spin_unlock_irq(&port->lock);
 	icount.cts         = cnow.cts;
 	icount.dsr         = cnow.dsr;
 	icount.rng         = cnow.rng;
 	icount.dcd         = cnow.dcd;
 	icount.rx          = cnow.rx;
 	icount.tx          = cnow.tx;
 	icount.frame       = cnow.frame;
 	icount.overrun     = cnow.overrun;
 	icount.parity      = cnow.parity;
 	icount.brk         = cnow.brk;
 	icount.buf_overrun = cnow.buf_overrun;
 	return copy_to_user(icnt, &icount, sizeof(icount)) ? -EFAULT : 0;
 }
 /*
  * Called via sys_ioctl.  We can use spin_lock_irq() here.
  */
 static int
 uart_ioctl(struct tty_struct *tty, struct file *filp, unsigned int cmd,
 	   unsigned long arg)
 {
 	struct uart_state *state = tty->driver_data;
 	void __user *uarg = (void __user *)arg;
 	int ret = -ENOIOCTLCMD;
 	/*
 	 * These ioctls don't rely on the hardware to be present.
 	 */
 	switch (cmd) {
 	case TIOCGSERIAL:
 		ret = uart_get_info(state, uarg);
 		break;
 	case TIOCSSERIAL:
 		ret = uart_set_info(state, uarg);
 		break;
 	case TIOCSERCONFIG:
 		ret = uart_do_autoconfig(state);
 		break;
 	case TIOCSERGWILD: /* obsolete */
 	case TIOCSERSWILD: /* obsolete */
 		ret = 0;
 		break;
 	}
 	if (ret != -ENOIOCTLCMD)
 		goto out;
 	if (tty->flags & (1 << TTY_IO_ERROR)) {
 		ret = -EIO;
 		goto out;
 	}
 	/*
 	 * The following should only be used when hardware is present.
 	 */
 	switch (cmd) {
 	case TIOCMIWAIT:
 		ret = uart_wait_modem_status(state, arg);
 		break;
 	case TIOCGICOUNT:
 		ret = uart_get_count(state, uarg);
 		break;
 	}
 	if (ret != -ENOIOCTLCMD)
 		goto out;
 	mutex_lock(&state->mutex);
 	if (tty_hung_up_p(filp)) {
 		ret = -EIO;
 		goto out_up;
 	}
 	/*
 	 * All these rely on hardware being present and need to be
 	 * protected against the tty being hung up.
 	 */
 	switch (cmd) {
 	case TIOCSERGETLSR: /* Get line status register */
 		ret = uart_get_lsr_info(state, uarg);
 		break;
 	default: {
 		struct uart_port *port = state->port;
 		if (port->ops->ioctl)
 			ret = port->ops->ioctl(port, cmd, arg);
 		break;
 	}
 	}
 out_up:
 	mutex_unlock(&state->mutex);
 out:
 	return ret;
 }
 static void uart_set_ldisc(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	if (port->ops->set_ldisc)
 		port->ops->set_ldisc(port);
 }
 static void uart_set_termios(struct tty_struct *tty,
 						struct ktermios *old_termios)
 {
 	struct uart_state *state = tty->driver_data;
 	unsigned long flags;
 	unsigned int cflag = tty->termios->c_cflag;
 	/*
 	 * These are the bits that are used to setup various
 	 * flags in the low level driver. We can ignore the Bfoo
 	 * bits in c_cflag; c_[io]speed will always be set
 	 * appropriately by set_termios() in tty_ioctl.c
 	 */
 #define RELEVANT_IFLAG(iflag)	((iflag) & (IGNBRK|BRKINT|IGNPAR|PARMRK|INPCK))
 	if ((cflag ^ old_termios->c_cflag) == 0 &&
 	    tty->termios->c_ospeed == old_termios->c_ospeed &&
 	    tty->termios->c_ispeed == old_termios->c_ispeed &&
 	    RELEVANT_IFLAG(tty->termios->c_iflag ^ old_termios->c_iflag) == 0) {
 		return;
 	}
 	uart_change_speed(state, old_termios);
 	/* Handle transition to B0 status */
 	if ((old_termios->c_cflag & CBAUD) && !(cflag & CBAUD))
 		uart_clear_mctrl(state->port, TIOCM_RTS | TIOCM_DTR);
 	/* Handle transition away from B0 status */
 	if (!(old_termios->c_cflag & CBAUD) && (cflag & CBAUD)) {
 		unsigned int mask = TIOCM_DTR;
 		if (!(cflag & CRTSCTS) ||
 		    !test_bit(TTY_THROTTLED, &tty->flags))
 			mask |= TIOCM_RTS;
 		uart_set_mctrl(state->port, mask);
 	}
 	/* Handle turning off CRTSCTS */
 	if ((old_termios->c_cflag & CRTSCTS) && !(cflag & CRTSCTS)) {
 		spin_lock_irqsave(&state->port->lock, flags);
 		tty->hw_stopped = 0;
 		__uart_start(tty);
 		spin_unlock_irqrestore(&state->port->lock, flags);
 	}
 	/* Handle turning on CRTSCTS */
 	if (!(old_termios->c_cflag & CRTSCTS) && (cflag & CRTSCTS)) {
 		spin_lock_irqsave(&state->port->lock, flags);
 		if (!(state->port->ops->get_mctrl(state->port) & TIOCM_CTS)) {
 			tty->hw_stopped = 1;
 			state->port->ops->stop_tx(state->port);
 		}
 		spin_unlock_irqrestore(&state->port->lock, flags);
 	}
 #if 0
 	/*
 	 * No need to wake up processes in open wait, since they
 	 * sample the CLOCAL flag once, and don't recheck it.
 	 * XXX  It's not clear whether the current behavior is correct
 	 * or not.  Hence, this may change.....
 	 */
 	if (!(old_termios->c_cflag & CLOCAL) &&
 	    (tty->termios->c_cflag & CLOCAL))
 		wake_up_interruptible(&info->port.open_wait);
 #endif
 }
 /*
  * In 2.4.5, calls to this will be serialized via the BKL in
  *  linux/drivers/char/tty_io.c:tty_release()
  *  linux/drivers/char/tty_io.c:do_tty_handup()
  */
 static void uart_close(struct tty_struct *tty, struct file *filp)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port;
 	BUG_ON(!kernel_locked());
 	if (!state || !state->port)
 		return;
 	port = state->port;
 	pr_debug("uart_close(%d) called\n", port->line);
 	mutex_lock(&state->mutex);
 	if (tty_hung_up_p(filp))
 		goto done;
 	if ((tty->count == 1) && (state->count != 1)) {
 		/*
 		 * Uh, oh.  tty->count is 1, which means that the tty
 		 * structure will be freed.  state->count should always
 		 * be one in these conditions.  If it's greater than
 		 * one, we've got real problems, since it means the
 		 * serial port won't be shutdown.
 		 */
 		printk(KERN_ERR "uart_close: bad serial port count; tty->count is 1, "
 		       "state->count is %d\n", state->count);
 		state->count = 1;
 	}
 	if (--state->count < 0) {
 		printk(KERN_ERR "uart_close: bad serial port count for %s: %d\n",
 		       tty->name, state->count);
 		state->count = 0;
 	}
 	if (state->count)
 		goto done;
 	/*
 	 * Now we wait for the transmit buffer to clear; and we notify
 	 * the line discipline to only process XON/XOFF characters by
 	 * setting tty->closing.
 	 */
 	tty->closing = 1;
 	if (state->closing_wait != USF_CLOSING_WAIT_NONE)
 		tty_wait_until_sent(tty, msecs_to_jiffies(state->closing_wait));
 	/*
 	 * At this point, we stop accepting input.  To do this, we
 	 * disable the receive line status interrupts.
 	 */
 	if (state->info.flags & UIF_INITIALIZED) {
 		unsigned long flags;
 		spin_lock_irqsave(&port->lock, flags);
 		port->ops->stop_rx(port);
 		spin_unlock_irqrestore(&port->lock, flags);
 		/*
 		 * Before we drop DTR, make sure the UART transmitter
 		 * has completely drained; this is especially
 		 * important if there is a transmit FIFO!
 		 */
 		uart_wait_until_sent(tty, port->timeout);
 	}
 	uart_shutdown(state);
 	uart_flush_buffer(tty);
 	tty_ldisc_flush(tty);
 	tty->closing = 0;
 	state->info.port.tty = NULL;
 	if (state->info.port.blocked_open) {
 		if (state->close_delay)
 			msleep_interruptible(state->close_delay);
 	} else if (!uart_console(port)) {
 		uart_change_pm(state, 3);
 	}
 	/*
 	 * Wake up anyone trying to open this port.
 	 */
 	state->info.flags &= ~UIF_NORMAL_ACTIVE;
 	wake_up_interruptible(&state->info.port.open_wait);
  done:
 	mutex_unlock(&state->mutex);
 }
 static void uart_wait_until_sent(struct tty_struct *tty, int timeout)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_port *port = state->port;
 	unsigned long char_time, expire;
 	if (port->type == PORT_UNKNOWN || port->fifosize == 0)
 		return;
 	lock_kernel();
 	/*
 	 * Set the check interval to be 1/5 of the estimated time to
 	 * send a single character, and make it at least 1.  The check
 	 * interval should also be less than the timeout.
 	 *
 	 * Note: we have to use pretty tight timings here to satisfy
 	 * the NIST-PCTS.
 	 */
 	char_time = (port->timeout - HZ/50) / port->fifosize;
 	char_time = char_time / 5;
 	if (char_time == 0)
 		char_time = 1;
 	if (timeout && timeout < char_time)
 		char_time = timeout;
 	/*
 	 * If the transmitter hasn't cleared in twice the approximate
 	 * amount of time to send the entire FIFO, it probably won't
 	 * ever clear.  This assumes the UART isn't doing flow
 	 * control, which is currently the case.  Hence, if it ever
 	 * takes longer than port->timeout, this is probably due to a
 	 * UART bug of some kind.  So, we clamp the timeout parameter at
 	 * 2*port->timeout.
 	 */
 	if (timeout == 0 || timeout > 2 * port->timeout)
 		timeout = 2 * port->timeout;
 	expire = jiffies + timeout;
 	pr_debug("uart_wait_until_sent(%d), jiffies=%lu, expire=%lu...\n",
 		port->line, jiffies, expire);
 	/*
 	 * Check whether the transmitter is empty every 'char_time'.
 	 * 'timeout' / 'expire' give us the maximum amount of time
 	 * we wait.
 	 */
 	while (!port->ops->tx_empty(port)) {
 		msleep_interruptible(jiffies_to_msecs(char_time));
 		if (signal_pending(current))
 			break;
 		if (time_after(jiffies, expire))
 			break;
 	}
 	set_current_state(TASK_RUNNING); /* might not be needed */
 	unlock_kernel();
 }
 /*
  * This is called with the BKL held in
  *  linux/drivers/char/tty_io.c:do_tty_hangup()
  * We're called from the eventd thread, so we can sleep for
  * a _short_ time only.
  */
 static void uart_hangup(struct tty_struct *tty)
 {
 	struct uart_state *state = tty->driver_data;
 	struct uart_info *info = &state->info;
 	BUG_ON(!kernel_locked());
 	pr_debug("uart_hangup(%d)\n", state->port->line);
 	mutex_lock(&state->mutex);
 	if (info->flags & UIF_NORMAL_ACTIVE) {
 		uart_flush_buffer(tty);
 		uart_shutdown(state);
 		state->count = 0;
 		info->flags &= ~UIF_NORMAL_ACTIVE;
 		info->port.tty = NULL;
 		wake_up_interruptible(&info->port.open_wait);
 		wake_up_interruptible(&info->delta_msr_wait);
 	}
 	mutex_unlock(&state->mutex);
 }
 /*
  * Copy across the serial console cflag setting into the termios settings
  * for the initial open of the port.  This allows continuity between the
  * kernel settings, and the settings init adopts when it opens the port
  * for the first time.
  */
 static void uart_update_termios(struct uart_state *state)
 {
 	struct tty_struct *tty = state->info.port.tty;
 	struct uart_port *port = state->port;
 	if (uart_console(port) && port->cons->cflag) {
 		tty->termios->c_cflag = port->cons->cflag;
 		port->cons->cflag = 0;
 	}
 	/*
 	 * If the device failed to grab its irq resources,
 	 * or some other error occurred, don't try to talk
 	 * to the port hardware.
 	 */
 	if (!(tty->flags & (1 << TTY_IO_ERROR))) {
 		/*
 		 * Make termios settings take effect.
 		 */
 		uart_change_speed(state, NULL);
 		/*
 		 * And finally enable the RTS and DTR signals.
 		 */
 		if (tty->termios->c_cflag & CBAUD)
 			uart_set_mctrl(port, TIOCM_DTR | TIOCM_RTS);
 	}
 }
 /*
  * Block the open until the port is ready.  We must be called with
  * the per-port semaphore held.
  */
 static int
 uart_block_til_ready(struct file *filp, struct uart_state *state)
 {
 	DECLARE_WAITQUEUE(wait, current);
 	struct uart_info *info = &state->info;
 	struct uart_port *port = state->port;
 	unsigned int mctrl;
 	info->port.blocked_open++;
 	state->count--;
 	add_wait_queue(&info->port.open_wait, &wait);
 	while (1) {
 		set_current_state(TASK_INTERRUPTIBLE);
 		/*
 		 * If we have been hung up, tell userspace/restart open.
 		 */
 		if (tty_hung_up_p(filp) || info->port.tty == NULL)
 			break;
 		/*
 		 * If the port has been closed, tell userspace/restart open.
 		 */
 		if (!(info->flags & UIF_INITIALIZED))
 			break;
 		/*
 		 * If non-blocking mode is set, or CLOCAL mode is set,
 		 * we don't want to wait for the modem status lines to
 		 * indicate that the port is ready.
 		 *
 		 * Also, if the port is not enabled/configured, we want
 		 * to allow the open to succeed here.  Note that we will
 		 * have set TTY_IO_ERROR for a non-existant port.
 		 */
 		if ((filp->f_flags & O_NONBLOCK) ||
 		    (info->port.tty->termios->c_cflag & CLOCAL) ||
 		    (info->port.tty->flags & (1 << TTY_IO_ERROR)))
 			break;
 		/*
 		 * Set DTR to allow modem to know we're waiting.  Do
 		 * not set RTS here - we want to make sure we catch
 		 * the data from the modem.
 		 */
 		if (info->port.tty->termios->c_cflag & CBAUD)
 			uart_set_mctrl(port, TIOCM_DTR);
 		/*
 		 * and wait for the carrier to indicate that the
 		 * modem is ready for us.
 		 */
 		spin_lock_irq(&port->lock);
 		port->ops->enable_ms(port);
 		mctrl = port->ops->get_mctrl(port);
 		spin_unlock_irq(&port->lock);
 		if (mctrl & TIOCM_CAR)
 			break;
 		mutex_unlock(&state->mutex);
 		schedule();
 		mutex_lock(&state->mutex);
 		if (signal_pending(current))
 			break;
 	}
 	set_current_state(TASK_RUNNING);
 	remove_wait_queue(&info->port.open_wait, &wait);
 	state->count++;
 	info->port.blocked_open--;
 	if (signal_pending(current))
 		return -ERESTARTSYS;
 	if (!info->port.tty || tty_hung_up_p(filp))
 		return -EAGAIN;
 	return 0;
 }
 static struct uart_state *uart_get(struct uart_driver *drv, int line)
 {
 	struct uart_state *state;
 	int ret = 0;
 	state = drv->state + line;
 	if (mutex_lock_interruptible(&state->mutex)) {
 		ret = -ERESTARTSYS;
 		goto err;
 	}
 	state->count++;
 	if (!state->port || state->port->flags & UPF_DEAD) {
 		ret = -ENXIO;
 		goto err_unlock;
 	}
 	return state;
  err_unlock:
 	state->count--;
 	mutex_unlock(&state->mutex);
  err:
 	return ERR_PTR(ret);
 }
 /*
  * calls to uart_open are serialised by the BKL in
  *   fs/char_dev.c:chrdev_open()
  * Note that if this fails, then uart_close() _will_ be called.
  *
  * In time, we want to scrap the "opening nonpresent ports"
  * behaviour and implement an alternative way for setserial
  * to set base addresses/ports/types.  This will allow us to
  * get rid of a certain amount of extra tests.
  */
 static int uart_open(struct tty_struct *tty, struct file *filp)
 {
 	struct uart_driver *drv = (struct uart_driver *)tty->driver->driver_state;
 	struct uart_state *state;
 	int retval, line = tty->index;
 	BUG_ON(!kernel_locked());
 	pr_debug("uart_open(%d) called\n", line);
 	/*
 	 * tty->driver->num won't change, so we won't fail here with
 	 * tty->driver_data set to something non-NULL (and therefore
 	 * we won't get caught by uart_close()).
 	 */
 	retval = -ENODEV;
 	if (line >= tty->driver->num)
 		goto fail;
 	/*
 	 * We take the semaphore inside uart_get to guarantee that we won't
 	 * be re-entered while allocating the info structure, or while we
 	 * request any IRQs that the driver may need.  This also has the nice
 	 * side-effect that it delays the action of uart_hangup, so we can
 	 * guarantee that info->port.tty will always contain something reasonable.
 	 */
 	state = uart_get(drv, line);
 	if (IS_ERR(state)) {
 		retval = PTR_ERR(state);
 		goto fail;
 	}
 	/*
 	 * Once we set tty->driver_data here, we are guaranteed that
 	 * uart_close() will decrement the driver module use count.
 	 * Any failures from here onwards should not touch the count.
 	 */
 	tty->driver_data = state;
 	state->port->info = &state->info;
 	tty->low_latency = (state->port->flags & UPF_LOW_LATENCY) ? 1 : 0;
 	tty->alt_speed = 0;
 	state->info.port.tty = tty;
 	/*
 	 * If the port is in the middle of closing, bail out now.
 	 */
 	if (tty_hung_up_p(filp)) {
 		retval = -EAGAIN;
 		state->count--;
 		mutex_unlock(&state->mutex);
 		goto fail;
 	}
 	/*
 	 * Make sure the device is in D0 state.
 	 */
 	if (state->count == 1)
 		uart_change_pm(state, 0);
 	/*
 	 * Start up the serial port.
 	 */
 	retval = uart_startup(state, 0);
 	/*
 	 * If we succeeded, wait until the port is ready.
 	 */
 	if (retval == 0)
 		retval = uart_block_til_ready(filp, state);
 	mutex_unlock(&state->mutex);
 	/*
 	 * If this is the first open to succeed, adjust things to suit.
 	 */
 	if (retval == 0 && !(state->info.flags & UIF_NORMAL_ACTIVE)) {
 		state->info.flags |= UIF_NORMAL_ACTIVE;
 		uart_update_termios(state);
 	}
  fail:
 	return retval;
 }
 static const char *uart_type(struct uart_port *port)
 {
 	const char *str = NULL;
 	if (port->ops->type)
 		str = port->ops->type(port);
 	if (!str)
 		str = "unknown";
 	return str;
 }
 #ifdef CONFIG_PROC_FS
 static int uart_line_info(char *buf, struct uart_driver *drv, int i)
 {
 	struct uart_state *state = drv->state + i;
 	int pm_state;
 	struct uart_port *port = state->port;
 	char stat_buf[32];
 	unsigned int status;
 	int mmio, ret;
 	if (!port)
 		return 0;
 	mmio = port->iotype >= UPIO_MEM;
 	ret = sprintf(buf, "%d: uart:%s %s%08llX irq:%d",
 			port->line, uart_type(port),
 			mmio ? "mmio:0x" : "port:",
 			mmio ? (unsigned long long)port->mapbase
 			     : (unsigned long long) port->iobase,
 			port->irq);
 	if (port->type == PORT_UNKNOWN) {
 		strcat(buf, "\n");
 		return ret + 1;
 	}
 	if (capable(CAP_SYS_ADMIN)) {
 		mutex_lock(&state->mutex);
 		pm_state = state->pm_state;
 		if (pm_state)
 			uart_change_pm(state, 0);
 		spin_lock_irq(&port->lock);
 		status = port->ops->get_mctrl(port);
 		spin_unlock_irq(&port->lock);
 		if (pm_state)
 			uart_change_pm(state, pm_state);
 		mutex_unlock(&state->mutex);
 		ret += sprintf(buf + ret, " tx:%d rx:%d",
 				port->icount.tx, port->icount.rx);
 		if (port->icount.frame)
 			ret += sprintf(buf + ret, " fe:%d",
 				port->icount.frame);
 		if (port->icount.parity)
 			ret += sprintf(buf + ret, " pe:%d",
 				port->icount.parity);
 		if (port->icount.brk)
 			ret += sprintf(buf + ret, " brk:%d",
 				port->icount.brk);
 		if (port->icount.overrun)
 			ret += sprintf(buf + ret, " oe:%d",
 				port->icount.overrun);
 #define INFOBIT(bit, str) \
 	if (port->mctrl & (bit)) \
 		strncat(stat_buf, (str), sizeof(stat_buf) - \
 			strlen(stat_buf) - 2)
 #define STATBIT(bit, str) \
 	if (status & (bit)) \
 		strncat(stat_buf, (str), sizeof(stat_buf) - \
 		       strlen(stat_buf) - 2)
 		stat_buf[0] = '\0';
 		stat_buf[1] = '\0';
 		INFOBIT(TIOCM_RTS, "|RTS");
 		STATBIT(TIOCM_CTS, "|CTS");
 		INFOBIT(TIOCM_DTR, "|DTR");
 		STATBIT(TIOCM_DSR, "|DSR");
 		STATBIT(TIOCM_CAR, "|CD");
 		STATBIT(TIOCM_RNG, "|RI");
 		if (stat_buf[0])
 			stat_buf[0] = ' ';
 		strcat(stat_buf, "\n");
 		ret += sprintf(buf + ret, stat_buf);
 	} else {
 		strcat(buf, "\n");
 		ret++;
 	}
 #undef STATBIT
 #undef INFOBIT
 	return ret;
 }
 static int uart_read_proc(char *page, char **start, off_t off,
 			  int count, int *eof, void *data)
 {
 	struct tty_driver *ttydrv = data;
 	struct uart_driver *drv = ttydrv->driver_state;
 	int i, len = 0, l;
 	off_t begin = 0;
 	len += sprintf(page, "serinfo:1.0 driver%s%s revision:%s\n",
 			"", "", "");
 	for (i = 0; i < drv->nr && len < PAGE_SIZE - 96; i++) {
 		l = uart_line_info(page + len, drv, i);
 		len += l;
 		if (len + begin > off + count)
 			goto done;
 		if (len + begin < off) {
 			begin += len;
 			len = 0;
 		}
 	}
 	*eof = 1;
  done:
 	if (off >= len + begin)
 		return 0;
 	*start = page + (off - begin);
 	return (count < begin + len - off) ? count : (begin + len - off);
 }
 #endif
 #if defined(CONFIG_SERIAL_CORE_CONSOLE) || defined(CONFIG_CONSOLE_POLL)
 /*
  *	uart_console_write - write a console message to a serial port
  *	@port: the port to write the message
  *	@s: array of characters
  *	@count: number of characters in string to write
  *	@write: function to write character to port
  */
 void uart_console_write(struct uart_port *port, const char *s,
 			unsigned int count,
 			void (*putchar)(struct uart_port *, int))
 {
 	unsigned int i;
 	for (i = 0; i < count; i++, s++) {
 		if (*s == '\n')
 			putchar(port, '\r');
 		putchar(port, *s);
 	}
 }
 EXPORT_SYMBOL_GPL(uart_console_write);
 /*
  *	Check whether an invalid uart number has been specified, and
  *	if so, search for the first available port that does have
  *	console support.
  */
 struct uart_port * __init
 uart_get_console(struct uart_port *ports, int nr, struct console *co)
 {
 	int idx = co->index;
 	if (idx < 0 || idx >= nr || (ports[idx].iobase == 0 &&
 				     ports[idx].membase == NULL))
 		for (idx = 0; idx < nr; idx++)
 			if (ports[idx].iobase != 0 ||
 			    ports[idx].membase != NULL)
 				break;
 	co->index = idx;
 	return ports + idx;
 }
 /**
  *	uart_parse_options - Parse serial port baud/parity/bits/flow contro.
  *	@options: pointer to option string
  *	@baud: pointer to an 'int' variable for the baud rate.
  *	@parity: pointer to an 'int' variable for the parity.
  *	@bits: pointer to an 'int' variable for the number of data bits.
  *	@flow: pointer to an 'int' variable for the flow control character.
  *
  *	uart_parse_options decodes a string containing the serial console
  *	options.  The format of the string is <baud><parity><bits><flow>,
  *	eg: 115200n8r
  */
 void
 uart_parse_options(char *options, int *baud, int *parity, int *bits, int *flow)
 {
 	char *s = options;
 	*baud = simple_strtoul(s, NULL, 10);
 	while (*s >= '0' && *s <= '9')
 		s++;
 	if (*s)
 		*parity = *s++;
 	if (*s)
 		*bits = *s++ - '0';
 	if (*s)
 		*flow = *s;
 }
 EXPORT_SYMBOL_GPL(uart_parse_options);
 struct baud_rates {
 	unsigned int rate;
 	unsigned int cflag;
 };
 static const struct baud_rates baud_rates[] = {
 	{ 921600, B921600 },
 	{ 460800, B460800 },
 	{ 230400, B230400 },
 	{ 115200, B115200 },
 	{  57600, B57600  },
 	{  38400, B38400  },
 	{  19200, B19200  },
 	{   9600, B9600   },
 	{   4800, B4800   },
 	{   2400, B2400   },
 	{   1200, B1200   },
 	{      0, B38400  }
 };
 /**
  *	uart_set_options - setup the serial console parameters
  *	@port: pointer to the serial ports uart_port structure
  *	@co: console pointer
  *	@baud: baud rate
  *	@parity: parity character - 'n' (none), 'o' (odd), 'e' (even)
  *	@bits: number of data bits
  *	@flow: flow control character - 'r' (rts)
  */
 int
 uart_set_options(struct uart_port *port, struct console *co,
 		 int baud, int parity, int bits, int flow)
 {
 	struct ktermios termios;
 	static struct ktermios dummy;
 	int i;
 	/*
 	 * Ensure that the serial console lock is initialised
 	 * early.
 	 */
 	spin_lock_init(&port->lock);
 	lockdep_set_class(&port->lock, &port_lock_key);
 	memset(&termios, 0, sizeof(struct ktermios));
 	termios.c_cflag = CREAD | HUPCL | CLOCAL;
 	/*
 	 * Construct a cflag setting.
 	 */
 	for (i = 0; baud_rates[i].rate; i++)
 		if (baud_rates[i].rate <= baud)
 			break;
 	termios.c_cflag |= baud_rates[i].cflag;
 	if (bits == 7)
 		termios.c_cflag |= CS7;
 	else
 		termios.c_cflag |= CS8;
 	switch (parity) {
 	case 'o': case 'O':
 		termios.c_cflag |= PARODD;
 		/*fall through*/
 	case 'e': case 'E':
 		termios.c_cflag |= PARENB;
 		break;
 	}
 	if (flow == 'r')
 		termios.c_cflag |= CRTSCTS;
 	/*
 	 * some uarts on other side don't support no flow control.
 	 * So we set * DTR in host uart to make them happy
 	 */
 	port->mctrl |= TIOCM_DTR;
 	port->ops->set_termios(port, &termios, &dummy);
 	/*
 	 * Allow the setting of the UART parameters with a NULL console
 	 * too:
 	 */
 	if (co)
 		co->cflag = termios.c_cflag;
 	return 0;
 }
 EXPORT_SYMBOL_GPL(uart_set_options);
 #endif /* CONFIG_SERIAL_CORE_CONSOLE */
 static void uart_change_pm(struct uart_state *state, int pm_state)
 {
 	struct uart_port *port = state->port;
 	if (state->pm_state != pm_state) {
 		if (port->ops->pm)
 			port->ops->pm(port, pm_state, state->pm_state);
 		state->pm_state = pm_state;
 	}
 }
 struct uart_match {
 	struct uart_port *port;
 	struct uart_driver *driver;
 };
 static int serial_match_port(struct device *dev, void *data)
 {
 	struct uart_match *match = data;
 	struct tty_driver *tty_drv = match->driver->tty_driver;
 	dev_t devt = MKDEV(tty_drv->major, tty_drv->minor_start) +
 		match->port->line;
 	return dev->devt == devt; /* Actually, only one tty per port */
 }
 int uart_suspend_port(struct uart_driver *drv, struct uart_port *port)
 {
 	struct uart_state *state = drv->state + port->line;
 	struct device *tty_dev;
 	struct uart_match match = {port, drv};
 	mutex_lock(&state->mutex);
 	if (!console_suspend_enabled && uart_console(port)) {
 		/* we're going to avoid suspending serial console */
 		mutex_unlock(&state->mutex);
 		return 0;
 	}
 	tty_dev = device_find_child(port->dev, &match, serial_match_port);
 	if (device_may_wakeup(tty_dev)) {
 		enable_irq_wake(port->irq);
 		put_device(tty_dev);
 		mutex_unlock(&state->mutex);
 		return 0;
 	}
 	port->suspended = 1;
 	if (state->info.flags & UIF_INITIALIZED) {
 		const struct uart_ops *ops = port->ops;
 		int tries;
 		state->info.flags = (state->info.flags & ~UIF_INITIALIZED)
 				     | UIF_SUSPENDED;
 		spin_lock_irq(&port->lock);
 		ops->stop_tx(port);
 		ops->set_mctrl(port, 0);
 		ops->stop_rx(port);
 		spin_unlock_irq(&port->lock);
 		/*
 		 * Wait for the transmitter to empty.
 		 */
 		for (tries = 3; !ops->tx_empty(port) && tries; tries--)
 			msleep(10);
 		if (!tries)
 			printk(KERN_ERR "%s%s%s%d: Unable to drain "
 					"transmitter\n",
 			       port->dev ? port->dev->bus_id : "",
 			       port->dev ? ": " : "",
 			       drv->dev_name,
 			       drv->tty_driver->name_base + port->line);
 		ops->shutdown(port);
 	}
 	/*
 	 * Disable the console device before suspending.
 	 */
 	if (uart_console(port))
 		console_stop(port->cons);
 	uart_change_pm(state, 3);
 	mutex_unlock(&state->mutex);
 	return 0;
 }
 int uart_resume_port(struct uart_driver *drv, struct uart_port *port)
 {
 	struct uart_state *state = drv->state + port->line;
 	struct device *tty_dev;
 	struct uart_match match = {port, drv};
 	mutex_lock(&state->mutex);
 	if (!console_suspend_enabled && uart_console(port)) {
 		/* no need to resume serial console, it wasn't suspended */
 		mutex_unlock(&state->mutex);
 		return 0;
 	}
 	tty_dev = device_find_child(port->dev, &match, serial_match_port);
 	if (!port->suspended && device_may_wakeup(tty_dev)) {
 		disable_irq_wake(port->irq);
 		mutex_unlock(&state->mutex);
 		return 0;
 	}
 	port->suspended = 0;
 	/*
 	 * Re-enable the console device after suspending.
 	 */
 	if (uart_console(port)) {
 		struct ktermios termios;
 		/*
 		 * First try to use the console cflag setting.
 		 */
 		memset(&termios, 0, sizeof(struct ktermios));
 		termios.c_cflag = port->cons->cflag;
 		/*
 		 * If that's unset, use the tty termios setting.
 		 */
 		if (state->info.port.tty && termios.c_cflag == 0)
 			termios = *state->info.port.tty->termios;
 		uart_change_pm(state, 0);
 		port->ops->set_termios(port, &termios, NULL);
 		console_start(port->cons);
 	}
 	if (state->info.flags & UIF_SUSPENDED) {
 		const struct uart_ops *ops = port->ops;
 		int ret;
 		uart_change_pm(state, 0);
 		spin_lock_irq(&port->lock);
 		ops->set_mctrl(port, 0);
 		spin_unlock_irq(&port->lock);
 		ret = ops->startup(port);
 		if (ret == 0) {
 			uart_change_speed(state, NULL);
 			spin_lock_irq(&port->lock);
 			ops->set_mctrl(port, port->mctrl);
 			ops->start_tx(port);
 			spin_unlock_irq(&port->lock);
 			state->info.flags |= UIF_INITIALIZED;
 		} else {
 			/*
 			 * Failed to resume - maybe hardware went away?
 			 * Clear the "initialized" flag so we won't try
 			 * to call the low level drivers shutdown method.
 			 */
 			uart_shutdown(state);
 		}
 		state->info.flags &= ~UIF_SUSPENDED;
 	}
 	mutex_unlock(&state->mutex);
 	return 0;
 }
 static inline void
 uart_report_port(struct uart_driver *drv, struct uart_port *port)
 {
 	char address[64];
 	switch (port->iotype) {
 	case UPIO_PORT:
 		snprintf(address, sizeof(address), "I/O 0x%lx", port->iobase);
 		break;
 	case UPIO_HUB6:
 		snprintf(address, sizeof(address),
 			 "I/O 0x%lx offset 0x%x", port->iobase, port->hub6);
 		break;
 	case UPIO_MEM:
 	case UPIO_MEM32:
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_DWAPB:
 		snprintf(address, sizeof(address),
 			 "MMIO 0x%llx", (unsigned long long)port->mapbase);
 		break;
 	default:
 		strlcpy(address, "*unknown*", sizeof(address));
 		break;
 	}
 	printk(KERN_INFO "%s%s%s%d at %s (irq = %d) is a %s\n",
 	       port->dev ? port->dev->bus_id : "",
 	       port->dev ? ": " : "",
 	       drv->dev_name,
 	       drv->tty_driver->name_base + port->line,
 	       address, port->irq, uart_type(port));
 }
 static void
 uart_configure_port(struct uart_driver *drv, struct uart_state *state,
 		    struct uart_port *port)
 {
 	unsigned int flags;
 	/*
 	 * If there isn't a port here, don't do anything further.
 	 */
 	if (!port->iobase && !port->mapbase && !port->membase)
 		return;
 	/*
 	 * Now do the auto configuration stuff.  Note that config_port
 	 * is expected to claim the resources and map the port for us.
 	 */
-	flags = UART_CONFIG_TYPE;
+	flags = 0;
 	if (port->flags & UPF_AUTO_IRQ)
 		flags |= UART_CONFIG_IRQ;
 	if (port->flags & UPF_BOOT_AUTOCONF) {
-		port->type = PORT_UNKNOWN;
+		if (!(port->flags & UPF_FIXED_TYPE)) {
+			port->type = PORT_UNKNOWN;
+			flags |= UART_CONFIG_TYPE;
+		}
 		port->ops->config_port(port, flags);
 	}
 	if (port->type != PORT_UNKNOWN) {
 		unsigned long flags;
 		uart_report_port(drv, port);
 		/* Power up port for set_mctrl() */
 		uart_change_pm(state, 0);
 		/*
 		 * Ensure that the modem control lines are de-activated.
 		 * keep the DTR setting that is set in uart_set_options()
 		 * We probably don't need a spinlock around this, but
 		 */
 		spin_lock_irqsave(&port->lock, flags);
 		port->ops->set_mctrl(port, port->mctrl & TIOCM_DTR);
 		spin_unlock_irqrestore(&port->lock, flags);
 		/*
 		 * If this driver supports console, and it hasn't been
 		 * successfully registered yet, try to re-register it.
 		 * It may be that the port was not available.
 		 */
 		if (port->cons && !(port->cons->flags & CON_ENABLED))
 			register_console(port->cons);
 		/*
 		 * Power down all ports by default, except the
 		 * console if we have one.
 		 */
 		if (!uart_console(port))
 			uart_change_pm(state, 3);
 	}
 }
 #ifdef CONFIG_CONSOLE_POLL
 static int uart_poll_init(struct tty_driver *driver, int line, char *options)
 {
 	struct uart_driver *drv = driver->driver_state;
 	struct uart_state *state = drv->state + line;
 	struct uart_port *port;
 	int baud = 9600;
 	int bits = 8;
 	int parity = 'n';
 	int flow = 'n';
 	if (!state || !state->port)
 		return -1;
 	port = state->port;
 	if (!(port->ops->poll_get_char && port->ops->poll_put_char))
 		return -1;
 	if (options) {
 		uart_parse_options(options, &baud, &parity, &bits, &flow);
 		return uart_set_options(port, NULL, baud, parity, bits, flow);
 	}
 	return 0;
 }
 static int uart_poll_get_char(struct tty_driver *driver, int line)
 {
 	struct uart_driver *drv = driver->driver_state;
 	struct uart_state *state = drv->state + line;
 	struct uart_port *port;
 	if (!state || !state->port)
 		return -1;
 	port = state->port;
 	return port->ops->poll_get_char(port);
 }
 static void uart_poll_put_char(struct tty_driver *driver, int line, char ch)
 {
 	struct uart_driver *drv = driver->driver_state;
 	struct uart_state *state = drv->state + line;
 	struct uart_port *port;
 	if (!state || !state->port)
 		return;
 	port = state->port;
 	port->ops->poll_put_char(port, ch);
 }
 #endif
 static const struct tty_operations uart_ops = {
 	.open		= uart_open,
 	.close		= uart_close,
 	.write		= uart_write,
 	.put_char	= uart_put_char,
 	.flush_chars	= uart_flush_chars,
 	.write_room	= uart_write_room,
 	.chars_in_buffer= uart_chars_in_buffer,
 	.flush_buffer	= uart_flush_buffer,
 	.ioctl		= uart_ioctl,
 	.throttle	= uart_throttle,
 	.unthrottle	= uart_unthrottle,
 	.send_xchar	= uart_send_xchar,
 	.set_termios	= uart_set_termios,
 	.set_ldisc	= uart_set_ldisc,
 	.stop		= uart_stop,
 	.start		= uart_start,
 	.hangup		= uart_hangup,
 	.break_ctl	= uart_break_ctl,
 	.wait_until_sent= uart_wait_until_sent,
 #ifdef CONFIG_PROC_FS
 	.read_proc	= uart_read_proc,
 #endif
 	.tiocmget	= uart_tiocmget,
 	.tiocmset	= uart_tiocmset,
 #ifdef CONFIG_CONSOLE_POLL
 	.poll_init	= uart_poll_init,
 	.poll_get_char	= uart_poll_get_char,
 	.poll_put_char	= uart_poll_put_char,
 #endif
 };
 /**
  *	uart_register_driver - register a driver with the uart core layer
  *	@drv: low level driver structure
  *
  *	Register a uart driver with the core driver.  We in turn register
  *	with the tty layer, and initialise the core driver per-port state.
  *
  *	We have a proc file in /proc/tty/driver which is named after the
  *	normal driver.
  *
  *	drv->port should be NULL, and the per-port structures should be
  *	registered using uart_add_one_port after this call has succeeded.
  */
 int uart_register_driver(struct uart_driver *drv)
 {
 	struct tty_driver *normal = NULL;
 	int i, retval;
 	BUG_ON(drv->state);
 	/*
 	 * Maybe we should be using a slab cache for this, especially if
 	 * we have a large number of ports to handle.
 	 */
 	drv->state = kzalloc(sizeof(struct uart_state) * drv->nr, GFP_KERNEL);
 	retval = -ENOMEM;
 	if (!drv->state)
 		goto out;
 	normal  = alloc_tty_driver(drv->nr);
 	if (!normal)
 		goto out;
 	drv->tty_driver = normal;
 	normal->owner		= drv->owner;
 	normal->driver_name	= drv->driver_name;
 	normal->name		= drv->dev_name;
 	normal->major		= drv->major;
 	normal->minor_start	= drv->minor;
 	normal->type		= TTY_DRIVER_TYPE_SERIAL;
 	normal->subtype		= SERIAL_TYPE_NORMAL;
 	normal->init_termios	= tty_std_termios;
 	normal->init_termios.c_cflag = B9600 | CS8 | CREAD | HUPCL | CLOCAL;
 	normal->init_termios.c_ispeed = normal->init_termios.c_ospeed = 9600;
 	normal->flags		= TTY_DRIVER_REAL_RAW | TTY_DRIVER_DYNAMIC_DEV;
 	normal->driver_state    = drv;
 	tty_set_operations(normal, &uart_ops);
 	/*
 	 * Initialise the UART state(s).
 	 */
 	for (i = 0; i < drv->nr; i++) {
 		struct uart_state *state = drv->state + i;
 		state->close_delay     = 500;	/* .5 seconds */
 		state->closing_wait    = 30000;	/* 30 seconds */
 		mutex_init(&state->mutex);
 		tty_port_init(&state->info.port);
 		init_waitqueue_head(&state->info.delta_msr_wait);
 		tasklet_init(&state->info.tlet, uart_tasklet_action,
 			     (unsigned long)state);
 	}
 	retval = tty_register_driver(normal);
  out:
 	if (retval < 0) {
 		put_tty_driver(normal);
 		kfree(drv->state);
 	}
 	return retval;
 }
 /**
  *	uart_unregister_driver - remove a driver from the uart core layer
  *	@drv: low level driver structure
  *
  *	Remove all references to a driver from the core driver.  The low
  *	level driver must have removed all its ports via the
  *	uart_remove_one_port() if it registered them with uart_add_one_port().
  *	(ie, drv->port == NULL)
  */
 void uart_unregister_driver(struct uart_driver *drv)
 {
 	struct tty_driver *p = drv->tty_driver;
 	tty_unregister_driver(p);
 	put_tty_driver(p);
 	kfree(drv->state);
 	drv->tty_driver = NULL;
 }
 struct tty_driver *uart_console_device(struct console *co, int *index)
 {
 	struct uart_driver *p = co->data;
 	*index = co->index;
 	return p->tty_driver;
 }
 /**
  *	uart_add_one_port - attach a driver-defined port structure
  *	@drv: pointer to the uart low level driver structure for this port
  *	@port: uart port structure to use for this port.
  *
  *	This allows the driver to register its own uart_port structure
  *	with the core driver.  The main purpose is to allow the low
  *	level uart drivers to expand uart_port, rather than having yet
  *	more levels of structures.
  */
 int uart_add_one_port(struct uart_driver *drv, struct uart_port *port)
 {
 	struct uart_state *state;
 	int ret = 0;
 	struct device *tty_dev;
 	BUG_ON(in_interrupt());
 	if (port->line >= drv->nr)
 		return -EINVAL;
 	state = drv->state + port->line;
 	mutex_lock(&port_mutex);
 	mutex_lock(&state->mutex);
 	if (state->port) {
 		ret = -EINVAL;
 		goto out;
 	}
 	state->port = port;
 	state->pm_state = -1;
 	port->cons = drv->cons;
 	port->info = &state->info;
 	/*
 	 * If this port is a console, then the spinlock is already
 	 * initialised.
 	 */
 	if (!(uart_console(port) && (port->cons->flags & CON_ENABLED))) {
 		spin_lock_init(&port->lock);
 		lockdep_set_class(&port->lock, &port_lock_key);
 	}
 	uart_configure_port(drv, state, port);
 	/*
 	 * Register the port whether it's detected or not.  This allows
 	 * setserial to be used to alter this ports parameters.
 	 */
 	tty_dev = tty_register_device(drv->tty_driver, port->line, port->dev);
 	if (likely(!IS_ERR(tty_dev))) {
 		device_init_wakeup(tty_dev, 1);
 		device_set_wakeup_enable(tty_dev, 0);
 	} else
 		printk(KERN_ERR "Cannot register tty device on line %d\n",
 		       port->line);
 	/*
 	 * Ensure UPF_DEAD is not set.
 	 */
 	port->flags &= ~UPF_DEAD;
  out:
 	mutex_unlock(&state->mutex);
 	mutex_unlock(&port_mutex);
 	return ret;
 }
 /**
  *	uart_remove_one_port - detach a driver defined port structure
  *	@drv: pointer to the uart low level driver structure for this port
  *	@port: uart port structure for this port
  *
  *	This unhooks (and hangs up) the specified port structure from the
  *	core driver.  No further calls will be made to the low-level code
  *	for this port.
  */
 int uart_remove_one_port(struct uart_driver *drv, struct uart_port *port)
 {
 	struct uart_state *state = drv->state + port->line;
 	struct uart_info *info;
 	BUG_ON(in_interrupt());
 	if (state->port != port)
 		printk(KERN_ALERT "Removing wrong port: %p != %p\n",
 			state->port, port);
 	mutex_lock(&port_mutex);
 	/*
 	 * Mark the port "dead" - this prevents any opens from
 	 * succeeding while we shut down the port.
 	 */
 	mutex_lock(&state->mutex);
 	port->flags |= UPF_DEAD;
 	mutex_unlock(&state->mutex);
 	/*
 	 * Remove the devices from the tty layer
 	 */
 	tty_unregister_device(drv->tty_driver, port->line);
 	info = &state->info;
 	if (info && info->port.tty)
 		tty_vhangup(info->port.tty);
 	/*
 	 * Free the port IO and memory resources, if any.
 	 */
 	if (port->type != PORT_UNKNOWN)
 		port->ops->release_port(port);
 	/*
 	 * Indicate that there isn't a port here anymore.
 	 */
 	port->type = PORT_UNKNOWN;
 	/*
 	 * Kill the tasklet, and free resources.
 	 */
 	if (info)
 		tasklet_kill(&info->tlet);
 	state->port = NULL;
 	mutex_unlock(&port_mutex);
 	return 0;
 }
 /*
  *	Are the two ports equivalent?
  */
 int uart_match_port(struct uart_port *port1, struct uart_port *port2)
 {
 	if (port1->iotype != port2->iotype)
 		return 0;
 	switch (port1->iotype) {
 	case UPIO_PORT:
 		return (port1->iobase == port2->iobase);
 	case UPIO_HUB6:
 		return (port1->iobase == port2->iobase) &&
 		       (port1->hub6   == port2->hub6);
 	case UPIO_MEM:
 	case UPIO_MEM32:
 	case UPIO_AU:
 	case UPIO_TSI:
 	case UPIO_DWAPB:
 		return (port1->mapbase == port2->mapbase);
 	}
 	return 0;
 }
 EXPORT_SYMBOL(uart_match_port);
 EXPORT_SYMBOL(uart_write_wakeup);
 EXPORT_SYMBOL(uart_register_driver);
 EXPORT_SYMBOL(uart_unregister_driver);
 EXPORT_SYMBOL(uart_suspend_port);
 EXPORT_SYMBOL(uart_resume_port);
 EXPORT_SYMBOL(uart_add_one_port);
 EXPORT_SYMBOL(uart_remove_one_port);
 MODULE_DESCRIPTION("Serial driver core");
 MODULE_LICENSE("GPL");

 /*
  *  linux/include/linux/serial_8250.h
  *
  *  Copyright (C) 2004 Russell King
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  */
 #ifndef _LINUX_SERIAL_8250_H
 #define _LINUX_SERIAL_8250_H
 #include <linux/serial_core.h>
 #include <linux/platform_device.h>
 /*
  * This is the platform device platform_data structure
  */
 struct plat_serial8250_port {
 	unsigned long	iobase;		/* io base address */
 	void __iomem	*membase;	/* ioremap cookie or NULL */
 	resource_size_t	mapbase;	/* resource base */
 	unsigned int	irq;		/* interrupt number */
 	unsigned int	uartclk;	/* UART clock rate */
 	void            *private_data;
 	unsigned char	regshift;	/* register shift */
 	unsigned char	iotype;		/* UPIO_* */
 	unsigned char	hub6;
 	upf_t		flags;		/* UPF_* flags */
+	unsigned int	type;		/* If UPF_FIXED_TYPE */
 	unsigned int	(*serial_in)(struct uart_port *, int);
 	void		(*serial_out)(struct uart_port *, int, int);
 };
 /*
  * Allocate 8250 platform device IDs.  Nothing is implied by
  * the numbering here, except for the legacy entry being -1.
  */
 enum {
 	PLAT8250_DEV_LEGACY = -1,
 	PLAT8250_DEV_PLATFORM,
 	PLAT8250_DEV_PLATFORM1,
 	PLAT8250_DEV_PLATFORM2,
 	PLAT8250_DEV_FOURPORT,
 	PLAT8250_DEV_ACCENT,
 	PLAT8250_DEV_BOCA,
 	PLAT8250_DEV_EXAR_ST16C554,
 	PLAT8250_DEV_HUB6,
 	PLAT8250_DEV_MCA,
 	PLAT8250_DEV_AU1X00,
 	PLAT8250_DEV_SM501,
 };
 /*
  * This should be used by drivers which want to register
  * their own 8250 ports without registering their own
  * platform device.  Using these will make your driver
  * dependent on the 8250 driver.
  */
 struct uart_port;
 int serial8250_register_port(struct uart_port *);
 void serial8250_unregister_port(int line);
 void serial8250_suspend_port(int line);
 void serial8250_resume_port(int line);
 extern int early_serial_setup(struct uart_port *port);
 extern int serial8250_find_port(struct uart_port *p);
 extern int serial8250_find_port_for_earlycon(void);
 extern int setup_early_serial8250_console(char *cmdline);
 #endif

 /*
  *  linux/drivers/char/serial_core.h
  *
  *  Copyright (C) 2000 Deep Blue Solutions Ltd.
  *
  * This program is free software; you can redistribute it and/or modify
  * it under the terms of the GNU General Public License as published by
  * the Free Software Foundation; either version 2 of the License, or
  * (at your option) any later version.
  *
  * This program is distributed in the hope that it will be useful,
  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  * GNU General Public License for more details.
  *
  * You should have received a copy of the GNU General Public License
  * along with this program; if not, write to the Free Software
  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307  USA
  */
 #ifndef LINUX_SERIAL_CORE_H
 #define LINUX_SERIAL_CORE_H
 /*
  * The type definitions.  These are from Ted Ts'o's serial.h
  */
 #define PORT_UNKNOWN	0
 #define PORT_8250	1
 #define PORT_16450	2
 #define PORT_16550	3
 #define PORT_16550A	4
 #define PORT_CIRRUS	5
 #define PORT_16650	6
 #define PORT_16650V2	7
 #define PORT_16750	8
 #define PORT_STARTECH	9
 #define PORT_16C950	10
 #define PORT_16654	11
 #define PORT_16850	12
 #define PORT_RSA	13
 #define PORT_NS16550A	14
 #define PORT_XSCALE	15
 #define PORT_RM9000	16	/* PMC-Sierra RM9xxx internal UART */
 #define PORT_MAX_8250	16	/* max port ID */
 /*
  * ARM specific type numbers.  These are not currently guaranteed
  * to be implemented, and will change in the future.  These are
  * separate so any additions to the old serial.c that occur before
  * we are merged can be easily merged here.
  */
 #define PORT_PXA	31
 #define PORT_AMBA	32
 #define PORT_CLPS711X	33
 #define PORT_SA1100	34
 #define PORT_UART00	35
 #define PORT_21285	37
 /* Sparc type numbers.  */
 #define PORT_SUNZILOG	38
 #define PORT_SUNSAB	39
 /* DEC */
 #define PORT_DZ		46
 #define PORT_ZS		47
 /* Parisc type numbers. */
 #define PORT_MUX	48
 /* Atmel AT91 / AT32 SoC */
 #define PORT_ATMEL	49
 /* Macintosh Zilog type numbers */
 #define PORT_MAC_ZILOG	50	/* m68k : not yet implemented */
 #define PORT_PMAC_ZILOG	51
 /* SH-SCI */
 #define PORT_SCI	52
 #define PORT_SCIF	53
 #define PORT_IRDA	54
 /* Samsung S3C2410 SoC and derivatives thereof */
 #define PORT_S3C2410    55
 /* SGI IP22 aka Indy / Challenge S / Indigo 2 */
 #define PORT_IP22ZILOG	56
 /* Sharp LH7a40x -- an ARM9 SoC series */
 #define PORT_LH7A40X	57
 /* PPC CPM type number */
 #define PORT_CPM        58
 /* MPC52xx type numbers */
 #define PORT_MPC52xx	59
 /* IBM icom */
 #define PORT_ICOM	60
 /* Samsung S3C2440 SoC */
 #define PORT_S3C2440	61
 /* Motorola i.MX SoC */
 #define PORT_IMX	62
 /* Marvell MPSC */
 #define PORT_MPSC	63
 /* TXX9 type number */
 #define PORT_TXX9	64
 /* NEC VR4100 series SIU/DSIU */
 #define PORT_VR41XX_SIU		65
 #define PORT_VR41XX_DSIU	66
 /* Samsung S3C2400 SoC */
 #define PORT_S3C2400	67
 /* M32R SIO */
 #define PORT_M32R_SIO	68
 /*Digi jsm */
 #define PORT_JSM        69
 #define PORT_PNX8XXX	70
 /* Hilscher netx */
 #define PORT_NETX	71
 /* SUN4V Hypervisor Console */
 #define PORT_SUNHV	72
 #define PORT_S3C2412	73
 /* Xilinx uartlite */
 #define PORT_UARTLITE	74
 /* Blackfin bf5xx */
 #define PORT_BFIN	75
 /* Micrel KS8695 */
 #define PORT_KS8695	76
 /* Broadcom SB1250, etc. SOC */
 #define PORT_SB1250_DUART	77
 /* Freescale ColdFire */
 #define PORT_MCF	78
 /* Blackfin SPORT */
 #define PORT_BFIN_SPORT		79
 /* MN10300 on-chip UART numbers */
 #define PORT_MN10300		80
 #define PORT_MN10300_CTS	81
 #define PORT_SC26XX	82
 /* SH-SCI */
 #define PORT_SCIFA	83
 #define PORT_S3C6400	84
 #ifdef __KERNEL__
 #include <linux/compiler.h>
 #include <linux/interrupt.h>
 #include <linux/circ_buf.h>
 #include <linux/spinlock.h>
 #include <linux/sched.h>
 #include <linux/tty.h>
 #include <linux/mutex.h>
 #include <linux/sysrq.h>
 struct uart_port;
 struct uart_info;
 struct serial_struct;
 struct device;
 /*
  * This structure describes all the operations that can be
  * done on the physical hardware.
  */
 struct uart_ops {
 	unsigned int	(*tx_empty)(struct uart_port *);
 	void		(*set_mctrl)(struct uart_port *, unsigned int mctrl);
 	unsigned int	(*get_mctrl)(struct uart_port *);
 	void		(*stop_tx)(struct uart_port *);
 	void		(*start_tx)(struct uart_port *);
 	void		(*send_xchar)(struct uart_port *, char ch);
 	void		(*stop_rx)(struct uart_port *);
 	void		(*enable_ms)(struct uart_port *);
 	void		(*break_ctl)(struct uart_port *, int ctl);
 	int		(*startup)(struct uart_port *);
 	void		(*shutdown)(struct uart_port *);
 	void		(*flush_buffer)(struct uart_port *);
 	void		(*set_termios)(struct uart_port *, struct ktermios *new,
 				       struct ktermios *old);
 	void		(*set_ldisc)(struct uart_port *);
 	void		(*pm)(struct uart_port *, unsigned int state,
 			      unsigned int oldstate);
 	int		(*set_wake)(struct uart_port *, unsigned int state);
 	/*
 	 * Return a string describing the type of the port
 	 */
 	const char *(*type)(struct uart_port *);
 	/*
 	 * Release IO and memory resources used by the port.
 	 * This includes iounmap if necessary.
 	 */
 	void		(*release_port)(struct uart_port *);
 	/*
 	 * Request IO and memory resources used by the port.
 	 * This includes iomapping the port if necessary.
 	 */
 	int		(*request_port)(struct uart_port *);
 	void		(*config_port)(struct uart_port *, int);
 	int		(*verify_port)(struct uart_port *, struct serial_struct *);
 	int		(*ioctl)(struct uart_port *, unsigned int, unsigned long);
 #ifdef CONFIG_CONSOLE_POLL
 	void	(*poll_put_char)(struct uart_port *, unsigned char);
 	int		(*poll_get_char)(struct uart_port *);
 #endif
 };
 #define UART_CONFIG_TYPE	(1 << 0)
 #define UART_CONFIG_IRQ		(1 << 1)
 struct uart_icount {
 	__u32	cts;
 	__u32	dsr;
 	__u32	rng;
 	__u32	dcd;
 	__u32	rx;
 	__u32	tx;
 	__u32	frame;
 	__u32	overrun;
 	__u32	parity;
 	__u32	brk;
 	__u32	buf_overrun;
 };
 typedef unsigned int __bitwise__ upf_t;
 struct uart_port {
 	spinlock_t		lock;			/* port lock */
 	unsigned long		iobase;			/* in/out[bwl] */
 	unsigned char __iomem	*membase;		/* read/write[bwl] */
 	unsigned int		(*serial_in)(struct uart_port *, int);
 	void			(*serial_out)(struct uart_port *, int, int);
 	unsigned int		irq;			/* irq number */
 	unsigned int		uartclk;		/* base uart clock */
 	unsigned int		fifosize;		/* tx fifo size */
 	unsigned char		x_char;			/* xon/xoff char */
 	unsigned char		regshift;		/* reg offset shift */
 	unsigned char		iotype;			/* io access style */
 	unsigned char		unused1;
 #define UPIO_PORT		(0)
 #define UPIO_HUB6		(1)
 #define UPIO_MEM		(2)
 #define UPIO_MEM32		(3)
 #define UPIO_AU			(4)			/* Au1x00 type IO */
 #define UPIO_TSI		(5)			/* Tsi108/109 type IO */
 #define UPIO_DWAPB		(6)			/* DesignWare APB UART */
 #define UPIO_RM9000		(7)			/* RM9000 type IO */
 	unsigned int		read_status_mask;	/* driver specific */
 	unsigned int		ignore_status_mask;	/* driver specific */
 	struct uart_info	*info;			/* pointer to parent info */
 	struct uart_icount	icount;			/* statistics */
 	struct console		*cons;			/* struct console, if any */
 #ifdef CONFIG_SERIAL_CORE_CONSOLE
 	unsigned long		sysrq;			/* sysrq timeout */
 #endif
 	upf_t			flags;
 #define UPF_FOURPORT		((__force upf_t) (1 << 1))
 #define UPF_SAK			((__force upf_t) (1 << 2))
 #define UPF_SPD_MASK		((__force upf_t) (0x1030))
 #define UPF_SPD_HI		((__force upf_t) (0x0010))
 #define UPF_SPD_VHI		((__force upf_t) (0x0020))
 #define UPF_SPD_CUST		((__force upf_t) (0x0030))
 #define UPF_SPD_SHI		((__force upf_t) (0x1000))
 #define UPF_SPD_WARP		((__force upf_t) (0x1010))
 #define UPF_SKIP_TEST		((__force upf_t) (1 << 6))
 #define UPF_AUTO_IRQ		((__force upf_t) (1 << 7))
 #define UPF_HARDPPS_CD		((__force upf_t) (1 << 11))
 #define UPF_LOW_LATENCY		((__force upf_t) (1 << 13))
 #define UPF_BUGGY_UART		((__force upf_t) (1 << 14))
 #define UPF_MAGIC_MULTIPLIER	((__force upf_t) (1 << 16))
 #define UPF_CONS_FLOW		((__force upf_t) (1 << 23))
 #define UPF_SHARE_IRQ		((__force upf_t) (1 << 24))
+/* The exact UART type is known and should not be probed.  */
+#define UPF_FIXED_TYPE		((__force upf_t) (1 << 27))
 #define UPF_BOOT_AUTOCONF	((__force upf_t) (1 << 28))
 #define UPF_FIXED_PORT		((__force upf_t) (1 << 29))
 #define UPF_DEAD		((__force upf_t) (1 << 30))
 #define UPF_IOREMAP		((__force upf_t) (1 << 31))
 #define UPF_CHANGE_MASK		((__force upf_t) (0x17fff))
 #define UPF_USR_MASK		((__force upf_t) (UPF_SPD_MASK|UPF_LOW_LATENCY))
 	unsigned int		mctrl;			/* current modem ctrl settings */
 	unsigned int		timeout;		/* character-based timeout */
 	unsigned int		type;			/* port type */
 	const struct uart_ops	*ops;
 	unsigned int		custom_divisor;
 	unsigned int		line;			/* port index */
 	resource_size_t		mapbase;		/* for ioremap */
 	struct device		*dev;			/* parent device */
 	unsigned char		hub6;			/* this should be in the 8250 driver */
 	unsigned char		suspended;
 	unsigned char		unused[2];
 	void			*private_data;		/* generic platform data pointer */
 };
 /*
  * This is the state information which is only valid when the port
  * is open; it may be cleared the core driver once the device has
  * been closed.  Either the low level driver or the core can modify
  * stuff here.
  */
 typedef unsigned int __bitwise__ uif_t;
 struct uart_info {
 	struct tty_port		port;
 	struct circ_buf		xmit;
 	uif_t			flags;
 /*
  * Definitions for info->flags.  These are _private_ to serial_core, and
  * are specific to this structure.  They may be queried by low level drivers.
  *
  * FIXME: use the ASY_ definitions
  */
 #define UIF_CHECK_CD		((__force uif_t) (1 << 25))
 #define UIF_CTS_FLOW		((__force uif_t) (1 << 26))
 #define UIF_NORMAL_ACTIVE	((__force uif_t) (1 << 29))
 #define UIF_INITIALIZED		((__force uif_t) (1 << 31))
 #define UIF_SUSPENDED		((__force uif_t) (1 << 30))
 	struct tasklet_struct	tlet;
 	wait_queue_head_t	delta_msr_wait;
 };
 /*
  * This is the state information which is persistent across opens.
  * The low level driver must not to touch any elements contained
  * within.
  */
 struct uart_state {
 	unsigned int		close_delay;		/* msec */
 	unsigned int		closing_wait;		/* msec */
 #define USF_CLOSING_WAIT_INF	(0)
 #define USF_CLOSING_WAIT_NONE	(~0U)
 	int			count;
 	int			pm_state;
 	struct uart_info	info;
 	struct uart_port	*port;
 	struct mutex		mutex;
 };
 #define UART_XMIT_SIZE	PAGE_SIZE
 /* number of characters left in xmit buffer before we ask for more */
 #define WAKEUP_CHARS		256
 struct module;
 struct tty_driver;
 struct uart_driver {
 	struct module		*owner;
 	const char		*driver_name;
 	const char		*dev_name;
 	int			 major;
 	int			 minor;
 	int			 nr;
 	struct console		*cons;
 	/*
 	 * these are private; the low level driver should not
 	 * touch these; they should be initialised to NULL
 	 */
 	struct uart_state	*state;
 	struct tty_driver	*tty_driver;
 };
 void uart_write_wakeup(struct uart_port *port);
 /*
  * Baud rate helpers.
  */
 void uart_update_timeout(struct uart_port *port, unsigned int cflag,
 			 unsigned int baud);
 unsigned int uart_get_baud_rate(struct uart_port *port, struct ktermios *termios,
 				struct ktermios *old, unsigned int min,
 				unsigned int max);
 unsigned int uart_get_divisor(struct uart_port *port, unsigned int baud);
 /*
  * Console helpers.
  */
 struct uart_port *uart_get_console(struct uart_port *ports, int nr,
 				   struct console *c);
 void uart_parse_options(char *options, int *baud, int *parity, int *bits,
 			int *flow);
 int uart_set_options(struct uart_port *port, struct console *co, int baud,
 		     int parity, int bits, int flow);
 struct tty_driver *uart_console_device(struct console *co, int *index);
 void uart_console_write(struct uart_port *port, const char *s,
 			unsigned int count,
 			void (*putchar)(struct uart_port *, int));
 /*
  * Port/driver registration/removal
  */
 int uart_register_driver(struct uart_driver *uart);
 void uart_unregister_driver(struct uart_driver *uart);
 int uart_add_one_port(struct uart_driver *reg, struct uart_port *port);
 int uart_remove_one_port(struct uart_driver *reg, struct uart_port *port);
 int uart_match_port(struct uart_port *port1, struct uart_port *port2);
 /*
  * Power Management
  */
 int uart_suspend_port(struct uart_driver *reg, struct uart_port *port);
 int uart_resume_port(struct uart_driver *reg, struct uart_port *port);
 #define uart_circ_empty(circ)		((circ)->head == (circ)->tail)
 #define uart_circ_clear(circ)		((circ)->head = (circ)->tail = 0)
 #define uart_circ_chars_pending(circ)	\
 	(CIRC_CNT((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 #define uart_circ_chars_free(circ)	\
 	(CIRC_SPACE((circ)->head, (circ)->tail, UART_XMIT_SIZE))
 static inline int uart_tx_stopped(struct uart_port *port)
 {
 	struct tty_struct *tty = port->info->port.tty;
 	if(tty->stopped || tty->hw_stopped)
 		return 1;
 	return 0;
 }
 /*
  * The following are helper functions for the low level drivers.
  */
 static inline int
 uart_handle_sysrq_char(struct uart_port *port, unsigned int ch)
 {
 #ifdef SUPPORT_SYSRQ
 	if (port->sysrq) {
 		if (ch && time_before(jiffies, port->sysrq)) {
 			handle_sysrq(ch, port->info->port.tty);
 			port->sysrq = 0;
 			return 1;
 		}
 		port->sysrq = 0;
 	}
 #endif
 	return 0;
 }
 #ifndef SUPPORT_SYSRQ
 #define uart_handle_sysrq_char(port,ch) uart_handle_sysrq_char(port, 0)
 #endif
 /*
  * We do the SysRQ and SAK checking like this...
  */
 static inline int uart_handle_break(struct uart_port *port)
 {
 	struct uart_info *info = port->info;
 #ifdef SUPPORT_SYSRQ
 	if (port->cons && port->cons->index == port->line) {
 		if (!port->sysrq) {
 			port->sysrq = jiffies + HZ*5;
 			return 1;
 		}
 		port->sysrq = 0;
 	}
 #endif
 	if (port->flags & UPF_SAK)
 		do_SAK(info->port.tty);
 	return 0;
 }
 /**
  *	uart_handle_dcd_change - handle a change of carrier detect state
  *	@port: uart_port structure for the open port
  *	@status: new carrier detect status, nonzero if active
  */
 static inline void
 uart_handle_dcd_change(struct uart_port *port, unsigned int status)
 {
 	struct uart_info *info = port->info;
 	port->icount.dcd++;
 #ifdef CONFIG_HARD_PPS
 	if ((port->flags & UPF_HARDPPS_CD) && status)
 		hardpps();
 #endif
 	if (info->flags & UIF_CHECK_CD) {
 		if (status)
 			wake_up_interruptible(&info->port.open_wait);
 		else if (info->port.tty)
 			tty_hangup(info->port.tty);
 	}
 }
 /**
  *	uart_handle_cts_change - handle a change of clear-to-send state
  *	@port: uart_port structure for the open port
  *	@status: new clear to send status, nonzero if active
  */
 static inline void
 uart_handle_cts_change(struct uart_port *port, unsigned int status)
 {
 	struct uart_info *info = port->info;
 	struct tty_struct *tty = info->port.tty;
 	port->icount.cts++;
 	if (info->flags & UIF_CTS_FLOW) {
 		if (tty->hw_stopped) {
 			if (status) {
 				tty->hw_stopped = 0;
 				port->ops->start_tx(port);
 				uart_write_wakeup(port);
 			}
 		} else {
 			if (!status) {
 				tty->hw_stopped = 1;
 				port->ops->stop_tx(port);
 			}
 		}
 	}
 }
 #include <linux/tty_flip.h>
 static inline void
 uart_insert_char(struct uart_port *port, unsigned int status,
 		 unsigned int overrun, unsigned int ch, unsigned int flag)
 {
 	struct tty_struct *tty = port->info->port.tty;
 	if ((status & port->ignore_status_mask & ~overrun) == 0)
 		tty_insert_flip_char(tty, ch, flag);
 	/*
 	 * Overrun is special.  Since it's reported immediately,
 	 * it doesn't affect the current character.
 	 */
 	if (status & ~port->ignore_status_mask & overrun)
 		tty_insert_flip_char(tty, 0, TTY_OVERRUN);
 }
 /*
  *	UART_ENABLE_MS - determine if port should enable modem status irqs
  */
 #define UART_ENABLE_MS(port,cflag)	((port)->flags & UPF_HARDPPS_CD || \
 					 (cflag) & CRTSCTS || \
 					 !((cflag) & CLOCAL))
 #endif
 #endif /* LINUX_SERIAL_CORE_H */