am335x-pru-uio.dtsi
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&pruss_soc_bus {
uio_pruss_mdio: uio_pruss_mdio@4a332400 {
compatible = "ti,davinci_mdio";
reg = <0x4a332400 0x90>;
clocks = <&dpll_core_m4_ck>;
clock-names = "fck";
bus_freq = <1000000>;
#address-cells = <1>;
#size-cells = <0>;
status = "disabled";
};
uio_pruss_mem: uio_pruss_mem {
compatible = "ti,uio-module-drv";
mem = <0x4a300000 0x2000>,
<0x4a302000 0x2000>,
<0x4a310000 0x3000>,
<0x4a320000 0x2000>,
<0x4a326000 0x2000>,
<0x4a32e000 0x31c>,
<0x4a332000 0x58>;
mem-names = "dram0", "dram1", "shrdram2", "intc", "cfg",
"iep", "mii_rt";
status = "okay";
};
uio_pruss_mem2: uio_pruss_mem2 {
compatible = "ti,uio-module-drv";
mem = <0x4a328000 0xd4>,
<0x4a330000 0x174>,
<0x4a332400 0x90>,
<0x40302000 0x0e000>;
mem-names = "uart", "ecap", "mdio", "ocmc";
status = "okay";
};
uio_pruss_evt0: uio_pruss_evt0 {
compatible = "ti,uio-module-drv";
interrupts = <20>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt1: uio_pruss_evt1 {
compatible = "ti,uio-module-drv";
interrupts = <21>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt2: uio_pruss_evt2 {
compatible = "ti,uio-module-drv";
interrupts = <22>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt3: uio_pruss_evt3 {
compatible = "ti,uio-module-drv";
interrupts = <23>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt4: uio_pruss_evt4 {
compatible = "ti,uio-module-drv";
interrupts = <24>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt5: uio_pruss_evt5 {
compatible = "ti,uio-module-drv";
interrupts = <25>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt6: uio_pruss_evt6 {
compatible = "ti,uio-module-drv";
interrupts = <26>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_evt7: uio_pruss_evt7 {
compatible = "ti,uio-module-drv";
interrupts = <27>;
interrupt-mode = <1>;
status = "okay";
};
uio_pruss_0_mem: uio_pruss_0_mem {
compatible = "ti,uio-module-drv";
mem = <0x4a334000 0x2000>,
<0x4a322000 0x400>,
<0x4a322400 0x100>;
mem-names = "iram", "control", "debug";
status = "okay";
};
uio_pruss_1_mem: uio_pruss_1_mem {
compatible = "ti,uio-module-drv";
mem = <0x4a338000 0x2000>,
<0x4a324000 0x400>,
<0x4a324400 0x100>;
mem-names = "iram", "control", "debug";
status = "okay";
};
};
&am33xx_pinmux {
uio_pruss_mdio_eth_default: uio_pruss_mdio_eht_default {
pinctrl-single,pins = <
AM33XX_IOPAD(0x88c, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_clk.pr1_mdio_mdclk */
AM33XX_IOPAD(0x888, (PIN_INPUT | MUX_MODE5)) /* gpmc_csn3.pr1_mdio_data */
AM33XX_IOPAD(0x89c, (PIN_INPUT_PULLUP | MUX_MODE7)) /* gpmc_ben0_cle.gpio2_5 */
/* disable CPSW MDIO */
AM33XX_IOPAD(0x948, (PIN_INPUT_PULLUP | MUX_MODE7)) /* mdio_data.gpio0_0 */
AM33XX_IOPAD(0x94c, (PIN_INPUT_PULLUP | MUX_MODE7)) /* mdio_clk.gpio0_1 */
AM33XX_IOPAD(0x8a0, (PIN_INPUT | MUX_MODE2)) /* dss_data0.pr1_mii_mt0_clk */
AM33XX_IOPAD(0x8b4, (PIN_OUTPUT | MUX_MODE2)) /* dss_data5.pr1_mii0_txd0 */
AM33XX_IOPAD(0x8b0, (PIN_OUTPUT | MUX_MODE2)) /* dss_data4.pr1_mii0_txd1 */
AM33XX_IOPAD(0x8ac, (PIN_OUTPUT | MUX_MODE2)) /* dss_data3.pr1_mii0_txd2 */
AM33XX_IOPAD(0x8a8, (PIN_OUTPUT | MUX_MODE2)) /* dss_data2.pr1_mii0_txd3 */
AM33XX_IOPAD(0x8cc, (PIN_INPUT | MUX_MODE5)) /* dss_data11.pr1_mii0_rxd0 */
AM33XX_IOPAD(0x8c8, (PIN_INPUT | MUX_MODE5)) /* dss_data10.pr1_mii0_rxd1 */
AM33XX_IOPAD(0x8c4, (PIN_INPUT | MUX_MODE5)) /* dss_data9.pr1_mii0_rxd2 */
AM33XX_IOPAD(0x8c0, (PIN_INPUT | MUX_MODE5)) /* dss_data8.pr1_mii0_rxd3 */
AM33XX_IOPAD(0x8a4, (PIN_OUTPUT | MUX_MODE2)) /* dss_data1.pr1_mii0_txen */
AM33XX_IOPAD(0x8d8, (PIN_INPUT | MUX_MODE5)) /* dss_data14.pr1_mii_mr0_clk */
AM33XX_IOPAD(0x8dc, (PIN_INPUT | MUX_MODE5)) /* dss_data15.pr1_mii0_rxdv */
AM33XX_IOPAD(0x8d4, (PIN_INPUT | MUX_MODE5)) /* dss_data13.pr1_mii0_rxer */
AM33XX_IOPAD(0x8d0, (PIN_INPUT | MUX_MODE5)) /* dss_data12.pr1_mii0_rxlink */
AM33XX_IOPAD(0x8e8, (PIN_INPUT | MUX_MODE2)) /* dss_pclk.pr1_mii0_crs */
AM33XX_IOPAD(0x840, (PIN_INPUT | MUX_MODE5)) /* gpmc_a0.pr1_mii_mt1_clk */
AM33XX_IOPAD(0x850, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_a4.pr1_mii1_txd0 */
AM33XX_IOPAD(0x84c, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_a3.pr1_mii1_txd1 */
AM33XX_IOPAD(0x848, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_a2.pr1_mii1_txd2 */
AM33XX_IOPAD(0x844, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_a1.pr1_mii1_txd3 */
AM33XX_IOPAD(0x860, (PIN_INPUT | MUX_MODE5)) /* gpmc_a8.pr1_mii1_rxd0 */
AM33XX_IOPAD(0x85c, (PIN_INPUT | MUX_MODE5)) /* gpmc_a7.pr1_mii1_rxd1 */
AM33XX_IOPAD(0x858, (PIN_INPUT | MUX_MODE5)) /* gpmc_a6.pr1_mii1_rxd2 */
AM33XX_IOPAD(0x854, (PIN_INPUT | MUX_MODE5)) /* gpmc_a5.pr1_mii1_rxd3 */
AM33XX_IOPAD(0x874, (PIN_OUTPUT | MUX_MODE5)) /* gpmc_wpn.pr1_mii1_txen */
AM33XX_IOPAD(0x864, (PIN_INPUT | MUX_MODE5)) /* gpmc_a9.pr1_mii_mr1_clk */
AM33XX_IOPAD(0x868, (PIN_INPUT | MUX_MODE5)) /* gpmc_a10.pr1_mii1_rxdv */
AM33XX_IOPAD(0x86c, (PIN_INPUT | MUX_MODE5)) /* gpmc_a11.pr1_mii1_rxer */
AM33XX_IOPAD(0x878, (PIN_INPUT | MUX_MODE5)) /* gpmc_ben1.pr1_mii1_rxlink */
AM33XX_IOPAD(0x8ec, (PIN_INPUT | MUX_MODE2)) /* lcd_ac_bias_en.pr1_mii1_crs */
AM33XX_IOPAD(0x870, (PIN_INPUT | MUX_MODE5)) /* gpmc_wait0.pr1_mii1_col */
>;
};
};
&uio_pruss_mdio {
pinctrl-0 = <&uio_pruss_mdio_eth_default>;
pinctrl-names = "default";
reset-gpios = <&gpio2 5 GPIO_ACTIVE_LOW>;
reset-delay-us = <2>; /* PHY datasheet states 1uS min */
status = "okay";
uio_pruss_eth0_phy: ethernet-phy@1 {
reg = <1>;
};
uio_pruss_eth1_phy: ethernet-phy@3 {
reg = <3>;
};
};
&pruss {
status = "disabled";
};
&pru0 {
status = "disabled";
};
&pru1 {
status = "disabled";
};
&pruss_intc {
status = "disabled";
};
&pruss_mdio {
status = "disabled";
};
&pruss_emac0 {
status = "disabled";
};
&pruss_emac1 {
status = "disabled";
};