Blame view
include/media/h264-ctrls.h
7.18 KB
f183ec61c
|
1 2 3 4 5 6 7 8 9 10 11 12 13 14 |
/* SPDX-License-Identifier: GPL-2.0 */ /* * These are the H.264 state controls for use with stateless H.264 * codec drivers. * * It turns out that these structs are not stable yet and will undergo * more changes. So keep them private until they are stable and ready to * become part of the official public API. */ #ifndef _H264_CTRLS_H_ #define _H264_CTRLS_H_ #include <linux/videodev2.h> |
624922a27
|
15 16 17 18 19 |
/* * Maximum DPB size, as specified by section 'A.3.1 Level limits * common to the Baseline, Main, and Extended profiles'. */ #define V4L2_H264_NUM_DPB_ENTRIES 16 |
e000e1fa4
|
20 |
#define V4L2_H264_REF_LIST_LEN (2 * V4L2_H264_NUM_DPB_ENTRIES) |
f183ec61c
|
21 |
/* Our pixel format isn't stable at the moment */ |
7bb3c32ab
|
22 |
#define V4L2_PIX_FMT_H264_SLICE v4l2_fourcc('S', '2', '6', '4') /* H264 parsed slices */ |
f183ec61c
|
23 24 25 26 27 28 29 30 31 32 33 |
/* * This is put insanely high to avoid conflicting with controls that * would be added during the phase where those controls are not * stable. It should be fixed eventually. */ #define V4L2_CID_MPEG_VIDEO_H264_SPS (V4L2_CID_MPEG_BASE+1000) #define V4L2_CID_MPEG_VIDEO_H264_PPS (V4L2_CID_MPEG_BASE+1001) #define V4L2_CID_MPEG_VIDEO_H264_SCALING_MATRIX (V4L2_CID_MPEG_BASE+1002) #define V4L2_CID_MPEG_VIDEO_H264_SLICE_PARAMS (V4L2_CID_MPEG_BASE+1003) #define V4L2_CID_MPEG_VIDEO_H264_DECODE_PARAMS (V4L2_CID_MPEG_BASE+1004) |
5604be66a
|
34 |
#define V4L2_CID_MPEG_VIDEO_H264_DECODE_MODE (V4L2_CID_MPEG_BASE+1005) |
8cae93e09
|
35 |
#define V4L2_CID_MPEG_VIDEO_H264_START_CODE (V4L2_CID_MPEG_BASE+1006) |
eb44c6c9c
|
36 |
#define V4L2_CID_MPEG_VIDEO_H264_PRED_WEIGHTS (V4L2_CID_MPEG_BASE+1007) |
f183ec61c
|
37 38 39 40 41 42 43 |
/* enum v4l2_ctrl_type type values */ #define V4L2_CTRL_TYPE_H264_SPS 0x0110 #define V4L2_CTRL_TYPE_H264_PPS 0x0111 #define V4L2_CTRL_TYPE_H264_SCALING_MATRIX 0x0112 #define V4L2_CTRL_TYPE_H264_SLICE_PARAMS 0x0113 #define V4L2_CTRL_TYPE_H264_DECODE_PARAMS 0x0114 |
eb44c6c9c
|
44 |
#define V4L2_CTRL_TYPE_H264_PRED_WEIGHTS 0x0115 |
f183ec61c
|
45 |
|
5604be66a
|
46 47 48 49 |
enum v4l2_mpeg_video_h264_decode_mode { V4L2_MPEG_VIDEO_H264_DECODE_MODE_SLICE_BASED, V4L2_MPEG_VIDEO_H264_DECODE_MODE_FRAME_BASED, }; |
8cae93e09
|
50 51 52 53 |
enum v4l2_mpeg_video_h264_start_code { V4L2_MPEG_VIDEO_H264_START_CODE_NONE, V4L2_MPEG_VIDEO_H264_START_CODE_ANNEX_B, }; |
f183ec61c
|
54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 |
#define V4L2_H264_SPS_CONSTRAINT_SET0_FLAG 0x01 #define V4L2_H264_SPS_CONSTRAINT_SET1_FLAG 0x02 #define V4L2_H264_SPS_CONSTRAINT_SET2_FLAG 0x04 #define V4L2_H264_SPS_CONSTRAINT_SET3_FLAG 0x08 #define V4L2_H264_SPS_CONSTRAINT_SET4_FLAG 0x10 #define V4L2_H264_SPS_CONSTRAINT_SET5_FLAG 0x20 #define V4L2_H264_SPS_FLAG_SEPARATE_COLOUR_PLANE 0x01 #define V4L2_H264_SPS_FLAG_QPPRIME_Y_ZERO_TRANSFORM_BYPASS 0x02 #define V4L2_H264_SPS_FLAG_DELTA_PIC_ORDER_ALWAYS_ZERO 0x04 #define V4L2_H264_SPS_FLAG_GAPS_IN_FRAME_NUM_VALUE_ALLOWED 0x08 #define V4L2_H264_SPS_FLAG_FRAME_MBS_ONLY 0x10 #define V4L2_H264_SPS_FLAG_MB_ADAPTIVE_FRAME_FIELD 0x20 #define V4L2_H264_SPS_FLAG_DIRECT_8X8_INFERENCE 0x40 struct v4l2_ctrl_h264_sps { __u8 profile_idc; __u8 constraint_set_flags; __u8 level_idc; __u8 seq_parameter_set_id; __u8 chroma_format_idc; __u8 bit_depth_luma_minus8; __u8 bit_depth_chroma_minus8; __u8 log2_max_frame_num_minus4; __u8 pic_order_cnt_type; __u8 log2_max_pic_order_cnt_lsb_minus4; __u8 max_num_ref_frames; __u8 num_ref_frames_in_pic_order_cnt_cycle; __s32 offset_for_ref_frame[255]; __s32 offset_for_non_ref_pic; __s32 offset_for_top_to_bottom_field; __u16 pic_width_in_mbs_minus1; __u16 pic_height_in_map_units_minus1; __u32 flags; }; #define V4L2_H264_PPS_FLAG_ENTROPY_CODING_MODE 0x0001 #define V4L2_H264_PPS_FLAG_BOTTOM_FIELD_PIC_ORDER_IN_FRAME_PRESENT 0x0002 #define V4L2_H264_PPS_FLAG_WEIGHTED_PRED 0x0004 #define V4L2_H264_PPS_FLAG_DEBLOCKING_FILTER_CONTROL_PRESENT 0x0008 #define V4L2_H264_PPS_FLAG_CONSTRAINED_INTRA_PRED 0x0010 #define V4L2_H264_PPS_FLAG_REDUNDANT_PIC_CNT_PRESENT 0x0020 #define V4L2_H264_PPS_FLAG_TRANSFORM_8X8_MODE 0x0040 |
54889c51b
|
97 |
#define V4L2_H264_PPS_FLAG_SCALING_MATRIX_PRESENT 0x0080 |
f183ec61c
|
98 99 100 101 102 103 104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123 |
struct v4l2_ctrl_h264_pps { __u8 pic_parameter_set_id; __u8 seq_parameter_set_id; __u8 num_slice_groups_minus1; __u8 num_ref_idx_l0_default_active_minus1; __u8 num_ref_idx_l1_default_active_minus1; __u8 weighted_bipred_idc; __s8 pic_init_qp_minus26; __s8 pic_init_qs_minus26; __s8 chroma_qp_index_offset; __s8 second_chroma_qp_index_offset; __u16 flags; }; struct v4l2_ctrl_h264_scaling_matrix { __u8 scaling_list_4x4[6][16]; __u8 scaling_list_8x8[6][64]; }; struct v4l2_h264_weight_factors { __s16 luma_weight[32]; __s16 luma_offset[32]; __s16 chroma_weight[32][2]; __s16 chroma_offset[32][2]; }; |
eb44c6c9c
|
124 125 126 127 128 129 130 131 |
#define V4L2_H264_CTRL_PRED_WEIGHTS_REQUIRED(pps, slice) \ ((((pps)->flags & V4L2_H264_PPS_FLAG_WEIGHTED_PRED) && \ ((slice)->slice_type == V4L2_H264_SLICE_TYPE_P || \ (slice)->slice_type == V4L2_H264_SLICE_TYPE_SP)) || \ ((pps)->weighted_bipred_idc == 1 && \ (slice)->slice_type == V4L2_H264_SLICE_TYPE_B)) struct v4l2_ctrl_h264_pred_weights { |
f183ec61c
|
132 133 134 135 136 137 138 139 140 141 |
__u16 luma_log2_weight_denom; __u16 chroma_log2_weight_denom; struct v4l2_h264_weight_factors weight_factors[2]; }; #define V4L2_H264_SLICE_TYPE_P 0 #define V4L2_H264_SLICE_TYPE_B 1 #define V4L2_H264_SLICE_TYPE_I 2 #define V4L2_H264_SLICE_TYPE_SP 3 #define V4L2_H264_SLICE_TYPE_SI 4 |
d93585631
|
142 143 |
#define V4L2_H264_SLICE_FLAG_DIRECT_SPATIAL_MV_PRED 0x01 #define V4L2_H264_SLICE_FLAG_SP_FOR_SWITCH 0x02 |
f183ec61c
|
144 |
|
e000e1fa4
|
145 146 147 148 149 150 151 152 153 154 |
#define V4L2_H264_TOP_FIELD_REF 0x1 #define V4L2_H264_BOTTOM_FIELD_REF 0x2 #define V4L2_H264_FRAME_REF 0x3 struct v4l2_h264_reference { __u8 fields; /* Index into v4l2_ctrl_h264_decode_params.dpb[] */ __u8 index; }; |
f183ec61c
|
155 |
struct v4l2_ctrl_h264_slice_params { |
f183ec61c
|
156 157 |
/* Offset in bits to slice_data() from the beginning of this slice. */ __u32 header_bit_size; |
4245232fa
|
158 |
__u32 first_mb_in_slice; |
f183ec61c
|
159 |
__u8 slice_type; |
f183ec61c
|
160 161 |
__u8 colour_plane_id; __u8 redundant_pic_cnt; |
f183ec61c
|
162 163 164 165 166 167 168 169 |
__u8 cabac_init_idc; __s8 slice_qp_delta; __s8 slice_qs_delta; __u8 disable_deblocking_filter_idc; __s8 slice_alpha_c0_offset_div2; __s8 slice_beta_offset_div2; __u8 num_ref_idx_l0_active_minus1; __u8 num_ref_idx_l1_active_minus1; |
d93585631
|
170 171 |
__u8 reserved; |
f183ec61c
|
172 |
|
e000e1fa4
|
173 174 |
struct v4l2_h264_reference ref_pic_list0[V4L2_H264_REF_LIST_LEN]; struct v4l2_h264_reference ref_pic_list1[V4L2_H264_REF_LIST_LEN]; |
f183ec61c
|
175 176 177 178 179 180 181 |
__u32 flags; }; #define V4L2_H264_DPB_ENTRY_FLAG_VALID 0x01 #define V4L2_H264_DPB_ENTRY_FLAG_ACTIVE 0x02 #define V4L2_H264_DPB_ENTRY_FLAG_LONG_TERM 0x04 |
5e815fe05
|
182 |
#define V4L2_H264_DPB_ENTRY_FLAG_FIELD 0x08 |
f183ec61c
|
183 184 185 |
struct v4l2_h264_dpb_entry { __u64 reference_ts; |
f9879eb37
|
186 |
__u32 pic_num; |
f183ec61c
|
187 |
__u16 frame_num; |
c02ff2195
|
188 |
__u8 fields; |
f9879eb37
|
189 |
__u8 reserved[5]; |
f183ec61c
|
190 191 192 193 194 |
/* Note that field is indicated by v4l2_buffer.field */ __s32 top_field_order_cnt; __s32 bottom_field_order_cnt; __u32 flags; /* V4L2_H264_DPB_ENTRY_FLAG_* */ }; |
d93585631
|
195 196 197 |
#define V4L2_H264_DECODE_PARAM_FLAG_IDR_PIC 0x01 #define V4L2_H264_DECODE_PARAM_FLAG_FIELD_PIC 0x02 #define V4L2_H264_DECODE_PARAM_FLAG_BOTTOM_FIELD 0x04 |
f183ec61c
|
198 199 |
struct v4l2_ctrl_h264_decode_params { |
624922a27
|
200 |
struct v4l2_h264_dpb_entry dpb[V4L2_H264_NUM_DPB_ENTRIES]; |
f183ec61c
|
201 |
__u16 nal_ref_idc; |
d93585631
|
202 |
__u16 frame_num; |
f183ec61c
|
203 204 |
__s32 top_field_order_cnt; __s32 bottom_field_order_cnt; |
d93585631
|
205 206 207 208 209 210 211 212 213 214 215 216 |
__u16 idr_pic_id; __u16 pic_order_cnt_lsb; __s32 delta_pic_order_cnt_bottom; __s32 delta_pic_order_cnt0; __s32 delta_pic_order_cnt1; /* Size in bits of dec_ref_pic_marking() syntax element. */ __u32 dec_ref_pic_marking_bit_size; /* Size in bits of pic order count syntax. */ __u32 pic_order_cnt_bit_size; __u32 slice_group_change_cycle; __u32 reserved; |
f183ec61c
|
217 218 219 220 |
__u32 flags; /* V4L2_H264_DECODE_PARAM_FLAG_* */ }; #endif |