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drivers/pinctrl/pinctrl-axp209.c
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// SPDX-License-Identifier: GPL-2.0-or-later |
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/* |
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* AXP20x pinctrl and GPIO driver |
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* * Copyright (C) 2016 Maxime Ripard <maxime.ripard@free-electrons.com> |
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* Copyright (C) 2017 Quentin Schulz <quentin.schulz@free-electrons.com> |
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*/ #include <linux/bitops.h> #include <linux/device.h> #include <linux/gpio/driver.h> #include <linux/init.h> #include <linux/interrupt.h> #include <linux/kernel.h> #include <linux/mfd/axp20x.h> #include <linux/module.h> #include <linux/of.h> |
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#include <linux/of_device.h> |
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#include <linux/pinctrl/pinconf-generic.h> #include <linux/pinctrl/pinctrl.h> #include <linux/pinctrl/pinmux.h> |
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#include <linux/platform_device.h> #include <linux/regmap.h> #include <linux/slab.h> #define AXP20X_GPIO_FUNCTIONS 0x7 #define AXP20X_GPIO_FUNCTION_OUT_LOW 0 #define AXP20X_GPIO_FUNCTION_OUT_HIGH 1 #define AXP20X_GPIO_FUNCTION_INPUT 2 |
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#define AXP20X_FUNC_GPIO_OUT 0 #define AXP20X_FUNC_GPIO_IN 1 #define AXP20X_FUNC_LDO 2 #define AXP20X_FUNC_ADC 3 #define AXP20X_FUNCS_NB 4 #define AXP20X_MUX_GPIO_OUT 0 #define AXP20X_MUX_GPIO_IN BIT(1) #define AXP20X_MUX_ADC BIT(2) |
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#define AXP813_MUX_ADC (BIT(2) | BIT(0)) |
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struct axp20x_pctrl_desc { const struct pinctrl_pin_desc *pins; unsigned int npins; /* Stores the pins supporting LDO function. Bit offset is pin number. */ u8 ldo_mask; /* Stores the pins supporting ADC function. Bit offset is pin number. */ u8 adc_mask; |
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u8 gpio_status_offset; |
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u8 adc_mux; |
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}; struct axp20x_pinctrl_function { const char *name; unsigned int muxval; const char **groups; unsigned int ngroups; }; |
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struct axp20x_pctl { |
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struct gpio_chip chip; struct regmap *regmap; |
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struct pinctrl_dev *pctl_dev; struct device *dev; const struct axp20x_pctrl_desc *desc; struct axp20x_pinctrl_function funcs[AXP20X_FUNCS_NB]; }; static const struct pinctrl_pin_desc axp209_pins[] = { PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), PINCTRL_PIN(2, "GPIO2"), }; |
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static const struct pinctrl_pin_desc axp813_pins[] = { PINCTRL_PIN(0, "GPIO0"), PINCTRL_PIN(1, "GPIO1"), }; |
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static const struct axp20x_pctrl_desc axp20x_data = { .pins = axp209_pins, .npins = ARRAY_SIZE(axp209_pins), .ldo_mask = BIT(0) | BIT(1), .adc_mask = BIT(0) | BIT(1), |
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.gpio_status_offset = 4, |
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.adc_mux = AXP20X_MUX_ADC, |
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}; |
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static const struct axp20x_pctrl_desc axp813_data = { .pins = axp813_pins, .npins = ARRAY_SIZE(axp813_pins), .ldo_mask = BIT(0) | BIT(1), .adc_mask = BIT(0), .gpio_status_offset = 0, .adc_mux = AXP813_MUX_ADC, }; |
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static int axp20x_gpio_get_reg(unsigned int offset) |
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{ switch (offset) { case 0: return AXP20X_GPIO0_CTRL; case 1: return AXP20X_GPIO1_CTRL; case 2: return AXP20X_GPIO2_CTRL; } return -EINVAL; } |
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static int axp20x_gpio_input(struct gpio_chip *chip, unsigned int offset) |
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{ |
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return pinctrl_gpio_direction_input(chip->base + offset); |
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} |
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static int axp20x_gpio_get(struct gpio_chip *chip, unsigned int offset) |
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{ |
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struct axp20x_pctl *pctl = gpiochip_get_data(chip); |
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unsigned int val; |
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int ret; |
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|
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ret = regmap_read(pctl->regmap, AXP20X_GPIO20_SS, &val); |
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if (ret) return ret; |
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return !!(val & BIT(offset + pctl->desc->gpio_status_offset)); |
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} |
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static int axp20x_gpio_get_direction(struct gpio_chip *chip, unsigned int offset) |
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{ |
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struct axp20x_pctl *pctl = gpiochip_get_data(chip); |
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unsigned int val; int reg, ret; reg = axp20x_gpio_get_reg(offset); if (reg < 0) return reg; |
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ret = regmap_read(pctl->regmap, reg, &val); |
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if (ret) return ret; /* * This shouldn't really happen if the pin is in use already, * or if it's not in use yet, it doesn't matter since we're * going to change the value soon anyway. Default to output. */ if ((val & AXP20X_GPIO_FUNCTIONS) > 2) |
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return GPIO_LINE_DIRECTION_OUT; |
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/* * The GPIO directions are the three lowest values. * 2 is input, 0 and 1 are output */ |
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if (val & 2) return GPIO_LINE_DIRECTION_IN; return GPIO_LINE_DIRECTION_OUT; |
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} |
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static int axp20x_gpio_output(struct gpio_chip *chip, unsigned int offset, |
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int value) { |
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chip->set(chip, offset, value); return 0; } static void axp20x_gpio_set(struct gpio_chip *chip, unsigned int offset, int value) { |
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struct axp20x_pctl *pctl = gpiochip_get_data(chip); |
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int reg; reg = axp20x_gpio_get_reg(offset); if (reg < 0) |
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return; |
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regmap_update_bits(pctl->regmap, reg, |
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AXP20X_GPIO_FUNCTIONS, value ? AXP20X_GPIO_FUNCTION_OUT_HIGH : AXP20X_GPIO_FUNCTION_OUT_LOW); } static int axp20x_pmx_set(struct pinctrl_dev *pctldev, unsigned int offset, u8 config) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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int reg; reg = axp20x_gpio_get_reg(offset); if (reg < 0) |
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return reg; |
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return regmap_update_bits(pctl->regmap, reg, AXP20X_GPIO_FUNCTIONS, |
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config); |
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} |
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static int axp20x_pmx_func_cnt(struct pinctrl_dev *pctldev) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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|
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return ARRAY_SIZE(pctl->funcs); |
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} static const char *axp20x_pmx_func_name(struct pinctrl_dev *pctldev, unsigned int selector) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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return pctl->funcs[selector].name; |
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} static int axp20x_pmx_func_groups(struct pinctrl_dev *pctldev, unsigned int selector, const char * const **groups, unsigned int *num_groups) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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|
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*groups = pctl->funcs[selector].groups; *num_groups = pctl->funcs[selector].ngroups; |
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return 0; } static int axp20x_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned int function, unsigned int group) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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unsigned int mask; /* Every pin supports GPIO_OUT and GPIO_IN functions */ if (function <= AXP20X_FUNC_GPIO_IN) return axp20x_pmx_set(pctldev, group, |
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pctl->funcs[function].muxval); |
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if (function == AXP20X_FUNC_LDO) |
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mask = pctl->desc->ldo_mask; |
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else |
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mask = pctl->desc->adc_mask; |
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if (!(BIT(group) & mask)) return -EINVAL; /* * We let the regulator framework handle the LDO muxing as muxing bits * are basically also regulators on/off bits. It's better not to enforce * any state of the regulator when selecting LDO mux so that we don't * interfere with the regulator driver. */ if (function == AXP20X_FUNC_LDO) return 0; |
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return axp20x_pmx_set(pctldev, group, pctl->funcs[function].muxval); |
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} static int axp20x_pmx_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int offset, bool input) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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if (input) return axp20x_pmx_set(pctldev, offset, |
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pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval); |
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return axp20x_pmx_set(pctldev, offset, |
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pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval); |
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} static const struct pinmux_ops axp20x_pmx_ops = { .get_functions_count = axp20x_pmx_func_cnt, .get_function_name = axp20x_pmx_func_name, .get_function_groups = axp20x_pmx_func_groups, .set_mux = axp20x_pmx_set_mux, .gpio_set_direction = axp20x_pmx_gpio_set_direction, .strict = true, }; static int axp20x_groups_cnt(struct pinctrl_dev *pctldev) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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|
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return pctl->desc->npins; |
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} static int axp20x_group_pins(struct pinctrl_dev *pctldev, unsigned int selector, const unsigned int **pins, unsigned int *num_pins) { |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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|
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*pins = (unsigned int *)&pctl->desc->pins[selector]; |
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*num_pins = 1; return 0; } static const char *axp20x_group_name(struct pinctrl_dev *pctldev, unsigned int selector) |
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{ |
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struct axp20x_pctl *pctl = pinctrl_dev_get_drvdata(pctldev); |
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|
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return pctl->desc->pins[selector].name; |
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} static const struct pinctrl_ops axp20x_pctrl_ops = { .dt_node_to_map = pinconf_generic_dt_node_to_map_group, .dt_free_map = pinconf_generic_dt_free_map, .get_groups_count = axp20x_groups_cnt, .get_group_name = axp20x_group_name, .get_group_pins = axp20x_group_pins, }; |
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static int axp20x_funcs_groups_from_mask(struct device *dev, unsigned int mask, |
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unsigned int mask_len, struct axp20x_pinctrl_function *func, const struct pinctrl_pin_desc *pins) { unsigned long int mask_cpy = mask; const char **group; unsigned int ngroups = hweight8(mask); int bit; func->ngroups = ngroups; if (func->ngroups > 0) { |
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func->groups = devm_kcalloc(dev, ngroups, sizeof(const char *), |
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GFP_KERNEL); |
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if (!func->groups) return -ENOMEM; |
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group = func->groups; for_each_set_bit(bit, &mask_cpy, mask_len) { *group = pins[bit].name; group++; } } |
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return 0; |
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} |
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static int axp20x_build_funcs_groups(struct platform_device *pdev) |
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{ |
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struct axp20x_pctl *pctl = platform_get_drvdata(pdev); |
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int i, ret, pin, npins = pctl->desc->npins; |
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pctl->funcs[AXP20X_FUNC_GPIO_OUT].name = "gpio_out"; pctl->funcs[AXP20X_FUNC_GPIO_OUT].muxval = AXP20X_MUX_GPIO_OUT; pctl->funcs[AXP20X_FUNC_GPIO_IN].name = "gpio_in"; pctl->funcs[AXP20X_FUNC_GPIO_IN].muxval = AXP20X_MUX_GPIO_IN; pctl->funcs[AXP20X_FUNC_LDO].name = "ldo"; |
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/* * Muxval for LDO is useless as we won't use it. * See comment in axp20x_pmx_set_mux. */ |
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pctl->funcs[AXP20X_FUNC_ADC].name = "adc"; |
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pctl->funcs[AXP20X_FUNC_ADC].muxval = pctl->desc->adc_mux; |
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/* Every pin supports GPIO_OUT and GPIO_IN functions */ for (i = 0; i <= AXP20X_FUNC_GPIO_IN; i++) { |
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pctl->funcs[i].ngroups = npins; |
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pctl->funcs[i].groups = devm_kcalloc(&pdev->dev, npins, sizeof(char *), |
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GFP_KERNEL); |
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if (!pctl->funcs[i].groups) return -ENOMEM; |
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for (pin = 0; pin < npins; pin++) |
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pctl->funcs[i].groups[pin] = pctl->desc->pins[pin].name; |
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} |
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ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->ldo_mask, |
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npins, &pctl->funcs[AXP20X_FUNC_LDO], pctl->desc->pins); |
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if (ret) return ret; |
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|
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ret = axp20x_funcs_groups_from_mask(&pdev->dev, pctl->desc->adc_mask, |
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npins, &pctl->funcs[AXP20X_FUNC_ADC], pctl->desc->pins); |
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if (ret) return ret; return 0; |
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} |
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static const struct of_device_id axp20x_pctl_match[] = { { .compatible = "x-powers,axp209-gpio", .data = &axp20x_data, }, { .compatible = "x-powers,axp813-gpio", .data = &axp813_data, }, { } }; MODULE_DEVICE_TABLE(of, axp20x_pctl_match); |
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static int axp20x_pctl_probe(struct platform_device *pdev) |
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{ struct axp20x_dev *axp20x = dev_get_drvdata(pdev->dev.parent); |
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struct axp20x_pctl *pctl; |
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struct device *dev = &pdev->dev; |
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struct pinctrl_desc *pctrl_desc; |
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int ret; if (!of_device_is_available(pdev->dev.of_node)) return -ENODEV; if (!axp20x) { dev_err(&pdev->dev, "Parent drvdata not set "); return -EINVAL; } |
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pctl = devm_kzalloc(&pdev->dev, sizeof(*pctl), GFP_KERNEL); if (!pctl) |
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return -ENOMEM; |
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pctl->chip.base = -1; pctl->chip.can_sleep = true; pctl->chip.request = gpiochip_generic_request; pctl->chip.free = gpiochip_generic_free; pctl->chip.parent = &pdev->dev; pctl->chip.label = dev_name(&pdev->dev); pctl->chip.owner = THIS_MODULE; pctl->chip.get = axp20x_gpio_get; pctl->chip.get_direction = axp20x_gpio_get_direction; pctl->chip.set = axp20x_gpio_set; pctl->chip.direction_input = axp20x_gpio_input; pctl->chip.direction_output = axp20x_gpio_output; |
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|
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pctl->desc = of_device_get_match_data(dev); |
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pctl->chip.ngpio = pctl->desc->npins; |
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pctl->regmap = axp20x->regmap; pctl->dev = &pdev->dev; platform_set_drvdata(pdev, pctl); |
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ret = axp20x_build_funcs_groups(pdev); if (ret) { dev_err(&pdev->dev, "failed to build groups "); return ret; } |
23f75d7df pinctrl: axp209: ... |
419 420 421 422 423 424 425 |
pctrl_desc = devm_kzalloc(&pdev->dev, sizeof(*pctrl_desc), GFP_KERNEL); if (!pctrl_desc) return -ENOMEM; pctrl_desc->name = dev_name(&pdev->dev); pctrl_desc->owner = THIS_MODULE; |
d242e60c7 pinctrl: axp209: ... |
426 427 |
pctrl_desc->pins = pctl->desc->pins; pctrl_desc->npins = pctl->desc->npins; |
23f75d7df pinctrl: axp209: ... |
428 429 |
pctrl_desc->pctlops = &axp20x_pctrl_ops; pctrl_desc->pmxops = &axp20x_pmx_ops; |
d242e60c7 pinctrl: axp209: ... |
430 431 |
pctl->pctl_dev = devm_pinctrl_register(&pdev->dev, pctrl_desc, pctl); if (IS_ERR(pctl->pctl_dev)) { |
23f75d7df pinctrl: axp209: ... |
432 433 |
dev_err(&pdev->dev, "couldn't register pinctrl driver "); |
d242e60c7 pinctrl: axp209: ... |
434 |
return PTR_ERR(pctl->pctl_dev); |
23f75d7df pinctrl: axp209: ... |
435 |
} |
f72f4b44d gpio: Add AXP209 ... |
436 |
|
d242e60c7 pinctrl: axp209: ... |
437 |
ret = devm_gpiochip_add_data(&pdev->dev, &pctl->chip, pctl); |
f72f4b44d gpio: Add AXP209 ... |
438 439 440 441 442 |
if (ret) { dev_err(&pdev->dev, "Failed to register GPIO chip "); return ret; } |
d242e60c7 pinctrl: axp209: ... |
443 444 445 446 |
ret = gpiochip_add_pin_range(&pctl->chip, dev_name(&pdev->dev), pctl->desc->pins->number, pctl->desc->pins->number, pctl->desc->npins); |
23f75d7df pinctrl: axp209: ... |
447 448 449 450 451 452 453 454 |
if (ret) { dev_err(&pdev->dev, "failed to add pin range "); return ret; } dev_info(&pdev->dev, "AXP209 pinctrl and GPIO driver loaded "); |
f72f4b44d gpio: Add AXP209 ... |
455 456 457 |
return 0; } |
d242e60c7 pinctrl: axp209: ... |
458 459 |
static struct platform_driver axp20x_pctl_driver = { .probe = axp20x_pctl_probe, |
f72f4b44d gpio: Add AXP209 ... |
460 461 |
.driver = { .name = "axp20x-gpio", |
d242e60c7 pinctrl: axp209: ... |
462 |
.of_match_table = axp20x_pctl_match, |
f72f4b44d gpio: Add AXP209 ... |
463 464 |
}, }; |
d242e60c7 pinctrl: axp209: ... |
465 |
module_platform_driver(axp20x_pctl_driver); |
f72f4b44d gpio: Add AXP209 ... |
466 467 |
MODULE_AUTHOR("Maxime Ripard <maxime.ripard@free-electrons.com>"); |
23f75d7df pinctrl: axp209: ... |
468 469 |
MODULE_AUTHOR("Quentin Schulz <quentin.schulz@free-electrons.com>"); MODULE_DESCRIPTION("AXP20x PMIC pinctrl and GPIO driver"); |
f72f4b44d gpio: Add AXP209 ... |
470 |
MODULE_LICENSE("GPL"); |