ARM: mach-shmobile: AG5EVM LCDC / MIPI-DSI platform data

Add platform data for MIPI-DSI and LCDC on the AG5EVM board. The sh73a0 clkdev bindings are also updated. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>

ARM: mach-shmobile: AG5EVM LCDC / MIPI-DSI platform data
Add platform data for MIPI-DSI and LCDC on the AG5EVM board. The sh73a0 clkdev bindings are also updated. Signed-off-by: Magnus Damm <damm@opensource.se> Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Magnus Damm · Paul Mundt
1 parent 71fc5099ed
Showing 3 changed files with 165 additions and 3 deletions Side-by-side Diff
arch/arm/mach-shmobile/Kconfig
arch/arm/mach-shmobile/board-ag5evm.c
arch/arm/mach-shmobile/clock-sh73a0.c
@@ -61,6 +61,7 @@
 config MACH_AG5EVM
 	bool "AG5EVM board"
 	select ARCH_REQUIRE_GPIOLIB
+	select SH_LCD_MIPI_DSI
 	depends on ARCH_SH73A0
  
 config MACH_MACKEREL
@@ -34,9 +34,10 @@
 #include <linux/input/sh_keysc.h>
 #include <linux/mmc/host.h>
 #include <linux/mmc/sh_mmcif.h>
-
+#include <linux/sh_clk.h>
+#include <video/sh_mobile_lcdc.h>
+#include <video/sh_mipi_dsi.h>
 #include <sound/sh_fsi.h>
-
 #include <mach/hardware.h>
 #include <mach/sh73a0.h>
 #include <mach/common.h>
  
@@ -203,12 +204,145 @@
 	.num_resources  = ARRAY_SIZE(irda_resources),
 };
  
+static unsigned char lcd_backlight_seq[3][2] = {
+	{ 0x04, 0x07 },
+	{ 0x23, 0x80 },
+	{ 0x03, 0x01 },
+};
+
+static void lcd_backlight_on(void)
+{
+	struct i2c_adapter *a;
+	struct i2c_msg msg;
+	int k;
+
+	a = i2c_get_adapter(1);
+	for (k = 0; a && k < 3; k++) {
+		msg.addr = 0x6d;
+		msg.buf = &lcd_backlight_seq[k][0];
+		msg.len = 2;
+		msg.flags = 0;
+		if (i2c_transfer(a, &msg, 1) != 1)
+			break;
+	}
+}
+
+static void lcd_backlight_reset(void)
+{
+	gpio_set_value(GPIO_PORT235, 0);
+	mdelay(24);
+	gpio_set_value(GPIO_PORT235, 1);
+}
+
+static void lcd_on(void *board_data, struct fb_info *info)
+{
+	lcd_backlight_on();
+}
+
+static void lcd_off(void *board_data)
+{
+	lcd_backlight_reset();
+}
+
+/* LCDC0 */
+static const struct fb_videomode lcdc0_modes[] = {
+	{
+		.name		= "R63302(QHD)",
+		.xres		= 544,
+		.yres		= 961,
+		.left_margin	= 72,
+		.right_margin	= 600,
+		.hsync_len	= 16,
+		.upper_margin	= 8,
+		.lower_margin	= 8,
+		.vsync_len	= 2,
+		.sync		= FB_SYNC_VERT_HIGH_ACT | FB_SYNC_HOR_HIGH_ACT,
+	},
+};
+
+static struct sh_mobile_lcdc_info lcdc0_info = {
+	.clock_source = LCDC_CLK_PERIPHERAL,
+	.ch[0] = {
+		.chan = LCDC_CHAN_MAINLCD,
+		.interface_type = RGB24,
+		.clock_divider = 1,
+		.flags = LCDC_FLAGS_DWPOL,
+		.lcd_size_cfg.width = 44,
+		.lcd_size_cfg.height = 79,
+		.bpp = 16,
+		.lcd_cfg = lcdc0_modes,
+		.num_cfg = ARRAY_SIZE(lcdc0_modes),
+		.board_cfg = {
+			.display_on = lcd_on,
+			.display_off = lcd_off,
+		},
+	}
+};
+
+static struct resource lcdc0_resources[] = {
+	[0] = {
+		.name	= "LCDC0",
+		.start	= 0xfe940000, /* P4-only space */
+		.end	= 0xfe943fff,
+		.flags	= IORESOURCE_MEM,
+	},
+	[1] = {
+		.start	= intcs_evt2irq(0x580),
+		.flags	= IORESOURCE_IRQ,
+	},
+};
+
+static struct platform_device lcdc0_device = {
+	.name		= "sh_mobile_lcdc_fb",
+	.num_resources	= ARRAY_SIZE(lcdc0_resources),
+	.resource	= lcdc0_resources,
+	.id             = 0,
+	.dev	= {
+		.platform_data	= &lcdc0_info,
+		.coherent_dma_mask = ~0,
+	},
+};
+
+/* MIPI-DSI */
+static struct resource mipidsi0_resources[] = {
+	[0] = {
+		.start  = 0xfeab0000,
+		.end    = 0xfeab3fff,
+		.flags  = IORESOURCE_MEM,
+	},
+	[1] = {
+		.start  = 0xfeab4000,
+		.end    = 0xfeab7fff,
+		.flags  = IORESOURCE_MEM,
+	},
+};
+
+static struct sh_mipi_dsi_info mipidsi0_info = {
+	.data_format	= MIPI_RGB888,
+	.lcd_chan	= &lcdc0_info.ch[0],
+	.vsynw_offset	= 20,
+	.clksrc		= 1,
+	.flags		= SH_MIPI_DSI_HSABM,
+};
+
+static struct platform_device mipidsi0_device = {
+	.name           = "sh-mipi-dsi",
+	.num_resources  = ARRAY_SIZE(mipidsi0_resources),
+	.resource       = mipidsi0_resources,
+	.id             = 0,
+	.dev	= {
+		.platform_data	= &mipidsi0_info,
+	},
+};
+
 static struct platform_device *ag5evm_devices[] __initdata = {
 	&eth_device,
 	&keysc_device,
 	&fsi_device,
 	&mmc_device,
 	&irda_device,
+	&lcdc0_device,
+	&mipidsi0_device,
 };
  
 static struct map_desc ag5evm_io_desc[] __initdata = {
@@ -245,6 +379,8 @@
 	__raw_writew(__raw_readw(PINTCR0A) | (2<<10), PINTCR0A);
 }
  
+#define DSI0PHYCR	0xe615006c
+
 static void __init ag5evm_init(void)
 {
 	sh73a0_pinmux_init();
@@ -312,6 +448,20 @@
 	gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
 	gpio_request(GPIO_FN_PORT242_IRDA_IN,  NULL);
 	gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
+
+	/* LCD panel */
+	gpio_request(GPIO_PORT217, NULL); /* RESET */
+	gpio_direction_output(GPIO_PORT217, 0);
+	mdelay(1);
+	gpio_set_value(GPIO_PORT217, 1);
+
+	/* LCD backlight controller */
+	gpio_request(GPIO_PORT235, NULL); /* RESET */
+	gpio_direction_output(GPIO_PORT235, 0);
+	lcd_backlight_reset();
+
+	/* MIPI-DSI clock setup */
+	__raw_writel(0x2a809010, DSI0PHYCR);
  
 #ifdef CONFIG_CACHE_L2X0
 	/* Shared attribute override enable, 64K*8way */
@@ -263,7 +263,7 @@
 };
  
 enum { MSTP001,
-	MSTP125, MSTP116,
+	MSTP125, MSTP118, MSTP116, MSTP100,
 	MSTP219,
 	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
 	MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
  
@@ -276,7 +276,9 @@
 static struct clk mstp_clks[MSTP_NR] = {
 	[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
 	[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
+	[MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
 	[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
+	[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
 	[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
 	[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
 	[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
  
  
  
@@ -297,16 +299,25 @@
  
 #define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
 #define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
+#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
  
 static struct clk_lookup lookups[] = {
 	/* main clocks */
 	CLKDEV_CON_ID("r_clk", &r_clk),
  
+	/* DIV6 clocks */
+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
+	CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
+	CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
+	CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
+
 	/* MSTP32 clocks */
 	CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
+	CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
 	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
 	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
 	CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
+	CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
 	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
 	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
 	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
...	...	@@ -61,6 +61,7 @@
61	61	config MACH_AG5EVM
62	62	bool "AG5EVM board"
63	63	select ARCH_REQUIRE_GPIOLIB
	64	+ select SH_LCD_MIPI_DSI
64	65	depends on ARCH_SH73A0
65	66
66	67	config MACH_MACKEREL
...	...	@@ -34,9 +34,10 @@
34	34	#include <linux/input/sh_keysc.h>
35	35	#include <linux/mmc/host.h>
36	36	#include <linux/mmc/sh_mmcif.h>
37		-
	37	+#include <linux/sh_clk.h>
	38	+#include <video/sh_mobile_lcdc.h>
	39	+#include <video/sh_mipi_dsi.h>
38	40	#include <sound/sh_fsi.h>
39		-
40	41	#include <mach/hardware.h>
41	42	#include <mach/sh73a0.h>
42	43	#include <mach/common.h>
43	44
...	...	@@ -203,12 +204,145 @@
203	204	.num_resources = ARRAY_SIZE(irda_resources),
204	205	};
205	206
	207	+static unsigned char lcd_backlight_seq[3][2] = {
	208	+ { 0x04, 0x07 },
	209	+ { 0x23, 0x80 },
	210	+ { 0x03, 0x01 },
	211	+};
	212	+
	213	+static void lcd_backlight_on(void)
	214	+{
	215	+ struct i2c_adapter *a;
	216	+ struct i2c_msg msg;
	217	+ int k;
	218	+
	219	+ a = i2c_get_adapter(1);
	220	+ for (k = 0; a && k < 3; k++) {
	221	+ msg.addr = 0x6d;
	222	+ msg.buf = &lcd_backlight_seq[k][0];
	223	+ msg.len = 2;
	224	+ msg.flags = 0;
	225	+ if (i2c_transfer(a, &msg, 1) != 1)
	226	+ break;
	227	+ }
	228	+}
	229	+
	230	+static void lcd_backlight_reset(void)
	231	+{
	232	+ gpio_set_value(GPIO_PORT235, 0);
	233	+ mdelay(24);
	234	+ gpio_set_value(GPIO_PORT235, 1);
	235	+}
	236	+
	237	+static void lcd_on(void board_data, struct fb_info info)
	238	+{
	239	+ lcd_backlight_on();
	240	+}
	241	+
	242	+static void lcd_off(void *board_data)
	243	+{
	244	+ lcd_backlight_reset();
	245	+}
	246	+
	247	+/* LCDC0 */
	248	+static const struct fb_videomode lcdc0_modes[] = {
	249	+ {
	250	+ .name = "R63302(QHD)",
	251	+ .xres = 544,
	252	+ .yres = 961,
	253	+ .left_margin = 72,
	254	+ .right_margin = 600,
	255	+ .hsync_len = 16,
	256	+ .upper_margin = 8,
	257	+ .lower_margin = 8,
	258	+ .vsync_len = 2,
	259	+ .sync = FB_SYNC_VERT_HIGH_ACT \| FB_SYNC_HOR_HIGH_ACT,
	260	+ },
	261	+};
	262	+
	263	+static struct sh_mobile_lcdc_info lcdc0_info = {
	264	+ .clock_source = LCDC_CLK_PERIPHERAL,
	265	+ .ch[0] = {
	266	+ .chan = LCDC_CHAN_MAINLCD,
	267	+ .interface_type = RGB24,
	268	+ .clock_divider = 1,
	269	+ .flags = LCDC_FLAGS_DWPOL,
	270	+ .lcd_size_cfg.width = 44,
	271	+ .lcd_size_cfg.height = 79,
	272	+ .bpp = 16,
	273	+ .lcd_cfg = lcdc0_modes,
	274	+ .num_cfg = ARRAY_SIZE(lcdc0_modes),
	275	+ .board_cfg = {
	276	+ .display_on = lcd_on,
	277	+ .display_off = lcd_off,
	278	+ },
	279	+ }
	280	+};
	281	+
	282	+static struct resource lcdc0_resources[] = {
	283	+ [0] = {
	284	+ .name = "LCDC0",
	285	+ .start = 0xfe940000, /* P4-only space */
	286	+ .end = 0xfe943fff,
	287	+ .flags = IORESOURCE_MEM,
	288	+ },
	289	+ [1] = {
	290	+ .start = intcs_evt2irq(0x580),
	291	+ .flags = IORESOURCE_IRQ,
	292	+ },
	293	+};
	294	+
	295	+static struct platform_device lcdc0_device = {
	296	+ .name = "sh_mobile_lcdc_fb",
	297	+ .num_resources = ARRAY_SIZE(lcdc0_resources),
	298	+ .resource = lcdc0_resources,
	299	+ .id = 0,
	300	+ .dev = {
	301	+ .platform_data = &lcdc0_info,
	302	+ .coherent_dma_mask = ~0,
	303	+ },
	304	+};
	305	+
	306	+/* MIPI-DSI */
	307	+static struct resource mipidsi0_resources[] = {
	308	+ [0] = {
	309	+ .start = 0xfeab0000,
	310	+ .end = 0xfeab3fff,
	311	+ .flags = IORESOURCE_MEM,
	312	+ },
	313	+ [1] = {
	314	+ .start = 0xfeab4000,
	315	+ .end = 0xfeab7fff,
	316	+ .flags = IORESOURCE_MEM,
	317	+ },
	318	+};
	319	+
	320	+static struct sh_mipi_dsi_info mipidsi0_info = {
	321	+ .data_format = MIPI_RGB888,
	322	+ .lcd_chan = &lcdc0_info.ch[0],
	323	+ .vsynw_offset = 20,
	324	+ .clksrc = 1,
	325	+ .flags = SH_MIPI_DSI_HSABM,
	326	+};
	327	+
	328	+static struct platform_device mipidsi0_device = {
	329	+ .name = "sh-mipi-dsi",
	330	+ .num_resources = ARRAY_SIZE(mipidsi0_resources),
	331	+ .resource = mipidsi0_resources,
	332	+ .id = 0,
	333	+ .dev = {
	334	+ .platform_data = &mipidsi0_info,
	335	+ },
	336	+};
	337	+
206	338	static struct platform_device *ag5evm_devices[] __initdata = {
207	339	&eth_device,
208	340	&keysc_device,
209	341	&fsi_device,
210	342	&mmc_device,
211	343	&irda_device,
	344	+ &lcdc0_device,
	345	+ &mipidsi0_device,
212	346	};
213	347
214	348	static struct map_desc ag5evm_io_desc[] __initdata = {
...	...	@@ -245,6 +379,8 @@
245	379	__raw_writew(__raw_readw(PINTCR0A) \| (2<<10), PINTCR0A);
246	380	}
247	381
	382	+#define DSI0PHYCR 0xe615006c
	383	+
248	384	static void __init ag5evm_init(void)
249	385	{
250	386	sh73a0_pinmux_init();
...	...	@@ -312,6 +448,20 @@
312	448	gpio_request(GPIO_FN_PORT241_IRDA_OUT, NULL);
313	449	gpio_request(GPIO_FN_PORT242_IRDA_IN, NULL);
314	450	gpio_request(GPIO_FN_PORT243_IRDA_FIRSEL, NULL);
	451	+
	452	+ /* LCD panel */
	453	+ gpio_request(GPIO_PORT217, NULL); /* RESET */
	454	+ gpio_direction_output(GPIO_PORT217, 0);
	455	+ mdelay(1);
	456	+ gpio_set_value(GPIO_PORT217, 1);
	457	+
	458	+ /* LCD backlight controller */
	459	+ gpio_request(GPIO_PORT235, NULL); /* RESET */
	460	+ gpio_direction_output(GPIO_PORT235, 0);
	461	+ lcd_backlight_reset();
	462	+
	463	+ /* MIPI-DSI clock setup */
	464	+ __raw_writel(0x2a809010, DSI0PHYCR);
315	465
316	466	#ifdef CONFIG_CACHE_L2X0
317	467	/* Shared attribute override enable, 64K8way /
...	...	@@ -263,7 +263,7 @@
263	263	};
264	264
265	265	enum { MSTP001,
266		- MSTP125, MSTP116,
	266	+ MSTP125, MSTP118, MSTP116, MSTP100,
267	267	MSTP219,
268	268	MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
269	269	MSTP331, MSTP329, MSTP325, MSTP323, MSTP312,
270	270
...	...	@@ -276,7 +276,9 @@
276	276	static struct clk mstp_clks[MSTP_NR] = {
277	277	[MSTP001] = MSTP(&div4_clks[DIV4_HP], SMSTPCR0, 1, 0), /* IIC2 */
278	278	[MSTP125] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR1, 25, 0), /* TMU0 */
	279	+ [MSTP118] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 18, 0), /* DSITX0 */
279	280	[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
	281	+ [MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
280	282	[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
281	283	[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
282	284	[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
283	285
284	286
285	287
...	...	@@ -297,16 +299,25 @@
297	299
298	300	#define CLKDEV_CON_ID(_id, _clk) { .con_id = _id, .clk = _clk }
299	301	#define CLKDEV_DEV_ID(_id, _clk) { .dev_id = _id, .clk = _clk }
	302	+#define CLKDEV_ICK_ID(_cid, _did, _clk) { .con_id = _cid, .dev_id = _did, .clk = _clk }
300	303
301	304	static struct clk_lookup lookups[] = {
302	305	/* main clocks */
303	306	CLKDEV_CON_ID("r_clk", &r_clk),
304	307
	308	+ /* DIV6 clocks */
	309	+ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSIT]),
	310	+ CLKDEV_ICK_ID("dsit_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSIT]),
	311	+ CLKDEV_ICK_ID("dsi0p_clk", "sh-mipi-dsi.0", &div6_clks[DIV6_DSI0P]),
	312	+ CLKDEV_ICK_ID("dsi1p_clk", "sh-mipi-dsi.1", &div6_clks[DIV6_DSI1P]),
	313	+
305	314	/* MSTP32 clocks */
306	315	CLKDEV_DEV_ID("i2c-sh_mobile.2", &mstp_clks[MSTP001]), /* I2C2 */
	316	+ CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
307	317	CLKDEV_DEV_ID("sh_tmu.0", &mstp_clks[MSTP125]), /* TMU00 */
308	318	CLKDEV_DEV_ID("sh_tmu.1", &mstp_clks[MSTP125]), /* TMU01 */
309	319	CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
	320	+ CLKDEV_DEV_ID("sh-mipi-dsi.0", &mstp_clks[MSTP118]), /* DSITX */
310	321	CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
311	322	CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
312	323	CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */