Eric Lee / smarc-fsl-linux-kernel

Download as
Browse Code ยป

Commit 1753298947afe5eb56da755bc057f1868f345ec1

Authored by Pavel Machek
Committed by Russell King
1 parent 5ecdb02c9d
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

[ARM] Sharp sl-5500 touchscreen support 

This adds support for sharp zaurus sl-5500 touchscreen.  It introduces
some not-too-nice ifs, but I guess copying whole ucb1x00-ts.c would be
bad idea...

Signed-off-by: Pavel Machek <pavel@suse.cz>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 1 changed file with 53 additions and 21 deletions Side-by-side Diff

drivers/mfd/ucb1x00-ts.c
Diff comments   View file @ 1753298
... ... @@ -32,9 +32,12 @@
32 32 #include <linux/suspend.h>
33 33 #include <linux/slab.h>
34 34 #include <linux/kthread.h>
  35 +#include <linux/delay.h>
35 36  
36 37 #include <asm/dma.h>
37 38 #include <asm/semaphore.h>
  39 +#include <asm/arch/collie.h>
  40 +#include <asm/mach-types.h>
38 41  
39 42 #include "ucb1x00.h"
40 43  
41 44  
... ... @@ -85,12 +88,23 @@
85 88 */
86 89 static inline unsigned int ucb1x00_ts_read_pressure(struct ucb1x00_ts *ts)
87 90 {
88   - ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
89   - UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
90   - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
91   - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  91 + if (machine_is_collie()) {
  92 + ucb1x00_io_write(ts->ucb, COLLIE_TC35143_GPIO_TBL_CHK, 0);
  93 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  94 + UCB_TS_CR_TSPX_POW | UCB_TS_CR_TSMX_POW |
  95 + UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
92 96  
93   - return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
  97 + udelay(55);
  98 +
  99 + return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_AD2, ts->adcsync);
  100 + } else {
  101 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  102 + UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW |
  103 + UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND |
  104 + UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  105 +
  106 + return ucb1x00_adc_read(ts->ucb, UCB_ADC_INP_TSPY, ts->adcsync);
  107 + }
94 108 }
95 109  
96 110 /*
97 111  
... ... @@ -101,14 +115,18 @@
101 115 */
102 116 static inline unsigned int ucb1x00_ts_read_xpos(struct ucb1x00_ts *ts)
103 117 {
  118 + if (machine_is_collie())
  119 + ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
  120 + else {
  121 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  122 + UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  123 + UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  124 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  125 + UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
  126 + UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  127 + }
104 128 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
105 129 UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
106   - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
107   - ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
108   - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
109   - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
110   - ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
111   - UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW |
112 130 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
113 131  
114 132 udelay(55);
115 133  
... ... @@ -124,14 +142,19 @@
124 142 */
125 143 static inline unsigned int ucb1x00_ts_read_ypos(struct ucb1x00_ts *ts)
126 144 {
  145 + if (machine_is_collie())
  146 + ucb1x00_io_write(ts->ucb, 0, COLLIE_TC35143_GPIO_TBL_CHK);
  147 + else {
  148 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  149 + UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  150 + UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  151 + ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
  152 + UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
  153 + UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
  154 + }
  155 +
127 156 ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
128 157 UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
129   - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
130   - ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
131   - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
132   - UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA);
133   - ucb1x00_reg_write(ts->ucb, UCB_TS_CR,
134   - UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW |
135 158 UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA);
136 159  
137 160 udelay(55);
... ... @@ -163,6 +186,15 @@
163 186 return ucb1x00_adc_read(ts->ucb, 0, ts->adcsync);
164 187 }
165 188  
  189 +static inline int ucb1x00_ts_pen_down(struct ucb1x00_ts *ts)
  190 +{
  191 + unsigned int val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
  192 + if (machine_is_collie())
  193 + return (!(val & (UCB_TS_CR_TSPX_LOW)));
  194 + else
  195 + return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW));
  196 +}
  197 +
166 198 /*
167 199 * This is a RT kernel thread that handles the ADC accesses
168 200 * (mainly so we can use semaphores in the UCB1200 core code
... ... @@ -186,7 +218,7 @@
186 218  
187 219 add_wait_queue(&ts->irq_wait, &wait);
188 220 while (!kthread_should_stop()) {
189   - unsigned int x, y, p, val;
  221 + unsigned int x, y, p;
190 222 signed long timeout;
191 223  
192 224 ts->restart = 0;
193 225  
194 226  
... ... @@ -206,12 +238,12 @@
206 238 msleep(10);
207 239  
208 240 ucb1x00_enable(ts->ucb);
209   - val = ucb1x00_reg_read(ts->ucb, UCB_TS_CR);
210 241  
211   - if (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)) {
  242 +
  243 + if (ucb1x00_ts_pen_down(ts)) {
212 244 set_task_state(tsk, TASK_INTERRUPTIBLE);
213 245  
214   - ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, UCB_FALLING);
  246 + ucb1x00_enable_irq(ts->ucb, UCB_IRQ_TSPX, machine_is_collie() ? UCB_RISING : UCB_FALLING);
215 247 ucb1x00_disable(ts->ucb);
216 248  
217 249 /*