Commit 1a8a51004a18b627ea81444201f7867875212f46

Authored by Rusty Russell
1 parent 9489424454

cpumask: remove references to struct irqaction's mask field.

Impact: cleanup

It's unused, since about 1995.  So remove all initialization of it in
preparation for actually removing the field.

Signed-off-by: Rusty Russell <rusty@rustcorp.com.au>
Acked-by: Thomas Gleixner <tglx@linutronix.de>

Showing 43 changed files with 2 additions and 53 deletions Side-by-side Diff

arch/cris/arch-v10/kernel/time.c
... ... @@ -261,7 +261,6 @@
261 261 static struct irqaction irq2 = {
262 262 .handler = timer_interrupt,
263 263 .flags = IRQF_SHARED | IRQF_DISABLED,
264   - .mask = CPU_MASK_NONE,
265 264 .name = "timer",
266 265 };
267 266  
arch/cris/arch-v32/kernel/smp.c
... ... @@ -65,7 +65,6 @@
65 65 static struct irqaction irq_ipi = {
66 66 .handler = crisv32_ipi_interrupt,
67 67 .flags = IRQF_DISABLED,
68   - .mask = CPU_MASK_NONE,
69 68 .name = "ipi",
70 69 };
71 70  
arch/cris/arch-v32/kernel/time.c
... ... @@ -267,7 +267,6 @@
267 267 static struct irqaction irq_timer = {
268 268 .handler = timer_interrupt,
269 269 .flags = IRQF_SHARED | IRQF_DISABLED,
270   - .mask = CPU_MASK_NONE,
271 270 .name = "timer"
272 271 };
273 272  
arch/frv/kernel/irq-mb93091.c
... ... @@ -109,28 +109,24 @@
109 109 [0] = {
110 110 .handler = fpga_interrupt,
111 111 .flags = IRQF_DISABLED | IRQF_SHARED,
112   - .mask = CPU_MASK_NONE,
113 112 .name = "fpga.0",
114 113 .dev_id = (void *) 0x0028UL,
115 114 },
116 115 [1] = {
117 116 .handler = fpga_interrupt,
118 117 .flags = IRQF_DISABLED | IRQF_SHARED,
119   - .mask = CPU_MASK_NONE,
120 118 .name = "fpga.1",
121 119 .dev_id = (void *) 0x0050UL,
122 120 },
123 121 [2] = {
124 122 .handler = fpga_interrupt,
125 123 .flags = IRQF_DISABLED | IRQF_SHARED,
126   - .mask = CPU_MASK_NONE,
127 124 .name = "fpga.2",
128 125 .dev_id = (void *) 0x1c00UL,
129 126 },
130 127 [3] = {
131 128 .handler = fpga_interrupt,
132 129 .flags = IRQF_DISABLED | IRQF_SHARED,
133   - .mask = CPU_MASK_NONE,
134 130 .name = "fpga.3",
135 131 .dev_id = (void *) 0x6386UL,
136 132 }
arch/frv/kernel/irq-mb93093.c
... ... @@ -108,7 +108,6 @@
108 108 [0] = {
109 109 .handler = fpga_interrupt,
110 110 .flags = IRQF_DISABLED,
111   - .mask = CPU_MASK_NONE,
112 111 .name = "fpga.0",
113 112 .dev_id = (void *) 0x0700UL,
114 113 }
arch/frv/kernel/irq-mb93493.c
... ... @@ -120,14 +120,12 @@
120 120 [0] = {
121 121 .handler = mb93493_interrupt,
122 122 .flags = IRQF_DISABLED | IRQF_SHARED,
123   - .mask = CPU_MASK_NONE,
124 123 .name = "mb93493.0",
125 124 .dev_id = (void *) __addr_MB93493_IQSR(0),
126 125 },
127 126 [1] = {
128 127 .handler = mb93493_interrupt,
129 128 .flags = IRQF_DISABLED | IRQF_SHARED,
130   - .mask = CPU_MASK_NONE,
131 129 .name = "mb93493.1",
132 130 .dev_id = (void *) __addr_MB93493_IQSR(1),
133 131 }
arch/frv/kernel/time.c
... ... @@ -45,7 +45,6 @@
45 45 static struct irqaction timer_irq = {
46 46 .handler = timer_interrupt,
47 47 .flags = IRQF_DISABLED,
48   - .mask = CPU_MASK_NONE,
49 48 .name = "timer",
50 49 };
51 50  
arch/h8300/kernel/timer/itu.c
... ... @@ -60,7 +60,6 @@
60 60 .name = "itu",
61 61 .handler = timer_interrupt,
62 62 .flags = IRQF_DISABLED | IRQF_TIMER,
63   - .mask = CPU_MASK_NONE,
64 63 };
65 64  
66 65 static const int __initdata divide_rate[] = {1, 2, 4, 8};
arch/h8300/kernel/timer/timer16.c
... ... @@ -55,7 +55,6 @@
55 55 .name = "timer-16",
56 56 .handler = timer_interrupt,
57 57 .flags = IRQF_DISABLED | IRQF_TIMER,
58   - .mask = CPU_MASK_NONE,
59 58 };
60 59  
61 60 static const int __initdata divide_rate[] = {1, 2, 4, 8};
arch/h8300/kernel/timer/timer8.c
... ... @@ -75,7 +75,6 @@
75 75 .name = "timer-8",
76 76 .handler = timer_interrupt,
77 77 .flags = IRQF_DISABLED | IRQF_TIMER,
78   - .mask = CPU_MASK_NONE,
79 78 };
80 79  
81 80 static const int __initdata divide_rate[] = {8, 64, 8192};
arch/h8300/kernel/timer/tpu.c
... ... @@ -65,7 +65,6 @@
65 65 .name = "tpu",
66 66 .handler = timer_interrupt,
67 67 .flags = IRQF_DISABLED | IRQF_TIMER,
68   - .mask = CPU_MASK_NONE,
69 68 };
70 69  
71 70 const static int __initdata divide_rate[] = {
arch/m32r/kernel/time.c
... ... @@ -230,7 +230,6 @@
230 230 static struct irqaction irq0 = {
231 231 .handler = timer_interrupt,
232 232 .flags = IRQF_DISABLED,
233   - .mask = CPU_MASK_NONE,
234 233 .name = "MFT2",
235 234 };
236 235  
arch/mips/cobalt/irq.c
... ... @@ -47,7 +47,6 @@
47 47  
48 48 static struct irqaction cascade = {
49 49 .handler = no_action,
50   - .mask = CPU_MASK_NONE,
51 50 .name = "cascade",
52 51 };
53 52  
arch/mips/emma/markeins/irq.c
... ... @@ -194,7 +194,6 @@
194 194 static struct irqaction irq_cascade = {
195 195 .handler = no_action,
196 196 .flags = 0,
197   - .mask = CPU_MASK_NONE,
198 197 .name = "cascade",
199 198 .dev_id = NULL,
200 199 .next = NULL,
arch/mips/jazz/irq.c
... ... @@ -134,7 +134,6 @@
134 134 static struct irqaction r4030_timer_irqaction = {
135 135 .handler = r4030_timer_interrupt,
136 136 .flags = IRQF_DISABLED,
137   - .mask = CPU_MASK_CPU0,
138 137 .name = "R4030 timer",
139 138 };
140 139  
arch/mips/kernel/cevt-bcm1480.c
... ... @@ -144,7 +144,6 @@
144 144  
145 145 action->handler = sibyte_counter_handler;
146 146 action->flags = IRQF_DISABLED | IRQF_PERCPU;
147   - action->mask = cpumask_of_cpu(cpu);
148 147 action->name = name;
149 148 action->dev_id = cd;
150 149  
arch/mips/kernel/cevt-sb1250.c
... ... @@ -143,7 +143,6 @@
143 143  
144 144 action->handler = sibyte_counter_handler;
145 145 action->flags = IRQF_DISABLED | IRQF_PERCPU;
146   - action->mask = cpumask_of_cpu(cpu);
147 146 action->name = name;
148 147 action->dev_id = cd;
149 148  
arch/mips/kernel/i8253.c
... ... @@ -98,7 +98,6 @@
98 98 static struct irqaction irq0 = {
99 99 .handler = timer_interrupt,
100 100 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
101   - .mask = CPU_MASK_NONE,
102 101 .name = "timer"
103 102 };
104 103  
... ... @@ -121,7 +120,6 @@
121 120 cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
122 121 clockevents_register_device(cd);
123 122  
124   - irq0.mask = cpumask_of_cpu(cpu);
125 123 setup_irq(0, &irq0);
126 124 }
127 125  
arch/mips/kernel/i8259.c
... ... @@ -306,7 +306,6 @@
306 306 */
307 307 static struct irqaction irq2 = {
308 308 .handler = no_action,
309   - .mask = CPU_MASK_NONE,
310 309 .name = "cascade",
311 310 };
312 311  
arch/mips/lasat/interrupt.c
... ... @@ -104,7 +104,6 @@
104 104  
105 105 static struct irqaction cascade = {
106 106 .handler = no_action,
107   - .mask = CPU_MASK_NONE,
108 107 .name = "cascade",
109 108 };
110 109  
arch/mips/lemote/lm2e/irq.c
... ... @@ -92,7 +92,6 @@
92 92  
93 93 static struct irqaction cascade_irqaction = {
94 94 .handler = no_action,
95   - .mask = CPU_MASK_NONE,
96 95 .name = "cascade",
97 96 };
98 97  
arch/mips/sgi-ip32/ip32-irq.c
... ... @@ -115,14 +115,12 @@
115 115 struct irqaction memerr_irq = {
116 116 .handler = crime_memerr_intr,
117 117 .flags = IRQF_DISABLED,
118   - .mask = CPU_MASK_NONE,
119 118 .name = "CRIME memory error",
120 119 };
121 120  
122 121 struct irqaction cpuerr_irq = {
123 122 .handler = crime_cpuerr_intr,
124 123 .flags = IRQF_DISABLED,
125   - .mask = CPU_MASK_NONE,
126 124 .name = "CRIME CPU error",
127 125 };
128 126  
arch/mips/sni/rm200.c
... ... @@ -359,7 +359,8 @@
359 359 * IRQ2 is cascade interrupt to second interrupt controller
360 360 */
361 361 static struct irqaction sni_rm200_irq2 = {
362   - no_action, 0, CPU_MASK_NONE, "cascade", NULL, NULL
  362 + .handler = no_action,
  363 + .name = "cascade",
363 364 };
364 365  
365 366 static struct resource sni_rm200_pic1_resource = {
arch/mips/vr41xx/common/irq.c
... ... @@ -32,7 +32,6 @@
32 32  
33 33 static struct irqaction cascade_irqaction = {
34 34 .handler = no_action,
35   - .mask = CPU_MASK_NONE,
36 35 .name = "cascade",
37 36 };
38 37  
arch/mn10300/kernel/time.c
... ... @@ -37,7 +37,6 @@
37 37 static struct irqaction timer_irq = {
38 38 .handler = timer_interrupt,
39 39 .flags = IRQF_DISABLED | IRQF_SHARED | IRQF_TIMER,
40   - .mask = CPU_MASK_NONE,
41 40 .name = "timer",
42 41 };
43 42  
arch/powerpc/platforms/85xx/mpc85xx_cds.c
... ... @@ -179,7 +179,6 @@
179 179 static struct irqaction mpc85xxcds_8259_irqaction = {
180 180 .handler = mpc85xx_8259_cascade_action,
181 181 .flags = IRQF_SHARED,
182   - .mask = CPU_MASK_NONE,
183 182 .name = "8259 cascade",
184 183 };
185 184 #endif /* PPC_I8259 */
arch/powerpc/platforms/8xx/m8xx_setup.c
... ... @@ -44,7 +44,6 @@
44 44  
45 45 static struct irqaction tbint_irqaction = {
46 46 .handler = timebase_interrupt,
47   - .mask = CPU_MASK_NONE,
48 47 .name = "tbint",
49 48 };
50 49  
arch/powerpc/platforms/chrp/setup.c
... ... @@ -472,7 +472,6 @@
472 472 #if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(CONFIG_XMON)
473 473 static struct irqaction xmon_irqaction = {
474 474 .handler = xmon_irq,
475   - .mask = CPU_MASK_NONE,
476 475 .name = "XMON break",
477 476 };
478 477 #endif
arch/powerpc/platforms/powermac/pic.c
... ... @@ -266,7 +266,6 @@
266 266 static struct irqaction xmon_action = {
267 267 .handler = xmon_irq,
268 268 .flags = 0,
269   - .mask = CPU_MASK_NONE,
270 269 .name = "NMI - XMON"
271 270 };
272 271 #endif
... ... @@ -274,7 +273,6 @@
274 273 static struct irqaction gatwick_cascade_action = {
275 274 .handler = gatwick_action,
276 275 .flags = IRQF_DISABLED,
277   - .mask = CPU_MASK_NONE,
278 276 .name = "cascade",
279 277 };
280 278  
arch/powerpc/platforms/powermac/smp.c
... ... @@ -385,7 +385,6 @@
385 385 static struct irqaction psurge_irqaction = {
386 386 .handler = psurge_primary_intr,
387 387 .flags = IRQF_DISABLED,
388   - .mask = CPU_MASK_NONE,
389 388 .name = "primary IPI",
390 389 };
391 390  
arch/powerpc/sysdev/cpm1.c
... ... @@ -119,7 +119,6 @@
119 119  
120 120 static struct irqaction cpm_error_irqaction = {
121 121 .handler = cpm_error_interrupt,
122   - .mask = CPU_MASK_NONE,
123 122 .name = "error",
124 123 };
125 124  
arch/sh/kernel/time_64.c
... ... @@ -284,7 +284,6 @@
284 284 static struct irqaction irq0 = {
285 285 .handler = timer_interrupt,
286 286 .flags = IRQF_DISABLED,
287   - .mask = CPU_MASK_NONE,
288 287 .name = "timer",
289 288 };
290 289  
arch/sh/kernel/timers/timer-cmt.c
... ... @@ -109,7 +109,6 @@
109 109 .name = "timer",
110 110 .handler = cmt_timer_interrupt,
111 111 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
112   - .mask = CPU_MASK_NONE,
113 112 };
114 113  
115 114 static void cmt_clk_init(struct clk *clk)
arch/sh/kernel/timers/timer-mtu2.c
... ... @@ -115,7 +115,6 @@
115 115 .name = "timer",
116 116 .handler = mtu2_timer_interrupt,
117 117 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
118   - .mask = CPU_MASK_NONE,
119 118 };
120 119  
121 120 static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
arch/sh/kernel/timers/timer-tmu.c
... ... @@ -162,7 +162,6 @@
162 162 .name = "periodic/oneshot timer",
163 163 .handler = tmu_timer_interrupt,
164 164 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
165   - .mask = CPU_MASK_NONE,
166 165 };
167 166  
168 167 static void __init tmu_clk_init(struct clk *clk)
arch/sparc/kernel/irq_32.c
... ... @@ -439,7 +439,6 @@
439 439 flush_cache_all();
440 440  
441 441 action->flags = irqflags;
442   - cpus_clear(action->mask);
443 442 action->name = devname;
444 443 action->dev_id = NULL;
445 444 action->next = NULL;
... ... @@ -574,7 +573,6 @@
574 573  
575 574 action->handler = handler;
576 575 action->flags = irqflags;
577   - cpus_clear(action->mask);
578 576 action->name = devname;
579 577 action->next = NULL;
580 578 action->dev_id = dev_id;
arch/sparc/kernel/sun4d_irq.c
... ... @@ -326,7 +326,6 @@
326 326  
327 327 action->handler = handler;
328 328 action->flags = irqflags;
329   - cpus_clear(action->mask);
330 329 action->name = devname;
331 330 action->next = NULL;
332 331 action->dev_id = dev_id;
arch/x86/kernel/irqinit_32.c
... ... @@ -50,7 +50,6 @@
50 50 */
51 51 static struct irqaction fpu_irq = {
52 52 .handler = math_error_irq,
53   - .mask = CPU_MASK_NONE,
54 53 .name = "fpu",
55 54 };
56 55  
... ... @@ -83,7 +82,6 @@
83 82 */
84 83 static struct irqaction irq2 = {
85 84 .handler = no_action,
86   - .mask = CPU_MASK_NONE,
87 85 .name = "cascade",
88 86 };
89 87  
arch/x86/kernel/irqinit_64.c
... ... @@ -45,7 +45,6 @@
45 45  
46 46 static struct irqaction irq2 = {
47 47 .handler = no_action,
48   - .mask = CPU_MASK_NONE,
49 48 .name = "cascade",
50 49 };
51 50 DEFINE_PER_CPU(vector_irq_t, vector_irq) = {
arch/x86/kernel/mfgpt_32.c
... ... @@ -348,7 +348,6 @@
348 348 static struct irqaction mfgptirq = {
349 349 .handler = mfgpt_tick,
350 350 .flags = IRQF_DISABLED | IRQF_NOBALANCING,
351   - .mask = CPU_MASK_NONE,
352 351 .name = "mfgpt-timer"
353 352 };
354 353  
arch/x86/kernel/setup.c
... ... @@ -1027,7 +1027,6 @@
1027 1027 static struct irqaction irq0 = {
1028 1028 .handler = timer_interrupt,
1029 1029 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_IRQPOLL | IRQF_TIMER,
1030   - .mask = CPU_MASK_NONE,
1031 1030 .name = "timer"
1032 1031 };
1033 1032  
arch/x86/kernel/time_64.c
... ... @@ -116,7 +116,6 @@
116 116 static struct irqaction irq0 = {
117 117 .handler = timer_interrupt,
118 118 .flags = IRQF_DISABLED | IRQF_IRQPOLL | IRQF_NOBALANCING | IRQF_TIMER,
119   - .mask = CPU_MASK_NONE,
120 119 .name = "timer"
121 120 };
122 121  
... ... @@ -125,7 +124,6 @@
125 124 if (!hpet_enable())
126 125 setup_pit_timer();
127 126  
128   - irq0.mask = cpumask_of_cpu(0);
129 127 setup_irq(0, &irq0);
130 128 }
131 129  
arch/x86/kernel/vmiclock_32.c
... ... @@ -202,7 +202,6 @@
202 202 .name = "vmi-timer",
203 203 .handler = vmi_timer_interrupt,
204 204 .flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
205   - .mask = CPU_MASK_ALL,
206 205 };
207 206  
208 207 static void __devinit vmi_time_init_clockevent(void)