[MIPS] Add support for BCM47XX CPUs.

Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

[MIPS] Add support for BCM47XX CPUs.
Note that the BCM4710 does not support the wait instruction, this is not a mistake in the code. It originally comes from the OpenWrt patches. Cc: Michael Buesch <mb@bu3sch.de> Cc: Felix Fietkau <nbd@openwrt.org> Cc: Florian Schirmer <jolt@tuxbox.org> Signed-off-by: Aurelien Jarno <aurelien@aurel32.net> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Aurelien Jarno · Ralf Baechle
1 parent ea202c632a
Showing 14 changed files with 385 additions and 2 deletions Side-by-side Diff
arch/mips/Kconfig
arch/mips/Makefile
arch/mips/bcm47xx/Makefile
arch/mips/bcm47xx/irq.c
arch/mips/bcm47xx/prom.c
arch/mips/bcm47xx/serial.c
arch/mips/bcm47xx/setup.c
arch/mips/bcm47xx/time.c
arch/mips/kernel/cpu-probe.c
arch/mips/kernel/proc.c
arch/mips/mm/tlbex.c
include/asm-mips/bootinfo.h
include/asm-mips/cpu.h
include/asm-mips/mach-bcm47xx/bcm47xx.h
@@ -44,6 +44,20 @@
 	  note that a kernel built with this option selected will not be
 	  able to run on normal units.
  
+config BCM47XX
+	bool "BCM47XX based boards"
+	select DMA_NONCOHERENT
+	select HW_HAS_PCI
+	select IRQ_CPU
+	select SYS_HAS_CPU_MIPS32_R1
+	select SYS_SUPPORTS_32BIT_KERNEL
+	select SYS_SUPPORTS_LITTLE_ENDIAN
+	select SSB
+	select SSB_DRIVER_MIPS
+	select GENERIC_GPIO
+	help
+	 Support for BCM47XX based boards
+
 config MIPS_COBALT
 	bool "Cobalt Server"
 	select DMA_NONCOHERENT
@@ -535,6 +535,13 @@
 load-$(CONFIG_SIBYTE_BIGSUR)	:= 0xffffffff80100000
  
 #
+# Broadcom BCM47XX boards
+#
+core-$(CONFIG_BCM47XX)		+= arch/mips/bcm47xx/
+cflags-$(CONFIG_BCM47XX)	+= -Iinclude/asm-mips/mach-bcm47xx
+load-$(CONFIG_BCM47XX)		:= 0xffffffff80001000
+
+#
 # SNI RM
 #
 core-$(CONFIG_SNI_RM)		+= arch/mips/sni/
+#
+# Makefile for the BCM47XX specific kernel interface routines
+# under Linux.
+#
+
+obj-y := irq.o prom.o serial.o setup.o time.o
+/*
+ *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <asm/irq_cpu.h>
+
+void plat_irq_dispatch(void)
+{
+	u32 cause;
+
+	cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
+
+	clear_c0_status(cause);
+
+	if (cause & CAUSEF_IP7)
+		do_IRQ(7);
+	if (cause & CAUSEF_IP2)
+		do_IRQ(2);
+	if (cause & CAUSEF_IP3)
+		do_IRQ(3);
+	if (cause & CAUSEF_IP4)
+		do_IRQ(4);
+	if (cause & CAUSEF_IP5)
+		do_IRQ(5);
+	if (cause & CAUSEF_IP6)
+		do_IRQ(6);
+}
+
+void __init arch_init_irq(void)
+{
+	mips_cpu_irq_init();
+}
+/*
+ *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/init.h>
+#include <asm/bootinfo.h>
+
+const char *get_system_type(void)
+{
+	return "Broadcom BCM47XX";
+}
+
+void __init prom_init(void)
+{
+	unsigned long mem;
+
+	/* Figure out memory size by finding aliases */
+	for (mem = (1 << 20); mem < (128 << 20); mem += (1 << 20)) {
+		if (*(unsigned long *)((unsigned long)(prom_init) + mem) ==
+		    *(unsigned long *)(prom_init))
+			break;
+	}
+
+	add_memory_region(0, mem, BOOT_MEM_RAM);
+}
+
+void __init prom_free_prom_memory(void)
+{
+}
+/*
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License.  See the file "COPYING" in the main directory of this archive
+ * for more details.
+ *
+ * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
+ */
+
+#include <linux/module.h>
+#include <linux/init.h>
+#include <linux/serial.h>
+#include <linux/serial_8250.h>
+#include <linux/ssb/ssb.h>
+#include <bcm47xx.h>
+
+static struct plat_serial8250_port uart8250_data[5];
+
+static struct platform_device uart8250_device = {
+	.name			= "serial8250",
+	.id			= PLAT8250_DEV_PLATFORM,
+	.dev			= {
+		.platform_data	= uart8250_data,
+	},
+};
+
+static int __init uart8250_init(void)
+{
+	int i;
+	struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
+
+	memset(&uart8250_data, 0,  sizeof(uart8250_data));
+
+	for (i = 0; i < mcore->nr_serial_ports; i++) {
+		struct plat_serial8250_port *p = &(uart8250_data[i]);
+		struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
+
+		p->mapbase = (unsigned int) ssb_port->regs;
+		p->membase = (void *) ssb_port->regs;
+		p->irq = ssb_port->irq + 2;
+		p->uartclk = ssb_port->baud_base;
+		p->regshift = ssb_port->reg_shift;
+		p->iotype = UPIO_MEM;
+		p->flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ;
+	}
+	return platform_device_register(&uart8250_device);
+}
+
+module_init(uart8250_init);
+
+MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
+MODULE_LICENSE("GPL");
+MODULE_DESCRIPTION("8250 UART probe driver for the BCM47XX platforms");
+/*
+ *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
+ *  Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
+ *  Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
+ *  Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+#include <linux/types.h>
+#include <linux/ssb/ssb.h>
+#include <asm/reboot.h>
+#include <asm/time.h>
+#include <bcm47xx.h>
+
+struct ssb_bus ssb_bcm47xx;
+EXPORT_SYMBOL(ssb_bcm47xx);
+
+static void bcm47xx_machine_restart(char *command)
+{
+	printk(KERN_ALERT "Please stand by while rebooting the system...\n");
+	local_irq_disable();
+	/* Set the watchdog timer to reset immediately */
+	ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
+	while (1)
+		cpu_relax();
+}
+
+static void bcm47xx_machine_halt(void)
+{
+	/* Disable interrupts and watchdog and spin forever */
+	local_irq_disable();
+	ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
+	while (1)
+		cpu_relax();
+}
+
+static int bcm47xx_get_invariants(struct ssb_bus *bus,
+				   struct ssb_init_invariants *iv)
+{
+	/* TODO: fill ssb_init_invariants using boardtype/boardrev
+	 * CFE environment variables.
+	 */
+	return 0;
+}
+
+void __init plat_mem_setup(void)
+{
+	int err;
+
+	err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
+				      bcm47xx_get_invariants);
+	if (err)
+		panic("Failed to initialize SSB bus (err %d)\n", err);
+
+	_machine_restart = bcm47xx_machine_restart;
+	_machine_halt = bcm47xx_machine_halt;
+	pm_power_off = bcm47xx_machine_halt;
+	board_time_init = bcm47xx_time_init;
+}
+/*
+ *  Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
+ *
+ *  This program is free software; you can redistribute  it and/or modify it
+ *  under  the terms of  the GNU General  Public License as published by the
+ *  Free Software Foundation;  either version 2 of the  License, or (at your
+ *  option) any later version.
+ *
+ *  THIS  SOFTWARE  IS PROVIDED   ``AS  IS'' AND   ANY  EXPRESS OR IMPLIED
+ *  WARRANTIES,   INCLUDING, BUT NOT  LIMITED  TO, THE IMPLIED WARRANTIES OF
+ *  MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.  IN
+ *  NO  EVENT  SHALL   THE AUTHOR  BE    LIABLE FOR ANY   DIRECT, INDIRECT,
+ *  INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
+ *  NOT LIMITED   TO, PROCUREMENT OF  SUBSTITUTE GOODS  OR SERVICES; LOSS OF
+ *  USE, DATA,  OR PROFITS; OR  BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
+ *  ANY THEORY OF LIABILITY, WHETHER IN  CONTRACT, STRICT LIABILITY, OR TORT
+ *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
+ *  THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ *
+ *  You should have received a copy of the  GNU General Public License along
+ *  with this program; if not, write  to the Free Software Foundation, Inc.,
+ *  675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+
+
+#include <linux/init.h>
+#include <linux/ssb/ssb.h>
+#include <asm/time.h>
+#include <bcm47xx.h>
+
+void __init
+bcm47xx_time_init(void)
+{
+	unsigned long hz;
+
+	/*
+	 * Use deterministic values for initial counter interrupt
+	 * so that calibrate delay avoids encountering a counter wrap.
+	 */
+	write_c0_count(0);
+	write_c0_compare(0xffff);
+
+	hz = ssb_cpu_clock(&ssb_bcm47xx.mipscore) / 2;
+	if (!hz)
+		hz = 100000000;
+
+	/* Set MIPS counter frequency for fixed_rate_gettimeoffset() */
+	mips_hpt_frequency = hz;
+}
+
+void __init
+plat_timer_setup(struct irqaction *irq)
+{
+	/* Enable the timer interrupt */
+	setup_irq(7, irq);
+}
@@ -159,6 +159,7 @@
 	case CPU_5KC:
 	case CPU_25KF:
 	case CPU_PR4450:
+	case CPU_BCM3302:
 		cpu_wait = r4k_wait;
 		break;
  
@@ -793,6 +794,22 @@
 }
  
  
+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
+{
+	decode_configs(c);
+	switch (c->processor_id & 0xff00) {
+	case PRID_IMP_BCM3302:
+		c->cputype = CPU_BCM3302;
+		break;
+	case PRID_IMP_BCM4710:
+		c->cputype = CPU_BCM4710;
+		break;
+	default:
+		c->cputype = CPU_UNKNOWN;
+		break;
+	}
+}
+
 __init void cpu_probe(void)
 {
 	struct cpuinfo_mips *c = &current_cpu_data;
@@ -814,6 +831,9 @@
 		break;
 	case PRID_COMP_SIBYTE:
 		cpu_probe_sibyte(c);
+		break;
+	case PRID_COMP_BROADCOM:
+		cpu_probe_broadcom(c);
 		break;
 	case PRID_COMP_SANDCRAFT:
 		cpu_probe_sandcraft(c);
@@ -82,6 +82,8 @@
 	[CPU_VR4181]	= "NEC VR4181",
 	[CPU_VR4181A]	= "NEC VR4181A",
 	[CPU_SR71000]	= "Sandcraft SR71000",
+	[CPU_BCM3302]	= "Broadcom BCM3302",
+	[CPU_BCM4710]	= "Broadcom BCM4710",
 	[CPU_PR4450]	= "Philips PR4450",
 	[CPU_LOONGSON2]	= "ICT Loongson-2",
 };
@@ -908,6 +908,8 @@
 	case CPU_4KSC:
 	case CPU_20KC:
 	case CPU_25KF:
+	case CPU_BCM3302:
+	case CPU_BCM4710:
 	case CPU_LOONGSON2:
 		if (m4kc_tlbp_war())
 			i_nop(p);
@@ -215,6 +215,12 @@
 #define MACH_GROUP_WINDRIVER   28	/* Windriver boards */
 #define MACH_WRPPMC             1
  
+/*
+ * Valid machtype for group Broadcom
+ */
+#define MACH_GROUP_BRCM		23	/* Broadcom			*/
+#define  MACH_BCM47XX		1	/* Broadcom BCM47XX		*/
+
 #define CL_SIZE			COMMAND_LINE_SIZE
  
 const char *get_system_type(void);
@@ -106,6 +106,13 @@
 #define PRID_IMP_SR71000        0x0400
  
 /*
+ * These are the PRID's for when 23:16 == PRID_COMP_BROADCOM
+ */
+
+#define PRID_IMP_BCM4710	0x4000
+#define PRID_IMP_BCM3302	0x9000
+
+/*
  * Definitions for 7:0 on legacy processors
  */
  
@@ -217,8 +224,9 @@
 #define CPU_R14000		64
 #define CPU_LOONGSON1           65
 #define CPU_LOONGSON2           66
-
-#define CPU_LAST		66
+#define CPU_BCM3302		67
+#define CPU_BCM4710		68
+#define CPU_LAST		68
  
 /*
  * ISA Level encodings
+/*
+ * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version 2
+ * of the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
+ */
+
+#ifndef __ASM_BCM47XX_H
+#define __ASM_BCM47XX_H
+
+/* SSB bus */
+extern struct ssb_bus ssb_bcm47xx;
+
+extern void bcm47xx_time_init(void);
+
+#endif /* __ASM_BCM47XX_H */
...	...	@@ -44,6 +44,20 @@
44	44	note that a kernel built with this option selected will not be
45	45	able to run on normal units.
46	46
	47	+config BCM47XX
	48	+ bool "BCM47XX based boards"
	49	+ select DMA_NONCOHERENT
	50	+ select HW_HAS_PCI
	51	+ select IRQ_CPU
	52	+ select SYS_HAS_CPU_MIPS32_R1
	53	+ select SYS_SUPPORTS_32BIT_KERNEL
	54	+ select SYS_SUPPORTS_LITTLE_ENDIAN
	55	+ select SSB
	56	+ select SSB_DRIVER_MIPS
	57	+ select GENERIC_GPIO
	58	+ help
	59	+ Support for BCM47XX based boards
	60	+
47	61	config MIPS_COBALT
48	62	bool "Cobalt Server"
49	63	select DMA_NONCOHERENT
...	...	@@ -535,6 +535,13 @@
535	535	load-$(CONFIG_SIBYTE_BIGSUR) := 0xffffffff80100000
536	536
537	537	#
	538	+# Broadcom BCM47XX boards
	539	+#
	540	+core-$(CONFIG_BCM47XX) += arch/mips/bcm47xx/
	541	+cflags-$(CONFIG_BCM47XX) += -Iinclude/asm-mips/mach-bcm47xx
	542	+load-$(CONFIG_BCM47XX) := 0xffffffff80001000
	543	+
	544	+#
538	545	# SNI RM
539	546	#
540	547	core-$(CONFIG_SNI_RM) += arch/mips/sni/
	1	+#
	2	+# Makefile for the BCM47XX specific kernel interface routines
	3	+# under Linux.
	4	+#
	5	+
	6	+obj-y := irq.o prom.o serial.o setup.o time.o
	1	+/*
	2	+ * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
	3	+ *
	4	+ * This program is free software; you can redistribute it and/or modify it
	5	+ * under the terms of the GNU General Public License as published by the
	6	+ * Free Software Foundation; either version 2 of the License, or (at your
	7	+ * option) any later version.
	8	+ *
	9	+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	10	+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	11	+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	12	+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	13	+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	14	+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	15	+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	16	+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	17	+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	18	+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	19	+ *
	20	+ * You should have received a copy of the GNU General Public License along
	21	+ * with this program; if not, write to the Free Software Foundation, Inc.,
	22	+ * 675 Mass Ave, Cambridge, MA 02139, USA.
	23	+ */
	24	+
	25	+#include <linux/types.h>
	26	+#include <linux/interrupt.h>
	27	+#include <linux/irq.h>
	28	+#include <asm/irq_cpu.h>
	29	+
	30	+void plat_irq_dispatch(void)
	31	+{
	32	+ u32 cause;
	33	+
	34	+ cause = read_c0_cause() & read_c0_status() & CAUSEF_IP;
	35	+
	36	+ clear_c0_status(cause);
	37	+
	38	+ if (cause & CAUSEF_IP7)
	39	+ do_IRQ(7);
	40	+ if (cause & CAUSEF_IP2)
	41	+ do_IRQ(2);
	42	+ if (cause & CAUSEF_IP3)
	43	+ do_IRQ(3);
	44	+ if (cause & CAUSEF_IP4)
	45	+ do_IRQ(4);
	46	+ if (cause & CAUSEF_IP5)
	47	+ do_IRQ(5);
	48	+ if (cause & CAUSEF_IP6)
	49	+ do_IRQ(6);
	50	+}
	51	+
	52	+void __init arch_init_irq(void)
	53	+{
	54	+ mips_cpu_irq_init();
	55	+}
	1	+/*
	2	+ * This file is subject to the terms and conditions of the GNU General Public
	3	+ * License. See the file "COPYING" in the main directory of this archive
	4	+ * for more details.
	5	+ *
	6	+ * Copyright (C) 2007 Aurelien Jarno <aurelien@aurel32.net>
	7	+ */
	8	+
	9	+#include <linux/module.h>
	10	+#include <linux/init.h>
	11	+#include <linux/serial.h>
	12	+#include <linux/serial_8250.h>
	13	+#include <linux/ssb/ssb.h>
	14	+#include <bcm47xx.h>
	15	+
	16	+static struct plat_serial8250_port uart8250_data[5];
	17	+
	18	+static struct platform_device uart8250_device = {
	19	+ .name = "serial8250",
	20	+ .id = PLAT8250_DEV_PLATFORM,
	21	+ .dev = {
	22	+ .platform_data = uart8250_data,
	23	+ },
	24	+};
	25	+
	26	+static int __init uart8250_init(void)
	27	+{
	28	+ int i;
	29	+ struct ssb_mipscore *mcore = &(ssb_bcm47xx.mipscore);
	30	+
	31	+ memset(&uart8250_data, 0, sizeof(uart8250_data));
	32	+
	33	+ for (i = 0; i < mcore->nr_serial_ports; i++) {
	34	+ struct plat_serial8250_port *p = &(uart8250_data[i]);
	35	+ struct ssb_serial_port *ssb_port = &(mcore->serial_ports[i]);
	36	+
	37	+ p->mapbase = (unsigned int) ssb_port->regs;
	38	+ p->membase = (void *) ssb_port->regs;
	39	+ p->irq = ssb_port->irq + 2;
	40	+ p->uartclk = ssb_port->baud_base;
	41	+ p->regshift = ssb_port->reg_shift;
	42	+ p->iotype = UPIO_MEM;
	43	+ p->flags = UPF_BOOT_AUTOCONF \| UPF_SHARE_IRQ;
	44	+ }
	45	+ return platform_device_register(&uart8250_device);
	46	+}
	47	+
	48	+module_init(uart8250_init);
	49	+
	50	+MODULE_AUTHOR("Aurelien Jarno <aurelien@aurel32.net>");
	51	+MODULE_LICENSE("GPL");
	52	+MODULE_DESCRIPTION("8250 UART probe driver for the BCM47XX platforms");
	1	+/*
	2	+ * Copyright (C) 2004 Florian Schirmer <jolt@tuxbox.org>
	3	+ * Copyright (C) 2005 Waldemar Brodkorb <wbx@openwrt.org>
	4	+ * Copyright (C) 2006 Felix Fietkau <nbd@openwrt.org>
	5	+ * Copyright (C) 2006 Michael Buesch <mb@bu3sch.de>
	6	+ *
	7	+ * This program is free software; you can redistribute it and/or modify it
	8	+ * under the terms of the GNU General Public License as published by the
	9	+ * Free Software Foundation; either version 2 of the License, or (at your
	10	+ * option) any later version.
	11	+ *
	12	+ * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
	13	+ * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
	14	+ * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
	15	+ * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
	16	+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
	17	+ * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
	18	+ * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
	19	+ * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
	20	+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
	21	+ * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
	22	+ *
	23	+ * You should have received a copy of the GNU General Public License along
	24	+ * with this program; if not, write to the Free Software Foundation, Inc.,
	25	+ * 675 Mass Ave, Cambridge, MA 02139, USA.
	26	+ */
	27	+
	28	+#include <linux/types.h>
	29	+#include <linux/ssb/ssb.h>
	30	+#include <asm/reboot.h>
	31	+#include <asm/time.h>
	32	+#include <bcm47xx.h>
	33	+
	34	+struct ssb_bus ssb_bcm47xx;
	35	+EXPORT_SYMBOL(ssb_bcm47xx);
	36	+
	37	+static void bcm47xx_machine_restart(char *command)
	38	+{
	39	+ printk(KERN_ALERT "Please stand by while rebooting the system...\n");
	40	+ local_irq_disable();
	41	+ /* Set the watchdog timer to reset immediately */
	42	+ ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 1);
	43	+ while (1)
	44	+ cpu_relax();
	45	+}
	46	+
	47	+static void bcm47xx_machine_halt(void)
	48	+{
	49	+ /* Disable interrupts and watchdog and spin forever */
	50	+ local_irq_disable();
	51	+ ssb_chipco_watchdog_timer_set(&ssb_bcm47xx.chipco, 0);
	52	+ while (1)
	53	+ cpu_relax();
	54	+}
	55	+
	56	+static int bcm47xx_get_invariants(struct ssb_bus *bus,
	57	+ struct ssb_init_invariants *iv)
	58	+{
	59	+ /* TODO: fill ssb_init_invariants using boardtype/boardrev
	60	+ * CFE environment variables.
	61	+ */
	62	+ return 0;
	63	+}
	64	+
	65	+void __init plat_mem_setup(void)
	66	+{
	67	+ int err;
	68	+
	69	+ err = ssb_bus_ssbbus_register(&ssb_bcm47xx, SSB_ENUM_BASE,
	70	+ bcm47xx_get_invariants);
	71	+ if (err)
	72	+ panic("Failed to initialize SSB bus (err %d)\n", err);
	73	+
	74	+ _machine_restart = bcm47xx_machine_restart;
	75	+ _machine_halt = bcm47xx_machine_halt;
	76	+ pm_power_off = bcm47xx_machine_halt;
	77	+ board_time_init = bcm47xx_time_init;
	78	+}
...	...	@@ -159,6 +159,7 @@
159	159	case CPU_5KC:
160	160	case CPU_25KF:
161	161	case CPU_PR4450:
	162	+ case CPU_BCM3302:
162	163	cpu_wait = r4k_wait;
163	164	break;
164	165
...	...	@@ -793,6 +794,22 @@
793	794	}
794	795
795	796
	797	+static inline void cpu_probe_broadcom(struct cpuinfo_mips *c)
	798	+{
	799	+ decode_configs(c);
	800	+ switch (c->processor_id & 0xff00) {
	801	+ case PRID_IMP_BCM3302:
	802	+ c->cputype = CPU_BCM3302;
	803	+ break;
	804	+ case PRID_IMP_BCM4710:
	805	+ c->cputype = CPU_BCM4710;
	806	+ break;
	807	+ default:
	808	+ c->cputype = CPU_UNKNOWN;
	809	+ break;
	810	+ }
	811	+}
	812	+
796	813	__init void cpu_probe(void)
797	814	{
798	815	struct cpuinfo_mips *c = &current_cpu_data;
...	...	@@ -814,6 +831,9 @@
814	831	break;
815	832	case PRID_COMP_SIBYTE:
816	833	cpu_probe_sibyte(c);
	834	+ break;
	835	+ case PRID_COMP_BROADCOM:
	836	+ cpu_probe_broadcom(c);
817	837	break;
818	838	case PRID_COMP_SANDCRAFT:
819	839	cpu_probe_sandcraft(c);
...	...	@@ -82,6 +82,8 @@
82	82	[CPU_VR4181] = "NEC VR4181",
83	83	[CPU_VR4181A] = "NEC VR4181A",
84	84	[CPU_SR71000] = "Sandcraft SR71000",
	85	+ [CPU_BCM3302] = "Broadcom BCM3302",
	86	+ [CPU_BCM4710] = "Broadcom BCM4710",
85	87	[CPU_PR4450] = "Philips PR4450",
86	88	[CPU_LOONGSON2] = "ICT Loongson-2",
87	89	};
...	...	@@ -908,6 +908,8 @@
908	908	case CPU_4KSC:
909	909	case CPU_20KC:
910	910	case CPU_25KF:
	911	+ case CPU_BCM3302:
	912	+ case CPU_BCM4710:
911	913	case CPU_LOONGSON2:
912	914	if (m4kc_tlbp_war())
913	915	i_nop(p);
...	...	@@ -215,6 +215,12 @@
215	215	#define MACH_GROUP_WINDRIVER 28 /* Windriver boards */
216	216	#define MACH_WRPPMC 1
217	217
	218	+/*
	219	+ * Valid machtype for group Broadcom
	220	+ */
	221	+#define MACH_GROUP_BRCM 23 /* Broadcom */
	222	+#define MACH_BCM47XX 1 /* Broadcom BCM47XX */
	223	+
218	224	#define CL_SIZE COMMAND_LINE_SIZE
219	225
220	226	const char *get_system_type(void);