Commit 1d5cc192d431bce2ebe9fde64054ce903200e179
1 parent
ac8b422838
Exists in
master
and in
39 other branches
pcmcia: use pcmica_{read,write}_config_byte
Use pcmcia_read_config_byte and pcmcia_write_config_byte instead of pcmcia_access_configuration_register. CC: netdev@vger.kernel.org CC: linux-wireless@vger.kernel.org CC: linux-serial@vger.kernel.org CC: Michael Buesch <mb@bu3sch.de> Signed-off-by: Dominik Brodowski <linux@dominikbrodowski.net>
Showing 12 changed files with 104 additions and 178 deletions Side-by-side Diff
- drivers/net/pcmcia/axnet_cs.c
- drivers/net/pcmcia/nmclan_cs.c
- drivers/net/pcmcia/xirc2ps_cs.c
- drivers/net/wireless/hostap/hostap_cs.c
- drivers/net/wireless/orinoco/spectrum_cs.c
- drivers/pcmcia/cistpl.c
- drivers/pcmcia/cs_internal.h
- drivers/pcmcia/pcmcia_resource.c
- drivers/serial/serial_cs.c
- drivers/ssb/pcmcia.c
- include/pcmcia/cs.h
- include/pcmcia/ds.h
drivers/net/pcmcia/axnet_cs.c
... | ... | @@ -378,8 +378,7 @@ |
378 | 378 | /* Maybe PHY is in power down mode. (PPD_SET = 1) |
379 | 379 | Bit 2 of CCSR is active low. */ |
380 | 380 | if (i == 32) { |
381 | - conf_reg_t reg = { 0, CS_WRITE, CISREG_CCSR, 0x04 }; | |
382 | - pcmcia_access_configuration_register(link, ®); | |
381 | + pcmcia_write_config_byte(link, CISREG_CCSR, 0x04); | |
383 | 382 | for (i = 0; i < 32; i++) { |
384 | 383 | j = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 1); |
385 | 384 | j2 = mdio_read(dev->base_addr + AXNET_MII_EEP, i, 2); |
drivers/net/pcmcia/nmclan_cs.c
... | ... | @@ -757,29 +757,20 @@ |
757 | 757 | |
758 | 758 | #if RESET_XILINX |
759 | 759 | struct pcmcia_device *link = &lp->link; |
760 | - conf_reg_t reg; | |
761 | - u_long OrigCorValue; | |
760 | + u8 OrigCorValue; | |
762 | 761 | |
763 | 762 | /* Save original COR value */ |
764 | - reg.Function = 0; | |
765 | - reg.Action = CS_READ; | |
766 | - reg.Offset = CISREG_COR; | |
767 | - reg.Value = 0; | |
768 | - pcmcia_access_configuration_register(link, ®); | |
769 | - OrigCorValue = reg.Value; | |
763 | + pcmcia_read_config_byte(link, CISREG_COR, &OrigCorValue); | |
770 | 764 | |
771 | 765 | /* Reset Xilinx */ |
772 | - reg.Action = CS_WRITE; | |
773 | - reg.Offset = CISREG_COR; | |
774 | - dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%lX, resetting...\n", | |
766 | + dev_dbg(&link->dev, "nmclan_reset: OrigCorValue=0x%x, resetting...\n", | |
775 | 767 | OrigCorValue); |
776 | - reg.Value = COR_SOFT_RESET; | |
777 | - pcmcia_access_configuration_register(link, ®); | |
768 | + pcmcia_write_config_byte(link, CISREG_COR, COR_SOFT_RESET); | |
778 | 769 | /* Need to wait for 20 ms for PCMCIA to finish reset. */ |
779 | 770 | |
780 | 771 | /* Restore original COR configuration index */ |
781 | - reg.Value = COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK); | |
782 | - pcmcia_access_configuration_register(link, ®); | |
772 | + pcmcia_write_config_byte(link, CISREG_COR, | |
773 | + (COR_LEVEL_REQ | (OrigCorValue & COR_CONFIG_MASK))); | |
783 | 774 | /* Xilinx is now completely reset along with the MACE chip. */ |
784 | 775 | lp->tx_free_frames=AM2150_MAX_TX_FRAMES; |
785 | 776 |
drivers/net/pcmcia/xirc2ps_cs.c
... | ... | @@ -869,7 +869,6 @@ |
869 | 869 | goto config_error; |
870 | 870 | |
871 | 871 | if (local->dingo) { |
872 | - conf_reg_t reg; | |
873 | 872 | win_req_t req; |
874 | 873 | memreq_t mem; |
875 | 874 | |
876 | 875 | |
... | ... | @@ -878,15 +877,14 @@ |
878 | 877 | * the base address of the ethernet port (BasePort1) is written |
879 | 878 | * to the BAR registers of the modem. |
880 | 879 | */ |
881 | - reg.Action = CS_WRITE; | |
882 | - reg.Offset = CISREG_IOBASE_0; | |
883 | - reg.Value = link->io.BasePort2 & 0xff; | |
884 | - if ((err = pcmcia_access_configuration_register(link, ®))) | |
880 | + err = pcmcia_write_config_byte(link, CISREG_IOBASE_0, | |
881 | + link->io.BasePort2 & 0xff); | |
882 | + if (err) | |
885 | 883 | goto config_error; |
886 | - reg.Action = CS_WRITE; | |
887 | - reg.Offset = CISREG_IOBASE_1; | |
888 | - reg.Value = (link->io.BasePort2 >> 8) & 0xff; | |
889 | - if ((err = pcmcia_access_configuration_register(link, ®))) | |
884 | + | |
885 | + err = pcmcia_write_config_byte(link, CISREG_IOBASE_1, | |
886 | + (link->io.BasePort2 >> 8) & 0xff); | |
887 | + if (err) | |
890 | 888 | goto config_error; |
891 | 889 | |
892 | 890 | /* There is no config entry for the Ethernet part which |
drivers/net/wireless/hostap/hostap_cs.c
... | ... | @@ -224,27 +224,18 @@ |
224 | 224 | static void sandisk_set_iobase(local_info_t *local) |
225 | 225 | { |
226 | 226 | int res; |
227 | - conf_reg_t reg; | |
228 | 227 | struct hostap_cs_priv *hw_priv = local->hw_priv; |
229 | 228 | |
230 | - reg.Function = 0; | |
231 | - reg.Action = CS_WRITE; | |
232 | - reg.Offset = 0x10; /* 0x3f0 IO base 1 */ | |
233 | - reg.Value = hw_priv->link->io.BasePort1 & 0x00ff; | |
234 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
235 | - ®); | |
229 | + res = pcmcia_write_config_byte(hw_priv->link, 0x10, | |
230 | + hw_priv->link->io.BasePort1 & 0x00ff); | |
236 | 231 | if (res != 0) { |
237 | 232 | printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 0 -" |
238 | 233 | " res=%d\n", res); |
239 | 234 | } |
240 | 235 | udelay(10); |
241 | 236 | |
242 | - reg.Function = 0; | |
243 | - reg.Action = CS_WRITE; | |
244 | - reg.Offset = 0x12; /* 0x3f2 IO base 2 */ | |
245 | - reg.Value = (hw_priv->link->io.BasePort1 & 0xff00) >> 8; | |
246 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
247 | - ®); | |
237 | + res = pcmcia_write_config_byte(hw_priv->link, 0x12, | |
238 | + (hw_priv->link->io.BasePort1 >> 8) & 0x00ff); | |
248 | 239 | if (res != 0) { |
249 | 240 | printk(KERN_DEBUG "Prism3 SanDisk - failed to set I/O base 1 -" |
250 | 241 | " res=%d\n", res); |
... | ... | @@ -270,7 +261,6 @@ |
270 | 261 | static int sandisk_enable_wireless(struct net_device *dev) |
271 | 262 | { |
272 | 263 | int res, ret = 0; |
273 | - conf_reg_t reg; | |
274 | 264 | struct hostap_interface *iface = netdev_priv(dev); |
275 | 265 | local_info_t *local = iface->local; |
276 | 266 | struct hostap_cs_priv *hw_priv = local->hw_priv; |
... | ... | @@ -297,12 +287,8 @@ |
297 | 287 | " - using vendor-specific initialization\n", dev->name); |
298 | 288 | hw_priv->sandisk_connectplus = 1; |
299 | 289 | |
300 | - reg.Function = 0; | |
301 | - reg.Action = CS_WRITE; | |
302 | - reg.Offset = CISREG_COR; | |
303 | - reg.Value = COR_SOFT_RESET; | |
304 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
305 | - ®); | |
290 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, | |
291 | + COR_SOFT_RESET); | |
306 | 292 | if (res != 0) { |
307 | 293 | printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n", |
308 | 294 | dev->name, res); |
309 | 295 | |
... | ... | @@ -310,16 +296,13 @@ |
310 | 296 | } |
311 | 297 | mdelay(5); |
312 | 298 | |
313 | - reg.Function = 0; | |
314 | - reg.Action = CS_WRITE; | |
315 | - reg.Offset = CISREG_COR; | |
316 | 299 | /* |
317 | 300 | * Do not enable interrupts here to avoid some bogus events. Interrupts |
318 | 301 | * will be enabled during the first cor_sreset call. |
319 | 302 | */ |
320 | - reg.Value = COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | COR_FUNC_ENA; | |
321 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
322 | - ®); | |
303 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, | |
304 | + (COR_LEVEL_REQ | 0x8 | COR_ADDR_DECODE | | |
305 | + COR_FUNC_ENA)); | |
323 | 306 | if (res != 0) { |
324 | 307 | printk(KERN_DEBUG "%s: SanDisk - COR sreset failed (%d)\n", |
325 | 308 | dev->name, res); |
326 | 309 | |
327 | 310 | |
328 | 311 | |
... | ... | @@ -342,30 +325,23 @@ |
342 | 325 | static void prism2_pccard_cor_sreset(local_info_t *local) |
343 | 326 | { |
344 | 327 | int res; |
345 | - conf_reg_t reg; | |
328 | + u8 val; | |
346 | 329 | struct hostap_cs_priv *hw_priv = local->hw_priv; |
347 | 330 | |
348 | 331 | if (!prism2_pccard_card_present(local)) |
349 | 332 | return; |
350 | 333 | |
351 | - reg.Function = 0; | |
352 | - reg.Action = CS_READ; | |
353 | - reg.Offset = CISREG_COR; | |
354 | - reg.Value = 0; | |
355 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
356 | - ®); | |
334 | + res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &val); | |
357 | 335 | if (res != 0) { |
358 | 336 | printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 1 (%d)\n", |
359 | 337 | res); |
360 | 338 | return; |
361 | 339 | } |
362 | 340 | printk(KERN_DEBUG "prism2_pccard_cor_sreset: original COR %02x\n", |
363 | - reg.Value); | |
341 | + val); | |
364 | 342 | |
365 | - reg.Action = CS_WRITE; | |
366 | - reg.Value |= COR_SOFT_RESET; | |
367 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
368 | - ®); | |
343 | + val |= COR_SOFT_RESET; | |
344 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val); | |
369 | 345 | if (res != 0) { |
370 | 346 | printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 2 (%d)\n", |
371 | 347 | res); |
372 | 348 | |
... | ... | @@ -374,11 +350,10 @@ |
374 | 350 | |
375 | 351 | mdelay(hw_priv->sandisk_connectplus ? 5 : 2); |
376 | 352 | |
377 | - reg.Value &= ~COR_SOFT_RESET; | |
353 | + val &= ~COR_SOFT_RESET; | |
378 | 354 | if (hw_priv->sandisk_connectplus) |
379 | - reg.Value |= COR_IREQ_ENA; | |
380 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
381 | - ®); | |
355 | + val |= COR_IREQ_ENA; | |
356 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, val); | |
382 | 357 | if (res != 0) { |
383 | 358 | printk(KERN_DEBUG "prism2_pccard_cor_sreset failed 3 (%d)\n", |
384 | 359 | res); |
... | ... | @@ -395,8 +370,7 @@ |
395 | 370 | static void prism2_pccard_genesis_reset(local_info_t *local, int hcr) |
396 | 371 | { |
397 | 372 | int res; |
398 | - conf_reg_t reg; | |
399 | - int old_cor; | |
373 | + u8 old_cor; | |
400 | 374 | struct hostap_cs_priv *hw_priv = local->hw_priv; |
401 | 375 | |
402 | 376 | if (!prism2_pccard_card_present(local)) |
403 | 377 | |
404 | 378 | |
... | ... | @@ -407,25 +381,17 @@ |
407 | 381 | return; |
408 | 382 | } |
409 | 383 | |
410 | - reg.Function = 0; | |
411 | - reg.Action = CS_READ; | |
412 | - reg.Offset = CISREG_COR; | |
413 | - reg.Value = 0; | |
414 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
415 | - ®); | |
384 | + res = pcmcia_read_config_byte(hw_priv->link, CISREG_COR, &old_cor); | |
416 | 385 | if (res != 0) { |
417 | 386 | printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 1 " |
418 | 387 | "(%d)\n", res); |
419 | 388 | return; |
420 | 389 | } |
421 | 390 | printk(KERN_DEBUG "prism2_pccard_genesis_sreset: original COR %02x\n", |
422 | - reg.Value); | |
423 | - old_cor = reg.Value; | |
391 | + old_cor); | |
424 | 392 | |
425 | - reg.Action = CS_WRITE; | |
426 | - reg.Value |= COR_SOFT_RESET; | |
427 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
428 | - ®); | |
393 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, | |
394 | + old_cor | COR_SOFT_RESET); | |
429 | 395 | if (res != 0) { |
430 | 396 | printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 2 " |
431 | 397 | "(%d)\n", res); |
... | ... | @@ -435,11 +401,7 @@ |
435 | 401 | mdelay(10); |
436 | 402 | |
437 | 403 | /* Setup Genesis mode */ |
438 | - reg.Action = CS_WRITE; | |
439 | - reg.Value = hcr; | |
440 | - reg.Offset = CISREG_CCSR; | |
441 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
442 | - ®); | |
404 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_CCSR, hcr); | |
443 | 405 | if (res != 0) { |
444 | 406 | printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 3 " |
445 | 407 | "(%d)\n", res); |
... | ... | @@ -447,11 +409,8 @@ |
447 | 409 | } |
448 | 410 | mdelay(10); |
449 | 411 | |
450 | - reg.Action = CS_WRITE; | |
451 | - reg.Offset = CISREG_COR; | |
452 | - reg.Value = old_cor & ~COR_SOFT_RESET; | |
453 | - res = pcmcia_access_configuration_register(hw_priv->link, | |
454 | - ®); | |
412 | + res = pcmcia_write_config_byte(hw_priv->link, CISREG_COR, | |
413 | + old_cor & ~COR_SOFT_RESET); | |
455 | 414 | if (res != 0) { |
456 | 415 | printk(KERN_DEBUG "prism2_pccard_genesis_sreset failed 4 " |
457 | 416 | "(%d)\n", res); |
drivers/net/wireless/orinoco/spectrum_cs.c
... | ... | @@ -79,35 +79,27 @@ |
79 | 79 | spectrum_reset(struct pcmcia_device *link, int idle) |
80 | 80 | { |
81 | 81 | int ret; |
82 | - conf_reg_t reg; | |
83 | - u_int save_cor; | |
82 | + u8 save_cor; | |
83 | + u8 ccsr; | |
84 | 84 | |
85 | 85 | /* Doing it if hardware is gone is guaranteed crash */ |
86 | 86 | if (!pcmcia_dev_present(link)) |
87 | 87 | return -ENODEV; |
88 | 88 | |
89 | 89 | /* Save original COR value */ |
90 | - reg.Function = 0; | |
91 | - reg.Action = CS_READ; | |
92 | - reg.Offset = CISREG_COR; | |
93 | - ret = pcmcia_access_configuration_register(link, ®); | |
90 | + ret = pcmcia_read_config_byte(link, CISREG_COR, &save_cor); | |
94 | 91 | if (ret) |
95 | 92 | goto failed; |
96 | - save_cor = reg.Value; | |
97 | 93 | |
98 | 94 | /* Soft-Reset card */ |
99 | - reg.Action = CS_WRITE; | |
100 | - reg.Offset = CISREG_COR; | |
101 | - reg.Value = (save_cor | COR_SOFT_RESET); | |
102 | - ret = pcmcia_access_configuration_register(link, ®); | |
95 | + ret = pcmcia_write_config_byte(link, CISREG_COR, | |
96 | + (save_cor | COR_SOFT_RESET)); | |
103 | 97 | if (ret) |
104 | 98 | goto failed; |
105 | 99 | udelay(1000); |
106 | 100 | |
107 | 101 | /* Read CCSR */ |
108 | - reg.Action = CS_READ; | |
109 | - reg.Offset = CISREG_CCSR; | |
110 | - ret = pcmcia_access_configuration_register(link, ®); | |
102 | + ret = pcmcia_read_config_byte(link, CISREG_CCSR, &ccsr); | |
111 | 103 | if (ret) |
112 | 104 | goto failed; |
113 | 105 | |
114 | 106 | |
... | ... | @@ -115,19 +107,15 @@ |
115 | 107 | * Start or stop the firmware. Memory width bit should be |
116 | 108 | * preserved from the value we've just read. |
117 | 109 | */ |
118 | - reg.Action = CS_WRITE; | |
119 | - reg.Offset = CISREG_CCSR; | |
120 | - reg.Value = (idle ? HCR_IDLE : HCR_RUN) | (reg.Value & HCR_MEM16); | |
121 | - ret = pcmcia_access_configuration_register(link, ®); | |
110 | + ccsr = (idle ? HCR_IDLE : HCR_RUN) | (ccsr & HCR_MEM16); | |
111 | + ret = pcmcia_write_config_byte(link, CISREG_CCSR, ccsr); | |
122 | 112 | if (ret) |
123 | 113 | goto failed; |
124 | 114 | udelay(1000); |
125 | 115 | |
126 | 116 | /* Restore original COR configuration index */ |
127 | - reg.Action = CS_WRITE; | |
128 | - reg.Offset = CISREG_COR; | |
129 | - reg.Value = (save_cor & ~COR_SOFT_RESET); | |
130 | - ret = pcmcia_access_configuration_register(link, ®); | |
117 | + ret = pcmcia_write_config_byte(link, CISREG_COR, | |
118 | + (save_cor & ~COR_SOFT_RESET)); | |
131 | 119 | if (ret) |
132 | 120 | goto failed; |
133 | 121 | udelay(1000); |
drivers/pcmcia/cistpl.c
... | ... | @@ -209,7 +209,7 @@ |
209 | 209 | * Probably only useful for writing one-byte registers. Must be called |
210 | 210 | * with ops_mutex held. |
211 | 211 | */ |
212 | -void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr, | |
212 | +int pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, u_int addr, | |
213 | 213 | u_int len, void *ptr) |
214 | 214 | { |
215 | 215 | void __iomem *sys, *end; |
... | ... | @@ -231,7 +231,7 @@ |
231 | 231 | ((cis_width) ? MAP_16BIT : 0)); |
232 | 232 | if (!sys) { |
233 | 233 | dev_dbg(&s->dev, "could not map memory\n"); |
234 | - return; /* FIXME: Error */ | |
234 | + return -EINVAL; | |
235 | 235 | } |
236 | 236 | |
237 | 237 | writeb(flags, sys+CISREG_ICTRL0); |
... | ... | @@ -256,7 +256,7 @@ |
256 | 256 | sys = set_cis_map(s, card_offset, flags); |
257 | 257 | if (!sys) { |
258 | 258 | dev_dbg(&s->dev, "could not map memory\n"); |
259 | - return; /* FIXME: error */ | |
259 | + return -EINVAL; | |
260 | 260 | } |
261 | 261 | |
262 | 262 | end = sys + s->map_size; |
... | ... | @@ -270,6 +270,7 @@ |
270 | 270 | addr = 0; |
271 | 271 | } |
272 | 272 | } |
273 | + return 0; | |
273 | 274 | } |
274 | 275 | |
275 | 276 |
drivers/pcmcia/cs_internal.h
... | ... | @@ -158,8 +158,8 @@ |
158 | 158 | |
159 | 159 | int pcmcia_read_cis_mem(struct pcmcia_socket *s, int attr, |
160 | 160 | u_int addr, u_int len, void *ptr); |
161 | -void pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, | |
162 | - u_int addr, u_int len, void *ptr); | |
161 | +int pcmcia_write_cis_mem(struct pcmcia_socket *s, int attr, | |
162 | + u_int addr, u_int len, void *ptr); | |
163 | 163 | void release_cis_mem(struct pcmcia_socket *s); |
164 | 164 | void destroy_cis_cache(struct pcmcia_socket *s); |
165 | 165 | int pccard_read_tuple(struct pcmcia_socket *s, unsigned int function, |
drivers/pcmcia/pcmcia_resource.c
... | ... | @@ -108,25 +108,25 @@ |
108 | 108 | } /* release_io_space */ |
109 | 109 | |
110 | 110 | |
111 | -/** pccard_access_configuration_register | |
111 | +/** | |
112 | + * pcmcia_access_config() - read or write card configuration registers | |
112 | 113 | * |
113 | - * Access_configuration_register() reads and writes configuration | |
114 | - * registers in attribute memory. Memory window 0 is reserved for | |
115 | - * this and the tuple reading services. | |
114 | + * pcmcia_access_config() reads and writes configuration registers in | |
115 | + * attribute memory. Memory window 0 is reserved for this and the tuple | |
116 | + * reading services. Drivers must use pcmcia_read_config_byte() or | |
117 | + * pcmcia_write_config_byte(). | |
116 | 118 | */ |
117 | - | |
118 | -int pcmcia_access_configuration_register(struct pcmcia_device *p_dev, | |
119 | - conf_reg_t *reg) | |
119 | +static int pcmcia_access_config(struct pcmcia_device *p_dev, | |
120 | + off_t where, u8 *val, | |
121 | + int (*accessf) (struct pcmcia_socket *s, | |
122 | + int attr, unsigned int addr, | |
123 | + unsigned int len, void *ptr)) | |
120 | 124 | { |
121 | 125 | struct pcmcia_socket *s; |
122 | 126 | config_t *c; |
123 | 127 | int addr; |
124 | - u_char val; | |
125 | 128 | int ret = 0; |
126 | 129 | |
127 | - if (!p_dev || !p_dev->function_config) | |
128 | - return -EINVAL; | |
129 | - | |
130 | 130 | s = p_dev->socket; |
131 | 131 | |
132 | 132 | mutex_lock(&s->ops_mutex); |
133 | 133 | |
134 | 134 | |
135 | 135 | |
... | ... | @@ -138,26 +138,40 @@ |
138 | 138 | return -EACCES; |
139 | 139 | } |
140 | 140 | |
141 | - addr = (c->ConfigBase + reg->Offset) >> 1; | |
141 | + addr = (c->ConfigBase + where) >> 1; | |
142 | 142 | |
143 | - switch (reg->Action) { | |
144 | - case CS_READ: | |
145 | - ret = pcmcia_read_cis_mem(s, 1, addr, 1, &val); | |
146 | - reg->Value = val; | |
147 | - break; | |
148 | - case CS_WRITE: | |
149 | - val = reg->Value; | |
150 | - pcmcia_write_cis_mem(s, 1, addr, 1, &val); | |
151 | - break; | |
152 | - default: | |
153 | - dev_dbg(&s->dev, "Invalid conf register request\n"); | |
154 | - ret = -EINVAL; | |
155 | - break; | |
156 | - } | |
143 | + ret = accessf(s, 1, addr, 1, val); | |
144 | + | |
157 | 145 | mutex_unlock(&s->ops_mutex); |
146 | + | |
158 | 147 | return ret; |
159 | -} /* pcmcia_access_configuration_register */ | |
160 | -EXPORT_SYMBOL(pcmcia_access_configuration_register); | |
148 | +} /* pcmcia_access_config */ | |
149 | + | |
150 | + | |
151 | +/** | |
152 | + * pcmcia_read_config_byte() - read a byte from a card configuration register | |
153 | + * | |
154 | + * pcmcia_read_config_byte() reads a byte from a configuration register in | |
155 | + * attribute memory. | |
156 | + */ | |
157 | +int pcmcia_read_config_byte(struct pcmcia_device *p_dev, off_t where, u8 *val) | |
158 | +{ | |
159 | + return pcmcia_access_config(p_dev, where, val, pcmcia_read_cis_mem); | |
160 | +} | |
161 | +EXPORT_SYMBOL(pcmcia_read_config_byte); | |
162 | + | |
163 | + | |
164 | +/** | |
165 | + * pcmcia_write_config_byte() - write a byte to a card configuration register | |
166 | + * | |
167 | + * pcmcia_write_config_byte() writes a byte to a configuration register in | |
168 | + * attribute memory. | |
169 | + */ | |
170 | +int pcmcia_write_config_byte(struct pcmcia_device *p_dev, off_t where, u8 val) | |
171 | +{ | |
172 | + return pcmcia_access_config(p_dev, where, &val, pcmcia_write_cis_mem); | |
173 | +} | |
174 | +EXPORT_SYMBOL(pcmcia_write_config_byte); | |
161 | 175 | |
162 | 176 | |
163 | 177 | int pcmcia_map_mem_page(struct pcmcia_device *p_dev, window_handle_t wh, |
drivers/serial/serial_cs.c
... | ... | @@ -114,16 +114,14 @@ |
114 | 114 | |
115 | 115 | static int quirk_post_ibm(struct pcmcia_device *link) |
116 | 116 | { |
117 | - conf_reg_t reg = { 0, CS_READ, 0x800, 0 }; | |
117 | + u8 val; | |
118 | 118 | int ret; |
119 | 119 | |
120 | - ret = pcmcia_access_configuration_register(link, ®); | |
120 | + ret = pcmcia_read_config_byte(link, 0x800, &val); | |
121 | 121 | if (ret) |
122 | 122 | goto failed; |
123 | 123 | |
124 | - reg.Action = CS_WRITE; | |
125 | - reg.Value = reg.Value | 1; | |
126 | - ret = pcmcia_access_configuration_register(link, ®); | |
124 | + ret = pcmcia_write_config_byte(link, 0x800, val | 1); | |
127 | 125 | if (ret) |
128 | 126 | goto failed; |
129 | 127 | return 0; |
drivers/ssb/pcmcia.c
... | ... | @@ -71,14 +71,9 @@ |
71 | 71 | /* Write to a PCMCIA configuration register. */ |
72 | 72 | static int ssb_pcmcia_cfg_write(struct ssb_bus *bus, u8 offset, u8 value) |
73 | 73 | { |
74 | - conf_reg_t reg; | |
75 | 74 | int res; |
76 | 75 | |
77 | - memset(®, 0, sizeof(reg)); | |
78 | - reg.Offset = offset; | |
79 | - reg.Action = CS_WRITE; | |
80 | - reg.Value = value; | |
81 | - res = pcmcia_access_configuration_register(bus->host_pcmcia, ®); | |
76 | + res = pcmcia_write_config_byte(bus->host_pcmcia, offset, value); | |
82 | 77 | if (unlikely(res != 0)) |
83 | 78 | return -EBUSY; |
84 | 79 | |
85 | 80 | |
86 | 81 | |
... | ... | @@ -88,16 +83,11 @@ |
88 | 83 | /* Read from a PCMCIA configuration register. */ |
89 | 84 | static int ssb_pcmcia_cfg_read(struct ssb_bus *bus, u8 offset, u8 *value) |
90 | 85 | { |
91 | - conf_reg_t reg; | |
92 | 86 | int res; |
93 | 87 | |
94 | - memset(®, 0, sizeof(reg)); | |
95 | - reg.Offset = offset; | |
96 | - reg.Action = CS_READ; | |
97 | - res = pcmcia_access_configuration_register(bus->host_pcmcia, ®); | |
88 | + res = pcmcia_read_config_byte(bus->host_pcmcia, offset, value); | |
98 | 89 | if (unlikely(res != 0)) |
99 | 90 | return -EBUSY; |
100 | - *value = reg.Value; | |
101 | 91 | |
102 | 92 | return 0; |
103 | 93 | } |
include/pcmcia/cs.h
... | ... | @@ -19,18 +19,6 @@ |
19 | 19 | #include <linux/interrupt.h> |
20 | 20 | #endif |
21 | 21 | |
22 | -/* For AccessConfigurationRegister */ | |
23 | -typedef struct conf_reg_t { | |
24 | - u_char Function; | |
25 | - u_int Action; | |
26 | - off_t Offset; | |
27 | - u_int Value; | |
28 | -} conf_reg_t; | |
29 | - | |
30 | -/* Actions */ | |
31 | -#define CS_READ 1 | |
32 | -#define CS_WRITE 2 | |
33 | - | |
34 | 22 | /* for AdjustResourceInfo */ |
35 | 23 | /* Action field */ |
36 | 24 | #define REMOVE_MANAGED_RESOURCE 1 |
include/pcmcia/ds.h
... | ... | @@ -174,8 +174,8 @@ |
174 | 174 | int pcmcia_reset_card(struct pcmcia_socket *skt); |
175 | 175 | |
176 | 176 | /* CIS config */ |
177 | -int pcmcia_access_configuration_register(struct pcmcia_device *p_dev, | |
178 | - conf_reg_t *reg); | |
177 | +int pcmcia_read_config_byte(struct pcmcia_device *p_dev, off_t where, u8 *val); | |
178 | +int pcmcia_write_config_byte(struct pcmcia_device *p_dev, off_t where, u8 val); | |
179 | 179 | |
180 | 180 | /* device configuration */ |
181 | 181 | int pcmcia_request_io(struct pcmcia_device *p_dev, io_req_t *req); |