arch/tile: various header improvements for building drivers

This change adds a number of missing headers in asm (fb.h, parport.h, serial.h, and vga.h) using the minimal generic versions. It also adds a number of missing interfaces that showed up as build failures when trying to build various drivers not normally included in the "tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(), virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(), and __pmd(). I also added a cast in virt_to_page() since not all callers pass a pointer. I fixed <asm/stat.h> to properly include a __KERNEL__ guard for the __ARCH_WANT_STAT64 symbol, and <asm/swab.h> to use __builtin_bswap32() even for our 64-bit architecture, since the same code is produced. I added an export for get_cycles(), since it's used in some modules. And I made <arch/spr_def.h> properly include the __KERNEL__ guard, even though it's not yet exported, since it likely will be soon. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>

arch/tile: various header improvements for building drivers
This change adds a number of missing headers in asm (fb.h, parport.h, serial.h, and vga.h) using the minimal generic versions. It also adds a number of missing interfaces that showed up as build failures when trying to build various drivers not normally included in the "tile" distribution: ioremap_wc(), memset_io(), io{read,write}{16,32}be(), virt_to_bus(), bus_to_virt(), irq_canonicalize(), __pte(), __pgd(), and __pmd(). I also added a cast in virt_to_page() since not all callers pass a pointer. I fixed <asm/stat.h> to properly include a __KERNEL__ guard for the __ARCH_WANT_STAT64 symbol, and <asm/swab.h> to use __builtin_bswap32() even for our 64-bit architecture, since the same code is produced. I added an export for get_cycles(), since it's used in some modules. And I made <arch/spr_def.h> properly include the __KERNEL__ guard, even though it's not yet exported, since it likely will be soon. Signed-off-by: Chris Metcalf <cmetcalf@tilera.com>
Chris Metcalf
1 parent dbb434214e
Showing 11 changed files with 83 additions and 10 deletions Side-by-side Diff
arch/tile/include/arch/spr_def.h
arch/tile/include/asm/fb.h
arch/tile/include/asm/io.h
arch/tile/include/asm/irq.h
arch/tile/include/asm/page.h
arch/tile/include/asm/parport.h
arch/tile/include/asm/serial.h
arch/tile/include/asm/stat.h
arch/tile/include/asm/swab.h
arch/tile/include/asm/vga.h
arch/tile/kernel/time.c
@@ -12,6 +12,15 @@
  *   more details.
  */
  
+/* Include the proper base SPR definition file. */
+#ifdef __tilegx__
+#include <arch/spr_def_64.h>
+#else
+#include <arch/spr_def_32.h>
+#endif
+
+#ifdef __KERNEL__
+
 /*
  * In addition to including the proper base SPR definition file, depending
  * on machine architecture, this file defines several macros which allow
@@ -29,7 +38,6 @@
 #define _concat4(a, b, c, d)  __concat4(a, b, c, d)
  
 #ifdef __tilegx__
-#include <arch/spr_def_64.h>
  
 /* TILE-Gx dependent, protection-level dependent SPRs. */
  
@@ -65,7 +73,6 @@
 	_concat4(INT_SINGLE_STEP_, CONFIG_KERNEL_PL,,)
  
 #else
-#include <arch/spr_def_32.h>
  
 /* TILEPro dependent, protection-level dependent SPRs. */
  
@@ -102,4 +109,6 @@
 	_concat4(SPR_INTCTRL_, CONFIG_KERNEL_PL, _STATUS,)
 #define INT_INTCTRL_K \
 	_concat4(INT_INTCTRL_, CONFIG_KERNEL_PL,,)
+
+#endif /* __KERNEL__ */
+#include <asm-generic/fb.h>
@@ -52,6 +52,7 @@
 #endif
  
 #define ioremap_nocache(physaddr, size)		ioremap(physaddr, size)
+#define ioremap_wc(physaddr, size)		ioremap(physaddr, size)
 #define ioremap_writethrough(physaddr, size)	ioremap(physaddr, size)
 #define ioremap_fullcache(physaddr, size)	ioremap(physaddr, size)
  
@@ -161,6 +162,15 @@
 #define iowrite32 writel
 #define iowrite64 writeq
  
+static inline void memset_io(void *dst, int val, size_t len)
+{
+	int x;
+	BUG_ON((unsigned long)dst & 0x3);
+	val = (val & 0xff) * 0x01010101;
+	for (x = 0; x < len; x += 4)
+		writel(val, dst + x);
+}
+
 static inline void memcpy_fromio(void *dst, const volatile void __iomem *src,
 				 size_t len)
 {
@@ -269,6 +279,11 @@
 	ioport_panic();
 }
  
+#define ioread16be(addr)	be16_to_cpu(ioread16(addr))
+#define ioread32be(addr)	be32_to_cpu(ioread32(addr))
+#define iowrite16be(v, addr)	iowrite16(be16_to_cpu(v), (addr))
+#define iowrite32be(v, addr)	iowrite32(be32_to_cpu(v), (addr))
+
 #define ioread8_rep(p, dst, count) \
 	insb((unsigned long) (p), (dst), (count))
 #define ioread16_rep(p, dst, count) \
@@ -282,6 +297,9 @@
 	outsw((unsigned long) (p), (src), (count))
 #define iowrite32_rep(p, src, count) \
 	outsl((unsigned long) (p), (src), (count))
+
+#define virt_to_bus     virt_to_phys
+#define bus_to_virt     phys_to_virt
  
 #endif /* _ASM_TILE_IO_H */
@@ -23,6 +23,8 @@
 /* IRQ numbers used for linux IPIs. */
 #define IRQ_RESCHEDULE 1
  
+#define irq_canonicalize(irq)   (irq)
+
 void ack_bad_irq(unsigned int irq);
  
 /*
@@ -91,6 +91,10 @@
 /* Must be a macro since it is used to create constants. */
 #define __pgprot(val) hv_pte(val)
  
+/* Rarely-used initializers, typically with a "zero" value. */
+#define __pte(x) hv_pte(x)
+#define __pgd(x) hv_pte(x)
+
 static inline u64 pgprot_val(pgprot_t pgprot)
 {
 	return hv_pte_val(pgprot);
@@ -110,6 +114,8 @@
  
 typedef HV_PTE pmd_t;
  
+#define __pmd(x) hv_pte(x)
+
 static inline u64 pmd_val(pmd_t pmd)
 {
 	return hv_pte_val(pmd);
@@ -318,7 +324,7 @@
  
 /* Provide as macros since these require some other headers included. */
 #define page_to_pa(page) ((phys_addr_t)(page_to_pfn(page)) << PAGE_SHIFT)
-#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn(kaddr))
+#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn((void *)(kaddr)))
 #define page_to_virt(page) pfn_to_kaddr(page_to_pfn(page))
  
 struct mm_struct;
+#include <asm-generic/parport.h>
+#include <asm-generic/serial.h>
-#ifdef CONFIG_COMPAT
+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
 #define __ARCH_WANT_STAT64	/* Used for compat_sys_stat64() etc. */
 #endif
 #include <asm-generic/stat.h>
@@ -18,13 +18,7 @@
 /* Tile gcc is always >= 4.3.0, so we use __builtin_bswap. */
 #define __arch_swab32(x) __builtin_bswap32(x)
 #define __arch_swab64(x) __builtin_bswap64(x)
-
-/* Use the variant that is natural for the wordsize. */
-#ifdef CONFIG_64BIT
-#define __arch_swab16(x) (__builtin_bswap64(x) >> 48)
-#else
 #define __arch_swab16(x) (__builtin_bswap32(x) >> 16)
-#endif
  
 #endif /* _ASM_TILE_SWAB_H */
+/*
+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
+ *
+ *   This program is free software; you can redistribute it and/or
+ *   modify it under the terms of the GNU General Public License
+ *   as published by the Free Software Foundation, version 2.
+ *
+ *   This program is distributed in the hope that it will be useful, but
+ *   WITHOUT ANY WARRANTY; without even the implied warranty of
+ *   MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
+ *   NON INFRINGEMENT.  See the GNU General Public License for
+ *   more details.
+ *
+ * Access to VGA videoram.
+ */
+
+#ifndef _ASM_TILE_VGA_H
+#define _ASM_TILE_VGA_H
+
+#include <asm/io.h>
+
+#define VT_BUF_HAVE_RW
+
+static inline void scr_writew(u16 val, volatile u16 *addr)
+{
+	__raw_writew(val, (volatile u16 __iomem *) addr);
+}
+
+static inline u16 scr_readw(volatile const u16 *addr)
+{
+	return __raw_readw((volatile const u16 __iomem *) addr);
+}
+
+#define vga_readb(a)	readb((u8 __iomem *)(a))
+#define vga_writeb(v,a)	writeb(v, (u8 __iomem *)(a))
+
+#define VGA_MAP_MEM(x,s)	((unsigned long) ioremap(x, s))
+
+#endif
@@ -22,6 +22,7 @@
 #include <linux/sched.h>
 #include <linux/smp.h>
 #include <linux/delay.h>
+#include <linux/module.h>
 #include <asm/irq_regs.h>
 #include <asm/traps.h>
 #include <hv/hypervisor.h>
@@ -56,6 +57,7 @@
  
 	return (((cycles_t)high) << 32) | low;
 }
+EXPORT_SYMBOL(get_cycles);
 #endif
  
 /*
...	...	@@ -12,6 +12,15 @@
12	12	* more details.
13	13	*/
14	14
	15	+/* Include the proper base SPR definition file. */
	16	+#ifdef __tilegx__
	17	+#include <arch/spr_def_64.h>
	18	+#else
	19	+#include <arch/spr_def_32.h>
	20	+#endif
	21	+
	22	+#ifdef __KERNEL__
	23	+
15	24	/*
16	25	* In addition to including the proper base SPR definition file, depending
17	26	* on machine architecture, this file defines several macros which allow
...	...	@@ -29,7 +38,6 @@
29	38	#define _concat4(a, b, c, d) __concat4(a, b, c, d)
30	39
31	40	#ifdef __tilegx__
32		-#include <arch/spr_def_64.h>
33	41
34	42	/* TILE-Gx dependent, protection-level dependent SPRs. */
35	43
...	...	@@ -65,7 +73,6 @@
65	73	_concat4(INT_SINGLE_STEP_, CONFIG_KERNEL_PL,,)
66	74
67	75	#else
68		-#include <arch/spr_def_32.h>
69	76
70	77	/* TILEPro dependent, protection-level dependent SPRs. */
71	78
...	...	@@ -102,4 +109,6 @@
102	109	_concat4(SPR_INTCTRL_, CONFIG_KERNEL_PL, _STATUS,)
103	110	#define INT_INTCTRL_K \
104	111	_concat4(INT_INTCTRL_, CONFIG_KERNEL_PL,,)
	112	+
	113	+#endif /* __KERNEL__ */
...	...	@@ -52,6 +52,7 @@
52	52	#endif
53	53
54	54	#define ioremap_nocache(physaddr, size) ioremap(physaddr, size)
	55	+#define ioremap_wc(physaddr, size) ioremap(physaddr, size)
55	56	#define ioremap_writethrough(physaddr, size) ioremap(physaddr, size)
56	57	#define ioremap_fullcache(physaddr, size) ioremap(physaddr, size)
57	58
...	...	@@ -161,6 +162,15 @@
161	162	#define iowrite32 writel
162	163	#define iowrite64 writeq
163	164
	165	+static inline void memset_io(void *dst, int val, size_t len)
	166	+{
	167	+ int x;
	168	+ BUG_ON((unsigned long)dst & 0x3);
	169	+ val = (val & 0xff) * 0x01010101;
	170	+ for (x = 0; x < len; x += 4)
	171	+ writel(val, dst + x);
	172	+}
	173	+
164	174	static inline void memcpy_fromio(void dst, const volatile void __iomem src,
165	175	size_t len)
166	176	{
...	...	@@ -269,6 +279,11 @@
269	279	ioport_panic();
270	280	}
271	281
	282	+#define ioread16be(addr) be16_to_cpu(ioread16(addr))
	283	+#define ioread32be(addr) be32_to_cpu(ioread32(addr))
	284	+#define iowrite16be(v, addr) iowrite16(be16_to_cpu(v), (addr))
	285	+#define iowrite32be(v, addr) iowrite32(be32_to_cpu(v), (addr))
	286	+
272	287	#define ioread8_rep(p, dst, count) \
273	288	insb((unsigned long) (p), (dst), (count))
274	289	#define ioread16_rep(p, dst, count) \
...	...	@@ -282,6 +297,9 @@
282	297	outsw((unsigned long) (p), (src), (count))
283	298	#define iowrite32_rep(p, src, count) \
284	299	outsl((unsigned long) (p), (src), (count))
	300	+
	301	+#define virt_to_bus virt_to_phys
	302	+#define bus_to_virt phys_to_virt
285	303
286	304	#endif /* _ASM_TILE_IO_H */
...	...	@@ -23,6 +23,8 @@
23	23	/* IRQ numbers used for linux IPIs. */
24	24	#define IRQ_RESCHEDULE 1
25	25
	26	+#define irq_canonicalize(irq) (irq)
	27	+
26	28	void ack_bad_irq(unsigned int irq);
27	29
28	30	/*
...	...	@@ -91,6 +91,10 @@
91	91	/* Must be a macro since it is used to create constants. */
92	92	#define __pgprot(val) hv_pte(val)
93	93
	94	+/* Rarely-used initializers, typically with a "zero" value. */
	95	+#define __pte(x) hv_pte(x)
	96	+#define __pgd(x) hv_pte(x)
	97	+
94	98	static inline u64 pgprot_val(pgprot_t pgprot)
95	99	{
96	100	return hv_pte_val(pgprot);
...	...	@@ -110,6 +114,8 @@
110	114
111	115	typedef HV_PTE pmd_t;
112	116
	117	+#define __pmd(x) hv_pte(x)
	118	+
113	119	static inline u64 pmd_val(pmd_t pmd)
114	120	{
115	121	return hv_pte_val(pmd);
...	...	@@ -318,7 +324,7 @@
318	324
319	325	/* Provide as macros since these require some other headers included. */
320	326	#define page_to_pa(page) ((phys_addr_t)(page_to_pfn(page)) << PAGE_SHIFT)
321		-#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn(kaddr))
	327	+#define virt_to_page(kaddr) pfn_to_page(kaddr_to_pfn((void *)(kaddr)))
322	328	#define page_to_virt(page) pfn_to_kaddr(page_to_pfn(page))
323	329
324	330	struct mm_struct;
1		-#ifdef CONFIG_COMPAT
	1	+#if defined(__KERNEL__) && defined(CONFIG_COMPAT)
2	2	#define __ARCH_WANT_STAT64 /* Used for compat_sys_stat64() etc. */
3	3	#endif
4	4	#include <asm-generic/stat.h>
...	...	@@ -18,13 +18,7 @@
18	18	/* Tile gcc is always >= 4.3.0, so we use __builtin_bswap. */
19	19	#define __arch_swab32(x) __builtin_bswap32(x)
20	20	#define __arch_swab64(x) __builtin_bswap64(x)
21		-
22		-/* Use the variant that is natural for the wordsize. */
23		-#ifdef CONFIG_64BIT
24		-#define __arch_swab16(x) (__builtin_bswap64(x) >> 48)
25		-#else
26	21	#define __arch_swab16(x) (__builtin_bswap32(x) >> 16)
27		-#endif
28	22
29	23	#endif /* _ASM_TILE_SWAB_H */
	1	+/*
	2	+ * Copyright 2010 Tilera Corporation. All Rights Reserved.
	3	+ *
	4	+ * This program is free software; you can redistribute it and/or
	5	+ * modify it under the terms of the GNU General Public License
	6	+ * as published by the Free Software Foundation, version 2.
	7	+ *
	8	+ * This program is distributed in the hope that it will be useful, but
	9	+ * WITHOUT ANY WARRANTY; without even the implied warranty of
	10	+ * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
	11	+ * NON INFRINGEMENT. See the GNU General Public License for
	12	+ * more details.
	13	+ *
	14	+ * Access to VGA videoram.
	15	+ */
	16	+
	17	+#ifndef _ASM_TILE_VGA_H
	18	+#define _ASM_TILE_VGA_H
	19	+
	20	+#include <asm/io.h>
	21	+
	22	+#define VT_BUF_HAVE_RW
	23	+
	24	+static inline void scr_writew(u16 val, volatile u16 *addr)
	25	+{
	26	+ __raw_writew(val, (volatile u16 __iomem *) addr);
	27	+}
	28	+
	29	+static inline u16 scr_readw(volatile const u16 *addr)
	30	+{
	31	+ return __raw_readw((volatile const u16 __iomem *) addr);
	32	+}
	33	+
	34	+#define vga_readb(a) readb((u8 __iomem *)(a))
	35	+#define vga_writeb(v,a) writeb(v, (u8 __iomem *)(a))
	36	+
	37	+#define VGA_MAP_MEM(x,s) ((unsigned long) ioremap(x, s))
	38	+
	39	+#endif
...	...	@@ -22,6 +22,7 @@
22	22	#include <linux/sched.h>
23	23	#include <linux/smp.h>
24	24	#include <linux/delay.h>
	25	+#include <linux/module.h>
25	26	#include <asm/irq_regs.h>
26	27	#include <asm/traps.h>
27	28	#include <hv/hypervisor.h>
...	...	@@ -56,6 +57,7 @@
56	57
57	58	return (((cycles_t)high) << 32) \| low;
58	59	}
	60	+EXPORT_SYMBOL(get_cycles);
59	61	#endif
60	62
61	63	/*