ARM: pxa: remove get_memclk_frequency_10khz()

Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: Eric Miao <eric.y.miao@gmail.com>

ARM: pxa: remove get_memclk_frequency_10khz()
Introduce 'struct clk' for memory and remove get_memclk_frequency_10khz(). Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Eric Miao
1 parent 4029813c89
Showing 6 changed files with 38 additions and 34 deletions Side-by-side Diff
arch/arm/mach-pxa/generic.c
arch/arm/mach-pxa/generic.h
arch/arm/mach-pxa/pxa25x.c
arch/arm/mach-pxa/pxa27x.c
drivers/pcmcia/pxa2xx_base.c
drivers/pcmcia/soc_common.h
@@ -72,19 +72,6 @@
 EXPORT_SYMBOL(get_clk_frequency_khz);
  
 /*
- * Return the current memory clock frequency in units of 10kHz
- */
-unsigned int get_memclk_frequency_10khz(void)
-{
-	if (cpu_is_pxa25x())
-		return pxa25x_get_memclk_frequency_10khz();
-	else if (cpu_is_pxa27x())
-		return pxa27x_get_memclk_frequency_10khz();
-	return 0;
-}
-EXPORT_SYMBOL(get_memclk_frequency_10khz);
-
-/*
  * Intel PXA2xx internal register mapping.
  *
  * Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
@@ -36,18 +36,14 @@
  
 #ifdef CONFIG_PXA25x
 extern unsigned pxa25x_get_clk_frequency_khz(int);
-extern unsigned pxa25x_get_memclk_frequency_10khz(void);
 #else
 #define pxa25x_get_clk_frequency_khz(x)		(0)
-#define pxa25x_get_memclk_frequency_10khz()	(0)
 #endif
  
 #ifdef CONFIG_PXA27x
 extern unsigned pxa27x_get_clk_frequency_khz(int);
-extern unsigned pxa27x_get_memclk_frequency_10khz(void);
 #else
 #define pxa27x_get_clk_frequency_khz(x)		(0)
-#define pxa27x_get_memclk_frequency_10khz()	(0)
 #endif
  
 #if defined(CONFIG_PXA25x) || defined(CONFIG_PXA27x)
@@ -92,23 +92,21 @@
 	return (turbo & 1) ? (N/1000) : (M/1000);
 }
  
-/*
- * Return the current memory clock frequency in units of 10kHz
- */
-unsigned int pxa25x_get_memclk_frequency_10khz(void)
+static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
 {
-	return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
+	return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
 }
  
-static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
-{
-	return pxa25x_get_memclk_frequency_10khz() * 10000;
-}
+static const struct clkops clk_pxa25x_mem_ops = {
+	.enable		= clk_dummy_enable,
+	.disable	= clk_dummy_disable,
+	.getrate	= clk_pxa25x_mem_getrate,
+};
  
 static const struct clkops clk_pxa25x_lcd_ops = {
 	.enable		= clk_pxa2xx_cken_enable,
 	.disable	= clk_pxa2xx_cken_disable,
-	.getrate	= clk_pxa25x_lcd_getrate,
+	.getrate	= clk_pxa25x_mem_getrate,
 };
  
 static unsigned long gpio12_config_32k[] = {
@@ -185,6 +183,7 @@
 static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
 static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
 static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
+static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
  
 static struct clk_lookup pxa25x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
@@ -205,6 +204,7 @@
 	INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
 	INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
 	INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
+	INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
 };
  
 static struct clk_lookup pxa25x_hwuart_clkreg =
@@ -111,10 +111,9 @@
 }
  
 /*
- * Return the current mem clock frequency in units of 10kHz as
- * reflected by CCCR[A], B, and L
+ * Return the current mem clock frequency as reflected by CCCR[A], B, and L
  */
-unsigned int pxa27x_get_memclk_frequency_10khz(void)
+static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
 {
 	unsigned long ccsr, clkcfg;
 	unsigned int l, L, m, M;
  
@@ -133,9 +132,15 @@
 	L = l * BASE_CLK;
 	M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
  
-	return (M / 10000);
+	return M;
 }
  
+static const struct clkops clk_pxa27x_mem_ops = {
+	.enable		= clk_dummy_enable,
+	.disable	= clk_dummy_disable,
+	.getrate	= clk_pxa27x_mem_getrate,
+};
+
 /*
  * Return the current LCD clock frequency in units of 10kHz as
  */
@@ -192,6 +197,7 @@
  
 static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
 static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
+static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
  
 static struct clk_lookup pxa27x_clkregs[] = {
 	INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
@@ -220,6 +226,7 @@
 	INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
 	INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
 	INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
+	INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
 };
  
 #ifdef CONFIG_PM
@@ -179,8 +179,8 @@
  
 static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
 {
-	unsigned int clk = get_memclk_frequency_10khz();
-	return pxa2xx_pcmcia_set_mcxx(skt, clk);
+	unsigned long clk = clk_get_rate(skt->clk);
+	return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000);
 }
  
 #ifdef CONFIG_CPU_FREQ
  
  
  
  
  
@@ -282,24 +282,33 @@
 	struct pcmcia_low_level *ops;
 	struct skt_dev_info *sinfo;
 	struct soc_pcmcia_socket *skt;
+	struct clk *clk;
  
 	ops = (struct pcmcia_low_level *)dev->dev.platform_data;
 	if (!ops)
 		return -ENODEV;
  
+	clk = clk_get(&dev->dev, NULL);
+	if (!clk)
+		return -ENODEV;
+
 	pxa2xx_drv_pcmcia_ops(ops);
  
 	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
-	if (!sinfo)
+	if (!sinfo) {
+		clk_put(clk);
 		return -ENOMEM;
+	}
  
 	sinfo->nskt = ops->nr;
+	sinfo->clk = clk;
  
 	/* Initialize processor specific parameters */
 	for (i = 0; i < ops->nr; i++) {
 		skt = &sinfo->skt[i];
  
 		skt->nr = ops->first + i;
+		skt->clk = clk;
 		skt->ops = ops;
 		skt->socket.owner = ops->owner;
 		skt->socket.dev.parent = &dev->dev;
@@ -314,6 +323,7 @@
 		while (--i >= 0)
 			soc_pcmcia_remove_one(&sinfo->skt[i]);
 		kfree(sinfo);
+		clk_put(clk);
 	} else {
 		pxa2xx_configure_sockets(&dev->dev);
 		dev_set_drvdata(&dev->dev, sinfo);
@@ -332,6 +342,7 @@
 	for (i = 0; i < sinfo->nskt; i++)
 		soc_pcmcia_remove_one(&sinfo->skt[i]);
  
+	clk_put(sinfo->clk);
 	kfree(sinfo);
 	return 0;
 }
@@ -10,6 +10,7 @@
 #define _ASM_ARCH_PCMCIA
  
 /* include the world */
+#include <linux/clk.h>
 #include <linux/cpufreq.h>
 #include <pcmcia/ss.h>
 #include <pcmcia/cistpl.h>
@@ -29,6 +30,7 @@
 	 * Info from low level handler
 	 */
 	unsigned int		nr;
+	struct clk		*clk;
  
 	/*
 	 * Core PCMCIA state
@@ -56,6 +58,7 @@
  
 struct skt_dev_info {
 	int nskt;
+	struct clk *clk;
 	struct soc_pcmcia_socket skt[0];
 };
...	...	@@ -72,19 +72,6 @@
72	72	EXPORT_SYMBOL(get_clk_frequency_khz);
73	73
74	74	/*
75		- * Return the current memory clock frequency in units of 10kHz
76		- */
77		-unsigned int get_memclk_frequency_10khz(void)
78		-{
79		- if (cpu_is_pxa25x())
80		- return pxa25x_get_memclk_frequency_10khz();
81		- else if (cpu_is_pxa27x())
82		- return pxa27x_get_memclk_frequency_10khz();
83		- return 0;
84		-}
85		-EXPORT_SYMBOL(get_memclk_frequency_10khz);
86		-
87		-/*
88	75	* Intel PXA2xx internal register mapping.
89	76	*
90	77	* Note: virtual 0xfffe0000-0xffffffff is reserved for the vector table
...	...	@@ -36,18 +36,14 @@
36	36
37	37	#ifdef CONFIG_PXA25x
38	38	extern unsigned pxa25x_get_clk_frequency_khz(int);
39		-extern unsigned pxa25x_get_memclk_frequency_10khz(void);
40	39	#else
41	40	#define pxa25x_get_clk_frequency_khz(x) (0)
42		-#define pxa25x_get_memclk_frequency_10khz() (0)
43	41	#endif
44	42
45	43	#ifdef CONFIG_PXA27x
46	44	extern unsigned pxa27x_get_clk_frequency_khz(int);
47		-extern unsigned pxa27x_get_memclk_frequency_10khz(void);
48	45	#else
49	46	#define pxa27x_get_clk_frequency_khz(x) (0)
50		-#define pxa27x_get_memclk_frequency_10khz() (0)
51	47	#endif
52	48
53	49	#if defined(CONFIG_PXA25x) \|\| defined(CONFIG_PXA27x)
...	...	@@ -92,23 +92,21 @@
92	92	return (turbo & 1) ? (N/1000) : (M/1000);
93	93	}
94	94
95		-/*
96		- * Return the current memory clock frequency in units of 10kHz
97		- */
98		-unsigned int pxa25x_get_memclk_frequency_10khz(void)
	95	+static unsigned long clk_pxa25x_mem_getrate(struct clk *clk)
99	96	{
100		- return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK / 10000;
	97	+ return L_clk_mult[(CCCR >> 0) & 0x1f] * BASE_CLK;
101	98	}
102	99
103		-static unsigned long clk_pxa25x_lcd_getrate(struct clk *clk)
104		-{
105		- return pxa25x_get_memclk_frequency_10khz() * 10000;
106		-}
	100	+static const struct clkops clk_pxa25x_mem_ops = {
	101	+ .enable = clk_dummy_enable,
	102	+ .disable = clk_dummy_disable,
	103	+ .getrate = clk_pxa25x_mem_getrate,
	104	+};
107	105
108	106	static const struct clkops clk_pxa25x_lcd_ops = {
109	107	.enable = clk_pxa2xx_cken_enable,
110	108	.disable = clk_pxa2xx_cken_disable,
111		- .getrate = clk_pxa25x_lcd_getrate,
	109	+ .getrate = clk_pxa25x_mem_getrate,
112	110	};
113	111
114	112	static unsigned long gpio12_config_32k[] = {
...	...	@@ -185,6 +183,7 @@
185	183	static DEFINE_CK(pxa25x_lcd, LCD, &clk_pxa25x_lcd_ops);
186	184	static DEFINE_CLK(pxa25x_gpio11, &clk_pxa25x_gpio11_ops, 3686400, 0);
187	185	static DEFINE_CLK(pxa25x_gpio12, &clk_pxa25x_gpio12_ops, 32768, 0);
	186	+static DEFINE_CLK(pxa25x_mem, &clk_pxa25x_mem_ops, 0, 0);
188	187
189	188	static struct clk_lookup pxa25x_clkregs[] = {
190	189	INIT_CLKREG(&clk_pxa25x_lcd, "pxa2xx-fb", NULL),
...	...	@@ -205,6 +204,7 @@
205	204	INIT_CLKREG(&clk_pxa25x_ac97, NULL, "AC97CLK"),
206	205	INIT_CLKREG(&clk_pxa25x_gpio11, NULL, "GPIO11_CLK"),
207	206	INIT_CLKREG(&clk_pxa25x_gpio12, NULL, "GPIO12_CLK"),
	207	+ INIT_CLKREG(&clk_pxa25x_mem, "pxa2xx-pcmcia", NULL),
208	208	};
209	209
210	210	static struct clk_lookup pxa25x_hwuart_clkreg =
...	...	@@ -111,10 +111,9 @@
111	111	}
112	112
113	113	/*
114		- * Return the current mem clock frequency in units of 10kHz as
115		- * reflected by CCCR[A], B, and L
	114	+ * Return the current mem clock frequency as reflected by CCCR[A], B, and L
116	115	*/
117		-unsigned int pxa27x_get_memclk_frequency_10khz(void)
	116	+static unsigned long clk_pxa27x_mem_getrate(struct clk *clk)
118	117	{
119	118	unsigned long ccsr, clkcfg;
120	119	unsigned int l, L, m, M;
121	120
...	...	@@ -133,9 +132,15 @@
133	132	L = l * BASE_CLK;
134	133	M = (!cccr_a) ? (L/m) : ((b) ? L : (L/2));
135	134
136		- return (M / 10000);
	135	+ return M;
137	136	}
138	137
	138	+static const struct clkops clk_pxa27x_mem_ops = {
	139	+ .enable = clk_dummy_enable,
	140	+ .disable = clk_dummy_disable,
	141	+ .getrate = clk_pxa27x_mem_getrate,
	142	+};
	143	+
139	144	/*
140	145	* Return the current LCD clock frequency in units of 10kHz as
141	146	*/
...	...	@@ -192,6 +197,7 @@
192	197
193	198	static DEFINE_CK(pxa27x_lcd, LCD, &clk_pxa27x_lcd_ops);
194	199	static DEFINE_CK(pxa27x_camera, CAMERA, &clk_pxa27x_lcd_ops);
	200	+static DEFINE_CLK(pxa27x_mem, &clk_pxa27x_mem_ops, 0, 0);
195	201
196	202	static struct clk_lookup pxa27x_clkregs[] = {
197	203	INIT_CLKREG(&clk_pxa27x_lcd, "pxa2xx-fb", NULL),
...	...	@@ -220,6 +226,7 @@
220	226	INIT_CLKREG(&clk_pxa27x_memstk, NULL, "MSTKCLK"),
221	227	INIT_CLKREG(&clk_pxa27x_im, NULL, "IMCLK"),
222	228	INIT_CLKREG(&clk_pxa27x_memc, NULL, "MEMCLK"),
	229	+ INIT_CLKREG(&clk_pxa27x_mem, "pxa2xx-pcmcia", NULL),
223	230	};
224	231
225	232	#ifdef CONFIG_PM
...	...	@@ -179,8 +179,8 @@
179	179
180	180	static int pxa2xx_pcmcia_set_timing(struct soc_pcmcia_socket *skt)
181	181	{
182		- unsigned int clk = get_memclk_frequency_10khz();
183		- return pxa2xx_pcmcia_set_mcxx(skt, clk);
	182	+ unsigned long clk = clk_get_rate(skt->clk);
	183	+ return pxa2xx_pcmcia_set_mcxx(skt, clk / 10000);
184	184	}
185	185
186	186	#ifdef CONFIG_CPU_FREQ
187	187
188	188
189	189
190	190
191	191
...	...	@@ -282,24 +282,33 @@
282	282	struct pcmcia_low_level *ops;
283	283	struct skt_dev_info *sinfo;
284	284	struct soc_pcmcia_socket *skt;
	285	+ struct clk *clk;
285	286
286	287	ops = (struct pcmcia_low_level *)dev->dev.platform_data;
287	288	if (!ops)
288	289	return -ENODEV;
289	290
	291	+ clk = clk_get(&dev->dev, NULL);
	292	+ if (!clk)
	293	+ return -ENODEV;
	294	+
290	295	pxa2xx_drv_pcmcia_ops(ops);
291	296
292	297	sinfo = kzalloc(SKT_DEV_INFO_SIZE(ops->nr), GFP_KERNEL);
293		- if (!sinfo)
	298	+ if (!sinfo) {
	299	+ clk_put(clk);
294	300	return -ENOMEM;
	301	+ }
295	302
296	303	sinfo->nskt = ops->nr;
	304	+ sinfo->clk = clk;
297	305
298	306	/* Initialize processor specific parameters */
299	307	for (i = 0; i < ops->nr; i++) {
300	308	skt = &sinfo->skt[i];
301	309
302	310	skt->nr = ops->first + i;
	311	+ skt->clk = clk;
303	312	skt->ops = ops;
304	313	skt->socket.owner = ops->owner;
305	314	skt->socket.dev.parent = &dev->dev;
...	...	@@ -314,6 +323,7 @@
314	323	while (--i >= 0)
315	324	soc_pcmcia_remove_one(&sinfo->skt[i]);
316	325	kfree(sinfo);
	326	+ clk_put(clk);
317	327	} else {
318	328	pxa2xx_configure_sockets(&dev->dev);
319	329	dev_set_drvdata(&dev->dev, sinfo);
...	...	@@ -332,6 +342,7 @@
332	342	for (i = 0; i < sinfo->nskt; i++)
333	343	soc_pcmcia_remove_one(&sinfo->skt[i]);
334	344
	345	+ clk_put(sinfo->clk);
335	346	kfree(sinfo);
336	347	return 0;
337	348	}
...	...	@@ -10,6 +10,7 @@
10	10	#define _ASM_ARCH_PCMCIA
11	11
12	12	/* include the world */
	13	+#include <linux/clk.h>
13	14	#include <linux/cpufreq.h>
14	15	#include <pcmcia/ss.h>
15	16	#include <pcmcia/cistpl.h>
...	...	@@ -29,6 +30,7 @@
29	30	* Info from low level handler
30	31	*/
31	32	unsigned int nr;
	33	+ struct clk *clk;
32	34
33	35	/*
34	36	* Core PCMCIA state
...	...	@@ -56,6 +58,7 @@
56	58
57	59	struct skt_dev_info {
58	60	int nskt;
	61	+ struct clk *clk;
59	62	struct soc_pcmcia_socket skt[0];
60	63	};
61	64