Commit 2adb3b8e6fa310d64ea6209f8ac5d5575839f6da

Authored by Doug Anderson
Committed by Lee Jones
1 parent cfeb35da2a

mfd: rk808: Add register caching

Let's define the voltatile registers (those that can't be cached) and
enable caching.  The rk808 is accessed almost constantly with cpufreq
so this is really nice.

As measured by ftrace:
  before this change: cpu0_set_target() => ~2200us
  after this change:  cpu0_set_target() =>  ~500us

Signed-off-by: Doug Anderson <dianders@chromium.org>
Reviewed-by: Chris Zhong <zyw@rock-chips.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>

Showing 1 changed file with 30 additions and 0 deletions Side-by-side Diff

... ... @@ -29,10 +29,40 @@
29 29 int value;
30 30 };
31 31  
  32 +static bool rk808_is_volatile_reg(struct device *dev, unsigned int reg)
  33 +{
  34 + /*
  35 + * Notes:
  36 + * - Technically the ROUND_30s bit makes RTC_CTRL_REG volatile, but
  37 + * we don't use that feature. It's better to cache.
  38 + * - It's unlikely we care that RK808_DEVCTRL_REG is volatile since
  39 + * bits are cleared in case when we shutoff anyway, but better safe.
  40 + */
  41 +
  42 + switch (reg) {
  43 + case RK808_SECONDS_REG ... RK808_WEEKS_REG:
  44 + case RK808_RTC_STATUS_REG:
  45 + case RK808_VB_MON_REG:
  46 + case RK808_THERMAL_REG:
  47 + case RK808_DCDC_UV_STS_REG:
  48 + case RK808_LDO_UV_STS_REG:
  49 + case RK808_DCDC_PG_REG:
  50 + case RK808_LDO_PG_REG:
  51 + case RK808_DEVCTRL_REG:
  52 + case RK808_INT_STS_REG1:
  53 + case RK808_INT_STS_REG2:
  54 + return true;
  55 + }
  56 +
  57 + return false;
  58 +}
  59 +
32 60 static const struct regmap_config rk808_regmap_config = {
33 61 .reg_bits = 8,
34 62 .val_bits = 8,
35 63 .max_register = RK808_IO_POL_REG,
  64 + .cache_type = REGCACHE_RBTREE,
  65 + .volatile_reg = rk808_is_volatile_reg,
36 66 };
37 67  
38 68 static struct resource rtc_resources[] = {