Commit 2e3e2a5e4fef586ae9b1cfef42823c0aef1797f4
Committed by
Kevin Hilman
Kevin Hilman
1 parent
a42f18c96d
davinci: spi: move event queue parameter to platform data
For DMA operation, the davinci spi driver needs an event queue number. Currently, this number is passed as a IORESOURCE_DMA. This is not correct, as the event queue is not a DMA channel. Pass the event queue via the platform data structure instead. On dm355 and dm365, move the eventq assignment for spi0 out of resources array and into platform data. Signed-off-by: Michael Williamson <michael.williamson@criticallink.com> Acked-by: Sekhar Nori <nsekhar@ti.com> Acked-by: Grant Likely <grant.likely@secretlab.ca> Signed-off-by: Kevin Hilman <khilman@ti.com>
Showing 4 changed files with 15 additions and 21 deletions Side-by-side Diff
arch/arm/mach-davinci/dm355.c
| ... | ... | @@ -403,16 +403,13 @@ |
| 403 | 403 | .start = 16, |
| 404 | 404 | .flags = IORESOURCE_DMA, |
| 405 | 405 | }, |
| 406 | - { | |
| 407 | - .start = EVENTQ_1, | |
| 408 | - .flags = IORESOURCE_DMA, | |
| 409 | - }, | |
| 410 | 406 | }; |
| 411 | 407 | |
| 412 | 408 | static struct davinci_spi_platform_data dm355_spi0_pdata = { |
| 413 | 409 | .version = SPI_VERSION_1, |
| 414 | 410 | .num_chipselect = 2, |
| 415 | 411 | .cshold_bug = true, |
| 412 | + .dma_event_q = EVENTQ_1, | |
| 416 | 413 | }; |
| 417 | 414 | static struct platform_device dm355_spi0_device = { |
| 418 | 415 | .name = "spi_davinci", |
arch/arm/mach-davinci/dm365.c
| ... | ... | @@ -625,6 +625,7 @@ |
| 625 | 625 | static struct davinci_spi_platform_data dm365_spi0_pdata = { |
| 626 | 626 | .version = SPI_VERSION_1, |
| 627 | 627 | .num_chipselect = 2, |
| 628 | + .dma_event_q = EVENTQ_3, | |
| 628 | 629 | }; |
| 629 | 630 | |
| 630 | 631 | static struct resource dm365_spi0_resources[] = { |
| ... | ... | @@ -643,10 +644,6 @@ |
| 643 | 644 | }, |
| 644 | 645 | { |
| 645 | 646 | .start = 16, |
| 646 | - .flags = IORESOURCE_DMA, | |
| 647 | - }, | |
| 648 | - { | |
| 649 | - .start = EVENTQ_3, | |
| 650 | 647 | .flags = IORESOURCE_DMA, |
| 651 | 648 | }, |
| 652 | 649 | }; |
arch/arm/mach-davinci/include/mach/spi.h
| ... | ... | @@ -19,6 +19,8 @@ |
| 19 | 19 | #ifndef __ARCH_ARM_DAVINCI_SPI_H |
| 20 | 20 | #define __ARCH_ARM_DAVINCI_SPI_H |
| 21 | 21 | |
| 22 | +#include <mach/edma.h> | |
| 23 | + | |
| 22 | 24 | #define SPI_INTERN_CS 0xFF |
| 23 | 25 | |
| 24 | 26 | enum { |
| 25 | 27 | |
| ... | ... | @@ -39,13 +41,16 @@ |
| 39 | 41 | * to populate if all chip-selects are internal. |
| 40 | 42 | * @cshold_bug: set this to true if the SPI controller on your chip requires |
| 41 | 43 | * a write to CSHOLD bit in between transfers (like in DM355). |
| 44 | + * @dma_event_q: DMA event queue to use if SPI_IO_TYPE_DMA is used for any | |
| 45 | + * device on the bus. | |
| 42 | 46 | */ |
| 43 | 47 | struct davinci_spi_platform_data { |
| 44 | - u8 version; | |
| 45 | - u8 num_chipselect; | |
| 46 | - u8 intr_line; | |
| 47 | - u8 *chip_sel; | |
| 48 | - bool cshold_bug; | |
| 48 | + u8 version; | |
| 49 | + u8 num_chipselect; | |
| 50 | + u8 intr_line; | |
| 51 | + u8 *chip_sel; | |
| 52 | + bool cshold_bug; | |
| 53 | + enum dma_event_q dma_event_q; | |
| 49 | 54 | }; |
| 50 | 55 | |
| 51 | 56 | /** |
drivers/spi/davinci_spi.c
| ... | ... | @@ -790,7 +790,6 @@ |
| 790 | 790 | struct resource *r, *mem; |
| 791 | 791 | resource_size_t dma_rx_chan = SPI_NO_RESOURCE; |
| 792 | 792 | resource_size_t dma_tx_chan = SPI_NO_RESOURCE; |
| 793 | - resource_size_t dma_eventq = SPI_NO_RESOURCE; | |
| 794 | 793 | int i = 0, ret = 0; |
| 795 | 794 | u32 spipc0; |
| 796 | 795 | |
| 797 | 796 | |
| 798 | 797 | |
| ... | ... | @@ -878,17 +877,13 @@ |
| 878 | 877 | r = platform_get_resource(pdev, IORESOURCE_DMA, 1); |
| 879 | 878 | if (r) |
| 880 | 879 | dma_tx_chan = r->start; |
| 881 | - r = platform_get_resource(pdev, IORESOURCE_DMA, 2); | |
| 882 | - if (r) | |
| 883 | - dma_eventq = r->start; | |
| 884 | 880 | |
| 885 | 881 | dspi->bitbang.txrx_bufs = davinci_spi_bufs; |
| 886 | 882 | if (dma_rx_chan != SPI_NO_RESOURCE && |
| 887 | - dma_tx_chan != SPI_NO_RESOURCE && | |
| 888 | - dma_eventq != SPI_NO_RESOURCE) { | |
| 883 | + dma_tx_chan != SPI_NO_RESOURCE) { | |
| 889 | 884 | dspi->dma.rx_channel = dma_rx_chan; |
| 890 | 885 | dspi->dma.tx_channel = dma_tx_chan; |
| 891 | - dspi->dma.eventq = dma_eventq; | |
| 886 | + dspi->dma.eventq = pdata->dma_event_q; | |
| 892 | 887 | |
| 893 | 888 | ret = davinci_spi_request_dma(dspi); |
| 894 | 889 | if (ret) |
| ... | ... | @@ -897,7 +892,7 @@ |
| 897 | 892 | dev_info(&pdev->dev, "DMA: supported\n"); |
| 898 | 893 | dev_info(&pdev->dev, "DMA: RX channel: %d, TX channel: %d, " |
| 899 | 894 | "event queue: %d\n", dma_rx_chan, dma_tx_chan, |
| 900 | - dma_eventq); | |
| 895 | + pdata->dma_event_q); | |
| 901 | 896 | } |
| 902 | 897 | |
| 903 | 898 | dspi->get_rx = davinci_spi_rx_buf_u8; |