Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc

* 'fixes' of git://git.linaro.org/people/arnd/arm-soc: mach-integrator: fix VGA base regression arm/dt: Tegra: Update SDHCI nodes to match bindings ARM: EXYNOS4: fix incorrect pad configuration for keypad row lines ARM: SAMSUNG: fix to prevent declaring duplicated ARM: SAMSUNG: fix watchdog reset issue with clk_get() ARM: S3C64XX: Remove un-used code backlight code on SMDK6410 ARM: EXYNOS4: restart clocksource while system resumes ARM: EXYNOS4: Fix routing timer interrupt to offline CPU ARM: EXYNOS4: Fix return type of local_timer_setup() ARM: EXYNOS4: Fix wrong pll type for vpll ARM: Dove: fix second SPI initialization call

Merge branch 'fixes' of git://git.linaro.org/people/arnd/arm-soc
* 'fixes' of git://git.linaro.org/people/arnd/arm-soc: mach-integrator: fix VGA base regression arm/dt: Tegra: Update SDHCI nodes to match bindings ARM: EXYNOS4: fix incorrect pad configuration for keypad row lines ARM: SAMSUNG: fix to prevent declaring duplicated ARM: SAMSUNG: fix watchdog reset issue with clk_get() ARM: S3C64XX: Remove un-used code backlight code on SMDK6410 ARM: EXYNOS4: restart clocksource while system resumes ARM: EXYNOS4: Fix routing timer interrupt to offline CPU ARM: EXYNOS4: Fix return type of local_timer_setup() ARM: EXYNOS4: Fix wrong pll type for vpll ARM: Dove: fix second SPI initialization call
Linus Torvalds
2 parents 43a964a7bf b71d8429ec
Showing 13 changed files Side-by-side Diff
arch/arm/boot/dts/tegra-harmony.dts
arch/arm/boot/dts/tegra-seaboard.dts
arch/arm/mach-dove/common.c
arch/arm/mach-exynos4/clock.c
arch/arm/mach-exynos4/mct.c
arch/arm/mach-exynos4/platsmp.c
arch/arm/mach-exynos4/setup-keypad.c
arch/arm/mach-integrator/integrator_ap.c
arch/arm/mach-integrator/pci_v3.c
arch/arm/mach-s3c64xx/mach-smdk6410.c
arch/arm/plat-samsung/clock.c
arch/arm/plat-samsung/include/plat/clock.h
arch/arm/plat-samsung/include/plat/watchdog-reset.h
@@ -57,15 +57,15 @@
 	};
  
 	sdhci@c8000200 {
-		gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-			<&gpio 57 0>, /* wp, gpio PH1 */
-			<&gpio 155 0>; /* power, gpio PT3 */
+		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+		power-gpios = <&gpio 155 0>; /* gpio PT3 */
 	};
  
 	sdhci@c8000600 {
-		gpios = <&gpio 58 0>, /* cd, gpio PH2 */
-			<&gpio 59 0>, /* wp, gpio PH3 */
-			<&gpio 70 0>; /* power, gpio PI6 */
+		cd-gpios = <&gpio 58 0>; /* gpio PH2 */
+		wp-gpios = <&gpio 59 0>; /* gpio PH3 */
+		power-gpios = <&gpio 70 0>; /* gpio PI6 */
 	};
 };
@@ -21,9 +21,9 @@
 	};
  
 	sdhci@c8000400 {
-		gpios = <&gpio 69 0>, /* cd, gpio PI5 */
-			<&gpio 57 0>, /* wp, gpio PH1 */
-			<&gpio 70 0>; /* power, gpio PI6 */
+		cd-gpios = <&gpio 69 0>; /* gpio PI5 */
+		wp-gpios = <&gpio 57 0>; /* gpio PH1 */
+		power-gpios = <&gpio 70 0>; /* gpio PI6 */
 	};
 };
@@ -158,7 +158,7 @@
  
 void __init dove_spi1_init(void)
 {
-	orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
+	orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
 }
  
 /*****************************************************************************
@@ -1160,7 +1160,7 @@
  
 	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
 	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
-				__raw_readl(S5P_VPLL_CON1), pll_4650);
+				__raw_readl(S5P_VPLL_CON1), pll_4650c);
  
 	clk_fout_apll.ops = &exynos4_fout_apll_ops;
 	clk_fout_mpll.rate = mpll;
@@ -132,12 +132,18 @@
 	return ((cycle_t)hi << 32) | lo;
 }
  
+static void exynos4_frc_resume(struct clocksource *cs)
+{
+	exynos4_mct_frc_start(0, 0);
+}
+
 struct clocksource mct_frc = {
 	.name		= "mct-frc",
 	.rating		= 400,
 	.read		= exynos4_frc_read,
 	.mask		= CLOCKSOURCE_MASK(64),
 	.flags		= CLOCK_SOURCE_IS_CONTINUOUS,
+	.resume		= exynos4_frc_resume,
 };
  
 static void __init exynos4_clocksource_init(void)
  
@@ -389,9 +395,11 @@
 }
  
 /* Setup the local clock events for a CPU */
-void __cpuinit local_timer_setup(struct clock_event_device *evt)
+int __cpuinit local_timer_setup(struct clock_event_device *evt)
 {
 	exynos4_mct_tick_init(evt);
+
+	return 0;
 }
  
 int local_timer_ack(void)
@@ -106,6 +106,8 @@
 	 */
 	spin_lock(&boot_lock);
 	spin_unlock(&boot_lock);
+
+	set_cpu_online(cpu, true);
 }
  
 int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
@@ -19,15 +19,16 @@
  
 	if (rows > 8) {
 		/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
-		s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
+		s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
+					S3C_GPIO_PULL_UP);
  
 		/* Set all the necessary GPX3 pins: KP_ROW[8~] */
-		s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
-					 S3C_GPIO_SFN(3));
+		s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
+					 S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
 	} else {
 		/* Set all the necessary GPX2 pins: KP_ROW[x] */
-		s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
-					 S3C_GPIO_SFN(3));
+		s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
+					S3C_GPIO_PULL_UP);
 	}
  
 	/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
@@ -32,6 +32,7 @@
 #include <linux/interrupt.h>
 #include <linux/io.h>
 #include <linux/mtd/physmap.h>
+#include <video/vga.h>
  
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -154,6 +155,7 @@
 static void __init ap_map_io(void)
 {
 	iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
+	vga_base = PCI_MEMORY_VADDR;
 }
  
 #define INTEGRATOR_SC_VALID_INT	0x003fffff
@@ -27,7 +27,6 @@
 #include <linux/spinlock.h>
 #include <linux/init.h>
 #include <linux/io.h>
-#include <video/vga.h>
  
 #include <mach/hardware.h>
 #include <mach/platform.h>
@@ -505,7 +504,6 @@
  
 	pcibios_min_io = 0x6000;
 	pcibios_min_mem = 0x00100000;
-	vga_base = PCI_MEMORY_VADDR;
  
 	/*
 	 * Hook in our fault handler for PCI errors
@@ -262,45 +262,6 @@
 	.cols		= 8,
 };
  
-static int smdk6410_backlight_init(struct device *dev)
-{
-	int ret;
-
-	ret = gpio_request(S3C64XX_GPF(15), "Backlight");
-	if (ret) {
-		printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
-		return ret;
-	}
-
-	/* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
-	s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
-
-	return 0;
-}
-
-static void smdk6410_backlight_exit(struct device *dev)
-{
-	s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
-	gpio_free(S3C64XX_GPF(15));
-}
-
-static struct platform_pwm_backlight_data smdk6410_backlight_data = {
-	.pwm_id		= 1,
-	.max_brightness	= 255,
-	.dft_brightness	= 255,
-	.pwm_period_ns	= 78770,
-	.init		= smdk6410_backlight_init,
-	.exit		= smdk6410_backlight_exit,
-};
-
-static struct platform_device smdk6410_backlight_device = {
-	.name		= "pwm-backlight",
-	.dev		= {
-		.parent		= &s3c_device_timer[1].dev,
-		.platform_data	= &smdk6410_backlight_data,
-	},
-};
-
 static struct map_desc smdk6410_iodesc[] = {};
  
 static struct platform_device *smdk6410_devices[] __initdata = {
@@ -64,6 +64,17 @@
  */
 DEFINE_SPINLOCK(clocks_lock);
  
+/* Global watchdog clock used by arch_wtd_reset() callback */
+struct clk *s3c2410_wdtclk;
+static int __init s3c_wdt_reset_init(void)
+{
+	s3c2410_wdtclk = clk_get(NULL, "watchdog");
+	if (IS_ERR(s3c2410_wdtclk))
+		printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+	return 0;
+}
+arch_initcall(s3c_wdt_reset_init);
+
 /* enable and disable calls for use with the clk struct */
  
 static int clk_null_enable(struct clk *clk, int enable)
@@ -9,6 +9,9 @@
  * published by the Free Software Foundation.
 */
  
+#ifndef __ASM_PLAT_CLOCK_H
+#define __ASM_PLAT_CLOCK_H __FILE__
+
 #include <linux/spinlock.h>
 #include <linux/clkdev.h>
  
@@ -120,4 +123,10 @@
 /* Init for pwm clock code */
  
 extern void s3c_pwmclk_init(void);
+
+/* Global watchdog clock used by arch_wtd_reset() callback */
+
+extern struct clk *s3c2410_wdtclk;
+
+#endif /* __ASM_PLAT_CLOCK_H */
@@ -10,6 +10,7 @@
  * published by the Free Software Foundation.
 */
  
+#include <plat/clock.h>
 #include <plat/regs-watchdog.h>
 #include <mach/map.h>
  
  
@@ -19,17 +20,12 @@
  
 static inline void arch_wdt_reset(void)
 {
-	struct clk *wdtclk;
-
 	printk("arch_reset: attempting watchdog reset\n");
  
 	__raw_writel(0, S3C2410_WTCON);	  /* disable watchdog, to be safe  */
  
-	wdtclk = clk_get(NULL, "watchdog");
-	if (!IS_ERR(wdtclk)) {
-		clk_enable(wdtclk);
-	} else
-		printk(KERN_WARNING "%s: warning: cannot get watchdog clock\n", __func__);
+	if (s3c2410_wdtclk)
+		clk_enable(s3c2410_wdtclk);
  
 	/* put initial values into count and data */
 	__raw_writel(0x80, S3C2410_WTCNT);
...	...	@@ -57,15 +57,15 @@
57	57	};
58	58
59	59	sdhci@c8000200 {
60		- gpios = <&gpio 69 0>, /* cd, gpio PI5 */
61		- <&gpio 57 0>, /* wp, gpio PH1 */
62		- <&gpio 155 0>; /* power, gpio PT3 */
	60	+ cd-gpios = <&gpio 69 0>; /* gpio PI5 */
	61	+ wp-gpios = <&gpio 57 0>; /* gpio PH1 */
	62	+ power-gpios = <&gpio 155 0>; /* gpio PT3 */
63	63	};
64	64
65	65	sdhci@c8000600 {
66		- gpios = <&gpio 58 0>, /* cd, gpio PH2 */
67		- <&gpio 59 0>, /* wp, gpio PH3 */
68		- <&gpio 70 0>; /* power, gpio PI6 */
	66	+ cd-gpios = <&gpio 58 0>; /* gpio PH2 */
	67	+ wp-gpios = <&gpio 59 0>; /* gpio PH3 */
	68	+ power-gpios = <&gpio 70 0>; /* gpio PI6 */
69	69	};
70	70	};
...	...	@@ -21,9 +21,9 @@
21	21	};
22	22
23	23	sdhci@c8000400 {
24		- gpios = <&gpio 69 0>, /* cd, gpio PI5 */
25		- <&gpio 57 0>, /* wp, gpio PH1 */
26		- <&gpio 70 0>; /* power, gpio PI6 */
	24	+ cd-gpios = <&gpio 69 0>; /* gpio PI5 */
	25	+ wp-gpios = <&gpio 57 0>; /* gpio PH1 */
	26	+ power-gpios = <&gpio 70 0>; /* gpio PI6 */
27	27	};
28	28	};
...	...	@@ -158,7 +158,7 @@
158	158
159	159	void __init dove_spi1_init(void)
160	160	{
161		- orion_spi_init(DOVE_SPI1_PHYS_BASE, get_tclk());
	161	+ orion_spi_1_init(DOVE_SPI1_PHYS_BASE, get_tclk());
162	162	}
163	163
164	164	/*****************************************************************************
...	...	@@ -1160,7 +1160,7 @@
1160	1160
1161	1161	vpllsrc = clk_get_rate(&clk_vpllsrc.clk);
1162	1162	vpll = s5p_get_pll46xx(vpllsrc, __raw_readl(S5P_VPLL_CON0),
1163		- __raw_readl(S5P_VPLL_CON1), pll_4650);
	1163	+ __raw_readl(S5P_VPLL_CON1), pll_4650c);
1164	1164
1165	1165	clk_fout_apll.ops = &exynos4_fout_apll_ops;
1166	1166	clk_fout_mpll.rate = mpll;
...	...	@@ -132,12 +132,18 @@
132	132	return ((cycle_t)hi << 32) \| lo;
133	133	}
134	134
	135	+static void exynos4_frc_resume(struct clocksource *cs)
	136	+{
	137	+ exynos4_mct_frc_start(0, 0);
	138	+}
	139	+
135	140	struct clocksource mct_frc = {
136	141	.name = "mct-frc",
137	142	.rating = 400,
138	143	.read = exynos4_frc_read,
139	144	.mask = CLOCKSOURCE_MASK(64),
140	145	.flags = CLOCK_SOURCE_IS_CONTINUOUS,
	146	+ .resume = exynos4_frc_resume,
141	147	};
142	148
143	149	static void __init exynos4_clocksource_init(void)
144	150
...	...	@@ -389,9 +395,11 @@
389	395	}
390	396
391	397	/* Setup the local clock events for a CPU */
392		-void __cpuinit local_timer_setup(struct clock_event_device *evt)
	398	+int __cpuinit local_timer_setup(struct clock_event_device *evt)
393	399	{
394	400	exynos4_mct_tick_init(evt);
	401	+
	402	+ return 0;
395	403	}
396	404
397	405	int local_timer_ack(void)
...	...	@@ -106,6 +106,8 @@
106	106	*/
107	107	spin_lock(&boot_lock);
108	108	spin_unlock(&boot_lock);
	109	+
	110	+ set_cpu_online(cpu, true);
109	111	}
110	112
111	113	int __cpuinit boot_secondary(unsigned int cpu, struct task_struct *idle)
...	...	@@ -19,15 +19,16 @@
19	19
20	20	if (rows > 8) {
21	21	/* Set all the necessary GPX2 pins: KP_ROW[0~7] */
22		- s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3));
	22	+ s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), 8, S3C_GPIO_SFN(3),
	23	+ S3C_GPIO_PULL_UP);
23	24
24	25	/* Set all the necessary GPX3 pins: KP_ROW[8~] */
25		- s3c_gpio_cfgrange_nopull(EXYNOS4_GPX3(0), (rows - 8),
26		- S3C_GPIO_SFN(3));
	26	+ s3c_gpio_cfgall_range(EXYNOS4_GPX3(0), (rows - 8),
	27	+ S3C_GPIO_SFN(3), S3C_GPIO_PULL_UP);
27	28	} else {
28	29	/* Set all the necessary GPX2 pins: KP_ROW[x] */
29		- s3c_gpio_cfgrange_nopull(EXYNOS4_GPX2(0), rows,
30		- S3C_GPIO_SFN(3));
	30	+ s3c_gpio_cfgall_range(EXYNOS4_GPX2(0), rows, S3C_GPIO_SFN(3),
	31	+ S3C_GPIO_PULL_UP);
31	32	}
32	33
33	34	/* Set all the necessary GPX1 pins to special-function 3: KP_COL[x] */
...	...	@@ -32,6 +32,7 @@
32	32	#include <linux/interrupt.h>
33	33	#include <linux/io.h>
34	34	#include <linux/mtd/physmap.h>
	35	+#include <video/vga.h>
35	36
36	37	#include <mach/hardware.h>
37	38	#include <mach/platform.h>
...	...	@@ -154,6 +155,7 @@
154	155	static void __init ap_map_io(void)
155	156	{
156	157	iotable_init(ap_io_desc, ARRAY_SIZE(ap_io_desc));
	158	+ vga_base = PCI_MEMORY_VADDR;
157	159	}
158	160
159	161	#define INTEGRATOR_SC_VALID_INT 0x003fffff
...	...	@@ -27,7 +27,6 @@
27	27	#include <linux/spinlock.h>
28	28	#include <linux/init.h>
29	29	#include <linux/io.h>
30		-#include <video/vga.h>
31	30
32	31	#include <mach/hardware.h>
33	32	#include <mach/platform.h>
...	...	@@ -505,7 +504,6 @@
505	504
506	505	pcibios_min_io = 0x6000;
507	506	pcibios_min_mem = 0x00100000;
508		- vga_base = PCI_MEMORY_VADDR;
509	507
510	508	/*
511	509	* Hook in our fault handler for PCI errors
...	...	@@ -262,45 +262,6 @@
262	262	.cols = 8,
263	263	};
264	264
265		-static int smdk6410_backlight_init(struct device *dev)
266		-{
267		- int ret;
268		-
269		- ret = gpio_request(S3C64XX_GPF(15), "Backlight");
270		- if (ret) {
271		- printk(KERN_ERR "failed to request GPF for PWM-OUT1\n");
272		- return ret;
273		- }
274		-
275		- /* Configure GPIO pin with S3C64XX_GPF15_PWM_TOUT1 */
276		- s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_SFN(2));
277		-
278		- return 0;
279		-}
280		-
281		-static void smdk6410_backlight_exit(struct device *dev)
282		-{
283		- s3c_gpio_cfgpin(S3C64XX_GPF(15), S3C_GPIO_OUTPUT);
284		- gpio_free(S3C64XX_GPF(15));
285		-}
286		-
287		-static struct platform_pwm_backlight_data smdk6410_backlight_data = {
288		- .pwm_id = 1,
289		- .max_brightness = 255,
290		- .dft_brightness = 255,
291		- .pwm_period_ns = 78770,
292		- .init = smdk6410_backlight_init,
293		- .exit = smdk6410_backlight_exit,
294		-};
295		-
296		-static struct platform_device smdk6410_backlight_device = {
297		- .name = "pwm-backlight",
298		- .dev = {
299		- .parent = &s3c_device_timer[1].dev,
300		- .platform_data = &smdk6410_backlight_data,
301		- },
302		-};
303		-
304	265	static struct map_desc smdk6410_iodesc[] = {};
305	266
306	267	static struct platform_device *smdk6410_devices[] __initdata = {