Commit 599b7202c5bf2c7345ea34007379ba241c94a491

Authored by Mikael Pettersson
Committed by Jeff Garzik
1 parent 800b399669

[PATCH] sata_promise: PHYMODE4 fixup

This patch adds code to fix up the PHYMODE4 "align timing"
register value on second-generation Promise SATA chips.
Failure to correct this value on non-x86 machines makes
drive detection prone to failure due to timeouts. (I've
observed about 50% detection failure rates on SPARC64.)

The HW boots with a bad value in this register, but on x86
machines the Promise BIOS corrects it to the value recommended
by the manual, so most people have been unaffected by this issue.

After developing the patch I checked Promise's SATAII driver,
and discovered that it also corrects PHYMODE4 just like this
patch does.

This patch depends on the sata_promise SATAII updates
patch I sent recently.

Signed-off-by: Mikael Pettersson <mikpe@it.uu.se>
Signed-off-by: Jeff Garzik <jeff@garzik.org>

Showing 1 changed file with 11 additions and 0 deletions Side-by-side Diff

drivers/ata/sata_promise.c
... ... @@ -280,6 +280,7 @@
280 280 static int pdc_port_start(struct ata_port *ap)
281 281 {
282 282 struct device *dev = ap->host->dev;
  283 + struct pdc_host_priv *hp = ap->host->private_data;
283 284 struct pdc_port_priv *pp;
284 285 int rc;
285 286  
... ... @@ -300,6 +301,16 @@
300 301 }
301 302  
302 303 ap->private_data = pp;
  304 +
  305 + /* fix up PHYMODE4 align timing */
  306 + if ((hp->flags & PDC_FLAG_GEN_II) && sata_scr_valid(ap)) {
  307 + void __iomem *mmio = (void __iomem *) ap->ioaddr.scr_addr;
  308 + unsigned int tmp;
  309 +
  310 + tmp = readl(mmio + 0x014);
  311 + tmp = (tmp & ~3) | 1; /* set bits 1:0 = 0:1 */
  312 + writel(tmp, mmio + 0x014);
  313 + }
303 314  
304 315 return 0;
305 316