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Commit 5cfb19ac604a68c030b245561f575c2d1bac1d49

Authored by Manjunath Hadli
Committed by Sekhar Nori
1 parent 39c6d2d1d7

ARM: davinci: streamline sysmod access 

There are instances of IO_ADDRESS() being used for system module
(sysmod) register access. Eliminate this in favor of a ioremap()
based access. ioremap() the entire sysmod address space once during
boot-up and provide a helper macro to access specific register
offsets within the address space.

With this, also eliminate ioremap() of specific sysmodule registers
related to VPIF happening in DM646x EVM code.

While at it, also eliminate some duplicate sysmod register offset macros
defined in code and place offset definitions at one place in davinci.h

Signed-off-by: Manjunath Hadli <manjunath.hadli@ti.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
[nsekhar@ti.com: removed the addition of ifndef __ASSEMBLER__
in davinci.h, eliminate IO_ADDRESS() usage left out in dm646x.c,
cleanup VPIF sysmodule register access as part of this patch and
keep all sysmod offsets in davinci.h Also, convert the WARN_ON()
on failure to setup sysmod base to BUG_ON()]
Signed-off-by: Sekhar Nori <nsekhar@ti.com>

Showing 8 changed files with 50 additions and 40 deletions Side-by-side Diff

arch/arm/mach-davinci/board-dm646x-evm.c
Diff comments   View file @ 5cfb19a
... ... @@ -410,8 +410,6 @@
410 410 .bus_delay = 0 /* usec */,
411 411 };
412 412  
413   -#define VIDCLKCTL_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x38)
414   -#define VSCLKDIS_OFFSET (DAVINCI_SYSTEM_MODULE_BASE + 0x6c)
415 413 #define VCH2CLK_MASK (BIT_MASK(10) | BIT_MASK(9) | BIT_MASK(8))
416 414 #define VCH2CLK_SYSCLK8 (BIT(9))
417 415 #define VCH2CLK_AUXCLK (BIT(9) | BIT(8))
... ... @@ -429,8 +427,6 @@
429 427 #define TVP5147_CH0 "tvp514x-0"
430 428 #define TVP5147_CH1 "tvp514x-1"
431 429  
432   -static void __iomem *vpif_vidclkctl_reg;
433   -static void __iomem *vpif_vsclkdis_reg;
434 430 /* spin lock for updating above registers */
435 431 static spinlock_t vpif_reg_lock;
436 432  
437 433  
438 434  
... ... @@ -441,14 +437,14 @@
441 437 int val = 0;
442 438 int err = 0;
443 439  
444   - if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg || !cpld_client)
  440 + if (!cpld_client)
445 441 return -ENXIO;
446 442  
447 443 /* disable the clock */
448 444 spin_lock_irqsave(&vpif_reg_lock, flags);
449   - value = __raw_readl(vpif_vsclkdis_reg);
  445 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
450 446 value |= (VIDCH3CLK | VIDCH2CLK);
451   - __raw_writel(value, vpif_vsclkdis_reg);
  447 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
452 448 spin_unlock_irqrestore(&vpif_reg_lock, flags);
453 449  
454 450 val = i2c_smbus_read_byte(cpld_client);
... ... @@ -464,7 +460,7 @@
464 460 if (err)
465 461 return err;
466 462  
467   - value = __raw_readl(vpif_vidclkctl_reg);
  463 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
468 464 value &= ~(VCH2CLK_MASK);
469 465 value &= ~(VCH3CLK_MASK);
470 466  
471 467  
472 468  
... ... @@ -473,13 +469,13 @@
473 469 else
474 470 value |= (VCH2CLK_AUXCLK | VCH3CLK_AUXCLK);
475 471  
476   - __raw_writel(value, vpif_vidclkctl_reg);
  472 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
477 473  
478 474 spin_lock_irqsave(&vpif_reg_lock, flags);
479   - value = __raw_readl(vpif_vsclkdis_reg);
  475 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
480 476 /* enable the clock */
481 477 value &= ~(VIDCH3CLK | VIDCH2CLK);
482   - __raw_writel(value, vpif_vsclkdis_reg);
  478 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
483 479 spin_unlock_irqrestore(&vpif_reg_lock, flags);
484 480  
485 481 return 0;
... ... @@ -564,7 +560,7 @@
564 560 int val;
565 561 u32 value;
566 562  
567   - if (!vpif_vidclkctl_reg || !cpld_client)
  563 + if (!cpld_client)
568 564 return -ENXIO;
569 565  
570 566 val = i2c_smbus_read_byte(cpld_client);
... ... @@ -572,7 +568,7 @@
572 568 return val;
573 569  
574 570 spin_lock_irqsave(&vpif_reg_lock, flags);
575   - value = __raw_readl(vpif_vidclkctl_reg);
  571 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
576 572 if (mux_mode) {
577 573 val &= VPIF_INPUT_TWO_CHANNEL;
578 574 value |= VIDCH1CLK;
... ... @@ -580,7 +576,7 @@
580 576 val |= VPIF_INPUT_ONE_CHANNEL;
581 577 value &= ~VIDCH1CLK;
582 578 }
583   - __raw_writel(value, vpif_vidclkctl_reg);
  579 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VIDCLKCTL));
584 580 spin_unlock_irqrestore(&vpif_reg_lock, flags);
585 581  
586 582 err = i2c_smbus_write_byte(cpld_client, val);
... ... @@ -674,12 +670,6 @@
674 670  
675 671 static void __init evm_init_video(void)
676 672 {
677   - vpif_vidclkctl_reg = ioremap(VIDCLKCTL_OFFSET, 4);
678   - vpif_vsclkdis_reg = ioremap(VSCLKDIS_OFFSET, 4);
679   - if (!vpif_vidclkctl_reg || !vpif_vsclkdis_reg) {
680   - pr_err("Can't map VPIF VIDCLKCTL or VSCLKDIS registers\n");
681   - return;
682   - }
683 673 spin_lock_init(&vpif_reg_lock);
684 674  
685 675 dm646x_setup_vpif(&dm646x_vpif_display_config,
arch/arm/mach-davinci/davinci.h
Diff comments   View file @ 5cfb19a
... ... @@ -25,9 +25,20 @@
25 25  
26 26 #include <mach/asp.h>
27 27 #include <mach/keyscan.h>
  28 +#include <mach/hardware.h>
28 29  
29 30 #include <media/davinci/vpfe_capture.h>
30 31 #include <media/davinci/vpif_types.h>
  32 +
  33 +#define DAVINCI_SYSTEM_MODULE_BASE 0x01c40000
  34 +#define SYSMOD_VIDCLKCTL 0x38
  35 +#define SYSMOD_VDD3P3VPWDN 0x48
  36 +#define SYSMOD_VSCLKDIS 0x6c
  37 +#define SYSMOD_PUPDCTL1 0x7c
  38 +
  39 +extern void __iomem *davinci_sysmod_base;
  40 +#define DAVINCI_SYSMOD_VIRT(x) (davinci_sysmod_base + (x))
  41 +void davinci_map_sysmod(void);
31 42  
32 43 /* DM355 base addresses */
33 44 #define DM355_ASYNC_EMIF_CONTROL_BASE 0x01e10000
arch/arm/mach-davinci/devices.c
Diff comments   View file @ 5cfb19a
... ... @@ -23,6 +23,7 @@
23 23 #include <mach/mmc.h>
24 24 #include <mach/time.h>
25 25  
  26 +#include "davinci.h"
26 27 #include "clock.h"
27 28  
28 29 #define DAVINCI_I2C_BASE 0x01C21000
29 30  
... ... @@ -33,9 +34,20 @@
33 34 #define DM365_MMCSD0_BASE 0x01D11000
34 35 #define DM365_MMCSD1_BASE 0x01D00000
35 36  
36   -/* System control register offsets */
37   -#define DM64XX_VDD3P3V_PWDN 0x48
  37 +void __iomem *davinci_sysmod_base;
38 38  
  39 +void davinci_map_sysmod(void)
  40 +{
  41 + davinci_sysmod_base = ioremap_nocache(DAVINCI_SYSTEM_MODULE_BASE,
  42 + 0x800);
  43 + /*
  44 + * Throw a bug since a lot of board initialization code depends
  45 + * on system module availability. ioremap() failing this early
  46 + * need careful looking into anyway.
  47 + */
  48 + BUG_ON(!davinci_sysmod_base);
  49 +}
  50 +
39 51 static struct resource i2c_resources[] = {
40 52 {
41 53 .start = DAVINCI_I2C_BASE,
42 54  
43 55  
... ... @@ -212,13 +224,13 @@
212 224 davinci_cfg_reg(DM355_SD1_DATA2);
213 225 davinci_cfg_reg(DM355_SD1_DATA3);
214 226 } else if (cpu_is_davinci_dm365()) {
215   - void __iomem *pupdctl1 =
216   - IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE + 0x7c);
217   -
218 227 /* Configure pull down control */
219   - __raw_writel((__raw_readl(pupdctl1) & ~0xfc0),
220   - pupdctl1);
  228 + unsigned v;
221 229  
  230 + v = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  231 + __raw_writel(v & ~0xfc0,
  232 + DAVINCI_SYSMOD_VIRT(SYSMOD_PUPDCTL1));
  233 +
222 234 mmcsd1_resources[0].start = DM365_MMCSD1_BASE;
223 235 mmcsd1_resources[0].end = DM365_MMCSD1_BASE +
224 236 SZ_4K - 1;
225 237  
... ... @@ -246,11 +258,9 @@
246 258 mmcsd0_resources[2].start = IRQ_DM365_SDIOINT0;
247 259 } else if (cpu_is_davinci_dm644x()) {
248 260 /* REVISIT: should this be in board-init code? */
249   - void __iomem *base =
250   - IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
251   -
252 261 /* Power-on 3.3V IO cells */
253   - __raw_writel(0, base + DM64XX_VDD3P3V_PWDN);
  262 + __raw_writel(0,
  263 + DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
254 264 /*Set up the pull regiter for MMC */
255 265 davinci_cfg_reg(DM644X_MSTK);
256 266 }
arch/arm/mach-davinci/dm355.c
Diff comments   View file @ 5cfb19a
... ... @@ -871,6 +871,7 @@
871 871 void __init dm355_init(void)
872 872 {
873 873 davinci_common_init(&davinci_soc_info_dm355);
  874 + davinci_map_sysmod();
874 875 }
875 876  
876 877 static int __init dm355_init_devices(void)
arch/arm/mach-davinci/dm365.c
Diff comments   View file @ 5cfb19a
... ... @@ -1138,6 +1138,7 @@
1138 1138 void __init dm365_init(void)
1139 1139 {
1140 1140 davinci_common_init(&davinci_soc_info_dm365);
  1141 + davinci_map_sysmod();
1141 1142 }
1142 1143  
1143 1144 static struct resource dm365_vpss_resources[] = {
arch/arm/mach-davinci/dm644x.c
Diff comments   View file @ 5cfb19a
... ... @@ -786,6 +786,7 @@
786 786 void __init dm644x_init(void)
787 787 {
788 788 davinci_common_init(&davinci_soc_info_dm644x);
  789 + davinci_map_sysmod();
789 790 }
790 791  
791 792 static int __init dm644x_init_devices(void)
arch/arm/mach-davinci/dm646x.c
Diff comments   View file @ 5cfb19a
... ... @@ -32,8 +32,6 @@
32 32 #include "mux.h"
33 33  
34 34 #define DAVINCI_VPIF_BASE (0x01C12000)
35   -#define VDD3P3V_PWDN_OFFSET (0x48)
36   -#define VSCLKDIS_OFFSET (0x6C)
37 35  
38 36 #define VDD3P3V_VID_MASK (BIT_MASK(3) | BIT_MASK(2) | BIT_MASK(1) |\
39 37 BIT_MASK(0))
40 38  
41 39  
42 40  
43 41  
... ... @@ -880,15 +878,14 @@
880 878 struct vpif_capture_config *capture_config)
881 879 {
882 880 unsigned int value;
883   - void __iomem *base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE);
884 881  
885   - value = __raw_readl(base + VSCLKDIS_OFFSET);
  882 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
886 883 value &= ~VSCLKDIS_MASK;
887   - __raw_writel(value, base + VSCLKDIS_OFFSET);
  884 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VSCLKDIS));
888 885  
889   - value = __raw_readl(base + VDD3P3V_PWDN_OFFSET);
  886 + value = __raw_readl(DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
890 887 value &= ~VDD3P3V_VID_MASK;
891   - __raw_writel(value, base + VDD3P3V_PWDN_OFFSET);
  888 + __raw_writel(value, DAVINCI_SYSMOD_VIRT(SYSMOD_VDD3P3VPWDN));
892 889  
893 890 davinci_cfg_reg(DM646X_STSOMUX_DISABLE);
894 891 davinci_cfg_reg(DM646X_STSIMUX_DISABLE);
... ... @@ -912,6 +909,7 @@
912 909 void __init dm646x_init(void)
913 910 {
914 911 davinci_common_init(&davinci_soc_info_dm646x);
  912 + davinci_map_sysmod();
915 913 }
916 914  
917 915 static int __init dm646x_init_devices(void)
arch/arm/mach-davinci/include/mach/hardware.h
Diff comments   View file @ 5cfb19a
... ... @@ -19,8 +19,6 @@
19 19 * and the chip/board init code should then explicitly include
20 20 * <chipname>.h
21 21 */
22   -#define DAVINCI_SYSTEM_MODULE_BASE 0x01C40000
23   -
24 22 /*
25 23 * I/O mapping
26 24 */