Commit 5e2af0c09e60d11dd8297e259a9ca2b3d92d2cf4

Authored by Mauro Carvalho Chehab
1 parent 084a4fccef

edac: Don't initialize csrow's first_page & friends when not needed

Almost all edac	drivers	initialize csrow_info->first_page,
csrow_info->last_page and csrow_info->page_mask. Those vars are
used inside the EDAC core, in order to calculate the csrow affected
by an error, by using the routine edac_mc_find_csrow_by_page().

However, very few drivers actually use it:
        e752x_edac.c
        e7xxx_edac.c
        i3000_edac.c
        i82443bxgx_edac.c
        i82860_edac.c
        i82875p_edac.c
        i82975x_edac.c
        r82600_edac.c

There also a few other drivers that have their own calculus
formula internally using those vars.

All the others are just wasting time by initializing those
data.

While initializing data without using them won't cause any troubles, as
those information is stored at the wrong place (at csrows structure), it
is better to remove what is unused, in order to simplify the next patch.

Reviewed-by: Aristeu Rozanski <arozansk@redhat.com>
Acked-by: Borislav Petkov <borislav.petkov@amd.com>
Acked-by: Chris Metcalf <cmetcalf@tilera.com>
Cc: Doug Thompson <norsk5@yahoo.com>
Cc: Hitoshi Mitake <h.mitake@gmail.com>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: "Niklas Söderlund" <niklas.soderlund@ericsson.com>
Cc: Josh Boyer <jwboyer@gmail.com>
Cc: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>

Showing 12 changed files with 3 additions and 78 deletions Side-by-side Diff

drivers/edac/amd64_edac.c
... ... @@ -715,25 +715,6 @@
715 715 input_addr_to_dram_addr(mci, input_addr));
716 716 }
717 717  
718   -/*
719   - * Find the minimum and maximum InputAddr values that map to the given @csrow.
720   - * Pass back these values in *input_addr_min and *input_addr_max.
721   - */
722   -static void find_csrow_limits(struct mem_ctl_info *mci, int csrow,
723   - u64 *input_addr_min, u64 *input_addr_max)
724   -{
725   - struct amd64_pvt *pvt;
726   - u64 base, mask;
727   -
728   - pvt = mci->pvt_info;
729   - BUG_ON((csrow < 0) || (csrow >= pvt->csels[0].b_cnt));
730   -
731   - get_cs_base_and_mask(pvt, csrow, 0, &base, &mask);
732   -
733   - *input_addr_min = base & ~mask;
734   - *input_addr_max = base | mask;
735   -}
736   -
737 718 /* Map the Error address to a PAGE and PAGE OFFSET. */
738 719 static inline void error_address_to_page_and_offset(u64 error_address,
739 720 u32 *page, u32 *offset)
... ... @@ -2185,7 +2166,7 @@
2185 2166 {
2186 2167 struct csrow_info *csrow;
2187 2168 struct amd64_pvt *pvt = mci->pvt_info;
2188   - u64 input_addr_min, input_addr_max, sys_addr, base, mask;
  2169 + u64 base, mask;
2189 2170 u32 val;
2190 2171 int i, j, empty = 1;
2191 2172 enum mem_type mtype;
2192 2173  
2193 2174  
... ... @@ -2216,28 +2197,14 @@
2216 2197 csrow->nr_pages = amd64_csrow_nr_pages(pvt, 0, i);
2217 2198 if (csrow_enabled(i, 1, pvt))
2218 2199 csrow->nr_pages += amd64_csrow_nr_pages(pvt, 1, i);
2219   - find_csrow_limits(mci, i, &input_addr_min, &input_addr_max);
2220   - sys_addr = input_addr_to_sys_addr(mci, input_addr_min);
2221   - csrow->first_page = (u32) (sys_addr >> PAGE_SHIFT);
2222   - sys_addr = input_addr_to_sys_addr(mci, input_addr_max);
2223   - csrow->last_page = (u32) (sys_addr >> PAGE_SHIFT);
2224 2200  
2225 2201 get_cs_base_and_mask(pvt, i, 0, &base, &mask);
2226   - csrow->page_mask = ~mask;
2227 2202 /* 8 bytes of resolution */
2228 2203  
2229 2204 mtype = amd64_determine_memory_type(pvt, i);
2230 2205  
2231 2206 debugf1(" for MC node %d csrow %d:\n", pvt->mc_node_id, i);
2232   - debugf1(" input_addr_min: 0x%lx input_addr_max: 0x%lx\n",
2233   - (unsigned long)input_addr_min,
2234   - (unsigned long)input_addr_max);
2235   - debugf1(" sys_addr: 0x%lx page_mask: 0x%lx\n",
2236   - (unsigned long)sys_addr, csrow->page_mask);
2237   - debugf1(" nr_pages: %u first_page: 0x%lx "
2238   - "last_page: 0x%lx\n",
2239   - (unsigned)csrow->nr_pages,
2240   - csrow->first_page, csrow->last_page);
  2207 + debugf1(" nr_pages: %u\n", csrow->nr_pages);
2241 2208  
2242 2209 /*
2243 2210 * determine whether CHIPKILL or JUST ECC or NO ECC is operating
drivers/edac/i3200_edac.c
... ... @@ -321,7 +321,6 @@
321 321 int rc;
322 322 int i, j;
323 323 struct mem_ctl_info *mci = NULL;
324   - unsigned long last_page;
325 324 u16 drbs[I3200_CHANNELS][I3200_RANKS_PER_CHANNEL];
326 325 bool stacked;
327 326 void __iomem *window;
... ... @@ -366,7 +365,6 @@
366 365 * cumulative; the last one will contain the total memory
367 366 * contained in all ranks.
368 367 */
369   - last_page = -1UL;
370 368 for (i = 0; i < mci->nr_csrows; i++) {
371 369 unsigned long nr_pages;
372 370 struct csrow_info *csrow = &mci->csrows[i];
... ... @@ -378,9 +376,6 @@
378 376 if (nr_pages == 0)
379 377 continue;
380 378  
381   - csrow->first_page = last_page + 1;
382   - last_page += nr_pages;
383   - csrow->last_page = last_page;
384 379 csrow->nr_pages = nr_pages;
385 380  
386 381 for (j = 0; j < nr_channels; j++) {
drivers/edac/i5000_edac.c
... ... @@ -1263,11 +1263,6 @@
1263 1263 if (!MTR_DIMMS_PRESENT(mtr) && !MTR_DIMMS_PRESENT(mtr1))
1264 1264 continue;
1265 1265  
1266   - /* FAKE OUT VALUES, FIXME */
1267   - p_csrow->first_page = 0 + csrow * 20;
1268   - p_csrow->last_page = 9 + csrow * 20;
1269   - p_csrow->page_mask = 0xFFF;
1270   -
1271 1266 csrow_megs = 0;
1272 1267 for (channel = 0; channel < pvt->maxch; channel++) {
1273 1268 csrow_megs += pvt->dimm_info[csrow][channel].megabytes;
drivers/edac/i5100_edac.c
... ... @@ -859,8 +859,6 @@
859 859 * FIXME: these two are totally bogus -- I don't see how to
860 860 * map them correctly to this structure...
861 861 */
862   - mci->csrows[i].first_page = total_pages;
863   - mci->csrows[i].last_page = total_pages + npages - 1;
864 862 mci->csrows[i].nr_pages = npages;
865 863 mci->csrows[i].csrow_idx = i;
866 864 mci->csrows[i].mci = mci;
drivers/edac/i5400_edac.c
... ... @@ -1180,11 +1180,6 @@
1180 1180 if (!MTR_DIMMS_PRESENT(mtr))
1181 1181 continue;
1182 1182  
1183   - /* FAKE OUT VALUES, FIXME */
1184   - p_csrow->first_page = 0 + csrow * 20;
1185   - p_csrow->last_page = 9 + csrow * 20;
1186   - p_csrow->page_mask = 0xFFF;
1187   -
1188 1183 csrow_megs = 0;
1189 1184 for (channel = 0; channel < pvt->maxch; channel++) {
1190 1185 csrow_megs += pvt->dimm_info[csrow][channel].megabytes;
drivers/edac/i7300_edac.c
... ... @@ -778,7 +778,7 @@
778 778 int rc = -ENODEV;
779 779 int mtr;
780 780 int ch, branch, slot, channel;
781   - u32 last_page = 0, nr_pages;
  781 + u32 nr_pages;
782 782 struct dimm_info *dimm;
783 783  
784 784 pvt = mci->pvt_info;
... ... @@ -828,9 +828,6 @@
828 828  
829 829 /* Update per_csrow memory count */
830 830 p_csrow->nr_pages += nr_pages;
831   - p_csrow->first_page = last_page;
832   - last_page += nr_pages;
833   - p_csrow->last_page = last_page;
834 831  
835 832 rc = 0;
836 833 }
drivers/edac/i7core_edac.c
... ... @@ -599,7 +599,6 @@
599 599 struct pci_dev *pdev;
600 600 int i, j;
601 601 int csrow = 0;
602   - unsigned long last_page = 0;
603 602 enum edac_type mode;
604 603 enum mem_type mtype;
605 604 struct dimm_info *dimm;
606 605  
... ... @@ -716,12 +715,8 @@
716 715 npages = MiB_TO_PAGES(size);
717 716  
718 717 csr = &mci->csrows[csrow];
719   - csr->first_page = last_page + 1;
720   - last_page += npages;
721   - csr->last_page = last_page;
722 718 csr->nr_pages = npages;
723 719  
724   - csr->page_mask = 0;
725 720 csr->csrow_idx = csrow;
726 721 csr->nr_channels = 1;
727 722  
drivers/edac/mv64x60_edac.c
... ... @@ -668,7 +668,6 @@
668 668 csrow = &mci->csrows[0];
669 669 dimm = csrow->channels[0].dimm;
670 670 csrow->nr_pages = pdata->total_mem >> PAGE_SHIFT;
671   - csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
672 671 dimm->grain = 8;
673 672  
674 673 dimm->mtype = (ctl & MV64X60_SDRAM_REGISTERED) ? MEM_RDDR : MEM_DDR;
drivers/edac/ppc4xx_edac.c
... ... @@ -897,7 +897,6 @@
897 897 enum edac_type edac_mode;
898 898 int row, j;
899 899 u32 mbxcf, size;
900   - static u32 ppc4xx_last_page;
901 900  
902 901 /* Establish the memory type and width */
903 902  
... ... @@ -959,10 +958,6 @@
959 958 goto done;
960 959 }
961 960  
962   - csi->first_page = ppc4xx_last_page;
963   - csi->last_page = csi->first_page + csi->nr_pages - 1;
964   - csi->page_mask = 0;
965   -
966 961 /*
967 962 * It's unclear exactly what grain should be set to
968 963 * here. The SDRAM_ECCES register allows resolution of
... ... @@ -984,8 +979,6 @@
984 979 dimm->dtype = dtype;
985 980  
986 981 dimm->edac_mode = edac_mode;
987   -
988   - ppc4xx_last_page += csi->nr_pages;
989 982 }
990 983 }
991 984  
drivers/edac/sb_edac.c
... ... @@ -642,8 +642,6 @@
642 642 * csrows.
643 643 */
644 644 csr = &mci->csrows[csrow];
645   - csr->first_page = last_page;
646   - csr->last_page = last_page + npages - 1;
647 645 csr->nr_pages = npages;
648 646 csr->csrow_idx = csrow;
649 647 csr->nr_channels = 1;
drivers/edac/tile_edac.c
... ... @@ -110,9 +110,7 @@
110 110 return -1;
111 111 }
112 112  
113   - csrow->first_page = 0;
114 113 csrow->nr_pages = mem_info.mem_size >> PAGE_SHIFT;
115   - csrow->last_page = csrow->first_page + csrow->nr_pages - 1;
116 114 dimm->grain = TILE_EDAC_ERROR_GRAIN;
117 115 dimm->dtype = DEV_UNKNOWN;
118 116  
drivers/edac/x38_edac.c
... ... @@ -319,7 +319,6 @@
319 319 int rc;
320 320 int i, j;
321 321 struct mem_ctl_info *mci = NULL;
322   - unsigned long last_page;
323 322 u16 drbs[X38_CHANNELS][X38_RANKS_PER_CHANNEL];
324 323 bool stacked;
325 324 void __iomem *window;
... ... @@ -363,7 +362,6 @@
363 362 * cumulative; the last one will contain the total memory
364 363 * contained in all ranks.
365 364 */
366   - last_page = -1UL;
367 365 for (i = 0; i < mci->nr_csrows; i++) {
368 366 unsigned long nr_pages;
369 367 struct csrow_info *csrow = &mci->csrows[i];
... ... @@ -375,9 +373,6 @@
375 373 if (nr_pages == 0)
376 374 continue;
377 375  
378   - csrow->first_page = last_page + 1;
379   - last_page += nr_pages;
380   - csrow->last_page = last_page;
381 376 csrow->nr_pages = nr_pages;
382 377  
383 378 for (j = 0; j < x38_channel_num; j++) {