Commit 6887b042c52ee05a405bae859f410c2f63b45339
Committed by
Lee Jones
1 parent
bc00d68f2f
mfd: arizona: Add support for WM8998 and WM1814
Signed-off-by: Richard Fitzgerald <rf@opensource.wolfsonmicro.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Showing 10 changed files with 1945 additions and 8 deletions Side-by-side Diff
drivers/mfd/Kconfig
... | ... | @@ -1379,6 +1379,12 @@ |
1379 | 1379 | help |
1380 | 1380 | Support for Wolfson Microelectronics WM8997 low power audio SoC |
1381 | 1381 | |
1382 | +config MFD_WM8998 | |
1383 | + bool "Wolfson Microelectronics WM8998" | |
1384 | + depends on MFD_ARIZONA | |
1385 | + help | |
1386 | + Support for Wolfson Microelectronics WM8998 low power audio SoC | |
1387 | + | |
1382 | 1388 | config MFD_WM8400 |
1383 | 1389 | bool "Wolfson Microelectronics WM8400" |
1384 | 1390 | select MFD_CORE |
drivers/mfd/Makefile
... | ... | @@ -48,6 +48,9 @@ |
48 | 48 | ifeq ($(CONFIG_MFD_WM8997),y) |
49 | 49 | obj-$(CONFIG_MFD_ARIZONA) += wm8997-tables.o |
50 | 50 | endif |
51 | +ifeq ($(CONFIG_MFD_WM8998),y) | |
52 | +obj-$(CONFIG_MFD_ARIZONA) += wm8998-tables.o | |
53 | +endif | |
51 | 54 | obj-$(CONFIG_MFD_WM8400) += wm8400-core.o |
52 | 55 | wm831x-objs := wm831x-core.o wm831x-irq.o wm831x-otp.o |
53 | 56 | wm831x-objs += wm831x-auxadc.o |
drivers/mfd/arizona-core.c
... | ... | @@ -146,17 +146,31 @@ |
146 | 146 | static irqreturn_t arizona_overclocked(int irq, void *data) |
147 | 147 | { |
148 | 148 | struct arizona *arizona = data; |
149 | - unsigned int val[2]; | |
149 | + unsigned int val[3]; | |
150 | 150 | int ret; |
151 | 151 | |
152 | 152 | ret = regmap_bulk_read(arizona->regmap, ARIZONA_INTERRUPT_RAW_STATUS_6, |
153 | - &val[0], 2); | |
153 | + &val[0], 3); | |
154 | 154 | if (ret != 0) { |
155 | 155 | dev_err(arizona->dev, "Failed to read overclock status: %d\n", |
156 | 156 | ret); |
157 | 157 | return IRQ_NONE; |
158 | 158 | } |
159 | 159 | |
160 | + switch (arizona->type) { | |
161 | + case WM8998: | |
162 | + case WM1814: | |
163 | + /* Some bits are shifted on WM8998, | |
164 | + * rearrange to match the standard bit layout | |
165 | + */ | |
166 | + val[0] = ((val[0] & 0x60e0) >> 1) | | |
167 | + ((val[0] & 0x1e00) >> 2) | | |
168 | + (val[0] & 0x000f); | |
169 | + break; | |
170 | + default: | |
171 | + break; | |
172 | + } | |
173 | + | |
160 | 174 | if (val[0] & ARIZONA_PWM_OVERCLOCKED_STS) |
161 | 175 | dev_err(arizona->dev, "PWM overclocked\n"); |
162 | 176 | if (val[0] & ARIZONA_FX_CORE_OVERCLOCKED_STS) |
... | ... | @@ -201,6 +215,9 @@ |
201 | 215 | if (val[1] & ARIZONA_ISRC1_OVERCLOCKED_STS) |
202 | 216 | dev_err(arizona->dev, "ISRC1 overclocked\n"); |
203 | 217 | |
218 | + if (val[2] & ARIZONA_SPDIF_OVERCLOCKED_STS) | |
219 | + dev_err(arizona->dev, "SPDIF overclocked\n"); | |
220 | + | |
204 | 221 | return IRQ_HANDLED; |
205 | 222 | } |
206 | 223 | |
... | ... | @@ -806,6 +823,8 @@ |
806 | 823 | { .compatible = "wlf,wm5110", .data = (void *)WM5110 }, |
807 | 824 | { .compatible = "wlf,wm8280", .data = (void *)WM8280 }, |
808 | 825 | { .compatible = "wlf,wm8997", .data = (void *)WM8997 }, |
826 | + { .compatible = "wlf,wm8998", .data = (void *)WM8998 }, | |
827 | + { .compatible = "wlf,wm1814", .data = (void *)WM1814 }, | |
809 | 828 | {}, |
810 | 829 | }; |
811 | 830 | EXPORT_SYMBOL_GPL(arizona_of_match); |
812 | 831 | |
... | ... | @@ -887,11 +906,28 @@ |
887 | 906 | }, |
888 | 907 | }; |
889 | 908 | |
909 | +static const struct mfd_cell wm8998_devs[] = { | |
910 | + { | |
911 | + .name = "arizona-extcon", | |
912 | + .parent_supplies = wm5102_supplies, | |
913 | + .num_parent_supplies = 1, /* We only need MICVDD */ | |
914 | + }, | |
915 | + { .name = "arizona-gpio" }, | |
916 | + { .name = "arizona-haptics" }, | |
917 | + { .name = "arizona-pwm" }, | |
918 | + { | |
919 | + .name = "wm8998-codec", | |
920 | + .parent_supplies = wm5102_supplies, | |
921 | + .num_parent_supplies = ARRAY_SIZE(wm5102_supplies), | |
922 | + }, | |
923 | + { .name = "arizona-micsupp" }, | |
924 | +}; | |
925 | + | |
890 | 926 | int arizona_dev_init(struct arizona *arizona) |
891 | 927 | { |
892 | 928 | struct device *dev = arizona->dev; |
893 | 929 | const char *type_name; |
894 | - unsigned int reg, val; | |
930 | + unsigned int reg, val, mask; | |
895 | 931 | int (*apply_patch)(struct arizona *) = NULL; |
896 | 932 | int ret, i; |
897 | 933 | |
... | ... | @@ -911,6 +947,8 @@ |
911 | 947 | case WM5110: |
912 | 948 | case WM8280: |
913 | 949 | case WM8997: |
950 | + case WM8998: | |
951 | + case WM1814: | |
914 | 952 | for (i = 0; i < ARRAY_SIZE(wm5102_core_supplies); i++) |
915 | 953 | arizona->core_supplies[i].supply |
916 | 954 | = wm5102_core_supplies[i]; |
... | ... | @@ -992,6 +1030,7 @@ |
992 | 1030 | switch (reg) { |
993 | 1031 | case 0x5102: |
994 | 1032 | case 0x5110: |
1033 | + case 0x6349: | |
995 | 1034 | case 0x8997: |
996 | 1035 | break; |
997 | 1036 | default: |
... | ... | @@ -1093,6 +1132,27 @@ |
1093 | 1132 | apply_patch = wm8997_patch; |
1094 | 1133 | break; |
1095 | 1134 | #endif |
1135 | +#ifdef CONFIG_MFD_WM8998 | |
1136 | + case 0x6349: | |
1137 | + switch (arizona->type) { | |
1138 | + case WM8998: | |
1139 | + type_name = "WM8998"; | |
1140 | + break; | |
1141 | + | |
1142 | + case WM1814: | |
1143 | + type_name = "WM1814"; | |
1144 | + break; | |
1145 | + | |
1146 | + default: | |
1147 | + type_name = "WM8998"; | |
1148 | + dev_err(arizona->dev, "WM8998 registered as %d\n", | |
1149 | + arizona->type); | |
1150 | + arizona->type = WM8998; | |
1151 | + } | |
1152 | + | |
1153 | + apply_patch = wm8998_patch; | |
1154 | + break; | |
1155 | +#endif | |
1096 | 1156 | default: |
1097 | 1157 | dev_err(arizona->dev, "Unknown device ID %x\n", reg); |
1098 | 1158 | goto err_reset; |
1099 | 1159 | |
1100 | 1160 | |
... | ... | @@ -1208,14 +1268,38 @@ |
1208 | 1268 | << ARIZONA_IN1_DMIC_SUP_SHIFT; |
1209 | 1269 | if (arizona->pdata.inmode[i] & ARIZONA_INMODE_DMIC) |
1210 | 1270 | val |= 1 << ARIZONA_IN1_MODE_SHIFT; |
1211 | - if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1212 | - val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; | |
1213 | 1271 | |
1272 | + switch (arizona->type) { | |
1273 | + case WM8998: | |
1274 | + case WM1814: | |
1275 | + regmap_update_bits(arizona->regmap, | |
1276 | + ARIZONA_ADC_DIGITAL_VOLUME_1L + (i * 8), | |
1277 | + ARIZONA_IN1L_SRC_SE_MASK, | |
1278 | + (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1279 | + << ARIZONA_IN1L_SRC_SE_SHIFT); | |
1280 | + | |
1281 | + regmap_update_bits(arizona->regmap, | |
1282 | + ARIZONA_ADC_DIGITAL_VOLUME_1R + (i * 8), | |
1283 | + ARIZONA_IN1R_SRC_SE_MASK, | |
1284 | + (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1285 | + << ARIZONA_IN1R_SRC_SE_SHIFT); | |
1286 | + | |
1287 | + mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1288 | + ARIZONA_IN1_MODE_MASK; | |
1289 | + break; | |
1290 | + default: | |
1291 | + if (arizona->pdata.inmode[i] & ARIZONA_INMODE_SE) | |
1292 | + val |= 1 << ARIZONA_IN1_SINGLE_ENDED_SHIFT; | |
1293 | + | |
1294 | + mask = ARIZONA_IN1_DMIC_SUP_MASK | | |
1295 | + ARIZONA_IN1_MODE_MASK | | |
1296 | + ARIZONA_IN1_SINGLE_ENDED_MASK; | |
1297 | + break; | |
1298 | + } | |
1299 | + | |
1214 | 1300 | regmap_update_bits(arizona->regmap, |
1215 | 1301 | ARIZONA_IN1L_CONTROL + (i * 8), |
1216 | - ARIZONA_IN1_DMIC_SUP_MASK | | |
1217 | - ARIZONA_IN1_MODE_MASK | | |
1218 | - ARIZONA_IN1_SINGLE_ENDED_MASK, val); | |
1302 | + mask, val); | |
1219 | 1303 | } |
1220 | 1304 | |
1221 | 1305 | for (i = 0; i < ARIZONA_MAX_OUTPUT; i++) { |
... | ... | @@ -1270,6 +1354,11 @@ |
1270 | 1354 | case WM8997: |
1271 | 1355 | ret = mfd_add_devices(arizona->dev, -1, wm8997_devs, |
1272 | 1356 | ARRAY_SIZE(wm8997_devs), NULL, 0, NULL); |
1357 | + break; | |
1358 | + case WM8998: | |
1359 | + case WM1814: | |
1360 | + ret = mfd_add_devices(arizona->dev, -1, wm8998_devs, | |
1361 | + ARRAY_SIZE(wm8998_devs), NULL, 0, NULL); | |
1273 | 1362 | break; |
1274 | 1363 | } |
1275 | 1364 |
drivers/mfd/arizona-i2c.c
... | ... | @@ -53,6 +53,12 @@ |
53 | 53 | regmap_config = &wm8997_i2c_regmap; |
54 | 54 | break; |
55 | 55 | #endif |
56 | +#ifdef CONFIG_MFD_WM8998 | |
57 | + case WM8998: | |
58 | + case WM1814: | |
59 | + regmap_config = &wm8998_i2c_regmap; | |
60 | + break; | |
61 | +#endif | |
56 | 62 | default: |
57 | 63 | dev_err(&i2c->dev, "Unknown device type %ld\n", |
58 | 64 | id->driver_data); |
... | ... | @@ -90,6 +96,8 @@ |
90 | 96 | { "wm5110", WM5110 }, |
91 | 97 | { "wm8280", WM8280 }, |
92 | 98 | { "wm8997", WM8997 }, |
99 | + { "wm8998", WM8998 }, | |
100 | + { "wm1814", WM1814 }, | |
93 | 101 | { } |
94 | 102 | }; |
95 | 103 | MODULE_DEVICE_TABLE(i2c, arizona_i2c_id); |
drivers/mfd/arizona-irq.c
... | ... | @@ -234,6 +234,15 @@ |
234 | 234 | arizona->ctrlif_error = false; |
235 | 235 | break; |
236 | 236 | #endif |
237 | +#ifdef CONFIG_MFD_WM8998 | |
238 | + case WM8998: | |
239 | + case WM1814: | |
240 | + aod = &wm8998_aod; | |
241 | + irq = &wm8998_irq; | |
242 | + | |
243 | + arizona->ctrlif_error = false; | |
244 | + break; | |
245 | +#endif | |
237 | 246 | default: |
238 | 247 | BUG_ON("Unknown Arizona class device" == NULL); |
239 | 248 | return -EINVAL; |
drivers/mfd/arizona.h
... | ... | @@ -27,6 +27,8 @@ |
27 | 27 | |
28 | 28 | extern const struct regmap_config wm8997_i2c_regmap; |
29 | 29 | |
30 | +extern const struct regmap_config wm8998_i2c_regmap; | |
31 | + | |
30 | 32 | extern const struct dev_pm_ops arizona_pm_ops; |
31 | 33 | |
32 | 34 | extern const struct of_device_id arizona_of_match[]; |
... | ... | @@ -40,6 +42,9 @@ |
40 | 42 | |
41 | 43 | extern const struct regmap_irq_chip wm8997_aod; |
42 | 44 | extern const struct regmap_irq_chip wm8997_irq; |
45 | + | |
46 | +extern struct regmap_irq_chip wm8998_aod; | |
47 | +extern struct regmap_irq_chip wm8998_irq; | |
43 | 48 | |
44 | 49 | int arizona_dev_init(struct arizona *arizona); |
45 | 50 | int arizona_dev_exit(struct arizona *arizona); |
drivers/mfd/wm8998-tables.c
Changes suppressed. Click to show
1 | +/* | |
2 | + * wm8998-tables.c -- data tables for wm8998-class codecs | |
3 | + * | |
4 | + * Copyright 2014 Wolfson Microelectronics plc | |
5 | + * | |
6 | + * Author: Richard Fitzgerald <rf@opensource.wolfsonmicro.com> | |
7 | + * | |
8 | + * This program is free software; you can redistribute it and/or modify | |
9 | + * it under the terms of the GNU General Public License version 2 as | |
10 | + * published by the Free Software Foundation. | |
11 | + */ | |
12 | + | |
13 | +#include <linux/module.h> | |
14 | + | |
15 | +#include <linux/mfd/arizona/core.h> | |
16 | +#include <linux/mfd/arizona/registers.h> | |
17 | +#include <linux/device.h> | |
18 | + | |
19 | +#include "arizona.h" | |
20 | + | |
21 | +#define WM8998_NUM_AOD_ISR 2 | |
22 | +#define WM8998_NUM_ISR 5 | |
23 | + | |
24 | +static const struct reg_default wm8998_rev_a_patch[] = { | |
25 | + { 0x0212, 0x0000 }, | |
26 | + { 0x0211, 0x0014 }, | |
27 | + { 0x04E4, 0x0E0D }, | |
28 | + { 0x04E5, 0x0E0D }, | |
29 | + { 0x04E6, 0x0E0D }, | |
30 | + { 0x04EB, 0x060E }, | |
31 | + { 0x0441, 0xC759 }, | |
32 | + { 0x0442, 0x2A08 }, | |
33 | + { 0x0443, 0x5CFA }, | |
34 | + { 0x026E, 0x0064 }, | |
35 | + { 0x026F, 0x00EA }, | |
36 | + { 0x0270, 0x1F16 }, | |
37 | + { 0x0410, 0x2080 }, | |
38 | + { 0x0418, 0x2080 }, | |
39 | + { 0x0420, 0x2080 }, | |
40 | + { 0x04B8, 0x1120 }, | |
41 | + { 0x047E, 0x080E }, | |
42 | + { 0x0448, 0x03EF }, | |
43 | +}; | |
44 | + | |
45 | +/* We use a function so we can use ARRAY_SIZE() */ | |
46 | +int wm8998_patch(struct arizona *arizona) | |
47 | +{ | |
48 | + return regmap_register_patch(arizona->regmap, | |
49 | + wm8998_rev_a_patch, | |
50 | + ARRAY_SIZE(wm8998_rev_a_patch)); | |
51 | +} | |
52 | + | |
53 | +static const struct regmap_irq wm8998_aod_irqs[ARIZONA_NUM_IRQ] = { | |
54 | + [ARIZONA_IRQ_MICD_CLAMP_FALL] = { | |
55 | + .mask = ARIZONA_MICD_CLAMP_FALL_EINT1 | |
56 | + }, | |
57 | + [ARIZONA_IRQ_MICD_CLAMP_RISE] = { | |
58 | + .mask = ARIZONA_MICD_CLAMP_RISE_EINT1 | |
59 | + }, | |
60 | + [ARIZONA_IRQ_GP5_FALL] = { .mask = ARIZONA_GP5_FALL_EINT1 }, | |
61 | + [ARIZONA_IRQ_GP5_RISE] = { .mask = ARIZONA_GP5_RISE_EINT1 }, | |
62 | + [ARIZONA_IRQ_JD_FALL] = { .mask = ARIZONA_JD1_FALL_EINT1 }, | |
63 | + [ARIZONA_IRQ_JD_RISE] = { .mask = ARIZONA_JD1_RISE_EINT1 }, | |
64 | +}; | |
65 | + | |
66 | +struct regmap_irq_chip wm8998_aod = { | |
67 | + .name = "wm8998 AOD", | |
68 | + .status_base = ARIZONA_AOD_IRQ1, | |
69 | + .mask_base = ARIZONA_AOD_IRQ_MASK_IRQ1, | |
70 | + .ack_base = ARIZONA_AOD_IRQ1, | |
71 | + .wake_base = ARIZONA_WAKE_CONTROL, | |
72 | + .wake_invert = 1, | |
73 | + .num_regs = 1, | |
74 | + .irqs = wm8998_aod_irqs, | |
75 | + .num_irqs = ARRAY_SIZE(wm8998_aod_irqs), | |
76 | +}; | |
77 | + | |
78 | +static const struct regmap_irq wm8998_irqs[ARIZONA_NUM_IRQ] = { | |
79 | + [ARIZONA_IRQ_GP4] = { .reg_offset = 0, .mask = ARIZONA_GP4_EINT1 }, | |
80 | + [ARIZONA_IRQ_GP3] = { .reg_offset = 0, .mask = ARIZONA_GP3_EINT1 }, | |
81 | + [ARIZONA_IRQ_GP2] = { .reg_offset = 0, .mask = ARIZONA_GP2_EINT1 }, | |
82 | + [ARIZONA_IRQ_GP1] = { .reg_offset = 0, .mask = ARIZONA_GP1_EINT1 }, | |
83 | + | |
84 | + [ARIZONA_IRQ_SPK_OVERHEAT_WARN] = { | |
85 | + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_WARN_EINT1 | |
86 | + }, | |
87 | + [ARIZONA_IRQ_SPK_OVERHEAT] = { | |
88 | + .reg_offset = 2, .mask = ARIZONA_SPK_OVERHEAT_EINT1 | |
89 | + }, | |
90 | + [ARIZONA_IRQ_HPDET] = { | |
91 | + .reg_offset = 2, .mask = ARIZONA_HPDET_EINT1 | |
92 | + }, | |
93 | + [ARIZONA_IRQ_MICDET] = { | |
94 | + .reg_offset = 2, .mask = ARIZONA_MICDET_EINT1 | |
95 | + }, | |
96 | + [ARIZONA_IRQ_WSEQ_DONE] = { | |
97 | + .reg_offset = 2, .mask = ARIZONA_WSEQ_DONE_EINT1 | |
98 | + }, | |
99 | + [ARIZONA_IRQ_DRC1_SIG_DET] = { | |
100 | + .reg_offset = 2, .mask = ARIZONA_DRC1_SIG_DET_EINT1 | |
101 | + }, | |
102 | + [ARIZONA_IRQ_ASRC2_LOCK] = { | |
103 | + .reg_offset = 2, .mask = ARIZONA_ASRC2_LOCK_EINT1 | |
104 | + }, | |
105 | + [ARIZONA_IRQ_ASRC1_LOCK] = { | |
106 | + .reg_offset = 2, .mask = ARIZONA_ASRC1_LOCK_EINT1 | |
107 | + }, | |
108 | + [ARIZONA_IRQ_UNDERCLOCKED] = { | |
109 | + .reg_offset = 2, .mask = ARIZONA_UNDERCLOCKED_EINT1 | |
110 | + }, | |
111 | + [ARIZONA_IRQ_OVERCLOCKED] = { | |
112 | + .reg_offset = 2, .mask = ARIZONA_OVERCLOCKED_EINT1 | |
113 | + }, | |
114 | + [ARIZONA_IRQ_FLL2_LOCK] = { | |
115 | + .reg_offset = 2, .mask = ARIZONA_FLL2_LOCK_EINT1 | |
116 | + }, | |
117 | + [ARIZONA_IRQ_FLL1_LOCK] = { | |
118 | + .reg_offset = 2, .mask = ARIZONA_FLL1_LOCK_EINT1 | |
119 | + }, | |
120 | + [ARIZONA_IRQ_CLKGEN_ERR] = { | |
121 | + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_EINT1 | |
122 | + }, | |
123 | + [ARIZONA_IRQ_CLKGEN_ERR_ASYNC] = { | |
124 | + .reg_offset = 2, .mask = ARIZONA_CLKGEN_ERR_ASYNC_EINT1 | |
125 | + }, | |
126 | + | |
127 | + [ARIZONA_IRQ_ASRC_CFG_ERR] = { | |
128 | + .reg_offset = 3, .mask = ARIZONA_ASRC_CFG_ERR_EINT1 | |
129 | + }, | |
130 | + [ARIZONA_IRQ_AIF3_ERR] = { | |
131 | + .reg_offset = 3, .mask = ARIZONA_AIF3_ERR_EINT1 | |
132 | + }, | |
133 | + [ARIZONA_IRQ_AIF2_ERR] = { | |
134 | + .reg_offset = 3, .mask = ARIZONA_AIF2_ERR_EINT1 | |
135 | + }, | |
136 | + [ARIZONA_IRQ_AIF1_ERR] = { | |
137 | + .reg_offset = 3, .mask = ARIZONA_AIF1_ERR_EINT1 | |
138 | + }, | |
139 | + [ARIZONA_IRQ_CTRLIF_ERR] = { | |
140 | + .reg_offset = 3, .mask = ARIZONA_CTRLIF_ERR_EINT1 | |
141 | + }, | |
142 | + [ARIZONA_IRQ_MIXER_DROPPED_SAMPLES] = { | |
143 | + .reg_offset = 3, .mask = ARIZONA_MIXER_DROPPED_SAMPLE_EINT1 | |
144 | + }, | |
145 | + [ARIZONA_IRQ_ASYNC_CLK_ENA_LOW] = { | |
146 | + .reg_offset = 3, .mask = ARIZONA_ASYNC_CLK_ENA_LOW_EINT1 | |
147 | + }, | |
148 | + [ARIZONA_IRQ_SYSCLK_ENA_LOW] = { | |
149 | + .reg_offset = 3, .mask = ARIZONA_SYSCLK_ENA_LOW_EINT1 | |
150 | + }, | |
151 | + [ARIZONA_IRQ_ISRC1_CFG_ERR] = { | |
152 | + .reg_offset = 3, .mask = ARIZONA_ISRC1_CFG_ERR_EINT1 | |
153 | + }, | |
154 | + [ARIZONA_IRQ_ISRC2_CFG_ERR] = { | |
155 | + .reg_offset = 3, .mask = ARIZONA_ISRC2_CFG_ERR_EINT1 | |
156 | + }, | |
157 | + | |
158 | + [ARIZONA_IRQ_BOOT_DONE] = { | |
159 | + .reg_offset = 4, .mask = ARIZONA_BOOT_DONE_EINT1 | |
160 | + }, | |
161 | + [ARIZONA_IRQ_FLL2_CLOCK_OK] = { | |
162 | + .reg_offset = 4, .mask = ARIZONA_FLL2_CLOCK_OK_EINT1 | |
163 | + }, | |
164 | + [ARIZONA_IRQ_FLL1_CLOCK_OK] = { | |
165 | + .reg_offset = 4, .mask = ARIZONA_FLL1_CLOCK_OK_EINT1 | |
166 | + }, | |
167 | +}; | |
168 | + | |
169 | +struct regmap_irq_chip wm8998_irq = { | |
170 | + .name = "wm8998 IRQ", | |
171 | + .status_base = ARIZONA_INTERRUPT_STATUS_1, | |
172 | + .mask_base = ARIZONA_INTERRUPT_STATUS_1_MASK, | |
173 | + .ack_base = ARIZONA_INTERRUPT_STATUS_1, | |
174 | + .num_regs = 5, | |
175 | + .irqs = wm8998_irqs, | |
176 | + .num_irqs = ARRAY_SIZE(wm8998_irqs), | |
177 | +}; | |
178 | + | |
179 | +static const struct reg_default wm8998_reg_default[] = { | |
180 | + { 0x00000009, 0x0001 }, /* R9 - Ctrl IF I2C1 CFG 1 */ | |
181 | + { 0x0000000B, 0x001A }, /* R11 - Ctrl IF I2C1 CFG 2 */ | |
182 | + { 0x00000020, 0x0000 }, /* R32 - Tone Generator 1 */ | |
183 | + { 0x00000021, 0x1000 }, /* R33 - Tone Generator 2 */ | |
184 | + { 0x00000022, 0x0000 }, /* R34 - Tone Generator 3 */ | |
185 | + { 0x00000023, 0x1000 }, /* R35 - Tone Generator 4 */ | |
186 | + { 0x00000024, 0x0000 }, /* R36 - Tone Generator 5 */ | |
187 | + { 0x00000030, 0x0000 }, /* R48 - PWM Drive 1 */ | |
188 | + { 0x00000031, 0x0100 }, /* R49 - PWM Drive 2 */ | |
189 | + { 0x00000032, 0x0100 }, /* R50 - PWM Drive 3 */ | |
190 | + { 0x00000040, 0x0000 }, /* R64 - Wake control */ | |
191 | + { 0x00000041, 0x0000 }, /* R65 - Sequence control */ | |
192 | + { 0x00000061, 0x01FF }, /* R97 - Sample Rate Sequence Select 1 */ | |
193 | + { 0x00000062, 0x01FF }, /* R98 - Sample Rate Sequence Select 2 */ | |
194 | + { 0x00000063, 0x01FF }, /* R99 - Sample Rate Sequence Select 3 */ | |
195 | + { 0x00000064, 0x01FF }, /* R100 - Sample Rate Sequence Select 4 */ | |
196 | + { 0x00000066, 0x01FF }, /* R102 - Always On Triggers Sequence Select 1 */ | |
197 | + { 0x00000067, 0x01FF }, /* R103 - Always On Triggers Sequence Select 2 */ | |
198 | + { 0x00000068, 0x01FF }, /* R104 - Always On Triggers Sequence Select 3 */ | |
199 | + { 0x00000069, 0x01FF }, /* R105 - Always On Triggers Sequence Select 4 */ | |
200 | + { 0x0000006A, 0x01FF }, /* R106 - Always On Triggers Sequence Select 5 */ | |
201 | + { 0x0000006B, 0x01FF }, /* R107 - Always On Triggers Sequence Select 6 */ | |
202 | + { 0x0000006E, 0x01FF }, /* R110 - Trigger Sequence Select 32 */ | |
203 | + { 0x0000006F, 0x01FF }, /* R111 - Trigger Sequence Select 33 */ | |
204 | + { 0x00000090, 0x0000 }, /* R144 - Haptics Control 1 */ | |
205 | + { 0x00000091, 0x7FFF }, /* R145 - Haptics Control 2 */ | |
206 | + { 0x00000092, 0x0000 }, /* R146 - Haptics phase 1 intensity */ | |
207 | + { 0x00000093, 0x0000 }, /* R147 - Haptics phase 1 duration */ | |
208 | + { 0x00000094, 0x0000 }, /* R148 - Haptics phase 2 intensity */ | |
209 | + { 0x00000095, 0x0000 }, /* R149 - Haptics phase 2 duration */ | |
210 | + { 0x00000096, 0x0000 }, /* R150 - Haptics phase 3 intensity */ | |
211 | + { 0x00000097, 0x0000 }, /* R151 - Haptics phase 3 duration */ | |
212 | + { 0x00000100, 0x0002 }, /* R256 - Clock 32k 1 */ | |
213 | + { 0x00000101, 0x0304 }, /* R257 - System Clock 1 */ | |
214 | + { 0x00000102, 0x0011 }, /* R258 - Sample rate 1 */ | |
215 | + { 0x00000103, 0x0011 }, /* R259 - Sample rate 2 */ | |
216 | + { 0x00000104, 0x0011 }, /* R260 - Sample rate 3 */ | |
217 | + { 0x00000112, 0x0305 }, /* R274 - Async clock 1 */ | |
218 | + { 0x00000113, 0x0011 }, /* R275 - Async sample rate 1 */ | |
219 | + { 0x00000114, 0x0011 }, /* R276 - Async sample rate 2 */ | |
220 | + { 0x00000149, 0x0000 }, /* R329 - Output system clock */ | |
221 | + { 0x0000014A, 0x0000 }, /* R330 - Output async clock */ | |
222 | + { 0x00000152, 0x0000 }, /* R338 - Rate Estimator 1 */ | |
223 | + { 0x00000153, 0x0000 }, /* R339 - Rate Estimator 2 */ | |
224 | + { 0x00000154, 0x0000 }, /* R340 - Rate Estimator 3 */ | |
225 | + { 0x00000155, 0x0000 }, /* R341 - Rate Estimator 4 */ | |
226 | + { 0x00000156, 0x0000 }, /* R342 - Rate Estimator 5 */ | |
227 | + { 0x00000161, 0x0000 }, /* R353 - Dynamic Frequency Scaling 1 */ | |
228 | + { 0x00000171, 0x0002 }, /* R369 - FLL1 Control 1 */ | |
229 | + { 0x00000172, 0x0008 }, /* R370 - FLL1 Control 2 */ | |
230 | + { 0x00000173, 0x0018 }, /* R371 - FLL1 Control 3 */ | |
231 | + { 0x00000174, 0x007D }, /* R372 - FLL1 Control 4 */ | |
232 | + { 0x00000175, 0x0004 }, /* R373 - FLL1 Control 5 */ | |
233 | + { 0x00000176, 0x0000 }, /* R374 - FLL1 Control 6 */ | |
234 | + { 0x00000177, 0x0181 }, /* R375 - FLL1 Loop Filter Test 1 */ | |
235 | + { 0x00000178, 0x0000 }, /* R376 - FLL1 NCO Test 0 */ | |
236 | + { 0x00000179, 0x0000 }, /* R377 - FLL1 Control 7 */ | |
237 | + { 0x00000181, 0x0000 }, /* R385 - FLL1 Synchroniser 1 */ | |
238 | + { 0x00000182, 0x0000 }, /* R386 - FLL1 Synchroniser 2 */ | |
239 | + { 0x00000183, 0x0000 }, /* R387 - FLL1 Synchroniser 3 */ | |
240 | + { 0x00000184, 0x0000 }, /* R388 - FLL1 Synchroniser 4 */ | |
241 | + { 0x00000185, 0x0000 }, /* R389 - FLL1 Synchroniser 5 */ | |
242 | + { 0x00000186, 0x0000 }, /* R390 - FLL1 Synchroniser 6 */ | |
243 | + { 0x00000187, 0x0001 }, /* R391 - FLL1 Synchroniser 7 */ | |
244 | + { 0x00000189, 0x0000 }, /* R393 - FLL1 Spread Spectrum */ | |
245 | + { 0x0000018A, 0x0004 }, /* R394 - FLL1 GPIO Clock */ | |
246 | + { 0x00000191, 0x0000 }, /* R401 - FLL2 Control 1 */ | |
247 | + { 0x00000192, 0x0008 }, /* R402 - FLL2 Control 2 */ | |
248 | + { 0x00000193, 0x0018 }, /* R403 - FLL2 Control 3 */ | |
249 | + { 0x00000194, 0x007D }, /* R404 - FLL2 Control 4 */ | |
250 | + { 0x00000195, 0x0004 }, /* R405 - FLL2 Control 5 */ | |
251 | + { 0x00000196, 0x0000 }, /* R406 - FLL2 Control 6 */ | |
252 | + { 0x00000197, 0x0000 }, /* R407 - FLL2 Loop Filter Test 1 */ | |
253 | + { 0x00000198, 0x0000 }, /* R408 - FLL2 NCO Test 0 */ | |
254 | + { 0x00000199, 0x0000 }, /* R409 - FLL2 Control 7 */ | |
255 | + { 0x000001A1, 0x0000 }, /* R417 - FLL2 Synchroniser 1 */ | |
256 | + { 0x000001A2, 0x0000 }, /* R418 - FLL2 Synchroniser 2 */ | |
257 | + { 0x000001A3, 0x0000 }, /* R419 - FLL2 Synchroniser 3 */ | |
258 | + { 0x000001A4, 0x0000 }, /* R420 - FLL2 Synchroniser 4 */ | |
259 | + { 0x000001A5, 0x0000 }, /* R421 - FLL2 Synchroniser 5 */ | |
260 | + { 0x000001A6, 0x0000 }, /* R422 - FLL2 Synchroniser 6 */ | |
261 | + { 0x000001A7, 0x0001 }, /* R423 - FLL2 Synchroniser 7 */ | |
262 | + { 0x000001A9, 0x0000 }, /* R425 - FLL2 Spread Spectrum */ | |
263 | + { 0x000001AA, 0x0004 }, /* R426 - FLL2 GPIO Clock */ | |
264 | + { 0x00000200, 0x0006 }, /* R512 - Mic Charge Pump 1 */ | |
265 | + { 0x00000210, 0x00D4 }, /* R528 - LDO1 Control 1 */ | |
266 | + { 0x00000212, 0x0000 }, /* R530 - LDO1 Control 2 */ | |
267 | + { 0x00000213, 0x0344 }, /* R531 - LDO2 Control 1 */ | |
268 | + { 0x00000218, 0x01A6 }, /* R536 - Mic Bias Ctrl 1 */ | |
269 | + { 0x00000219, 0x01A6 }, /* R537 - Mic Bias Ctrl 2 */ | |
270 | + { 0x0000021A, 0x01A6 }, /* R538 - Mic Bias Ctrl 3 */ | |
271 | + { 0x00000293, 0x0080 }, /* R659 - Accessory Detect Mode 1 */ | |
272 | + { 0x0000029B, 0x0000 }, /* R667 - Headphone Detect 1 */ | |
273 | + { 0x0000029C, 0x0000 }, /* R668 - Headphone Detect 2 */ | |
274 | + { 0x000002A2, 0x0000 }, /* R674 - Micd Clamp control */ | |
275 | + { 0x000002A3, 0x1102 }, /* R675 - Mic Detect 1 */ | |
276 | + { 0x000002A4, 0x009F }, /* R676 - Mic Detect 2 */ | |
277 | + { 0x000002A5, 0x0000 }, /* R677 - Mic Detect 3 */ | |
278 | + { 0x000002A6, 0x3737 }, /* R678 - Mic Detect Level 1 */ | |
279 | + { 0x000002A7, 0x2C37 }, /* R679 - Mic Detect Level 2 */ | |
280 | + { 0x000002A8, 0x1422 }, /* R680 - Mic Detect Level 3 */ | |
281 | + { 0x000002A9, 0x030A }, /* R681 - Mic Detect Level 4 */ | |
282 | + { 0x000002AB, 0x0000 }, /* R683 - Mic Detect 4 */ | |
283 | + { 0x000002CB, 0x0000 }, /* R715 - Isolation control */ | |
284 | + { 0x000002D3, 0x0000 }, /* R723 - Jack detect analogue */ | |
285 | + { 0x00000300, 0x0000 }, /* R768 - Input Enables */ | |
286 | + { 0x00000308, 0x0000 }, /* R776 - Input Rate */ | |
287 | + { 0x00000309, 0x0022 }, /* R777 - Input Volume Ramp */ | |
288 | + { 0x0000030C, 0x0002 }, /* R780 - HPF Control */ | |
289 | + { 0x00000310, 0x2080 }, /* R784 - IN1L Control */ | |
290 | + { 0x00000311, 0x0180 }, /* R785 - ADC Digital Volume 1L */ | |
291 | + { 0x00000312, 0x0000 }, /* R786 - DMIC1L Control */ | |
292 | + { 0x00000314, 0x0080 }, /* R788 - IN1R Control */ | |
293 | + { 0x00000315, 0x0180 }, /* R789 - ADC Digital Volume 1R */ | |
294 | + { 0x00000316, 0x0000 }, /* R790 - DMIC1R Control */ | |
295 | + { 0x00000318, 0x2080 }, /* R792 - IN2L Control */ | |
296 | + { 0x00000319, 0x0180 }, /* R793 - ADC Digital Volume 2L */ | |
297 | + { 0x0000031A, 0x0000 }, /* R794 - DMIC2L Control */ | |
298 | + { 0x00000400, 0x0000 }, /* R1024 - Output Enables 1 */ | |
299 | + { 0x00000408, 0x0000 }, /* R1032 - Output Rate 1 */ | |
300 | + { 0x00000409, 0x0022 }, /* R1033 - Output Volume Ramp */ | |
301 | + { 0x00000410, 0x2080 }, /* R1040 - Output Path Config 1L */ | |
302 | + { 0x00000411, 0x0180 }, /* R1041 - DAC Digital Volume 1L */ | |
303 | + { 0x00000413, 0x0001 }, /* R1043 - Noise Gate Select 1L */ | |
304 | + { 0x00000414, 0x0080 }, /* R1044 - Output Path Config 1R */ | |
305 | + { 0x00000415, 0x0180 }, /* R1045 - DAC Digital Volume 1R */ | |
306 | + { 0x00000417, 0x0002 }, /* R1047 - Noise Gate Select 1R */ | |
307 | + { 0x00000418, 0x2080 }, /* R1048 - Output Path Config 2L */ | |
308 | + { 0x00000419, 0x0180 }, /* R1049 - DAC Digital Volume 2L */ | |
309 | + { 0x0000041B, 0x0004 }, /* R1051 - Noise Gate Select 2L */ | |
310 | + { 0x0000041C, 0x0080 }, /* R1052 - Output Path Config 2R */ | |
311 | + { 0x0000041D, 0x0180 }, /* R1053 - DAC Digital Volume 2R */ | |
312 | + { 0x0000041F, 0x0008 }, /* R1055 - Noise Gate Select 2R */ | |
313 | + { 0x00000420, 0x2080 }, /* R1056 - Output Path Config 3L */ | |
314 | + { 0x00000421, 0x0180 }, /* R1057 - DAC Digital Volume 3L */ | |
315 | + { 0x00000423, 0x0010 }, /* R1059 - Noise Gate Select 3L */ | |
316 | + { 0x00000428, 0x0000 }, /* R1064 - Output Path Config 4L */ | |
317 | + { 0x00000429, 0x0180 }, /* R1065 - DAC Digital Volume 4L */ | |
318 | + { 0x0000042B, 0x0040 }, /* R1067 - Noise Gate Select 4L */ | |
319 | + { 0x0000042C, 0x0000 }, /* R1068 - Output Path Config 4R */ | |
320 | + { 0x0000042D, 0x0180 }, /* R1069 - DAC Digital Volume 4R */ | |
321 | + { 0x0000042F, 0x0080 }, /* R1071 - Noise Gate Select 4R */ | |
322 | + { 0x00000430, 0x0000 }, /* R1072 - Output Path Config 5L */ | |
323 | + { 0x00000431, 0x0180 }, /* R1073 - DAC Digital Volume 5L */ | |
324 | + { 0x00000433, 0x0100 }, /* R1075 - Noise Gate Select 5L */ | |
325 | + { 0x00000434, 0x0000 }, /* R1076 - Output Path Config 5R */ | |
326 | + { 0x00000435, 0x0180 }, /* R1077 - DAC Digital Volume 5R */ | |
327 | + { 0x00000437, 0x0200 }, /* R1079 - Noise Gate Select 5R */ | |
328 | + { 0x00000440, 0x8FFF }, /* R1088 - DRE Enable */ | |
329 | + { 0x00000441, 0xC759 }, /* R1089 - DRE Control 1 */ | |
330 | + { 0x00000442, 0x2A08 }, /* R1089 - DRE Control 2 */ | |
331 | + { 0x00000443, 0x5CFA }, /* R1089 - DRE Control 3 */ | |
332 | + { 0x00000448, 0x03EF }, /* R1096 - EDRE Enable */ | |
333 | + { 0x00000450, 0x0000 }, /* R1104 - DAC AEC Control 1 */ | |
334 | + { 0x00000451, 0x0000 }, /* R1105 - DAC AEC Control 2 */ | |
335 | + { 0x00000458, 0x0000 }, /* R1112 - Noise Gate Control */ | |
336 | + { 0x00000490, 0x0069 }, /* R1168 - PDM SPK1 CTRL 1 */ | |
337 | + { 0x00000491, 0x0000 }, /* R1169 - PDM SPK1 CTRL 2 */ | |
338 | + { 0x0000049A, 0x0000 }, /* R1178 - HP_TEST_CTRL_13 */ | |
339 | + { 0x00000500, 0x000C }, /* R1280 - AIF1 BCLK Ctrl */ | |
340 | + { 0x00000501, 0x0008 }, /* R1281 - AIF1 Tx Pin Ctrl */ | |
341 | + { 0x00000502, 0x0000 }, /* R1282 - AIF1 Rx Pin Ctrl */ | |
342 | + { 0x00000503, 0x0000 }, /* R1283 - AIF1 Rate Ctrl */ | |
343 | + { 0x00000504, 0x0000 }, /* R1284 - AIF1 Format */ | |
344 | + { 0x00000506, 0x0040 }, /* R1286 - AIF1 Rx BCLK Rate */ | |
345 | + { 0x00000507, 0x1818 }, /* R1287 - AIF1 Frame Ctrl 1 */ | |
346 | + { 0x00000508, 0x1818 }, /* R1288 - AIF1 Frame Ctrl 2 */ | |
347 | + { 0x00000509, 0x0000 }, /* R1289 - AIF1 Frame Ctrl 3 */ | |
348 | + { 0x0000050A, 0x0001 }, /* R1290 - AIF1 Frame Ctrl 4 */ | |
349 | + { 0x0000050B, 0x0002 }, /* R1291 - AIF1 Frame Ctrl 5 */ | |
350 | + { 0x0000050C, 0x0003 }, /* R1292 - AIF1 Frame Ctrl 6 */ | |
351 | + { 0x0000050D, 0x0004 }, /* R1293 - AIF1 Frame Ctrl 7 */ | |
352 | + { 0x0000050E, 0x0005 }, /* R1294 - AIF1 Frame Ctrl 8 */ | |
353 | + { 0x00000511, 0x0000 }, /* R1297 - AIF1 Frame Ctrl 11 */ | |
354 | + { 0x00000512, 0x0001 }, /* R1298 - AIF1 Frame Ctrl 12 */ | |
355 | + { 0x00000513, 0x0002 }, /* R1299 - AIF1 Frame Ctrl 13 */ | |
356 | + { 0x00000514, 0x0003 }, /* R1300 - AIF1 Frame Ctrl 14 */ | |
357 | + { 0x00000515, 0x0004 }, /* R1301 - AIF1 Frame Ctrl 15 */ | |
358 | + { 0x00000516, 0x0005 }, /* R1302 - AIF1 Frame Ctrl 16 */ | |
359 | + { 0x00000519, 0x0000 }, /* R1305 - AIF1 Tx Enables */ | |
360 | + { 0x0000051A, 0x0000 }, /* R1306 - AIF1 Rx Enables */ | |
361 | + { 0x00000540, 0x000C }, /* R1344 - AIF2 BCLK Ctrl */ | |
362 | + { 0x00000541, 0x0008 }, /* R1345 - AIF2 Tx Pin Ctrl */ | |
363 | + { 0x00000542, 0x0000 }, /* R1346 - AIF2 Rx Pin Ctrl */ | |
364 | + { 0x00000543, 0x0000 }, /* R1347 - AIF2 Rate Ctrl */ | |
365 | + { 0x00000544, 0x0000 }, /* R1348 - AIF2 Format */ | |
366 | + { 0x00000546, 0x0040 }, /* R1350 - AIF2 Rx BCLK Rate */ | |
367 | + { 0x00000547, 0x1818 }, /* R1351 - AIF2 Frame Ctrl 1 */ | |
368 | + { 0x00000548, 0x1818 }, /* R1352 - AIF2 Frame Ctrl 2 */ | |
369 | + { 0x00000549, 0x0000 }, /* R1353 - AIF2 Frame Ctrl 3 */ | |
370 | + { 0x0000054A, 0x0001 }, /* R1354 - AIF2 Frame Ctrl 4 */ | |
371 | + { 0x0000054B, 0x0002 }, /* R1355 - AIF2 Frame Ctrl 5 */ | |
372 | + { 0x0000054C, 0x0003 }, /* R1356 - AIF2 Frame Ctrl 6 */ | |
373 | + { 0x0000054D, 0x0004 }, /* R1357 - AIF2 Frame Ctrl 7 */ | |
374 | + { 0x0000054E, 0x0005 }, /* R1358 - AIF2 Frame Ctrl 8 */ | |
375 | + { 0x00000551, 0x0000 }, /* R1361 - AIF2 Frame Ctrl 11 */ | |
376 | + { 0x00000552, 0x0001 }, /* R1362 - AIF2 Frame Ctrl 12 */ | |
377 | + { 0x00000553, 0x0002 }, /* R1363 - AIF2 Frame Ctrl 13 */ | |
378 | + { 0x00000554, 0x0003 }, /* R1364 - AIF2 Frame Ctrl 14 */ | |
379 | + { 0x00000555, 0x0004 }, /* R1365 - AIF2 Frame Ctrl 15 */ | |
380 | + { 0x00000556, 0x0005 }, /* R1366 - AIF2 Frame Ctrl 16 */ | |
381 | + { 0x00000559, 0x0000 }, /* R1369 - AIF2 Tx Enables */ | |
382 | + { 0x0000055A, 0x0000 }, /* R1370 - AIF2 Rx Enables */ | |
383 | + { 0x00000580, 0x000C }, /* R1408 - AIF3 BCLK Ctrl */ | |
384 | + { 0x00000581, 0x0008 }, /* R1409 - AIF3 Tx Pin Ctrl */ | |
385 | + { 0x00000582, 0x0000 }, /* R1410 - AIF3 Rx Pin Ctrl */ | |
386 | + { 0x00000583, 0x0000 }, /* R1411 - AIF3 Rate Ctrl */ | |
387 | + { 0x00000584, 0x0000 }, /* R1412 - AIF3 Format */ | |
388 | + { 0x00000586, 0x0040 }, /* R1414 - AIF3 Rx BCLK Rate */ | |
389 | + { 0x00000587, 0x1818 }, /* R1415 - AIF3 Frame Ctrl 1 */ | |
390 | + { 0x00000588, 0x1818 }, /* R1416 - AIF3 Frame Ctrl 2 */ | |
391 | + { 0x00000589, 0x0000 }, /* R1417 - AIF3 Frame Ctrl 3 */ | |
392 | + { 0x0000058A, 0x0001 }, /* R1418 - AIF3 Frame Ctrl 4 */ | |
393 | + { 0x00000591, 0x0000 }, /* R1425 - AIF3 Frame Ctrl 11 */ | |
394 | + { 0x00000592, 0x0001 }, /* R1426 - AIF3 Frame Ctrl 12 */ | |
395 | + { 0x00000599, 0x0000 }, /* R1433 - AIF3 Tx Enables */ | |
396 | + { 0x0000059A, 0x0000 }, /* R1434 - AIF3 Rx Enables */ | |
397 | + { 0x000005C2, 0x0000 }, /* R1474 - SPD1 TX Control */ | |
398 | + { 0x000005C3, 0x0000 }, /* R1475 - SPD1 TX Channel Status 1 */ | |
399 | + { 0x000005C4, 0x0B01 }, /* R1476 - SPD1 TX Channel Status 2 */ | |
400 | + { 0x000005C5, 0x0000 }, /* R1477 - SPD1 TX Channel Status 3 */ | |
401 | + { 0x000005E3, 0x0004 }, /* R1507 - SLIMbus Framer Ref Gear */ | |
402 | + { 0x000005E5, 0x0000 }, /* R1509 - SLIMbus Rates 1 */ | |
403 | + { 0x000005E6, 0x0000 }, /* R1510 - SLIMbus Rates 2 */ | |
404 | + { 0x000005E9, 0x0000 }, /* R1513 - SLIMbus Rates 5 */ | |
405 | + { 0x000005EA, 0x0000 }, /* R1514 - SLIMbus Rates 6 */ | |
406 | + { 0x000005EB, 0x0000 }, /* R1515 - SLIMbus Rates 7 */ | |
407 | + { 0x000005F5, 0x0000 }, /* R1525 - SLIMbus RX Channel Enable */ | |
408 | + { 0x000005F6, 0x0000 }, /* R1526 - SLIMbus TX Channel Enable */ | |
409 | + { 0x00000640, 0x0000 }, /* R1600 - PWM1MIX Input 1 Source */ | |
410 | + { 0x00000641, 0x0080 }, /* R1601 - PWM1MIX Input 1 Volume */ | |
411 | + { 0x00000642, 0x0000 }, /* R1602 - PWM1MIX Input 2 Source */ | |
412 | + { 0x00000643, 0x0080 }, /* R1603 - PWM1MIX Input 2 Volume */ | |
413 | + { 0x00000644, 0x0000 }, /* R1604 - PWM1MIX Input 3 Source */ | |
414 | + { 0x00000645, 0x0080 }, /* R1605 - PWM1MIX Input 3 Volume */ | |
415 | + { 0x00000646, 0x0000 }, /* R1606 - PWM1MIX Input 4 Source */ | |
416 | + { 0x00000647, 0x0080 }, /* R1607 - PWM1MIX Input 4 Volume */ | |
417 | + { 0x00000648, 0x0000 }, /* R1608 - PWM2MIX Input 1 Source */ | |
418 | + { 0x00000649, 0x0080 }, /* R1609 - PWM2MIX Input 1 Volume */ | |
419 | + { 0x0000064A, 0x0000 }, /* R1610 - PWM2MIX Input 2 Source */ | |
420 | + { 0x0000064B, 0x0080 }, /* R1611 - PWM2MIX Input 2 Volume */ | |
421 | + { 0x0000064C, 0x0000 }, /* R1612 - PWM2MIX Input 3 Source */ | |
422 | + { 0x0000064D, 0x0080 }, /* R1613 - PWM2MIX Input 3 Volume */ | |
423 | + { 0x0000064E, 0x0000 }, /* R1614 - PWM2MIX Input 4 Source */ | |
424 | + { 0x0000064F, 0x0080 }, /* R1615 - PWM2MIX Input 4 Volume */ | |
425 | + { 0x00000680, 0x0000 }, /* R1664 - OUT1LMIX Input 1 Source */ | |
426 | + { 0x00000681, 0x0080 }, /* R1665 - OUT1LMIX Input 1 Volume */ | |
427 | + { 0x00000682, 0x0000 }, /* R1666 - OUT1LMIX Input 2 Source */ | |
428 | + { 0x00000683, 0x0080 }, /* R1667 - OUT1LMIX Input 2 Volume */ | |
429 | + { 0x00000684, 0x0000 }, /* R1668 - OUT1LMIX Input 3 Source */ | |
430 | + { 0x00000685, 0x0080 }, /* R1669 - OUT1LMIX Input 3 Volume */ | |
431 | + { 0x00000686, 0x0000 }, /* R1670 - OUT1LMIX Input 4 Source */ | |
432 | + { 0x00000687, 0x0080 }, /* R1671 - OUT1LMIX Input 4 Volume */ | |
433 | + { 0x00000688, 0x0000 }, /* R1672 - OUT1RMIX Input 1 Source */ | |
434 | + { 0x00000689, 0x0080 }, /* R1673 - OUT1RMIX Input 1 Volume */ | |
435 | + { 0x0000068A, 0x0000 }, /* R1674 - OUT1RMIX Input 2 Source */ | |
436 | + { 0x0000068B, 0x0080 }, /* R1675 - OUT1RMIX Input 2 Volume */ | |
437 | + { 0x0000068C, 0x0000 }, /* R1676 - OUT1RMIX Input 3 Source */ | |
438 | + { 0x0000068D, 0x0080 }, /* R1677 - OUT1RMIX Input 3 Volume */ | |
439 | + { 0x0000068E, 0x0000 }, /* R1678 - OUT1RMIX Input 4 Source */ | |
440 | + { 0x0000068F, 0x0080 }, /* R1679 - OUT1RMIX Input 4 Volume */ | |
441 | + { 0x00000690, 0x0000 }, /* R1680 - OUT2LMIX Input 1 Source */ | |
442 | + { 0x00000691, 0x0080 }, /* R1681 - OUT2LMIX Input 1 Volume */ | |
443 | + { 0x00000692, 0x0000 }, /* R1682 - OUT2LMIX Input 2 Source */ | |
444 | + { 0x00000693, 0x0080 }, /* R1683 - OUT2LMIX Input 2 Volume */ | |
445 | + { 0x00000694, 0x0000 }, /* R1684 - OUT2LMIX Input 3 Source */ | |
446 | + { 0x00000695, 0x0080 }, /* R1685 - OUT2LMIX Input 3 Volume */ | |
447 | + { 0x00000696, 0x0000 }, /* R1686 - OUT2LMIX Input 4 Source */ | |
448 | + { 0x00000697, 0x0080 }, /* R1687 - OUT2LMIX Input 4 Volume */ | |
449 | + { 0x00000698, 0x0000 }, /* R1688 - OUT2RMIX Input 1 Source */ | |
450 | + { 0x00000699, 0x0080 }, /* R1689 - OUT2RMIX Input 1 Volume */ | |
451 | + { 0x0000069A, 0x0000 }, /* R1690 - OUT2RMIX Input 2 Source */ | |
452 | + { 0x0000069B, 0x0080 }, /* R1691 - OUT2RMIX Input 2 Volume */ | |
453 | + { 0x0000069C, 0x0000 }, /* R1692 - OUT2RMIX Input 3 Source */ | |
454 | + { 0x0000069D, 0x0080 }, /* R1693 - OUT2RMIX Input 3 Volume */ | |
455 | + { 0x0000069E, 0x0000 }, /* R1694 - OUT2RMIX Input 4 Source */ | |
456 | + { 0x0000069F, 0x0080 }, /* R1695 - OUT2RMIX Input 4 Volume */ | |
457 | + { 0x000006A0, 0x0000 }, /* R1696 - OUT3LMIX Input 1 Source */ | |
458 | + { 0x000006A1, 0x0080 }, /* R1697 - OUT3LMIX Input 1 Volume */ | |
459 | + { 0x000006A2, 0x0000 }, /* R1698 - OUT3LMIX Input 2 Source */ | |
460 | + { 0x000006A3, 0x0080 }, /* R1699 - OUT3LMIX Input 2 Volume */ | |
461 | + { 0x000006A4, 0x0000 }, /* R1700 - OUT3LMIX Input 3 Source */ | |
462 | + { 0x000006A5, 0x0080 }, /* R1701 - OUT3LMIX Input 3 Volume */ | |
463 | + { 0x000006A6, 0x0000 }, /* R1702 - OUT3LMIX Input 4 Source */ | |
464 | + { 0x000006A7, 0x0080 }, /* R1703 - OUT3LMIX Input 4 Volume */ | |
465 | + { 0x000006B0, 0x0000 }, /* R1712 - OUT4LMIX Input 1 Source */ | |
466 | + { 0x000006B1, 0x0080 }, /* R1713 - OUT4LMIX Input 1 Volume */ | |
467 | + { 0x000006B2, 0x0000 }, /* R1714 - OUT4LMIX Input 2 Source */ | |
468 | + { 0x000006B3, 0x0080 }, /* R1715 - OUT4LMIX Input 2 Volume */ | |
469 | + { 0x000006B4, 0x0000 }, /* R1716 - OUT4LMIX Input 3 Source */ | |
470 | + { 0x000006B5, 0x0080 }, /* R1717 - OUT4LMIX Input 3 Volume */ | |
471 | + { 0x000006B6, 0x0000 }, /* R1718 - OUT4LMIX Input 4 Source */ | |
472 | + { 0x000006B7, 0x0080 }, /* R1719 - OUT4LMIX Input 4 Volume */ | |
473 | + { 0x000006B8, 0x0000 }, /* R1720 - OUT4RMIX Input 1 Source */ | |
474 | + { 0x000006B9, 0x0080 }, /* R1721 - OUT4RMIX Input 1 Volume */ | |
475 | + { 0x000006BA, 0x0000 }, /* R1722 - OUT4RMIX Input 2 Source */ | |
476 | + { 0x000006BB, 0x0080 }, /* R1723 - OUT4RMIX Input 2 Volume */ | |
477 | + { 0x000006BC, 0x0000 }, /* R1724 - OUT4RMIX Input 3 Source */ | |
478 | + { 0x000006BD, 0x0080 }, /* R1725 - OUT4RMIX Input 3 Volume */ | |
479 | + { 0x000006BE, 0x0000 }, /* R1726 - OUT4RMIX Input 4 Source */ | |
480 | + { 0x000006BF, 0x0080 }, /* R1727 - OUT4RMIX Input 4 Volume */ | |
481 | + { 0x000006C0, 0x0000 }, /* R1728 - OUT5LMIX Input 1 Source */ | |
482 | + { 0x000006C1, 0x0080 }, /* R1729 - OUT5LMIX Input 1 Volume */ | |
483 | + { 0x000006C2, 0x0000 }, /* R1730 - OUT5LMIX Input 2 Source */ | |
484 | + { 0x000006C3, 0x0080 }, /* R1731 - OUT5LMIX Input 2 Volume */ | |
485 | + { 0x000006C4, 0x0000 }, /* R1732 - OUT5LMIX Input 3 Source */ | |
486 | + { 0x000006C5, 0x0080 }, /* R1733 - OUT5LMIX Input 3 Volume */ | |
487 | + { 0x000006C6, 0x0000 }, /* R1734 - OUT5LMIX Input 4 Source */ | |
488 | + { 0x000006C7, 0x0080 }, /* R1735 - OUT5LMIX Input 4 Volume */ | |
489 | + { 0x000006C8, 0x0000 }, /* R1736 - OUT5RMIX Input 1 Source */ | |
490 | + { 0x000006C9, 0x0080 }, /* R1737 - OUT5RMIX Input 1 Volume */ | |
491 | + { 0x000006CA, 0x0000 }, /* R1738 - OUT5RMIX Input 2 Source */ | |
492 | + { 0x000006CB, 0x0080 }, /* R1739 - OUT5RMIX Input 2 Volume */ | |
493 | + { 0x000006CC, 0x0000 }, /* R1740 - OUT5RMIX Input 3 Source */ | |
494 | + { 0x000006CD, 0x0080 }, /* R1741 - OUT5RMIX Input 3 Volume */ | |
495 | + { 0x000006CE, 0x0000 }, /* R1742 - OUT5RMIX Input 4 Source */ | |
496 | + { 0x000006CF, 0x0080 }, /* R1743 - OUT5RMIX Input 4 Volume */ | |
497 | + { 0x00000700, 0x0000 }, /* R1792 - AIF1TX1MIX Input 1 Source */ | |
498 | + { 0x00000701, 0x0080 }, /* R1793 - AIF1TX1MIX Input 1 Volume */ | |
499 | + { 0x00000702, 0x0000 }, /* R1794 - AIF1TX1MIX Input 2 Source */ | |
500 | + { 0x00000703, 0x0080 }, /* R1795 - AIF1TX1MIX Input 2 Volume */ | |
501 | + { 0x00000704, 0x0000 }, /* R1796 - AIF1TX1MIX Input 3 Source */ | |
502 | + { 0x00000705, 0x0080 }, /* R1797 - AIF1TX1MIX Input 3 Volume */ | |
503 | + { 0x00000706, 0x0000 }, /* R1798 - AIF1TX1MIX Input 4 Source */ | |
504 | + { 0x00000707, 0x0080 }, /* R1799 - AIF1TX1MIX Input 4 Volume */ | |
505 | + { 0x00000708, 0x0000 }, /* R1800 - AIF1TX2MIX Input 1 Source */ | |
506 | + { 0x00000709, 0x0080 }, /* R1801 - AIF1TX2MIX Input 1 Volume */ | |
507 | + { 0x0000070A, 0x0000 }, /* R1802 - AIF1TX2MIX Input 2 Source */ | |
508 | + { 0x0000070B, 0x0080 }, /* R1803 - AIF1TX2MIX Input 2 Volume */ | |
509 | + { 0x0000070C, 0x0000 }, /* R1804 - AIF1TX2MIX Input 3 Source */ | |
510 | + { 0x0000070D, 0x0080 }, /* R1805 - AIF1TX2MIX Input 3 Volume */ | |
511 | + { 0x0000070E, 0x0000 }, /* R1806 - AIF1TX2MIX Input 4 Source */ | |
512 | + { 0x0000070F, 0x0080 }, /* R1807 - AIF1TX2MIX Input 4 Volume */ | |
513 | + { 0x00000710, 0x0000 }, /* R1808 - AIF1TX3MIX Input 1 Source */ | |
514 | + { 0x00000711, 0x0080 }, /* R1809 - AIF1TX3MIX Input 1 Volume */ | |
515 | + { 0x00000712, 0x0000 }, /* R1810 - AIF1TX3MIX Input 2 Source */ | |
516 | + { 0x00000713, 0x0080 }, /* R1811 - AIF1TX3MIX Input 2 Volume */ | |
517 | + { 0x00000714, 0x0000 }, /* R1812 - AIF1TX3MIX Input 3 Source */ | |
518 | + { 0x00000715, 0x0080 }, /* R1813 - AIF1TX3MIX Input 3 Volume */ | |
519 | + { 0x00000716, 0x0000 }, /* R1814 - AIF1TX3MIX Input 4 Source */ | |
520 | + { 0x00000717, 0x0080 }, /* R1815 - AIF1TX3MIX Input 4 Volume */ | |
521 | + { 0x00000718, 0x0000 }, /* R1816 - AIF1TX4MIX Input 1 Source */ | |
522 | + { 0x00000719, 0x0080 }, /* R1817 - AIF1TX4MIX Input 1 Volume */ | |
523 | + { 0x0000071A, 0x0000 }, /* R1818 - AIF1TX4MIX Input 2 Source */ | |
524 | + { 0x0000071B, 0x0080 }, /* R1819 - AIF1TX4MIX Input 2 Volume */ | |
525 | + { 0x0000071C, 0x0000 }, /* R1820 - AIF1TX4MIX Input 3 Source */ | |
526 | + { 0x0000071D, 0x0080 }, /* R1821 - AIF1TX4MIX Input 3 Volume */ | |
527 | + { 0x0000071E, 0x0000 }, /* R1822 - AIF1TX4MIX Input 4 Source */ | |
528 | + { 0x0000071F, 0x0080 }, /* R1823 - AIF1TX4MIX Input 4 Volume */ | |
529 | + { 0x00000720, 0x0000 }, /* R1824 - AIF1TX5MIX Input 1 Source */ | |
530 | + { 0x00000721, 0x0080 }, /* R1825 - AIF1TX5MIX Input 1 Volume */ | |
531 | + { 0x00000722, 0x0000 }, /* R1826 - AIF1TX5MIX Input 2 Source */ | |
532 | + { 0x00000723, 0x0080 }, /* R1827 - AIF1TX5MIX Input 2 Volume */ | |
533 | + { 0x00000724, 0x0000 }, /* R1828 - AIF1TX5MIX Input 3 Source */ | |
534 | + { 0x00000725, 0x0080 }, /* R1829 - AIF1TX5MIX Input 3 Volume */ | |
535 | + { 0x00000726, 0x0000 }, /* R1830 - AIF1TX5MIX Input 4 Source */ | |
536 | + { 0x00000727, 0x0080 }, /* R1831 - AIF1TX5MIX Input 4 Volume */ | |
537 | + { 0x00000728, 0x0000 }, /* R1832 - AIF1TX6MIX Input 1 Source */ | |
538 | + { 0x00000729, 0x0080 }, /* R1833 - AIF1TX6MIX Input 1 Volume */ | |
539 | + { 0x0000072A, 0x0000 }, /* R1834 - AIF1TX6MIX Input 2 Source */ | |
540 | + { 0x0000072B, 0x0080 }, /* R1835 - AIF1TX6MIX Input 2 Volume */ | |
541 | + { 0x0000072C, 0x0000 }, /* R1836 - AIF1TX6MIX Input 3 Source */ | |
542 | + { 0x0000072D, 0x0080 }, /* R1837 - AIF1TX6MIX Input 3 Volume */ | |
543 | + { 0x0000072E, 0x0000 }, /* R1838 - AIF1TX6MIX Input 4 Source */ | |
544 | + { 0x0000072F, 0x0080 }, /* R1839 - AIF1TX6MIX Input 4 Volume */ | |
545 | + { 0x00000740, 0x0000 }, /* R1856 - AIF2TX1MIX Input 1 Source */ | |
546 | + { 0x00000741, 0x0080 }, /* R1857 - AIF2TX1MIX Input 1 Volume */ | |
547 | + { 0x00000742, 0x0000 }, /* R1858 - AIF2TX1MIX Input 2 Source */ | |
548 | + { 0x00000743, 0x0080 }, /* R1859 - AIF2TX1MIX Input 2 Volume */ | |
549 | + { 0x00000744, 0x0000 }, /* R1860 - AIF2TX1MIX Input 3 Source */ | |
550 | + { 0x00000745, 0x0080 }, /* R1861 - AIF2TX1MIX Input 3 Volume */ | |
551 | + { 0x00000746, 0x0000 }, /* R1862 - AIF2TX1MIX Input 4 Source */ | |
552 | + { 0x00000747, 0x0080 }, /* R1863 - AIF2TX1MIX Input 4 Volume */ | |
553 | + { 0x00000748, 0x0000 }, /* R1864 - AIF2TX2MIX Input 1 Source */ | |
554 | + { 0x00000749, 0x0080 }, /* R1865 - AIF2TX2MIX Input 1 Volume */ | |
555 | + { 0x0000074A, 0x0000 }, /* R1866 - AIF2TX2MIX Input 2 Source */ | |
556 | + { 0x0000074B, 0x0080 }, /* R1867 - AIF2TX2MIX Input 2 Volume */ | |
557 | + { 0x0000074C, 0x0000 }, /* R1868 - AIF2TX2MIX Input 3 Source */ | |
558 | + { 0x0000074D, 0x0080 }, /* R1869 - AIF2TX2MIX Input 3 Volume */ | |
559 | + { 0x0000074E, 0x0000 }, /* R1870 - AIF2TX2MIX Input 4 Source */ | |
560 | + { 0x0000074F, 0x0080 }, /* R1871 - AIF2TX2MIX Input 4 Volume */ | |
561 | + { 0x00000750, 0x0000 }, /* R1872 - AIF2TX3MIX Input 1 Source */ | |
562 | + { 0x00000751, 0x0080 }, /* R1873 - AIF2TX3MIX Input 1 Volume */ | |
563 | + { 0x00000752, 0x0000 }, /* R1874 - AIF2TX3MIX Input 2 Source */ | |
564 | + { 0x00000753, 0x0080 }, /* R1875 - AIF2TX3MIX Input 2 Volume */ | |
565 | + { 0x00000754, 0x0000 }, /* R1876 - AIF2TX3MIX Input 3 Source */ | |
566 | + { 0x00000755, 0x0080 }, /* R1877 - AIF2TX3MIX Input 3 Volume */ | |
567 | + { 0x00000756, 0x0000 }, /* R1878 - AIF2TX3MIX Input 4 Source */ | |
568 | + { 0x00000757, 0x0080 }, /* R1879 - AIF2TX3MIX Input 4 Volume */ | |
569 | + { 0x00000758, 0x0000 }, /* R1880 - AIF2TX4MIX Input 1 Source */ | |
570 | + { 0x00000759, 0x0080 }, /* R1881 - AIF2TX4MIX Input 1 Volume */ | |
571 | + { 0x0000075A, 0x0000 }, /* R1882 - AIF2TX4MIX Input 2 Source */ | |
572 | + { 0x0000075B, 0x0080 }, /* R1883 - AIF2TX4MIX Input 2 Volume */ | |
573 | + { 0x0000075C, 0x0000 }, /* R1884 - AIF2TX4MIX Input 3 Source */ | |
574 | + { 0x0000075D, 0x0080 }, /* R1885 - AIF2TX4MIX Input 3 Volume */ | |
575 | + { 0x0000075E, 0x0000 }, /* R1886 - AIF2TX4MIX Input 4 Source */ | |
576 | + { 0x0000075F, 0x0080 }, /* R1887 - AIF2TX4MIX Input 4 Volume */ | |
577 | + { 0x00000760, 0x0000 }, /* R1888 - AIF2TX5MIX Input 1 Source */ | |
578 | + { 0x00000761, 0x0080 }, /* R1889 - AIF2TX5MIX Input 1 Volume */ | |
579 | + { 0x00000762, 0x0000 }, /* R1890 - AIF2TX5MIX Input 2 Source */ | |
580 | + { 0x00000763, 0x0080 }, /* R1891 - AIF2TX5MIX Input 2 Volume */ | |
581 | + { 0x00000764, 0x0000 }, /* R1892 - AIF2TX5MIX Input 3 Source */ | |
582 | + { 0x00000765, 0x0080 }, /* R1893 - AIF2TX5MIX Input 3 Volume */ | |
583 | + { 0x00000766, 0x0000 }, /* R1894 - AIF2TX5MIX Input 4 Source */ | |
584 | + { 0x00000767, 0x0080 }, /* R1895 - AIF2TX5MIX Input 4 Volume */ | |
585 | + { 0x00000768, 0x0000 }, /* R1896 - AIF2TX6MIX Input 1 Source */ | |
586 | + { 0x00000769, 0x0080 }, /* R1897 - AIF2TX6MIX Input 1 Volume */ | |
587 | + { 0x0000076A, 0x0000 }, /* R1898 - AIF2TX6MIX Input 2 Source */ | |
588 | + { 0x0000076B, 0x0080 }, /* R1899 - AIF2TX6MIX Input 2 Volume */ | |
589 | + { 0x0000076C, 0x0000 }, /* R1900 - AIF2TX6MIX Input 3 Source */ | |
590 | + { 0x0000076D, 0x0080 }, /* R1901 - AIF2TX6MIX Input 3 Volume */ | |
591 | + { 0x0000076E, 0x0000 }, /* R1902 - AIF2TX6MIX Input 4 Source */ | |
592 | + { 0x0000076F, 0x0080 }, /* R1903 - AIF2TX6MIX Input 4 Volume */ | |
593 | + { 0x00000780, 0x0000 }, /* R1920 - AIF3TX1MIX Input 1 Source */ | |
594 | + { 0x00000781, 0x0080 }, /* R1921 - AIF3TX1MIX Input 1 Volume */ | |
595 | + { 0x00000782, 0x0000 }, /* R1922 - AIF3TX1MIX Input 2 Source */ | |
596 | + { 0x00000783, 0x0080 }, /* R1923 - AIF3TX1MIX Input 2 Volume */ | |
597 | + { 0x00000784, 0x0000 }, /* R1924 - AIF3TX1MIX Input 3 Source */ | |
598 | + { 0x00000785, 0x0080 }, /* R1925 - AIF3TX1MIX Input 3 Volume */ | |
599 | + { 0x00000786, 0x0000 }, /* R1926 - AIF3TX1MIX Input 4 Source */ | |
600 | + { 0x00000787, 0x0080 }, /* R1927 - AIF3TX1MIX Input 4 Volume */ | |
601 | + { 0x00000788, 0x0000 }, /* R1928 - AIF3TX2MIX Input 1 Source */ | |
602 | + { 0x00000789, 0x0080 }, /* R1929 - AIF3TX2MIX Input 1 Volume */ | |
603 | + { 0x0000078A, 0x0000 }, /* R1930 - AIF3TX2MIX Input 2 Source */ | |
604 | + { 0x0000078B, 0x0080 }, /* R1931 - AIF3TX2MIX Input 2 Volume */ | |
605 | + { 0x0000078C, 0x0000 }, /* R1932 - AIF3TX2MIX Input 3 Source */ | |
606 | + { 0x0000078D, 0x0080 }, /* R1933 - AIF3TX2MIX Input 3 Volume */ | |
607 | + { 0x0000078E, 0x0000 }, /* R1934 - AIF3TX2MIX Input 4 Source */ | |
608 | + { 0x0000078F, 0x0080 }, /* R1935 - AIF3TX2MIX Input 4 Volume */ | |
609 | + { 0x000007C0, 0x0000 }, /* R1984 - SLIMTX1MIX Input 1 Source */ | |
610 | + { 0x000007C1, 0x0080 }, /* R1985 - SLIMTX1MIX Input 1 Volume */ | |
611 | + { 0x000007C8, 0x0000 }, /* R1992 - SLIMTX2MIX Input 1 Source */ | |
612 | + { 0x000007C9, 0x0080 }, /* R1993 - SLIMTX2MIX Input 1 Volume */ | |
613 | + { 0x000007D0, 0x0000 }, /* R2000 - SLIMTX3MIX Input 1 Source */ | |
614 | + { 0x000007D1, 0x0080 }, /* R2001 - SLIMTX3MIX Input 1 Volume */ | |
615 | + { 0x000007D8, 0x0000 }, /* R2008 - SLIMTX4MIX Input 1 Source */ | |
616 | + { 0x000007D9, 0x0080 }, /* R2009 - SLIMTX4MIX Input 1 Volume */ | |
617 | + { 0x000007E0, 0x0000 }, /* R2016 - SLIMTX5MIX Input 1 Source */ | |
618 | + { 0x000007E1, 0x0080 }, /* R2017 - SLIMTX5MIX Input 1 Volume */ | |
619 | + { 0x000007E8, 0x0000 }, /* R2024 - SLIMTX6MIX Input 1 Source */ | |
620 | + { 0x000007E9, 0x0080 }, /* R2025 - SLIMTX6MIX Input 1 Volume */ | |
621 | + { 0x00000800, 0x0000 }, /* R2048 - SPDIF1TX1MIX Input 1 Source */ | |
622 | + { 0x00000801, 0x0080 }, /* R2049 - SPDIF1TX1MIX Input 1 Volume */ | |
623 | + { 0x00000808, 0x0000 }, /* R2056 - SPDIF1TX2MIX Input 1 Source */ | |
624 | + { 0x00000809, 0x0080 }, /* R2057 - SPDIF1TX2MIX Input 1 Volume */ | |
625 | + { 0x00000880, 0x0000 }, /* R2176 - EQ1MIX Input 1 Source */ | |
626 | + { 0x00000881, 0x0080 }, /* R2177 - EQ1MIX Input 1 Volume */ | |
627 | + { 0x00000888, 0x0000 }, /* R2184 - EQ2MIX Input 1 Source */ | |
628 | + { 0x00000889, 0x0080 }, /* R2185 - EQ2MIX Input 1 Volume */ | |
629 | + { 0x00000890, 0x0000 }, /* R2192 - EQ3MIX Input 1 Source */ | |
630 | + { 0x00000891, 0x0080 }, /* R2193 - EQ3MIX Input 1 Volume */ | |
631 | + { 0x00000898, 0x0000 }, /* R2200 - EQ4MIX Input 1 Source */ | |
632 | + { 0x00000899, 0x0080 }, /* R2201 - EQ4MIX Input 1 Volume */ | |
633 | + { 0x000008C0, 0x0000 }, /* R2240 - DRC1LMIX Input 1 Source */ | |
634 | + { 0x000008C1, 0x0080 }, /* R2241 - DRC1LMIX Input 1 Volume */ | |
635 | + { 0x000008C8, 0x0000 }, /* R2248 - DRC1RMIX Input 1 Source */ | |
636 | + { 0x000008C9, 0x0080 }, /* R2249 - DRC1RMIX Input 1 Volume */ | |
637 | + { 0x00000900, 0x0000 }, /* R2304 - HPLP1MIX Input 1 Source */ | |
638 | + { 0x00000901, 0x0080 }, /* R2305 - HPLP1MIX Input 1 Volume */ | |
639 | + { 0x00000902, 0x0000 }, /* R2306 - HPLP1MIX Input 2 Source */ | |
640 | + { 0x00000903, 0x0080 }, /* R2307 - HPLP1MIX Input 2 Volume */ | |
641 | + { 0x00000904, 0x0000 }, /* R2308 - HPLP1MIX Input 3 Source */ | |
642 | + { 0x00000905, 0x0080 }, /* R2309 - HPLP1MIX Input 3 Volume */ | |
643 | + { 0x00000906, 0x0000 }, /* R2310 - HPLP1MIX Input 4 Source */ | |
644 | + { 0x00000907, 0x0080 }, /* R2311 - HPLP1MIX Input 4 Volume */ | |
645 | + { 0x00000908, 0x0000 }, /* R2312 - HPLP2MIX Input 1 Source */ | |
646 | + { 0x00000909, 0x0080 }, /* R2313 - HPLP2MIX Input 1 Volume */ | |
647 | + { 0x0000090A, 0x0000 }, /* R2314 - HPLP2MIX Input 2 Source */ | |
648 | + { 0x0000090B, 0x0080 }, /* R2315 - HPLP2MIX Input 2 Volume */ | |
649 | + { 0x0000090C, 0x0000 }, /* R2316 - HPLP2MIX Input 3 Source */ | |
650 | + { 0x0000090D, 0x0080 }, /* R2317 - HPLP2MIX Input 3 Volume */ | |
651 | + { 0x0000090E, 0x0000 }, /* R2318 - HPLP2MIX Input 4 Source */ | |
652 | + { 0x0000090F, 0x0080 }, /* R2319 - HPLP2MIX Input 4 Volume */ | |
653 | + { 0x00000910, 0x0000 }, /* R2320 - HPLP3MIX Input 1 Source */ | |
654 | + { 0x00000911, 0x0080 }, /* R2321 - HPLP3MIX Input 1 Volume */ | |
655 | + { 0x00000912, 0x0000 }, /* R2322 - HPLP3MIX Input 2 Source */ | |
656 | + { 0x00000913, 0x0080 }, /* R2323 - HPLP3MIX Input 2 Volume */ | |
657 | + { 0x00000914, 0x0000 }, /* R2324 - HPLP3MIX Input 3 Source */ | |
658 | + { 0x00000915, 0x0080 }, /* R2325 - HPLP3MIX Input 3 Volume */ | |
659 | + { 0x00000916, 0x0000 }, /* R2326 - HPLP3MIX Input 4 Source */ | |
660 | + { 0x00000917, 0x0080 }, /* R2327 - HPLP3MIX Input 4 Volume */ | |
661 | + { 0x00000918, 0x0000 }, /* R2328 - HPLP4MIX Input 1 Source */ | |
662 | + { 0x00000919, 0x0080 }, /* R2329 - HPLP4MIX Input 1 Volume */ | |
663 | + { 0x0000091A, 0x0000 }, /* R2330 - HPLP4MIX Input 2 Source */ | |
664 | + { 0x0000091B, 0x0080 }, /* R2331 - HPLP4MIX Input 2 Volume */ | |
665 | + { 0x0000091C, 0x0000 }, /* R2332 - HPLP4MIX Input 3 Source */ | |
666 | + { 0x0000091D, 0x0080 }, /* R2333 - HPLP4MIX Input 3 Volume */ | |
667 | + { 0x0000091E, 0x0000 }, /* R2334 - HPLP4MIX Input 4 Source */ | |
668 | + { 0x0000091F, 0x0080 }, /* R2335 - HPLP4MIX Input 4 Volume */ | |
669 | + { 0x00000A80, 0x0000 }, /* R2688 - ASRC1LMIX Input 1 Source */ | |
670 | + { 0x00000A88, 0x0000 }, /* R2696 - ASRC1RMIX Input 1 Source */ | |
671 | + { 0x00000A90, 0x0000 }, /* R2704 - ASRC2LMIX Input 1 Source */ | |
672 | + { 0x00000A98, 0x0000 }, /* R2712 - ASRC2RMIX Input 1 Source */ | |
673 | + { 0x00000B00, 0x0000 }, /* R2816 - ISRC1DEC1MIX Input 1 Source */ | |
674 | + { 0x00000B08, 0x0000 }, /* R2824 - ISRC1DEC2MIX Input 1 Source */ | |
675 | + { 0x00000B10, 0x0000 }, /* R2832 - ISRC1DEC3MIX Input 1 Source */ | |
676 | + { 0x00000B18, 0x0000 }, /* R2840 - ISRC1DEC4MIX Input 1 Source */ | |
677 | + { 0x00000B20, 0x0000 }, /* R2848 - ISRC1INT1MIX Input 1 Source */ | |
678 | + { 0x00000B28, 0x0000 }, /* R2856 - ISRC1INT2MIX Input 1 Source */ | |
679 | + { 0x00000B30, 0x0000 }, /* R2864 - ISRC1INT3MIX Input 1 Source */ | |
680 | + { 0x00000B38, 0x0000 }, /* R2872 - ISRC1INT4MIX Input 1 Source */ | |
681 | + { 0x00000B40, 0x0000 }, /* R2880 - ISRC2DEC1MIX Input 1 Source */ | |
682 | + { 0x00000B48, 0x0000 }, /* R2888 - ISRC2DEC2MIX Input 1 Source */ | |
683 | + { 0x00000B60, 0x0000 }, /* R2912 - ISRC2INT1MIX Input 1 Source */ | |
684 | + { 0x00000B68, 0x0000 }, /* R2920 - ISRC2INT2MIX Input 1 Source */ | |
685 | + { 0x00000C00, 0xA101 }, /* R3072 - GPIO1 CTRL */ | |
686 | + { 0x00000C01, 0xA101 }, /* R3073 - GPIO2 CTRL */ | |
687 | + { 0x00000C02, 0xA101 }, /* R3074 - GPIO3 CTRL */ | |
688 | + { 0x00000C03, 0xA101 }, /* R3075 - GPIO4 CTRL */ | |
689 | + { 0x00000C04, 0xA101 }, /* R3076 - GPIO5 CTRL */ | |
690 | + { 0x00000C0F, 0x0400 }, /* R3087 - IRQ CTRL 1 */ | |
691 | + { 0x00000C10, 0x1000 }, /* R3088 - GPIO Debounce Config */ | |
692 | + { 0x00000C18, 0x0000 }, /* R3096 - GP Switch 1 */ | |
693 | + { 0x00000C20, 0x8002 }, /* R3104 - Misc Pad Ctrl 1 */ | |
694 | + { 0x00000C21, 0x8001 }, /* R3105 - Misc Pad Ctrl 2 */ | |
695 | + { 0x00000C22, 0x0000 }, /* R3106 - Misc Pad Ctrl 3 */ | |
696 | + { 0x00000C23, 0x0000 }, /* R3107 - Misc Pad Ctrl 4 */ | |
697 | + { 0x00000C24, 0x0000 }, /* R3108 - Misc Pad Ctrl 5 */ | |
698 | + { 0x00000C25, 0x0000 }, /* R3109 - Misc Pad Ctrl 6 */ | |
699 | + { 0x00000D08, 0xFFFF }, /* R3336 - Interrupt Status 1 Mask */ | |
700 | + { 0x00000D09, 0xFFFF }, /* R3337 - Interrupt Status 2 Mask */ | |
701 | + { 0x00000D0A, 0xFFFF }, /* R3338 - Interrupt Status 3 Mask */ | |
702 | + { 0x00000D0B, 0xFFFF }, /* R3339 - Interrupt Status 4 Mask */ | |
703 | + { 0x00000D0C, 0xFEFF }, /* R3340 - Interrupt Status 5 Mask */ | |
704 | + { 0x00000D0F, 0x0000 }, /* R3343 - Interrupt Control */ | |
705 | + { 0x00000D18, 0xFFFF }, /* R3352 - IRQ2 Status 1 Mask */ | |
706 | + { 0x00000D19, 0xFFFF }, /* R3353 - IRQ2 Status 2 Mask */ | |
707 | + { 0x00000D1A, 0xFFFF }, /* R3354 - IRQ2 Status 3 Mask */ | |
708 | + { 0x00000D1B, 0xFFFF }, /* R3355 - IRQ2 Status 4 Mask */ | |
709 | + { 0x00000D1C, 0xFEFF }, /* R3356 - IRQ2 Status 5 Mask */ | |
710 | + { 0x00000D1D, 0xFFFF }, /* R3357 - IRQ2 Status 6 Mask */ | |
711 | + { 0x00000D1F, 0x0000 }, /* R3359 - IRQ2 Control */ | |
712 | + { 0x00000D53, 0xFFFF }, /* R3411 - AOD IRQ Mask IRQ1 */ | |
713 | + { 0x00000D54, 0xFFFF }, /* R3412 - AOD IRQ Mask IRQ2 */ | |
714 | + { 0x00000D56, 0x0000 }, /* R3414 - Jack detect debounce */ | |
715 | + { 0x00000E00, 0x0000 }, /* R3584 - FX_Ctrl1 */ | |
716 | + { 0x00000E01, 0x0000 }, /* R3585 - FX_Ctrl2 */ | |
717 | + { 0x00000E10, 0x6318 }, /* R3600 - EQ1_1 */ | |
718 | + { 0x00000E11, 0x6300 }, /* R3601 - EQ1_2 */ | |
719 | + { 0x00000E12, 0x0FC8 }, /* R3602 - EQ1_3 */ | |
720 | + { 0x00000E13, 0x03FE }, /* R3603 - EQ1_4 */ | |
721 | + { 0x00000E14, 0x00E0 }, /* R3604 - EQ1_5 */ | |
722 | + { 0x00000E15, 0x1EC4 }, /* R3605 - EQ1_6 */ | |
723 | + { 0x00000E16, 0xF136 }, /* R3606 - EQ1_7 */ | |
724 | + { 0x00000E17, 0x0409 }, /* R3607 - EQ1_8 */ | |
725 | + { 0x00000E18, 0x04CC }, /* R3608 - EQ1_9 */ | |
726 | + { 0x00000E19, 0x1C9B }, /* R3609 - EQ1_10 */ | |
727 | + { 0x00000E1A, 0xF337 }, /* R3610 - EQ1_11 */ | |
728 | + { 0x00000E1B, 0x040B }, /* R3611 - EQ1_12 */ | |
729 | + { 0x00000E1C, 0x0CBB }, /* R3612 - EQ1_13 */ | |
730 | + { 0x00000E1D, 0x16F8 }, /* R3613 - EQ1_14 */ | |
731 | + { 0x00000E1E, 0xF7D9 }, /* R3614 - EQ1_15 */ | |
732 | + { 0x00000E1F, 0x040A }, /* R3615 - EQ1_16 */ | |
733 | + { 0x00000E20, 0x1F14 }, /* R3616 - EQ1_17 */ | |
734 | + { 0x00000E21, 0x058C }, /* R3617 - EQ1_18 */ | |
735 | + { 0x00000E22, 0x0563 }, /* R3618 - EQ1_19 */ | |
736 | + { 0x00000E23, 0x4000 }, /* R3619 - EQ1_20 */ | |
737 | + { 0x00000E24, 0x0B75 }, /* R3620 - EQ1_21 */ | |
738 | + { 0x00000E26, 0x6318 }, /* R3622 - EQ2_1 */ | |
739 | + { 0x00000E27, 0x6300 }, /* R3623 - EQ2_2 */ | |
740 | + { 0x00000E28, 0x0FC8 }, /* R3624 - EQ2_3 */ | |
741 | + { 0x00000E29, 0x03FE }, /* R3625 - EQ2_4 */ | |
742 | + { 0x00000E2A, 0x00E0 }, /* R3626 - EQ2_5 */ | |
743 | + { 0x00000E2B, 0x1EC4 }, /* R3627 - EQ2_6 */ | |
744 | + { 0x00000E2C, 0xF136 }, /* R3628 - EQ2_7 */ | |
745 | + { 0x00000E2D, 0x0409 }, /* R3629 - EQ2_8 */ | |
746 | + { 0x00000E2E, 0x04CC }, /* R3630 - EQ2_9 */ | |
747 | + { 0x00000E2F, 0x1C9B }, /* R3631 - EQ2_10 */ | |
748 | + { 0x00000E30, 0xF337 }, /* R3632 - EQ2_11 */ | |
749 | + { 0x00000E31, 0x040B }, /* R3633 - EQ2_12 */ | |
750 | + { 0x00000E32, 0x0CBB }, /* R3634 - EQ2_13 */ | |
751 | + { 0x00000E33, 0x16F8 }, /* R3635 - EQ2_14 */ | |
752 | + { 0x00000E34, 0xF7D9 }, /* R3636 - EQ2_15 */ | |
753 | + { 0x00000E35, 0x040A }, /* R3637 - EQ2_16 */ | |
754 | + { 0x00000E36, 0x1F14 }, /* R3638 - EQ2_17 */ | |
755 | + { 0x00000E37, 0x058C }, /* R3639 - EQ2_18 */ | |
756 | + { 0x00000E38, 0x0563 }, /* R3640 - EQ2_19 */ | |
757 | + { 0x00000E39, 0x4000 }, /* R3641 - EQ2_20 */ | |
758 | + { 0x00000E3A, 0x0B75 }, /* R3642 - EQ2_21 */ | |
759 | + { 0x00000E3C, 0x6318 }, /* R3644 - EQ3_1 */ | |
760 | + { 0x00000E3D, 0x6300 }, /* R3645 - EQ3_2 */ | |
761 | + { 0x00000E3E, 0x0FC8 }, /* R3646 - EQ3_3 */ | |
762 | + { 0x00000E3F, 0x03FE }, /* R3647 - EQ3_4 */ | |
763 | + { 0x00000E40, 0x00E0 }, /* R3648 - EQ3_5 */ | |
764 | + { 0x00000E41, 0x1EC4 }, /* R3649 - EQ3_6 */ | |
765 | + { 0x00000E42, 0xF136 }, /* R3650 - EQ3_7 */ | |
766 | + { 0x00000E43, 0x0409 }, /* R3651 - EQ3_8 */ | |
767 | + { 0x00000E44, 0x04CC }, /* R3652 - EQ3_9 */ | |
768 | + { 0x00000E45, 0x1C9B }, /* R3653 - EQ3_10 */ | |
769 | + { 0x00000E46, 0xF337 }, /* R3654 - EQ3_11 */ | |
770 | + { 0x00000E47, 0x040B }, /* R3655 - EQ3_12 */ | |
771 | + { 0x00000E48, 0x0CBB }, /* R3656 - EQ3_13 */ | |
772 | + { 0x00000E49, 0x16F8 }, /* R3657 - EQ3_14 */ | |
773 | + { 0x00000E4A, 0xF7D9 }, /* R3658 - EQ3_15 */ | |
774 | + { 0x00000E4B, 0x040A }, /* R3659 - EQ3_16 */ | |
775 | + { 0x00000E4C, 0x1F14 }, /* R3660 - EQ3_17 */ | |
776 | + { 0x00000E4D, 0x058C }, /* R3661 - EQ3_18 */ | |
777 | + { 0x00000E4E, 0x0563 }, /* R3662 - EQ3_19 */ | |
778 | + { 0x00000E4F, 0x4000 }, /* R3663 - EQ3_20 */ | |
779 | + { 0x00000E50, 0x0B75 }, /* R3664 - EQ3_21 */ | |
780 | + { 0x00000E52, 0x6318 }, /* R3666 - EQ4_1 */ | |
781 | + { 0x00000E53, 0x6300 }, /* R3667 - EQ4_2 */ | |
782 | + { 0x00000E54, 0x0FC8 }, /* R3668 - EQ4_3 */ | |
783 | + { 0x00000E55, 0x03FE }, /* R3669 - EQ4_4 */ | |
784 | + { 0x00000E56, 0x00E0 }, /* R3670 - EQ4_5 */ | |
785 | + { 0x00000E57, 0x1EC4 }, /* R3671 - EQ4_6 */ | |
786 | + { 0x00000E58, 0xF136 }, /* R3672 - EQ4_7 */ | |
787 | + { 0x00000E59, 0x0409 }, /* R3673 - EQ4_8 */ | |
788 | + { 0x00000E5A, 0x04CC }, /* R3674 - EQ4_9 */ | |
789 | + { 0x00000E5B, 0x1C9B }, /* R3675 - EQ4_10 */ | |
790 | + { 0x00000E5C, 0xF337 }, /* R3676 - EQ4_11 */ | |
791 | + { 0x00000E5D, 0x040B }, /* R3677 - EQ4_12 */ | |
792 | + { 0x00000E5E, 0x0CBB }, /* R3678 - EQ4_13 */ | |
793 | + { 0x00000E5F, 0x16F8 }, /* R3679 - EQ4_14 */ | |
794 | + { 0x00000E60, 0xF7D9 }, /* R3680 - EQ4_15 */ | |
795 | + { 0x00000E61, 0x040A }, /* R3681 - EQ4_16 */ | |
796 | + { 0x00000E62, 0x1F14 }, /* R3682 - EQ4_17 */ | |
797 | + { 0x00000E63, 0x058C }, /* R3683 - EQ4_18 */ | |
798 | + { 0x00000E64, 0x0563 }, /* R3684 - EQ4_19 */ | |
799 | + { 0x00000E65, 0x4000 }, /* R3685 - EQ4_20 */ | |
800 | + { 0x00000E66, 0x0B75 }, /* R3686 - EQ4_21 */ | |
801 | + { 0x00000E80, 0x0018 }, /* R3712 - DRC1 ctrl1 */ | |
802 | + { 0x00000E81, 0x0933 }, /* R3713 - DRC1 ctrl2 */ | |
803 | + { 0x00000E82, 0x0018 }, /* R3714 - DRC1 ctrl3 */ | |
804 | + { 0x00000E83, 0x0000 }, /* R3715 - DRC1 ctrl4 */ | |
805 | + { 0x00000E84, 0x0000 }, /* R3716 - DRC1 ctrl5 */ | |
806 | + { 0x00000EC0, 0x0000 }, /* R3776 - HPLPF1_1 */ | |
807 | + { 0x00000EC1, 0x0000 }, /* R3777 - HPLPF1_2 */ | |
808 | + { 0x00000EC4, 0x0000 }, /* R3780 - HPLPF2_1 */ | |
809 | + { 0x00000EC5, 0x0000 }, /* R3781 - HPLPF2_2 */ | |
810 | + { 0x00000EC8, 0x0000 }, /* R3784 - HPLPF3_1 */ | |
811 | + { 0x00000EC9, 0x0000 }, /* R3785 - HPLPF3_2 */ | |
812 | + { 0x00000ECC, 0x0000 }, /* R3788 - HPLPF4_1 */ | |
813 | + { 0x00000ECD, 0x0000 }, /* R3789 - HPLPF4_2 */ | |
814 | + { 0x00000EE0, 0x0000 }, /* R3808 - ASRC_ENABLE */ | |
815 | + { 0x00000EE2, 0x0000 }, /* R3810 - ASRC_RATE1 */ | |
816 | + { 0x00000EE3, 0x4000 }, /* R3811 - ASRC_RATE2 */ | |
817 | + { 0x00000EF0, 0x0000 }, /* R3824 - ISRC 1 CTRL 1 */ | |
818 | + { 0x00000EF1, 0x0001 }, /* R3825 - ISRC 1 CTRL 2 */ | |
819 | + { 0x00000EF2, 0x0000 }, /* R3826 - ISRC 1 CTRL 3 */ | |
820 | + { 0x00000EF3, 0x0000 }, /* R3827 - ISRC 2 CTRL 1 */ | |
821 | + { 0x00000EF4, 0x0001 }, /* R3828 - ISRC 2 CTRL 2 */ | |
822 | + { 0x00000EF5, 0x0000 }, /* R3829 - ISRC 2 CTRL 3 */ | |
823 | + { 0x00001700, 0x0000 }, /* R5888 - FRF_COEFF_1 */ | |
824 | + { 0x00001701, 0x0000 }, /* R5889 - FRF_COEFF_2 */ | |
825 | + { 0x00001702, 0x0000 }, /* R5890 - FRF_COEFF_3 */ | |
826 | + { 0x00001703, 0x0000 }, /* R5891 - FRF_COEFF_4 */ | |
827 | + { 0x00001704, 0x0000 }, /* R5892 - DAC_COMP_1 */ | |
828 | + { 0x00001705, 0x0000 }, /* R5893 - DAC_COMP_2 */ | |
829 | +}; | |
830 | + | |
831 | +static bool wm8998_readable_register(struct device *dev, unsigned int reg) | |
832 | +{ | |
833 | + switch (reg) { | |
834 | + case ARIZONA_SOFTWARE_RESET: | |
835 | + case ARIZONA_DEVICE_REVISION: | |
836 | + case ARIZONA_CTRL_IF_SPI_CFG_1: | |
837 | + case ARIZONA_CTRL_IF_I2C1_CFG_1: | |
838 | + case ARIZONA_CTRL_IF_I2C1_CFG_2: | |
839 | + case ARIZONA_WRITE_SEQUENCER_CTRL_0: | |
840 | + case ARIZONA_WRITE_SEQUENCER_CTRL_1: | |
841 | + case ARIZONA_WRITE_SEQUENCER_CTRL_2: | |
842 | + case ARIZONA_TONE_GENERATOR_1: | |
843 | + case ARIZONA_TONE_GENERATOR_2: | |
844 | + case ARIZONA_TONE_GENERATOR_3: | |
845 | + case ARIZONA_TONE_GENERATOR_4: | |
846 | + case ARIZONA_TONE_GENERATOR_5: | |
847 | + case ARIZONA_PWM_DRIVE_1: | |
848 | + case ARIZONA_PWM_DRIVE_2: | |
849 | + case ARIZONA_PWM_DRIVE_3: | |
850 | + case ARIZONA_WAKE_CONTROL: | |
851 | + case ARIZONA_SEQUENCE_CONTROL: | |
852 | + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_1: | |
853 | + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_2: | |
854 | + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_3: | |
855 | + case ARIZONA_SAMPLE_RATE_SEQUENCE_SELECT_4: | |
856 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_1: | |
857 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_2: | |
858 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_3: | |
859 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_4: | |
860 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_5: | |
861 | + case ARIZONA_ALWAYS_ON_TRIGGERS_SEQUENCE_SELECT_6: | |
862 | + case ARIZONA_HAPTICS_CONTROL_1: | |
863 | + case ARIZONA_HAPTICS_CONTROL_2: | |
864 | + case ARIZONA_HAPTICS_PHASE_1_INTENSITY: | |
865 | + case ARIZONA_HAPTICS_PHASE_1_DURATION: | |
866 | + case ARIZONA_HAPTICS_PHASE_2_INTENSITY: | |
867 | + case ARIZONA_HAPTICS_PHASE_2_DURATION: | |
868 | + case ARIZONA_HAPTICS_PHASE_3_INTENSITY: | |
869 | + case ARIZONA_HAPTICS_PHASE_3_DURATION: | |
870 | + case ARIZONA_HAPTICS_STATUS: | |
871 | + case ARIZONA_CLOCK_32K_1: | |
872 | + case ARIZONA_SYSTEM_CLOCK_1: | |
873 | + case ARIZONA_SAMPLE_RATE_1: | |
874 | + case ARIZONA_SAMPLE_RATE_2: | |
875 | + case ARIZONA_SAMPLE_RATE_3: | |
876 | + case ARIZONA_SAMPLE_RATE_1_STATUS: | |
877 | + case ARIZONA_SAMPLE_RATE_2_STATUS: | |
878 | + case ARIZONA_SAMPLE_RATE_3_STATUS: | |
879 | + case ARIZONA_ASYNC_CLOCK_1: | |
880 | + case ARIZONA_ASYNC_SAMPLE_RATE_1: | |
881 | + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: | |
882 | + case ARIZONA_ASYNC_SAMPLE_RATE_2: | |
883 | + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: | |
884 | + case ARIZONA_OUTPUT_SYSTEM_CLOCK: | |
885 | + case ARIZONA_OUTPUT_ASYNC_CLOCK: | |
886 | + case ARIZONA_RATE_ESTIMATOR_1: | |
887 | + case ARIZONA_RATE_ESTIMATOR_2: | |
888 | + case ARIZONA_RATE_ESTIMATOR_3: | |
889 | + case ARIZONA_RATE_ESTIMATOR_4: | |
890 | + case ARIZONA_RATE_ESTIMATOR_5: | |
891 | + case ARIZONA_DYNAMIC_FREQUENCY_SCALING_1: | |
892 | + case ARIZONA_FLL1_CONTROL_1: | |
893 | + case ARIZONA_FLL1_CONTROL_2: | |
894 | + case ARIZONA_FLL1_CONTROL_3: | |
895 | + case ARIZONA_FLL1_CONTROL_4: | |
896 | + case ARIZONA_FLL1_CONTROL_5: | |
897 | + case ARIZONA_FLL1_CONTROL_6: | |
898 | + case ARIZONA_FLL1_CONTROL_7: | |
899 | + case ARIZONA_FLL1_LOOP_FILTER_TEST_1: | |
900 | + case ARIZONA_FLL1_NCO_TEST_0: | |
901 | + case ARIZONA_FLL1_SYNCHRONISER_1: | |
902 | + case ARIZONA_FLL1_SYNCHRONISER_2: | |
903 | + case ARIZONA_FLL1_SYNCHRONISER_3: | |
904 | + case ARIZONA_FLL1_SYNCHRONISER_4: | |
905 | + case ARIZONA_FLL1_SYNCHRONISER_5: | |
906 | + case ARIZONA_FLL1_SYNCHRONISER_6: | |
907 | + case ARIZONA_FLL1_SYNCHRONISER_7: | |
908 | + case ARIZONA_FLL1_SPREAD_SPECTRUM: | |
909 | + case ARIZONA_FLL1_GPIO_CLOCK: | |
910 | + case ARIZONA_FLL2_CONTROL_1: | |
911 | + case ARIZONA_FLL2_CONTROL_2: | |
912 | + case ARIZONA_FLL2_CONTROL_3: | |
913 | + case ARIZONA_FLL2_CONTROL_4: | |
914 | + case ARIZONA_FLL2_CONTROL_5: | |
915 | + case ARIZONA_FLL2_CONTROL_6: | |
916 | + case ARIZONA_FLL2_CONTROL_7: | |
917 | + case ARIZONA_FLL2_LOOP_FILTER_TEST_1: | |
918 | + case ARIZONA_FLL2_NCO_TEST_0: | |
919 | + case ARIZONA_FLL2_SYNCHRONISER_1: | |
920 | + case ARIZONA_FLL2_SYNCHRONISER_2: | |
921 | + case ARIZONA_FLL2_SYNCHRONISER_3: | |
922 | + case ARIZONA_FLL2_SYNCHRONISER_4: | |
923 | + case ARIZONA_FLL2_SYNCHRONISER_5: | |
924 | + case ARIZONA_FLL2_SYNCHRONISER_6: | |
925 | + case ARIZONA_FLL2_SYNCHRONISER_7: | |
926 | + case ARIZONA_FLL2_SPREAD_SPECTRUM: | |
927 | + case ARIZONA_FLL2_GPIO_CLOCK: | |
928 | + case ARIZONA_MIC_CHARGE_PUMP_1: | |
929 | + case ARIZONA_LDO1_CONTROL_1: | |
930 | + case ARIZONA_LDO1_CONTROL_2: | |
931 | + case ARIZONA_LDO2_CONTROL_1: | |
932 | + case ARIZONA_MIC_BIAS_CTRL_1: | |
933 | + case ARIZONA_MIC_BIAS_CTRL_2: | |
934 | + case ARIZONA_MIC_BIAS_CTRL_3: | |
935 | + case ARIZONA_ACCESSORY_DETECT_MODE_1: | |
936 | + case ARIZONA_HEADPHONE_DETECT_1: | |
937 | + case ARIZONA_HEADPHONE_DETECT_2: | |
938 | + case ARIZONA_MICD_CLAMP_CONTROL: | |
939 | + case ARIZONA_MIC_DETECT_1: | |
940 | + case ARIZONA_MIC_DETECT_2: | |
941 | + case ARIZONA_MIC_DETECT_3: | |
942 | + case ARIZONA_MIC_DETECT_4: | |
943 | + case ARIZONA_MIC_DETECT_LEVEL_1: | |
944 | + case ARIZONA_MIC_DETECT_LEVEL_2: | |
945 | + case ARIZONA_MIC_DETECT_LEVEL_3: | |
946 | + case ARIZONA_MIC_DETECT_LEVEL_4: | |
947 | + case ARIZONA_ISOLATION_CONTROL: | |
948 | + case ARIZONA_JACK_DETECT_ANALOGUE: | |
949 | + case ARIZONA_INPUT_ENABLES: | |
950 | + case ARIZONA_INPUT_ENABLES_STATUS: | |
951 | + case ARIZONA_INPUT_RATE: | |
952 | + case ARIZONA_INPUT_VOLUME_RAMP: | |
953 | + case ARIZONA_HPF_CONTROL: | |
954 | + case ARIZONA_IN1L_CONTROL: | |
955 | + case ARIZONA_ADC_DIGITAL_VOLUME_1L: | |
956 | + case ARIZONA_DMIC1L_CONTROL: | |
957 | + case ARIZONA_IN1R_CONTROL: | |
958 | + case ARIZONA_ADC_DIGITAL_VOLUME_1R: | |
959 | + case ARIZONA_DMIC1R_CONTROL: | |
960 | + case ARIZONA_IN2L_CONTROL: | |
961 | + case ARIZONA_ADC_DIGITAL_VOLUME_2L: | |
962 | + case ARIZONA_DMIC2L_CONTROL: | |
963 | + case ARIZONA_OUTPUT_ENABLES_1: | |
964 | + case ARIZONA_OUTPUT_STATUS_1: | |
965 | + case ARIZONA_RAW_OUTPUT_STATUS_1: | |
966 | + case ARIZONA_OUTPUT_RATE_1: | |
967 | + case ARIZONA_OUTPUT_VOLUME_RAMP: | |
968 | + case ARIZONA_OUTPUT_PATH_CONFIG_1L: | |
969 | + case ARIZONA_DAC_DIGITAL_VOLUME_1L: | |
970 | + case ARIZONA_NOISE_GATE_SELECT_1L: | |
971 | + case ARIZONA_OUTPUT_PATH_CONFIG_1R: | |
972 | + case ARIZONA_DAC_DIGITAL_VOLUME_1R: | |
973 | + case ARIZONA_NOISE_GATE_SELECT_1R: | |
974 | + case ARIZONA_OUTPUT_PATH_CONFIG_2L: | |
975 | + case ARIZONA_DAC_DIGITAL_VOLUME_2L: | |
976 | + case ARIZONA_NOISE_GATE_SELECT_2L: | |
977 | + case ARIZONA_OUTPUT_PATH_CONFIG_2R: | |
978 | + case ARIZONA_DAC_DIGITAL_VOLUME_2R: | |
979 | + case ARIZONA_NOISE_GATE_SELECT_2R: | |
980 | + case ARIZONA_OUTPUT_PATH_CONFIG_3L: | |
981 | + case ARIZONA_DAC_DIGITAL_VOLUME_3L: | |
982 | + case ARIZONA_NOISE_GATE_SELECT_3L: | |
983 | + case ARIZONA_OUTPUT_PATH_CONFIG_4L: | |
984 | + case ARIZONA_DAC_DIGITAL_VOLUME_4L: | |
985 | + case ARIZONA_NOISE_GATE_SELECT_4L: | |
986 | + case ARIZONA_OUTPUT_PATH_CONFIG_4R: | |
987 | + case ARIZONA_DAC_DIGITAL_VOLUME_4R: | |
988 | + case ARIZONA_NOISE_GATE_SELECT_4R: | |
989 | + case ARIZONA_OUTPUT_PATH_CONFIG_5L: | |
990 | + case ARIZONA_DAC_DIGITAL_VOLUME_5L: | |
991 | + case ARIZONA_NOISE_GATE_SELECT_5L: | |
992 | + case ARIZONA_OUTPUT_PATH_CONFIG_5R: | |
993 | + case ARIZONA_DAC_DIGITAL_VOLUME_5R: | |
994 | + case ARIZONA_NOISE_GATE_SELECT_5R: | |
995 | + case ARIZONA_DRE_ENABLE: | |
996 | + case ARIZONA_DRE_CONTROL_1: | |
997 | + case ARIZONA_DRE_CONTROL_2: | |
998 | + case ARIZONA_DRE_CONTROL_3: | |
999 | + case ARIZONA_EDRE_ENABLE: | |
1000 | + case ARIZONA_DAC_AEC_CONTROL_1: | |
1001 | + case ARIZONA_DAC_AEC_CONTROL_2: | |
1002 | + case ARIZONA_NOISE_GATE_CONTROL: | |
1003 | + case ARIZONA_PDM_SPK1_CTRL_1: | |
1004 | + case ARIZONA_PDM_SPK1_CTRL_2: | |
1005 | + case ARIZONA_HP_TEST_CTRL_13: | |
1006 | + case ARIZONA_AIF1_BCLK_CTRL: | |
1007 | + case ARIZONA_AIF1_TX_PIN_CTRL: | |
1008 | + case ARIZONA_AIF1_RX_PIN_CTRL: | |
1009 | + case ARIZONA_AIF1_RATE_CTRL: | |
1010 | + case ARIZONA_AIF1_FORMAT: | |
1011 | + case ARIZONA_AIF1_RX_BCLK_RATE: | |
1012 | + case ARIZONA_AIF1_FRAME_CTRL_1: | |
1013 | + case ARIZONA_AIF1_FRAME_CTRL_2: | |
1014 | + case ARIZONA_AIF1_FRAME_CTRL_3: | |
1015 | + case ARIZONA_AIF1_FRAME_CTRL_4: | |
1016 | + case ARIZONA_AIF1_FRAME_CTRL_5: | |
1017 | + case ARIZONA_AIF1_FRAME_CTRL_6: | |
1018 | + case ARIZONA_AIF1_FRAME_CTRL_7: | |
1019 | + case ARIZONA_AIF1_FRAME_CTRL_8: | |
1020 | + case ARIZONA_AIF1_FRAME_CTRL_11: | |
1021 | + case ARIZONA_AIF1_FRAME_CTRL_12: | |
1022 | + case ARIZONA_AIF1_FRAME_CTRL_13: | |
1023 | + case ARIZONA_AIF1_FRAME_CTRL_14: | |
1024 | + case ARIZONA_AIF1_FRAME_CTRL_15: | |
1025 | + case ARIZONA_AIF1_FRAME_CTRL_16: | |
1026 | + case ARIZONA_AIF1_TX_ENABLES: | |
1027 | + case ARIZONA_AIF1_RX_ENABLES: | |
1028 | + case ARIZONA_AIF2_BCLK_CTRL: | |
1029 | + case ARIZONA_AIF2_TX_PIN_CTRL: | |
1030 | + case ARIZONA_AIF2_RX_PIN_CTRL: | |
1031 | + case ARIZONA_AIF2_RATE_CTRL: | |
1032 | + case ARIZONA_AIF2_FORMAT: | |
1033 | + case ARIZONA_AIF2_RX_BCLK_RATE: | |
1034 | + case ARIZONA_AIF2_FRAME_CTRL_1: | |
1035 | + case ARIZONA_AIF2_FRAME_CTRL_2: | |
1036 | + case ARIZONA_AIF2_FRAME_CTRL_3: | |
1037 | + case ARIZONA_AIF2_FRAME_CTRL_4: | |
1038 | + case ARIZONA_AIF2_FRAME_CTRL_5: | |
1039 | + case ARIZONA_AIF2_FRAME_CTRL_6: | |
1040 | + case ARIZONA_AIF2_FRAME_CTRL_7: | |
1041 | + case ARIZONA_AIF2_FRAME_CTRL_8: | |
1042 | + case ARIZONA_AIF2_FRAME_CTRL_11: | |
1043 | + case ARIZONA_AIF2_FRAME_CTRL_12: | |
1044 | + case ARIZONA_AIF2_FRAME_CTRL_13: | |
1045 | + case ARIZONA_AIF2_FRAME_CTRL_14: | |
1046 | + case ARIZONA_AIF2_FRAME_CTRL_15: | |
1047 | + case ARIZONA_AIF2_FRAME_CTRL_16: | |
1048 | + case ARIZONA_AIF2_TX_ENABLES: | |
1049 | + case ARIZONA_AIF2_RX_ENABLES: | |
1050 | + case ARIZONA_AIF3_BCLK_CTRL: | |
1051 | + case ARIZONA_AIF3_TX_PIN_CTRL: | |
1052 | + case ARIZONA_AIF3_RX_PIN_CTRL: | |
1053 | + case ARIZONA_AIF3_RATE_CTRL: | |
1054 | + case ARIZONA_AIF3_FORMAT: | |
1055 | + case ARIZONA_AIF3_RX_BCLK_RATE: | |
1056 | + case ARIZONA_AIF3_FRAME_CTRL_1: | |
1057 | + case ARIZONA_AIF3_FRAME_CTRL_2: | |
1058 | + case ARIZONA_AIF3_FRAME_CTRL_3: | |
1059 | + case ARIZONA_AIF3_FRAME_CTRL_4: | |
1060 | + case ARIZONA_AIF3_FRAME_CTRL_11: | |
1061 | + case ARIZONA_AIF3_FRAME_CTRL_12: | |
1062 | + case ARIZONA_AIF3_TX_ENABLES: | |
1063 | + case ARIZONA_AIF3_RX_ENABLES: | |
1064 | + case ARIZONA_SPD1_TX_CONTROL: | |
1065 | + case ARIZONA_SPD1_TX_CHANNEL_STATUS_1: | |
1066 | + case ARIZONA_SPD1_TX_CHANNEL_STATUS_2: | |
1067 | + case ARIZONA_SPD1_TX_CHANNEL_STATUS_3: | |
1068 | + case ARIZONA_SLIMBUS_FRAMER_REF_GEAR: | |
1069 | + case ARIZONA_SLIMBUS_RATES_1: | |
1070 | + case ARIZONA_SLIMBUS_RATES_2: | |
1071 | + case ARIZONA_SLIMBUS_RATES_5: | |
1072 | + case ARIZONA_SLIMBUS_RATES_6: | |
1073 | + case ARIZONA_SLIMBUS_RATES_7: | |
1074 | + case ARIZONA_SLIMBUS_RX_CHANNEL_ENABLE: | |
1075 | + case ARIZONA_SLIMBUS_TX_CHANNEL_ENABLE: | |
1076 | + case ARIZONA_SLIMBUS_RX_PORT_STATUS: | |
1077 | + case ARIZONA_SLIMBUS_TX_PORT_STATUS: | |
1078 | + case ARIZONA_PWM1MIX_INPUT_1_SOURCE: | |
1079 | + case ARIZONA_PWM1MIX_INPUT_1_VOLUME: | |
1080 | + case ARIZONA_PWM1MIX_INPUT_2_SOURCE: | |
1081 | + case ARIZONA_PWM1MIX_INPUT_2_VOLUME: | |
1082 | + case ARIZONA_PWM1MIX_INPUT_3_SOURCE: | |
1083 | + case ARIZONA_PWM1MIX_INPUT_3_VOLUME: | |
1084 | + case ARIZONA_PWM1MIX_INPUT_4_SOURCE: | |
1085 | + case ARIZONA_PWM1MIX_INPUT_4_VOLUME: | |
1086 | + case ARIZONA_PWM2MIX_INPUT_1_SOURCE: | |
1087 | + case ARIZONA_PWM2MIX_INPUT_1_VOLUME: | |
1088 | + case ARIZONA_PWM2MIX_INPUT_2_SOURCE: | |
1089 | + case ARIZONA_PWM2MIX_INPUT_2_VOLUME: | |
1090 | + case ARIZONA_PWM2MIX_INPUT_3_SOURCE: | |
1091 | + case ARIZONA_PWM2MIX_INPUT_3_VOLUME: | |
1092 | + case ARIZONA_PWM2MIX_INPUT_4_SOURCE: | |
1093 | + case ARIZONA_PWM2MIX_INPUT_4_VOLUME: | |
1094 | + case ARIZONA_OUT1LMIX_INPUT_1_SOURCE: | |
1095 | + case ARIZONA_OUT1LMIX_INPUT_1_VOLUME: | |
1096 | + case ARIZONA_OUT1LMIX_INPUT_2_SOURCE: | |
1097 | + case ARIZONA_OUT1LMIX_INPUT_2_VOLUME: | |
1098 | + case ARIZONA_OUT1LMIX_INPUT_3_SOURCE: | |
1099 | + case ARIZONA_OUT1LMIX_INPUT_3_VOLUME: | |
1100 | + case ARIZONA_OUT1LMIX_INPUT_4_SOURCE: | |
1101 | + case ARIZONA_OUT1LMIX_INPUT_4_VOLUME: | |
1102 | + case ARIZONA_OUT1RMIX_INPUT_1_SOURCE: | |
1103 | + case ARIZONA_OUT1RMIX_INPUT_1_VOLUME: | |
1104 | + case ARIZONA_OUT1RMIX_INPUT_2_SOURCE: | |
1105 | + case ARIZONA_OUT1RMIX_INPUT_2_VOLUME: | |
1106 | + case ARIZONA_OUT1RMIX_INPUT_3_SOURCE: | |
1107 | + case ARIZONA_OUT1RMIX_INPUT_3_VOLUME: | |
1108 | + case ARIZONA_OUT1RMIX_INPUT_4_SOURCE: | |
1109 | + case ARIZONA_OUT1RMIX_INPUT_4_VOLUME: | |
1110 | + case ARIZONA_OUT2LMIX_INPUT_1_SOURCE: | |
1111 | + case ARIZONA_OUT2LMIX_INPUT_1_VOLUME: | |
1112 | + case ARIZONA_OUT2LMIX_INPUT_2_SOURCE: | |
1113 | + case ARIZONA_OUT2LMIX_INPUT_2_VOLUME: | |
1114 | + case ARIZONA_OUT2LMIX_INPUT_3_SOURCE: | |
1115 | + case ARIZONA_OUT2LMIX_INPUT_3_VOLUME: | |
1116 | + case ARIZONA_OUT2LMIX_INPUT_4_SOURCE: | |
1117 | + case ARIZONA_OUT2LMIX_INPUT_4_VOLUME: | |
1118 | + case ARIZONA_OUT2RMIX_INPUT_1_SOURCE: | |
1119 | + case ARIZONA_OUT2RMIX_INPUT_1_VOLUME: | |
1120 | + case ARIZONA_OUT2RMIX_INPUT_2_SOURCE: | |
1121 | + case ARIZONA_OUT2RMIX_INPUT_2_VOLUME: | |
1122 | + case ARIZONA_OUT2RMIX_INPUT_3_SOURCE: | |
1123 | + case ARIZONA_OUT2RMIX_INPUT_3_VOLUME: | |
1124 | + case ARIZONA_OUT2RMIX_INPUT_4_SOURCE: | |
1125 | + case ARIZONA_OUT2RMIX_INPUT_4_VOLUME: | |
1126 | + case ARIZONA_OUT3LMIX_INPUT_1_SOURCE: | |
1127 | + case ARIZONA_OUT3LMIX_INPUT_1_VOLUME: | |
1128 | + case ARIZONA_OUT3LMIX_INPUT_2_SOURCE: | |
1129 | + case ARIZONA_OUT3LMIX_INPUT_2_VOLUME: | |
1130 | + case ARIZONA_OUT3LMIX_INPUT_3_SOURCE: | |
1131 | + case ARIZONA_OUT3LMIX_INPUT_3_VOLUME: | |
1132 | + case ARIZONA_OUT3LMIX_INPUT_4_SOURCE: | |
1133 | + case ARIZONA_OUT3LMIX_INPUT_4_VOLUME: | |
1134 | + case ARIZONA_OUT4LMIX_INPUT_1_SOURCE: | |
1135 | + case ARIZONA_OUT4LMIX_INPUT_1_VOLUME: | |
1136 | + case ARIZONA_OUT4LMIX_INPUT_2_SOURCE: | |
1137 | + case ARIZONA_OUT4LMIX_INPUT_2_VOLUME: | |
1138 | + case ARIZONA_OUT4LMIX_INPUT_3_SOURCE: | |
1139 | + case ARIZONA_OUT4LMIX_INPUT_3_VOLUME: | |
1140 | + case ARIZONA_OUT4LMIX_INPUT_4_SOURCE: | |
1141 | + case ARIZONA_OUT4LMIX_INPUT_4_VOLUME: | |
1142 | + case ARIZONA_OUT4RMIX_INPUT_1_SOURCE: | |
1143 | + case ARIZONA_OUT4RMIX_INPUT_1_VOLUME: | |
1144 | + case ARIZONA_OUT4RMIX_INPUT_2_SOURCE: | |
1145 | + case ARIZONA_OUT4RMIX_INPUT_2_VOLUME: | |
1146 | + case ARIZONA_OUT4RMIX_INPUT_3_SOURCE: | |
1147 | + case ARIZONA_OUT4RMIX_INPUT_3_VOLUME: | |
1148 | + case ARIZONA_OUT4RMIX_INPUT_4_SOURCE: | |
1149 | + case ARIZONA_OUT4RMIX_INPUT_4_VOLUME: | |
1150 | + case ARIZONA_OUT5LMIX_INPUT_1_SOURCE: | |
1151 | + case ARIZONA_OUT5LMIX_INPUT_1_VOLUME: | |
1152 | + case ARIZONA_OUT5LMIX_INPUT_2_SOURCE: | |
1153 | + case ARIZONA_OUT5LMIX_INPUT_2_VOLUME: | |
1154 | + case ARIZONA_OUT5LMIX_INPUT_3_SOURCE: | |
1155 | + case ARIZONA_OUT5LMIX_INPUT_3_VOLUME: | |
1156 | + case ARIZONA_OUT5LMIX_INPUT_4_SOURCE: | |
1157 | + case ARIZONA_OUT5LMIX_INPUT_4_VOLUME: | |
1158 | + case ARIZONA_OUT5RMIX_INPUT_1_SOURCE: | |
1159 | + case ARIZONA_OUT5RMIX_INPUT_1_VOLUME: | |
1160 | + case ARIZONA_OUT5RMIX_INPUT_2_SOURCE: | |
1161 | + case ARIZONA_OUT5RMIX_INPUT_2_VOLUME: | |
1162 | + case ARIZONA_OUT5RMIX_INPUT_3_SOURCE: | |
1163 | + case ARIZONA_OUT5RMIX_INPUT_3_VOLUME: | |
1164 | + case ARIZONA_OUT5RMIX_INPUT_4_SOURCE: | |
1165 | + case ARIZONA_OUT5RMIX_INPUT_4_VOLUME: | |
1166 | + case ARIZONA_AIF1TX1MIX_INPUT_1_SOURCE: | |
1167 | + case ARIZONA_AIF1TX1MIX_INPUT_1_VOLUME: | |
1168 | + case ARIZONA_AIF1TX1MIX_INPUT_2_SOURCE: | |
1169 | + case ARIZONA_AIF1TX1MIX_INPUT_2_VOLUME: | |
1170 | + case ARIZONA_AIF1TX1MIX_INPUT_3_SOURCE: | |
1171 | + case ARIZONA_AIF1TX1MIX_INPUT_3_VOLUME: | |
1172 | + case ARIZONA_AIF1TX1MIX_INPUT_4_SOURCE: | |
1173 | + case ARIZONA_AIF1TX1MIX_INPUT_4_VOLUME: | |
1174 | + case ARIZONA_AIF1TX2MIX_INPUT_1_SOURCE: | |
1175 | + case ARIZONA_AIF1TX2MIX_INPUT_1_VOLUME: | |
1176 | + case ARIZONA_AIF1TX2MIX_INPUT_2_SOURCE: | |
1177 | + case ARIZONA_AIF1TX2MIX_INPUT_2_VOLUME: | |
1178 | + case ARIZONA_AIF1TX2MIX_INPUT_3_SOURCE: | |
1179 | + case ARIZONA_AIF1TX2MIX_INPUT_3_VOLUME: | |
1180 | + case ARIZONA_AIF1TX2MIX_INPUT_4_SOURCE: | |
1181 | + case ARIZONA_AIF1TX2MIX_INPUT_4_VOLUME: | |
1182 | + case ARIZONA_AIF1TX3MIX_INPUT_1_SOURCE: | |
1183 | + case ARIZONA_AIF1TX3MIX_INPUT_1_VOLUME: | |
1184 | + case ARIZONA_AIF1TX3MIX_INPUT_2_SOURCE: | |
1185 | + case ARIZONA_AIF1TX3MIX_INPUT_2_VOLUME: | |
1186 | + case ARIZONA_AIF1TX3MIX_INPUT_3_SOURCE: | |
1187 | + case ARIZONA_AIF1TX3MIX_INPUT_3_VOLUME: | |
1188 | + case ARIZONA_AIF1TX3MIX_INPUT_4_SOURCE: | |
1189 | + case ARIZONA_AIF1TX3MIX_INPUT_4_VOLUME: | |
1190 | + case ARIZONA_AIF1TX4MIX_INPUT_1_SOURCE: | |
1191 | + case ARIZONA_AIF1TX4MIX_INPUT_1_VOLUME: | |
1192 | + case ARIZONA_AIF1TX4MIX_INPUT_2_SOURCE: | |
1193 | + case ARIZONA_AIF1TX4MIX_INPUT_2_VOLUME: | |
1194 | + case ARIZONA_AIF1TX4MIX_INPUT_3_SOURCE: | |
1195 | + case ARIZONA_AIF1TX4MIX_INPUT_3_VOLUME: | |
1196 | + case ARIZONA_AIF1TX4MIX_INPUT_4_SOURCE: | |
1197 | + case ARIZONA_AIF1TX4MIX_INPUT_4_VOLUME: | |
1198 | + case ARIZONA_AIF1TX5MIX_INPUT_1_SOURCE: | |
1199 | + case ARIZONA_AIF1TX5MIX_INPUT_1_VOLUME: | |
1200 | + case ARIZONA_AIF1TX5MIX_INPUT_2_SOURCE: | |
1201 | + case ARIZONA_AIF1TX5MIX_INPUT_2_VOLUME: | |
1202 | + case ARIZONA_AIF1TX5MIX_INPUT_3_SOURCE: | |
1203 | + case ARIZONA_AIF1TX5MIX_INPUT_3_VOLUME: | |
1204 | + case ARIZONA_AIF1TX5MIX_INPUT_4_SOURCE: | |
1205 | + case ARIZONA_AIF1TX5MIX_INPUT_4_VOLUME: | |
1206 | + case ARIZONA_AIF1TX6MIX_INPUT_1_SOURCE: | |
1207 | + case ARIZONA_AIF1TX6MIX_INPUT_1_VOLUME: | |
1208 | + case ARIZONA_AIF1TX6MIX_INPUT_2_SOURCE: | |
1209 | + case ARIZONA_AIF1TX6MIX_INPUT_2_VOLUME: | |
1210 | + case ARIZONA_AIF1TX6MIX_INPUT_3_SOURCE: | |
1211 | + case ARIZONA_AIF1TX6MIX_INPUT_3_VOLUME: | |
1212 | + case ARIZONA_AIF1TX6MIX_INPUT_4_SOURCE: | |
1213 | + case ARIZONA_AIF1TX6MIX_INPUT_4_VOLUME: | |
1214 | + case ARIZONA_AIF2TX1MIX_INPUT_1_SOURCE: | |
1215 | + case ARIZONA_AIF2TX1MIX_INPUT_1_VOLUME: | |
1216 | + case ARIZONA_AIF2TX1MIX_INPUT_2_SOURCE: | |
1217 | + case ARIZONA_AIF2TX1MIX_INPUT_2_VOLUME: | |
1218 | + case ARIZONA_AIF2TX1MIX_INPUT_3_SOURCE: | |
1219 | + case ARIZONA_AIF2TX1MIX_INPUT_3_VOLUME: | |
1220 | + case ARIZONA_AIF2TX1MIX_INPUT_4_SOURCE: | |
1221 | + case ARIZONA_AIF2TX1MIX_INPUT_4_VOLUME: | |
1222 | + case ARIZONA_AIF2TX2MIX_INPUT_1_SOURCE: | |
1223 | + case ARIZONA_AIF2TX2MIX_INPUT_1_VOLUME: | |
1224 | + case ARIZONA_AIF2TX2MIX_INPUT_2_SOURCE: | |
1225 | + case ARIZONA_AIF2TX2MIX_INPUT_2_VOLUME: | |
1226 | + case ARIZONA_AIF2TX2MIX_INPUT_3_SOURCE: | |
1227 | + case ARIZONA_AIF2TX2MIX_INPUT_3_VOLUME: | |
1228 | + case ARIZONA_AIF2TX2MIX_INPUT_4_SOURCE: | |
1229 | + case ARIZONA_AIF2TX2MIX_INPUT_4_VOLUME: | |
1230 | + case ARIZONA_AIF2TX3MIX_INPUT_1_SOURCE: | |
1231 | + case ARIZONA_AIF2TX3MIX_INPUT_1_VOLUME: | |
1232 | + case ARIZONA_AIF2TX3MIX_INPUT_2_SOURCE: | |
1233 | + case ARIZONA_AIF2TX3MIX_INPUT_2_VOLUME: | |
1234 | + case ARIZONA_AIF2TX3MIX_INPUT_3_SOURCE: | |
1235 | + case ARIZONA_AIF2TX3MIX_INPUT_3_VOLUME: | |
1236 | + case ARIZONA_AIF2TX3MIX_INPUT_4_SOURCE: | |
1237 | + case ARIZONA_AIF2TX3MIX_INPUT_4_VOLUME: | |
1238 | + case ARIZONA_AIF2TX4MIX_INPUT_1_SOURCE: | |
1239 | + case ARIZONA_AIF2TX4MIX_INPUT_1_VOLUME: | |
1240 | + case ARIZONA_AIF2TX4MIX_INPUT_2_SOURCE: | |
1241 | + case ARIZONA_AIF2TX4MIX_INPUT_2_VOLUME: | |
1242 | + case ARIZONA_AIF2TX4MIX_INPUT_3_SOURCE: | |
1243 | + case ARIZONA_AIF2TX4MIX_INPUT_3_VOLUME: | |
1244 | + case ARIZONA_AIF2TX4MIX_INPUT_4_SOURCE: | |
1245 | + case ARIZONA_AIF2TX4MIX_INPUT_4_VOLUME: | |
1246 | + case ARIZONA_AIF2TX5MIX_INPUT_1_SOURCE: | |
1247 | + case ARIZONA_AIF2TX5MIX_INPUT_1_VOLUME: | |
1248 | + case ARIZONA_AIF2TX5MIX_INPUT_2_SOURCE: | |
1249 | + case ARIZONA_AIF2TX5MIX_INPUT_2_VOLUME: | |
1250 | + case ARIZONA_AIF2TX5MIX_INPUT_3_SOURCE: | |
1251 | + case ARIZONA_AIF2TX5MIX_INPUT_3_VOLUME: | |
1252 | + case ARIZONA_AIF2TX5MIX_INPUT_4_SOURCE: | |
1253 | + case ARIZONA_AIF2TX5MIX_INPUT_4_VOLUME: | |
1254 | + case ARIZONA_AIF2TX6MIX_INPUT_1_SOURCE: | |
1255 | + case ARIZONA_AIF2TX6MIX_INPUT_1_VOLUME: | |
1256 | + case ARIZONA_AIF2TX6MIX_INPUT_2_SOURCE: | |
1257 | + case ARIZONA_AIF2TX6MIX_INPUT_2_VOLUME: | |
1258 | + case ARIZONA_AIF2TX6MIX_INPUT_3_SOURCE: | |
1259 | + case ARIZONA_AIF2TX6MIX_INPUT_3_VOLUME: | |
1260 | + case ARIZONA_AIF2TX6MIX_INPUT_4_SOURCE: | |
1261 | + case ARIZONA_AIF2TX6MIX_INPUT_4_VOLUME: | |
1262 | + case ARIZONA_AIF3TX1MIX_INPUT_1_SOURCE: | |
1263 | + case ARIZONA_AIF3TX1MIX_INPUT_1_VOLUME: | |
1264 | + case ARIZONA_AIF3TX1MIX_INPUT_2_SOURCE: | |
1265 | + case ARIZONA_AIF3TX1MIX_INPUT_2_VOLUME: | |
1266 | + case ARIZONA_AIF3TX1MIX_INPUT_3_SOURCE: | |
1267 | + case ARIZONA_AIF3TX1MIX_INPUT_3_VOLUME: | |
1268 | + case ARIZONA_AIF3TX1MIX_INPUT_4_SOURCE: | |
1269 | + case ARIZONA_AIF3TX1MIX_INPUT_4_VOLUME: | |
1270 | + case ARIZONA_AIF3TX2MIX_INPUT_1_SOURCE: | |
1271 | + case ARIZONA_AIF3TX2MIX_INPUT_1_VOLUME: | |
1272 | + case ARIZONA_AIF3TX2MIX_INPUT_2_SOURCE: | |
1273 | + case ARIZONA_AIF3TX2MIX_INPUT_2_VOLUME: | |
1274 | + case ARIZONA_AIF3TX2MIX_INPUT_3_SOURCE: | |
1275 | + case ARIZONA_AIF3TX2MIX_INPUT_3_VOLUME: | |
1276 | + case ARIZONA_AIF3TX2MIX_INPUT_4_SOURCE: | |
1277 | + case ARIZONA_AIF3TX2MIX_INPUT_4_VOLUME: | |
1278 | + case ARIZONA_SLIMTX1MIX_INPUT_1_SOURCE: | |
1279 | + case ARIZONA_SLIMTX1MIX_INPUT_1_VOLUME: | |
1280 | + case ARIZONA_SLIMTX2MIX_INPUT_1_SOURCE: | |
1281 | + case ARIZONA_SLIMTX2MIX_INPUT_1_VOLUME: | |
1282 | + case ARIZONA_SLIMTX3MIX_INPUT_1_SOURCE: | |
1283 | + case ARIZONA_SLIMTX3MIX_INPUT_1_VOLUME: | |
1284 | + case ARIZONA_SLIMTX4MIX_INPUT_1_SOURCE: | |
1285 | + case ARIZONA_SLIMTX4MIX_INPUT_1_VOLUME: | |
1286 | + case ARIZONA_SLIMTX5MIX_INPUT_1_SOURCE: | |
1287 | + case ARIZONA_SLIMTX5MIX_INPUT_1_VOLUME: | |
1288 | + case ARIZONA_SLIMTX6MIX_INPUT_1_SOURCE: | |
1289 | + case ARIZONA_SLIMTX6MIX_INPUT_1_VOLUME: | |
1290 | + case ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE: | |
1291 | + case ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME: | |
1292 | + case ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE: | |
1293 | + case ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME: | |
1294 | + case ARIZONA_EQ1MIX_INPUT_1_SOURCE: | |
1295 | + case ARIZONA_EQ1MIX_INPUT_1_VOLUME: | |
1296 | + case ARIZONA_EQ2MIX_INPUT_1_SOURCE: | |
1297 | + case ARIZONA_EQ2MIX_INPUT_1_VOLUME: | |
1298 | + case ARIZONA_EQ3MIX_INPUT_1_SOURCE: | |
1299 | + case ARIZONA_EQ3MIX_INPUT_1_VOLUME: | |
1300 | + case ARIZONA_EQ4MIX_INPUT_1_SOURCE: | |
1301 | + case ARIZONA_EQ4MIX_INPUT_1_VOLUME: | |
1302 | + case ARIZONA_DRC1LMIX_INPUT_1_SOURCE: | |
1303 | + case ARIZONA_DRC1LMIX_INPUT_1_VOLUME: | |
1304 | + case ARIZONA_DRC1RMIX_INPUT_1_SOURCE: | |
1305 | + case ARIZONA_DRC1RMIX_INPUT_1_VOLUME: | |
1306 | + case ARIZONA_HPLP1MIX_INPUT_1_SOURCE: | |
1307 | + case ARIZONA_HPLP1MIX_INPUT_1_VOLUME: | |
1308 | + case ARIZONA_HPLP1MIX_INPUT_2_SOURCE: | |
1309 | + case ARIZONA_HPLP1MIX_INPUT_2_VOLUME: | |
1310 | + case ARIZONA_HPLP1MIX_INPUT_3_SOURCE: | |
1311 | + case ARIZONA_HPLP1MIX_INPUT_3_VOLUME: | |
1312 | + case ARIZONA_HPLP1MIX_INPUT_4_SOURCE: | |
1313 | + case ARIZONA_HPLP1MIX_INPUT_4_VOLUME: | |
1314 | + case ARIZONA_HPLP2MIX_INPUT_1_SOURCE: | |
1315 | + case ARIZONA_HPLP2MIX_INPUT_1_VOLUME: | |
1316 | + case ARIZONA_HPLP2MIX_INPUT_2_SOURCE: | |
1317 | + case ARIZONA_HPLP2MIX_INPUT_2_VOLUME: | |
1318 | + case ARIZONA_HPLP2MIX_INPUT_3_SOURCE: | |
1319 | + case ARIZONA_HPLP2MIX_INPUT_3_VOLUME: | |
1320 | + case ARIZONA_HPLP2MIX_INPUT_4_SOURCE: | |
1321 | + case ARIZONA_HPLP2MIX_INPUT_4_VOLUME: | |
1322 | + case ARIZONA_HPLP3MIX_INPUT_1_SOURCE: | |
1323 | + case ARIZONA_HPLP3MIX_INPUT_1_VOLUME: | |
1324 | + case ARIZONA_HPLP3MIX_INPUT_2_SOURCE: | |
1325 | + case ARIZONA_HPLP3MIX_INPUT_2_VOLUME: | |
1326 | + case ARIZONA_HPLP3MIX_INPUT_3_SOURCE: | |
1327 | + case ARIZONA_HPLP3MIX_INPUT_3_VOLUME: | |
1328 | + case ARIZONA_HPLP3MIX_INPUT_4_SOURCE: | |
1329 | + case ARIZONA_HPLP3MIX_INPUT_4_VOLUME: | |
1330 | + case ARIZONA_HPLP4MIX_INPUT_1_SOURCE: | |
1331 | + case ARIZONA_HPLP4MIX_INPUT_1_VOLUME: | |
1332 | + case ARIZONA_HPLP4MIX_INPUT_2_SOURCE: | |
1333 | + case ARIZONA_HPLP4MIX_INPUT_2_VOLUME: | |
1334 | + case ARIZONA_HPLP4MIX_INPUT_3_SOURCE: | |
1335 | + case ARIZONA_HPLP4MIX_INPUT_3_VOLUME: | |
1336 | + case ARIZONA_HPLP4MIX_INPUT_4_SOURCE: | |
1337 | + case ARIZONA_HPLP4MIX_INPUT_4_VOLUME: | |
1338 | + case ARIZONA_ASRC1LMIX_INPUT_1_SOURCE: | |
1339 | + case ARIZONA_ASRC1RMIX_INPUT_1_SOURCE: | |
1340 | + case ARIZONA_ASRC2LMIX_INPUT_1_SOURCE: | |
1341 | + case ARIZONA_ASRC2RMIX_INPUT_1_SOURCE: | |
1342 | + case ARIZONA_ISRC1DEC1MIX_INPUT_1_SOURCE: | |
1343 | + case ARIZONA_ISRC1DEC2MIX_INPUT_1_SOURCE: | |
1344 | + case ARIZONA_ISRC1DEC3MIX_INPUT_1_SOURCE: | |
1345 | + case ARIZONA_ISRC1DEC4MIX_INPUT_1_SOURCE: | |
1346 | + case ARIZONA_ISRC1INT1MIX_INPUT_1_SOURCE: | |
1347 | + case ARIZONA_ISRC1INT2MIX_INPUT_1_SOURCE: | |
1348 | + case ARIZONA_ISRC1INT3MIX_INPUT_1_SOURCE: | |
1349 | + case ARIZONA_ISRC1INT4MIX_INPUT_1_SOURCE: | |
1350 | + case ARIZONA_ISRC2DEC1MIX_INPUT_1_SOURCE: | |
1351 | + case ARIZONA_ISRC2DEC2MIX_INPUT_1_SOURCE: | |
1352 | + case ARIZONA_ISRC2INT1MIX_INPUT_1_SOURCE: | |
1353 | + case ARIZONA_ISRC2INT2MIX_INPUT_1_SOURCE: | |
1354 | + case ARIZONA_GPIO1_CTRL: | |
1355 | + case ARIZONA_GPIO2_CTRL: | |
1356 | + case ARIZONA_GPIO3_CTRL: | |
1357 | + case ARIZONA_GPIO4_CTRL: | |
1358 | + case ARIZONA_GPIO5_CTRL: | |
1359 | + case ARIZONA_IRQ_CTRL_1: | |
1360 | + case ARIZONA_GPIO_DEBOUNCE_CONFIG: | |
1361 | + case ARIZONA_GP_SWITCH_1: | |
1362 | + case ARIZONA_MISC_PAD_CTRL_1: | |
1363 | + case ARIZONA_MISC_PAD_CTRL_2: | |
1364 | + case ARIZONA_MISC_PAD_CTRL_3: | |
1365 | + case ARIZONA_MISC_PAD_CTRL_4: | |
1366 | + case ARIZONA_MISC_PAD_CTRL_5: | |
1367 | + case ARIZONA_MISC_PAD_CTRL_6: | |
1368 | + case ARIZONA_INTERRUPT_STATUS_1: | |
1369 | + case ARIZONA_INTERRUPT_STATUS_2: | |
1370 | + case ARIZONA_INTERRUPT_STATUS_3: | |
1371 | + case ARIZONA_INTERRUPT_STATUS_4: | |
1372 | + case ARIZONA_INTERRUPT_STATUS_5: | |
1373 | + case ARIZONA_INTERRUPT_STATUS_1_MASK: | |
1374 | + case ARIZONA_INTERRUPT_STATUS_2_MASK: | |
1375 | + case ARIZONA_INTERRUPT_STATUS_3_MASK: | |
1376 | + case ARIZONA_INTERRUPT_STATUS_4_MASK: | |
1377 | + case ARIZONA_INTERRUPT_STATUS_5_MASK: | |
1378 | + case ARIZONA_INTERRUPT_CONTROL: | |
1379 | + case ARIZONA_IRQ2_STATUS_1: | |
1380 | + case ARIZONA_IRQ2_STATUS_2: | |
1381 | + case ARIZONA_IRQ2_STATUS_3: | |
1382 | + case ARIZONA_IRQ2_STATUS_4: | |
1383 | + case ARIZONA_IRQ2_STATUS_5: | |
1384 | + case ARIZONA_IRQ2_STATUS_1_MASK: | |
1385 | + case ARIZONA_IRQ2_STATUS_2_MASK: | |
1386 | + case ARIZONA_IRQ2_STATUS_3_MASK: | |
1387 | + case ARIZONA_IRQ2_STATUS_4_MASK: | |
1388 | + case ARIZONA_IRQ2_STATUS_5_MASK: | |
1389 | + case ARIZONA_IRQ2_CONTROL: | |
1390 | + case ARIZONA_INTERRUPT_RAW_STATUS_2: | |
1391 | + case ARIZONA_INTERRUPT_RAW_STATUS_3: | |
1392 | + case ARIZONA_INTERRUPT_RAW_STATUS_4: | |
1393 | + case ARIZONA_INTERRUPT_RAW_STATUS_5: | |
1394 | + case ARIZONA_INTERRUPT_RAW_STATUS_6: | |
1395 | + case ARIZONA_INTERRUPT_RAW_STATUS_7: | |
1396 | + case ARIZONA_INTERRUPT_RAW_STATUS_8: | |
1397 | + case ARIZONA_IRQ_PIN_STATUS: | |
1398 | + case ARIZONA_AOD_WKUP_AND_TRIG: | |
1399 | + case ARIZONA_AOD_IRQ1: | |
1400 | + case ARIZONA_AOD_IRQ2: | |
1401 | + case ARIZONA_AOD_IRQ_MASK_IRQ1: | |
1402 | + case ARIZONA_AOD_IRQ_MASK_IRQ2: | |
1403 | + case ARIZONA_AOD_IRQ_RAW_STATUS: | |
1404 | + case ARIZONA_JACK_DETECT_DEBOUNCE: | |
1405 | + case ARIZONA_FX_CTRL1: | |
1406 | + case ARIZONA_FX_CTRL2: | |
1407 | + case ARIZONA_EQ1_1: | |
1408 | + case ARIZONA_EQ1_2: | |
1409 | + case ARIZONA_EQ1_3: | |
1410 | + case ARIZONA_EQ1_4: | |
1411 | + case ARIZONA_EQ1_5: | |
1412 | + case ARIZONA_EQ1_6: | |
1413 | + case ARIZONA_EQ1_7: | |
1414 | + case ARIZONA_EQ1_8: | |
1415 | + case ARIZONA_EQ1_9: | |
1416 | + case ARIZONA_EQ1_10: | |
1417 | + case ARIZONA_EQ1_11: | |
1418 | + case ARIZONA_EQ1_12: | |
1419 | + case ARIZONA_EQ1_13: | |
1420 | + case ARIZONA_EQ1_14: | |
1421 | + case ARIZONA_EQ1_15: | |
1422 | + case ARIZONA_EQ1_16: | |
1423 | + case ARIZONA_EQ1_17: | |
1424 | + case ARIZONA_EQ1_18: | |
1425 | + case ARIZONA_EQ1_19: | |
1426 | + case ARIZONA_EQ1_20: | |
1427 | + case ARIZONA_EQ1_21: | |
1428 | + case ARIZONA_EQ2_1: | |
1429 | + case ARIZONA_EQ2_2: | |
1430 | + case ARIZONA_EQ2_3: | |
1431 | + case ARIZONA_EQ2_4: | |
1432 | + case ARIZONA_EQ2_5: | |
1433 | + case ARIZONA_EQ2_6: | |
1434 | + case ARIZONA_EQ2_7: | |
1435 | + case ARIZONA_EQ2_8: | |
1436 | + case ARIZONA_EQ2_9: | |
1437 | + case ARIZONA_EQ2_10: | |
1438 | + case ARIZONA_EQ2_11: | |
1439 | + case ARIZONA_EQ2_12: | |
1440 | + case ARIZONA_EQ2_13: | |
1441 | + case ARIZONA_EQ2_14: | |
1442 | + case ARIZONA_EQ2_15: | |
1443 | + case ARIZONA_EQ2_16: | |
1444 | + case ARIZONA_EQ2_17: | |
1445 | + case ARIZONA_EQ2_18: | |
1446 | + case ARIZONA_EQ2_19: | |
1447 | + case ARIZONA_EQ2_20: | |
1448 | + case ARIZONA_EQ2_21: | |
1449 | + case ARIZONA_EQ3_1: | |
1450 | + case ARIZONA_EQ3_2: | |
1451 | + case ARIZONA_EQ3_3: | |
1452 | + case ARIZONA_EQ3_4: | |
1453 | + case ARIZONA_EQ3_5: | |
1454 | + case ARIZONA_EQ3_6: | |
1455 | + case ARIZONA_EQ3_7: | |
1456 | + case ARIZONA_EQ3_8: | |
1457 | + case ARIZONA_EQ3_9: | |
1458 | + case ARIZONA_EQ3_10: | |
1459 | + case ARIZONA_EQ3_11: | |
1460 | + case ARIZONA_EQ3_12: | |
1461 | + case ARIZONA_EQ3_13: | |
1462 | + case ARIZONA_EQ3_14: | |
1463 | + case ARIZONA_EQ3_15: | |
1464 | + case ARIZONA_EQ3_16: | |
1465 | + case ARIZONA_EQ3_17: | |
1466 | + case ARIZONA_EQ3_18: | |
1467 | + case ARIZONA_EQ3_19: | |
1468 | + case ARIZONA_EQ3_20: | |
1469 | + case ARIZONA_EQ3_21: | |
1470 | + case ARIZONA_EQ4_1: | |
1471 | + case ARIZONA_EQ4_2: | |
1472 | + case ARIZONA_EQ4_3: | |
1473 | + case ARIZONA_EQ4_4: | |
1474 | + case ARIZONA_EQ4_5: | |
1475 | + case ARIZONA_EQ4_6: | |
1476 | + case ARIZONA_EQ4_7: | |
1477 | + case ARIZONA_EQ4_8: | |
1478 | + case ARIZONA_EQ4_9: | |
1479 | + case ARIZONA_EQ4_10: | |
1480 | + case ARIZONA_EQ4_11: | |
1481 | + case ARIZONA_EQ4_12: | |
1482 | + case ARIZONA_EQ4_13: | |
1483 | + case ARIZONA_EQ4_14: | |
1484 | + case ARIZONA_EQ4_15: | |
1485 | + case ARIZONA_EQ4_16: | |
1486 | + case ARIZONA_EQ4_17: | |
1487 | + case ARIZONA_EQ4_18: | |
1488 | + case ARIZONA_EQ4_19: | |
1489 | + case ARIZONA_EQ4_20: | |
1490 | + case ARIZONA_EQ4_21: | |
1491 | + case ARIZONA_DRC1_CTRL1: | |
1492 | + case ARIZONA_DRC1_CTRL2: | |
1493 | + case ARIZONA_DRC1_CTRL3: | |
1494 | + case ARIZONA_DRC1_CTRL4: | |
1495 | + case ARIZONA_DRC1_CTRL5: | |
1496 | + case ARIZONA_HPLPF1_1: | |
1497 | + case ARIZONA_HPLPF1_2: | |
1498 | + case ARIZONA_HPLPF2_1: | |
1499 | + case ARIZONA_HPLPF2_2: | |
1500 | + case ARIZONA_HPLPF3_1: | |
1501 | + case ARIZONA_HPLPF3_2: | |
1502 | + case ARIZONA_HPLPF4_1: | |
1503 | + case ARIZONA_HPLPF4_2: | |
1504 | + case ARIZONA_ASRC_ENABLE: | |
1505 | + case ARIZONA_ASRC_STATUS: | |
1506 | + case ARIZONA_ASRC_RATE1: | |
1507 | + case ARIZONA_ASRC_RATE2: | |
1508 | + case ARIZONA_ISRC_1_CTRL_1: | |
1509 | + case ARIZONA_ISRC_1_CTRL_2: | |
1510 | + case ARIZONA_ISRC_1_CTRL_3: | |
1511 | + case ARIZONA_ISRC_2_CTRL_1: | |
1512 | + case ARIZONA_ISRC_2_CTRL_2: | |
1513 | + case ARIZONA_ISRC_2_CTRL_3: | |
1514 | + case ARIZONA_FRF_COEFF_1: | |
1515 | + case ARIZONA_FRF_COEFF_2: | |
1516 | + case ARIZONA_FRF_COEFF_3: | |
1517 | + case ARIZONA_FRF_COEFF_4: | |
1518 | + case ARIZONA_V2_DAC_COMP_1: | |
1519 | + case ARIZONA_V2_DAC_COMP_2: | |
1520 | + return true; | |
1521 | + default: | |
1522 | + return false; | |
1523 | + } | |
1524 | +} | |
1525 | + | |
1526 | +static bool wm8998_volatile_register(struct device *dev, unsigned int reg) | |
1527 | +{ | |
1528 | + switch (reg) { | |
1529 | + case ARIZONA_SOFTWARE_RESET: | |
1530 | + case ARIZONA_DEVICE_REVISION: | |
1531 | + case ARIZONA_WRITE_SEQUENCER_CTRL_0: | |
1532 | + case ARIZONA_WRITE_SEQUENCER_CTRL_1: | |
1533 | + case ARIZONA_WRITE_SEQUENCER_CTRL_2: | |
1534 | + case ARIZONA_HAPTICS_STATUS: | |
1535 | + case ARIZONA_SAMPLE_RATE_1_STATUS: | |
1536 | + case ARIZONA_SAMPLE_RATE_2_STATUS: | |
1537 | + case ARIZONA_SAMPLE_RATE_3_STATUS: | |
1538 | + case ARIZONA_ASYNC_SAMPLE_RATE_1_STATUS: | |
1539 | + case ARIZONA_ASYNC_SAMPLE_RATE_2_STATUS: | |
1540 | + case ARIZONA_MIC_DETECT_3: | |
1541 | + case ARIZONA_MIC_DETECT_4: | |
1542 | + case ARIZONA_HEADPHONE_DETECT_2: | |
1543 | + case ARIZONA_INPUT_ENABLES_STATUS: | |
1544 | + case ARIZONA_OUTPUT_STATUS_1: | |
1545 | + case ARIZONA_RAW_OUTPUT_STATUS_1: | |
1546 | + case ARIZONA_SLIMBUS_RX_PORT_STATUS: | |
1547 | + case ARIZONA_SLIMBUS_TX_PORT_STATUS: | |
1548 | + case ARIZONA_INTERRUPT_STATUS_1: | |
1549 | + case ARIZONA_INTERRUPT_STATUS_2: | |
1550 | + case ARIZONA_INTERRUPT_STATUS_3: | |
1551 | + case ARIZONA_INTERRUPT_STATUS_4: | |
1552 | + case ARIZONA_INTERRUPT_STATUS_5: | |
1553 | + case ARIZONA_IRQ2_STATUS_1: | |
1554 | + case ARIZONA_IRQ2_STATUS_2: | |
1555 | + case ARIZONA_IRQ2_STATUS_3: | |
1556 | + case ARIZONA_IRQ2_STATUS_4: | |
1557 | + case ARIZONA_IRQ2_STATUS_5: | |
1558 | + case ARIZONA_INTERRUPT_RAW_STATUS_2: | |
1559 | + case ARIZONA_INTERRUPT_RAW_STATUS_3: | |
1560 | + case ARIZONA_INTERRUPT_RAW_STATUS_4: | |
1561 | + case ARIZONA_INTERRUPT_RAW_STATUS_5: | |
1562 | + case ARIZONA_INTERRUPT_RAW_STATUS_6: | |
1563 | + case ARIZONA_INTERRUPT_RAW_STATUS_7: | |
1564 | + case ARIZONA_INTERRUPT_RAW_STATUS_8: | |
1565 | + case ARIZONA_IRQ_PIN_STATUS: | |
1566 | + case ARIZONA_AOD_WKUP_AND_TRIG: | |
1567 | + case ARIZONA_AOD_IRQ1: | |
1568 | + case ARIZONA_AOD_IRQ2: | |
1569 | + case ARIZONA_AOD_IRQ_RAW_STATUS: | |
1570 | + case ARIZONA_FX_CTRL2: | |
1571 | + case ARIZONA_ASRC_STATUS: | |
1572 | + return true; | |
1573 | + default: | |
1574 | + return false; | |
1575 | + } | |
1576 | +} | |
1577 | + | |
1578 | +#define WM8998_MAX_REGISTER 0x31ff | |
1579 | + | |
1580 | +const struct regmap_config wm8998_i2c_regmap = { | |
1581 | + .reg_bits = 32, | |
1582 | + .val_bits = 16, | |
1583 | + | |
1584 | + .max_register = WM8998_MAX_REGISTER, | |
1585 | + .readable_reg = wm8998_readable_register, | |
1586 | + .volatile_reg = wm8998_volatile_register, | |
1587 | + | |
1588 | + .cache_type = REGCACHE_RBTREE, | |
1589 | + .reg_defaults = wm8998_reg_default, | |
1590 | + .num_reg_defaults = ARRAY_SIZE(wm8998_reg_default), | |
1591 | +}; | |
1592 | +EXPORT_SYMBOL_GPL(wm8998_i2c_regmap); |
include/linux/mfd/arizona/core.h
... | ... | @@ -25,6 +25,8 @@ |
25 | 25 | WM5110 = 2, |
26 | 26 | WM8997 = 3, |
27 | 27 | WM8280 = 4, |
28 | + WM8998 = 5, | |
29 | + WM1814 = 6, | |
28 | 30 | }; |
29 | 31 | |
30 | 32 | #define ARIZONA_IRQ_GP1 0 |
... | ... | @@ -165,6 +167,7 @@ |
165 | 167 | |
166 | 168 | int wm5110_patch(struct arizona *arizona); |
167 | 169 | int wm8997_patch(struct arizona *arizona); |
170 | +int wm8998_patch(struct arizona *arizona); | |
168 | 171 | |
169 | 172 | extern int arizona_of_get_named_gpio(struct arizona *arizona, const char *prop, |
170 | 173 | bool mandatory); |
include/linux/mfd/arizona/pdata.h
... | ... | @@ -162,6 +162,8 @@ |
162 | 162 | /** |
163 | 163 | * Mode of input structures |
164 | 164 | * One of the ARIZONA_INMODE_xxx values |
165 | + * wm5102/wm5110/wm8280/wm8997: [0]=IN1 [1]=IN2 [2]=IN3 [3]=IN4 | |
166 | + * wm8998: [0]=IN1A [1]=IN2A [2]=IN1B [3]=IN2B | |
165 | 167 | */ |
166 | 168 | int inmode[ARIZONA_MAX_INPUT]; |
167 | 169 |
include/linux/mfd/arizona/registers.h
... | ... | @@ -139,6 +139,7 @@ |
139 | 139 | #define ARIZONA_MIC_DETECT_LEVEL_2 0x2A7 |
140 | 140 | #define ARIZONA_MIC_DETECT_LEVEL_3 0x2A8 |
141 | 141 | #define ARIZONA_MIC_DETECT_LEVEL_4 0x2A9 |
142 | +#define ARIZONA_MIC_DETECT_4 0x2AB | |
142 | 143 | #define ARIZONA_MIC_NOISE_MIX_CONTROL_1 0x2C3 |
143 | 144 | #define ARIZONA_ISOLATION_CONTROL 0x2CB |
144 | 145 | #define ARIZONA_JACK_DETECT_ANALOGUE 0x2D3 |
145 | 146 | |
146 | 147 | |
147 | 148 | |
... | ... | @@ -225,14 +226,18 @@ |
225 | 226 | #define ARIZONA_DAC_VOLUME_LIMIT_6R 0x43E |
226 | 227 | #define ARIZONA_NOISE_GATE_SELECT_6R 0x43F |
227 | 228 | #define ARIZONA_DRE_ENABLE 0x440 |
229 | +#define ARIZONA_DRE_CONTROL_1 0x441 | |
228 | 230 | #define ARIZONA_DRE_CONTROL_2 0x442 |
229 | 231 | #define ARIZONA_DRE_CONTROL_3 0x443 |
232 | +#define ARIZONA_EDRE_ENABLE 0x448 | |
230 | 233 | #define ARIZONA_DAC_AEC_CONTROL_1 0x450 |
234 | +#define ARIZONA_DAC_AEC_CONTROL_2 0x451 | |
231 | 235 | #define ARIZONA_NOISE_GATE_CONTROL 0x458 |
232 | 236 | #define ARIZONA_PDM_SPK1_CTRL_1 0x490 |
233 | 237 | #define ARIZONA_PDM_SPK1_CTRL_2 0x491 |
234 | 238 | #define ARIZONA_PDM_SPK2_CTRL_1 0x492 |
235 | 239 | #define ARIZONA_PDM_SPK2_CTRL_2 0x493 |
240 | +#define ARIZONA_HP_TEST_CTRL_13 0x49A | |
236 | 241 | #define ARIZONA_HP1_SHORT_CIRCUIT_CTRL 0x4A0 |
237 | 242 | #define ARIZONA_HP2_SHORT_CIRCUIT_CTRL 0x4A1 |
238 | 243 | #define ARIZONA_HP3_SHORT_CIRCUIT_CTRL 0x4A2 |
... | ... | @@ -310,6 +315,10 @@ |
310 | 315 | #define ARIZONA_AIF3_TX_ENABLES 0x599 |
311 | 316 | #define ARIZONA_AIF3_RX_ENABLES 0x59A |
312 | 317 | #define ARIZONA_AIF3_FORCE_WRITE 0x59B |
318 | +#define ARIZONA_SPD1_TX_CONTROL 0x5C2 | |
319 | +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_1 0x5C3 | |
320 | +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_2 0x5C4 | |
321 | +#define ARIZONA_SPD1_TX_CHANNEL_STATUS_3 0x5C5 | |
313 | 322 | #define ARIZONA_SLIMBUS_FRAMER_REF_GEAR 0x5E3 |
314 | 323 | #define ARIZONA_SLIMBUS_RATES_1 0x5E5 |
315 | 324 | #define ARIZONA_SLIMBUS_RATES_2 0x5E6 |
... | ... | @@ -643,6 +652,10 @@ |
643 | 652 | #define ARIZONA_SLIMTX8MIX_INPUT_3_VOLUME 0x7FD |
644 | 653 | #define ARIZONA_SLIMTX8MIX_INPUT_4_SOURCE 0x7FE |
645 | 654 | #define ARIZONA_SLIMTX8MIX_INPUT_4_VOLUME 0x7FF |
655 | +#define ARIZONA_SPDIFTX1MIX_INPUT_1_SOURCE 0x800 | |
656 | +#define ARIZONA_SPDIFTX1MIX_INPUT_1_VOLUME 0x801 | |
657 | +#define ARIZONA_SPDIFTX2MIX_INPUT_1_SOURCE 0x808 | |
658 | +#define ARIZONA_SPDIFTX2MIX_INPUT_1_VOLUME 0x809 | |
646 | 659 | #define ARIZONA_EQ1MIX_INPUT_1_SOURCE 0x880 |
647 | 660 | #define ARIZONA_EQ1MIX_INPUT_1_VOLUME 0x881 |
648 | 661 | #define ARIZONA_EQ1MIX_INPUT_2_SOURCE 0x882 |
... | ... | @@ -868,6 +881,7 @@ |
868 | 881 | #define ARIZONA_GPIO5_CTRL 0xC04 |
869 | 882 | #define ARIZONA_IRQ_CTRL_1 0xC0F |
870 | 883 | #define ARIZONA_GPIO_DEBOUNCE_CONFIG 0xC10 |
884 | +#define ARIZONA_GP_SWITCH_1 0xC18 | |
871 | 885 | #define ARIZONA_MISC_PAD_CTRL_1 0xC20 |
872 | 886 | #define ARIZONA_MISC_PAD_CTRL_2 0xC21 |
873 | 887 | #define ARIZONA_MISC_PAD_CTRL_3 0xC22 |
874 | 888 | |
... | ... | @@ -1169,7 +1183,14 @@ |
1169 | 1183 | #define ARIZONA_DSP4_SCRATCH_1 0x1441 |
1170 | 1184 | #define ARIZONA_DSP4_SCRATCH_2 0x1442 |
1171 | 1185 | #define ARIZONA_DSP4_SCRATCH_3 0x1443 |
1186 | +#define ARIZONA_FRF_COEFF_1 0x1700 | |
1187 | +#define ARIZONA_FRF_COEFF_2 0x1701 | |
1188 | +#define ARIZONA_FRF_COEFF_3 0x1702 | |
1189 | +#define ARIZONA_FRF_COEFF_4 0x1703 | |
1190 | +#define ARIZONA_V2_DAC_COMP_1 0x1704 | |
1191 | +#define ARIZONA_V2_DAC_COMP_2 0x1705 | |
1172 | 1192 | |
1193 | + | |
1173 | 1194 | /* |
1174 | 1195 | * Field Definitions. |
1175 | 1196 | */ |
... | ... | @@ -2325,6 +2346,9 @@ |
2325 | 2346 | #define ARIZONA_HP_IDAC_STEER_MASK 0x0004 /* HP_IDAC_STEER */ |
2326 | 2347 | #define ARIZONA_HP_IDAC_STEER_SHIFT 2 /* HP_IDAC_STEER */ |
2327 | 2348 | #define ARIZONA_HP_IDAC_STEER_WIDTH 1 /* HP_IDAC_STEER */ |
2349 | +#define WM8998_HP_RATE_MASK 0x0006 /* HP_RATE - [2:1] */ | |
2350 | +#define WM8998_HP_RATE_SHIFT 1 /* HP_RATE - [2:1] */ | |
2351 | +#define WM8998_HP_RATE_WIDTH 2 /* HP_RATE - [2:1] */ | |
2328 | 2352 | #define ARIZONA_HP_RATE 0x0002 /* HP_RATE */ |
2329 | 2353 | #define ARIZONA_HP_RATE_MASK 0x0002 /* HP_RATE */ |
2330 | 2354 | #define ARIZONA_HP_RATE_SHIFT 1 /* HP_RATE */ |
... | ... | @@ -2413,6 +2437,16 @@ |
2413 | 2437 | #define ARIZONA_MICD_STS_WIDTH 1 /* MICD_STS */ |
2414 | 2438 | |
2415 | 2439 | /* |
2440 | + * R683 (0x2AB) - Mic Detect 4 | |
2441 | + */ | |
2442 | +#define ARIZONA_MICDET_ADCVAL_DIFF_MASK 0xFF00 /* MICDET_ADCVAL_DIFF - [15:8] */ | |
2443 | +#define ARIZONA_MICDET_ADCVAL_DIFF_SHIFT 8 /* MICDET_ADCVAL_DIFF - [15:8] */ | |
2444 | +#define ARIZONA_MICDET_ADCVAL_DIFF_WIDTH 8 /* MICDET_ADCVAL_DIFF - [15:8] */ | |
2445 | +#define ARIZONA_MICDET_ADCVAL_MASK 0x007F /* MICDET_ADCVAL - [15:8] */ | |
2446 | +#define ARIZONA_MICDET_ADCVAL_SHIFT 0 /* MICDET_ADCVAL - [15:8] */ | |
2447 | +#define ARIZONA_MICDET_ADCVAL_WIDTH 7 /* MICDET_ADCVAL - [15:8] */ | |
2448 | + | |
2449 | +/* | |
2416 | 2450 | * R707 (0x2C3) - Mic noise mix control 1 |
2417 | 2451 | */ |
2418 | 2452 | #define ARIZONA_MICMUTE_RATE_MASK 0x7800 /* MICMUTE_RATE - [14:11] */ |
... | ... | @@ -2528,6 +2562,12 @@ |
2528 | 2562 | /* |
2529 | 2563 | * R785 (0x311) - ADC Digital Volume 1L |
2530 | 2564 | */ |
2565 | +#define ARIZONA_IN1L_SRC_MASK 0x4000 /* IN1L_SRC - [14] */ | |
2566 | +#define ARIZONA_IN1L_SRC_SHIFT 14 /* IN1L_SRC - [14] */ | |
2567 | +#define ARIZONA_IN1L_SRC_WIDTH 1 /* IN1L_SRC - [14] */ | |
2568 | +#define ARIZONA_IN1L_SRC_SE_MASK 0x2000 /* IN1L_SRC - [13] */ | |
2569 | +#define ARIZONA_IN1L_SRC_SE_SHIFT 13 /* IN1L_SRC - [13] */ | |
2570 | +#define ARIZONA_IN1L_SRC_SE_WIDTH 1 /* IN1L_SRC - [13] */ | |
2531 | 2571 | #define ARIZONA_IN_VU 0x0200 /* IN_VU */ |
2532 | 2572 | #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ |
2533 | 2573 | #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ |
... | ... | @@ -2560,6 +2600,12 @@ |
2560 | 2600 | /* |
2561 | 2601 | * R789 (0x315) - ADC Digital Volume 1R |
2562 | 2602 | */ |
2603 | +#define ARIZONA_IN1R_SRC_MASK 0x4000 /* IN1R_SRC - [14] */ | |
2604 | +#define ARIZONA_IN1R_SRC_SHIFT 14 /* IN1R_SRC - [14] */ | |
2605 | +#define ARIZONA_IN1R_SRC_WIDTH 1 /* IN1R_SRC - [14] */ | |
2606 | +#define ARIZONA_IN1R_SRC_SE_MASK 0x2000 /* IN1R_SRC - [13] */ | |
2607 | +#define ARIZONA_IN1R_SRC_SE_SHIFT 13 /* IN1R_SRC - [13] */ | |
2608 | +#define ARIZONA_IN1R_SRC_SE_WIDTH 1 /* IN1R_SRC - [13] */ | |
2563 | 2609 | #define ARIZONA_IN_VU 0x0200 /* IN_VU */ |
2564 | 2610 | #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ |
2565 | 2611 | #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ |
... | ... | @@ -2604,6 +2650,12 @@ |
2604 | 2650 | /* |
2605 | 2651 | * R793 (0x319) - ADC Digital Volume 2L |
2606 | 2652 | */ |
2653 | +#define ARIZONA_IN2L_SRC_MASK 0x4000 /* IN2L_SRC - [14] */ | |
2654 | +#define ARIZONA_IN2L_SRC_SHIFT 14 /* IN2L_SRC - [14] */ | |
2655 | +#define ARIZONA_IN2L_SRC_WIDTH 1 /* IN2L_SRC - [14] */ | |
2656 | +#define ARIZONA_IN2L_SRC_SE_MASK 0x2000 /* IN2L_SRC - [13] */ | |
2657 | +#define ARIZONA_IN2L_SRC_SE_SHIFT 13 /* IN2L_SRC - [13] */ | |
2658 | +#define ARIZONA_IN2L_SRC_SE_WIDTH 1 /* IN2L_SRC - [13] */ | |
2607 | 2659 | #define ARIZONA_IN_VU 0x0200 /* IN_VU */ |
2608 | 2660 | #define ARIZONA_IN_VU_MASK 0x0200 /* IN_VU */ |
2609 | 2661 | #define ARIZONA_IN_VU_SHIFT 9 /* IN_VU */ |
2610 | 2662 | |
... | ... | @@ -3412,11 +3464,45 @@ |
3412 | 3464 | #define ARIZONA_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ |
3413 | 3465 | |
3414 | 3466 | /* |
3467 | + * R1088 (0x440) - DRE Enable (WM8998) | |
3468 | + */ | |
3469 | +#define WM8998_DRE3L_ENA 0x0020 /* DRE3L_ENA */ | |
3470 | +#define WM8998_DRE3L_ENA_MASK 0x0020 /* DRE3L_ENA */ | |
3471 | +#define WM8998_DRE3L_ENA_SHIFT 5 /* DRE3L_ENA */ | |
3472 | +#define WM8998_DRE3L_ENA_WIDTH 1 /* DRE3L_ENA */ | |
3473 | +#define WM8998_DRE2L_ENA 0x0008 /* DRE2L_ENA */ | |
3474 | +#define WM8998_DRE2L_ENA_MASK 0x0008 /* DRE2L_ENA */ | |
3475 | +#define WM8998_DRE2L_ENA_SHIFT 3 /* DRE2L_ENA */ | |
3476 | +#define WM8998_DRE2L_ENA_WIDTH 1 /* DRE2L_ENA */ | |
3477 | +#define WM8998_DRE2R_ENA 0x0004 /* DRE2R_ENA */ | |
3478 | +#define WM8998_DRE2R_ENA_MASK 0x0004 /* DRE2R_ENA */ | |
3479 | +#define WM8998_DRE2R_ENA_SHIFT 2 /* DRE2R_ENA */ | |
3480 | +#define WM8998_DRE2R_ENA_WIDTH 1 /* DRE2R_ENA */ | |
3481 | +#define WM8998_DRE1L_ENA 0x0002 /* DRE1L_ENA */ | |
3482 | +#define WM8998_DRE1L_ENA_MASK 0x0002 /* DRE1L_ENA */ | |
3483 | +#define WM8998_DRE1L_ENA_SHIFT 1 /* DRE1L_ENA */ | |
3484 | +#define WM8998_DRE1L_ENA_WIDTH 1 /* DRE1L_ENA */ | |
3485 | +#define WM8998_DRE1R_ENA 0x0001 /* DRE1R_ENA */ | |
3486 | +#define WM8998_DRE1R_ENA_MASK 0x0001 /* DRE1R_ENA */ | |
3487 | +#define WM8998_DRE1R_ENA_SHIFT 0 /* DRE1R_ENA */ | |
3488 | +#define WM8998_DRE1R_ENA_WIDTH 1 /* DRE1R_ENA */ | |
3489 | + | |
3490 | +/* | |
3491 | + * R1089 (0x441) - DRE Control 1 | |
3492 | + */ | |
3493 | +#define ARIZONA_DRE_ENV_TC_FAST_MASK 0x0F00 /* DRE_ENV_TC_FAST - [11:8] */ | |
3494 | +#define ARIZONA_DRE_ENV_TC_FAST_SHIFT 8 /* DRE_ENV_TC_FAST - [11:8] */ | |
3495 | +#define ARIZONA_DRE_ENV_TC_FAST_WIDTH 4 /* DRE_ENV_TC_FAST - [11:8] */ | |
3496 | + | |
3497 | +/* | |
3415 | 3498 | * R1090 (0x442) - DRE Control 2 |
3416 | 3499 | */ |
3417 | 3500 | #define ARIZONA_DRE_T_LOW_MASK 0x3F00 /* DRE_T_LOW - [13:8] */ |
3418 | 3501 | #define ARIZONA_DRE_T_LOW_SHIFT 8 /* DRE_T_LOW - [13:8] */ |
3419 | 3502 | #define ARIZONA_DRE_T_LOW_WIDTH 6 /* DRE_T_LOW - [13:8] */ |
3503 | +#define ARIZONA_DRE_ALOG_VOL_DELAY_MASK 0x000F /* DRE_ALOG_VOL_DELAY - [3:0] */ | |
3504 | +#define ARIZONA_DRE_ALOG_VOL_DELAY_SHIFT 0 /* DRE_ALOG_VOL_DELAY - [3:0] */ | |
3505 | +#define ARIZONA_DRE_ALOG_VOL_DELAY_WIDTH 4 /* DRE_ALOG_VOL_DELAY - [3:0] */ | |
3420 | 3506 | |
3421 | 3507 | /* |
3422 | 3508 | * R1091 (0x443) - DRE Control 3 |
... | ... | @@ -3428,6 +3514,49 @@ |
3428 | 3514 | #define ARIZONA_DRE_LOW_LEVEL_ABS_SHIFT 0 /* LOW_LEVEL_ABS - [3:0] */ |
3429 | 3515 | #define ARIZONA_DRE_LOW_LEVEL_ABS_WIDTH 4 /* LOW_LEVEL_ABS - [3:0] */ |
3430 | 3516 | |
3517 | +/* R486 (0x448) - EDRE_Enable | |
3518 | + */ | |
3519 | +#define ARIZONA_EDRE_OUT4L_THR2_ENA 0x0200 /* EDRE_OUT4L_THR2_ENA */ | |
3520 | +#define ARIZONA_EDRE_OUT4L_THR2_ENA_MASK 0x0200 /* EDRE_OUT4L_THR2_ENA */ | |
3521 | +#define ARIZONA_EDRE_OUT4L_THR2_ENA_SHIFT 9 /* EDRE_OUT4L_THR2_ENA */ | |
3522 | +#define ARIZONA_EDRE_OUT4L_THR2_ENA_WIDTH 1 /* EDRE_OUT4L_THR2_ENA */ | |
3523 | +#define ARIZONA_EDRE_OUT4R_THR2_ENA 0x0100 /* EDRE_OUT4R_THR2_ENA */ | |
3524 | +#define ARIZONA_EDRE_OUT4R_THR2_ENA_MASK 0x0100 /* EDRE_OUT4R_THR2_ENA */ | |
3525 | +#define ARIZONA_EDRE_OUT4R_THR2_ENA_SHIFT 8 /* EDRE_OUT4R_THR2_ENA */ | |
3526 | +#define ARIZONA_EDRE_OUT4R_THR2_ENA_WIDTH 1 /* EDRE_OUT4R_THR2_ENA */ | |
3527 | +#define ARIZONA_EDRE_OUT4L_THR1_ENA 0x0080 /* EDRE_OUT4L_THR1_ENA */ | |
3528 | +#define ARIZONA_EDRE_OUT4L_THR1_ENA_MASK 0x0080 /* EDRE_OUT4L_THR1_ENA */ | |
3529 | +#define ARIZONA_EDRE_OUT4L_THR1_ENA_SHIFT 7 /* EDRE_OUT4L_THR1_ENA */ | |
3530 | +#define ARIZONA_EDRE_OUT4L_THR1_ENA_WIDTH 1 /* EDRE_OUT4L_THR1_ENA */ | |
3531 | +#define ARIZONA_EDRE_OUT4R_THR1_ENA 0x0040 /* EDRE_OUT4R_THR1_ENA */ | |
3532 | +#define ARIZONA_EDRE_OUT4R_THR1_ENA_MASK 0x0040 /* EDRE_OUT4R_THR1_ENA */ | |
3533 | +#define ARIZONA_EDRE_OUT4R_THR1_ENA_SHIFT 6 /* EDRE_OUT4R_THR1_ENA */ | |
3534 | +#define ARIZONA_EDRE_OUT4R_THR1_ENA_WIDTH 1 /* EDRE_OUT4R_THR1_ENA */ | |
3535 | +#define ARIZONA_EDRE_OUT3L_THR1_ENA 0x0020 /* EDRE_OUT3L_THR1_ENA */ | |
3536 | +#define ARIZONA_EDRE_OUT3L_THR1_ENA_MASK 0x0020 /* EDRE_OUT3L_THR1_ENA */ | |
3537 | +#define ARIZONA_EDRE_OUT3L_THR1_ENA_SHIFT 5 /* EDRE_OUT3L_THR1_ENA */ | |
3538 | +#define ARIZONA_EDRE_OUT3L_THR1_ENA_WIDTH 1 /* EDRE_OUT3L_THR1_ENA */ | |
3539 | +#define ARIZONA_EDRE_OUT3R_THR1_ENA 0x0010 /* EDRE_OUT3R_THR1_ENA */ | |
3540 | +#define ARIZONA_EDRE_OUT3R_THR1_ENA_MASK 0x0010 /* EDRE_OUT3R_THR1_ENA */ | |
3541 | +#define ARIZONA_EDRE_OUT3R_THR1_ENA_SHIFT 4 /* EDRE_OUT3R_THR1_ENA */ | |
3542 | +#define ARIZONA_EDRE_OUT3R_THR1_ENA_WIDTH 1 /* EDRE_OUT3R_THR1_ENA */ | |
3543 | +#define ARIZONA_EDRE_OUT2L_THR1_ENA 0x0008 /* EDRE_OUT2L_THR1_ENA */ | |
3544 | +#define ARIZONA_EDRE_OUT2L_THR1_ENA_MASK 0x0008 /* EDRE_OUT2L_THR1_ENA */ | |
3545 | +#define ARIZONA_EDRE_OUT2L_THR1_ENA_SHIFT 3 /* EDRE_OUT2L_THR1_ENA */ | |
3546 | +#define ARIZONA_EDRE_OUT2L_THR1_ENA_WIDTH 1 /* EDRE_OUT2L_THR1_ENA */ | |
3547 | +#define ARIZONA_EDRE_OUT2R_THR1_ENA 0x0004 /* EDRE_OUT2R_THR1_ENA */ | |
3548 | +#define ARIZONA_EDRE_OUT2R_THR1_ENA_MASK 0x0004 /* EDRE_OUT2R_THR1_ENA */ | |
3549 | +#define ARIZONA_EDRE_OUT2R_THR1_ENA_SHIFT 2 /* EDRE_OUT2R_THR1_ENA */ | |
3550 | +#define ARIZONA_EDRE_OUT2R_THR1_ENA_WIDTH 1 /* EDRE_OUT2R_THR1_ENA */ | |
3551 | +#define ARIZONA_EDRE_OUT1L_THR1_ENA 0x0002 /* EDRE_OUT1L_THR1_ENA */ | |
3552 | +#define ARIZONA_EDRE_OUT1L_THR1_ENA_MASK 0x0002 /* EDRE_OUT1L_THR1_ENA */ | |
3553 | +#define ARIZONA_EDRE_OUT1L_THR1_ENA_SHIFT 1 /* EDRE_OUT1L_THR1_ENA */ | |
3554 | +#define ARIZONA_EDRE_OUT1L_THR1_ENA_WIDTH 1 /* EDRE_OUT1L_THR1_ENA */ | |
3555 | +#define ARIZONA_EDRE_OUT1R_THR1_ENA 0x0001 /* EDRE_OUT1R_THR1_ENA */ | |
3556 | +#define ARIZONA_EDRE_OUT1R_THR1_ENA_MASK 0x0001 /* EDRE_OUT1R_THR1_ENA */ | |
3557 | +#define ARIZONA_EDRE_OUT1R_THR1_ENA_SHIFT 0 /* EDRE_OUT1R_THR1_ENA */ | |
3558 | +#define ARIZONA_EDRE_OUT1R_THR1_ENA_WIDTH 1 /* EDRE_OUT1R_THR1_ENA */ | |
3559 | + | |
3431 | 3560 | /* |
3432 | 3561 | * R1104 (0x450) - DAC AEC Control 1 |
3433 | 3562 | */ |
... | ... | @@ -4308,6 +4437,86 @@ |
4308 | 4437 | #define ARIZONA_AIF3_FRC_WR_WIDTH 1 /* AIF3_FRC_WR */ |
4309 | 4438 | |
4310 | 4439 | /* |
4440 | + * R1474 (0x5C2) - SPD1 TX Control | |
4441 | + */ | |
4442 | +#define ARIZONA_SPD1_VAL2 0x2000 /* SPD1_VAL2 */ | |
4443 | +#define ARIZONA_SPD1_VAL2_MASK 0x2000 /* SPD1_VAL2 */ | |
4444 | +#define ARIZONA_SPD1_VAL2_SHIFT 13 /* SPD1_VAL2 */ | |
4445 | +#define ARIZONA_SPD1_VAL2_WIDTH 1 /* SPD1_VAL2 */ | |
4446 | +#define ARIZONA_SPD1_VAL1 0x1000 /* SPD1_VAL1 */ | |
4447 | +#define ARIZONA_SPD1_VAL1_MASK 0x1000 /* SPD1_VAL1 */ | |
4448 | +#define ARIZONA_SPD1_VAL1_SHIFT 12 /* SPD1_VAL1 */ | |
4449 | +#define ARIZONA_SPD1_VAL1_WIDTH 1 /* SPD1_VAL1 */ | |
4450 | +#define ARIZONA_SPD1_RATE_MASK 0x00F0 /* SPD1_RATE */ | |
4451 | +#define ARIZONA_SPD1_RATE_SHIFT 4 /* SPD1_RATE */ | |
4452 | +#define ARIZONA_SPD1_RATE_WIDTH 4 /* SPD1_RATE */ | |
4453 | +#define ARIZONA_SPD1_ENA 0x0001 /* SPD1_ENA */ | |
4454 | +#define ARIZONA_SPD1_ENA_MASK 0x0001 /* SPD1_ENA */ | |
4455 | +#define ARIZONA_SPD1_ENA_SHIFT 0 /* SPD1_ENA */ | |
4456 | +#define ARIZONA_SPD1_ENA_WIDTH 1 /* SPD1_ENA */ | |
4457 | + | |
4458 | +/* | |
4459 | + * R1475 (0x5C3) - SPD1 TX Channel Status 1 | |
4460 | + */ | |
4461 | +#define ARIZONA_SPD1_CATCODE_MASK 0xFF00 /* SPD1_CATCODE */ | |
4462 | +#define ARIZONA_SPD1_CATCODE_SHIFT 8 /* SPD1_CATCODE */ | |
4463 | +#define ARIZONA_SPD1_CATCODE_WIDTH 8 /* SPD1_CATCODE */ | |
4464 | +#define ARIZONA_SPD1_CHSTMODE_MASK 0x00C0 /* SPD1_CHSTMODE */ | |
4465 | +#define ARIZONA_SPD1_CHSTMODE_SHIFT 6 /* SPD1_CHSTMODE */ | |
4466 | +#define ARIZONA_SPD1_CHSTMODE_WIDTH 2 /* SPD1_CHSTMODE */ | |
4467 | +#define ARIZONA_SPD1_PREEMPH_MASK 0x0038 /* SPD1_PREEMPH */ | |
4468 | +#define ARIZONA_SPD1_PREEMPH_SHIFT 3 /* SPD1_PREEMPH */ | |
4469 | +#define ARIZONA_SPD1_PREEMPH_WIDTH 3 /* SPD1_PREEMPH */ | |
4470 | +#define ARIZONA_SPD1_NOCOPY 0x0004 /* SPD1_NOCOPY */ | |
4471 | +#define ARIZONA_SPD1_NOCOPY_MASK 0x0004 /* SPD1_NOCOPY */ | |
4472 | +#define ARIZONA_SPD1_NOCOPY_SHIFT 2 /* SPD1_NOCOPY */ | |
4473 | +#define ARIZONA_SPD1_NOCOPY_WIDTH 1 /* SPD1_NOCOPY */ | |
4474 | +#define ARIZONA_SPD1_NOAUDIO 0x0002 /* SPD1_NOAUDIO */ | |
4475 | +#define ARIZONA_SPD1_NOAUDIO_MASK 0x0002 /* SPD1_NOAUDIO */ | |
4476 | +#define ARIZONA_SPD1_NOAUDIO_SHIFT 1 /* SPD1_NOAUDIO */ | |
4477 | +#define ARIZONA_SPD1_NOAUDIO_WIDTH 1 /* SPD1_NOAUDIO */ | |
4478 | +#define ARIZONA_SPD1_PRO 0x0001 /* SPD1_PRO */ | |
4479 | +#define ARIZONA_SPD1_PRO_MASK 0x0001 /* SPD1_PRO */ | |
4480 | +#define ARIZONA_SPD1_PRO_SHIFT 0 /* SPD1_PRO */ | |
4481 | +#define ARIZONA_SPD1_PRO_WIDTH 1 /* SPD1_PRO */ | |
4482 | + | |
4483 | +/* | |
4484 | + * R1475 (0x5C4) - SPD1 TX Channel Status 2 | |
4485 | + */ | |
4486 | +#define ARIZONA_SPD1_FREQ_MASK 0xF000 /* SPD1_FREQ */ | |
4487 | +#define ARIZONA_SPD1_FREQ_SHIFT 12 /* SPD1_FREQ */ | |
4488 | +#define ARIZONA_SPD1_FREQ_WIDTH 4 /* SPD1_FREQ */ | |
4489 | +#define ARIZONA_SPD1_CHNUM2_MASK 0x0F00 /* SPD1_CHNUM2 */ | |
4490 | +#define ARIZONA_SPD1_CHNUM2_SHIFT 8 /* SPD1_CHNUM2 */ | |
4491 | +#define ARIZONA_SPD1_CHNUM2_WIDTH 4 /* SPD1_CHNUM2 */ | |
4492 | +#define ARIZONA_SPD1_CHNUM1_MASK 0x00F0 /* SPD1_CHNUM1 */ | |
4493 | +#define ARIZONA_SPD1_CHNUM1_SHIFT 4 /* SPD1_CHNUM1 */ | |
4494 | +#define ARIZONA_SPD1_CHNUM1_WIDTH 4 /* SPD1_CHNUM1 */ | |
4495 | +#define ARIZONA_SPD1_SRCNUM_MASK 0x000F /* SPD1_SRCNUM */ | |
4496 | +#define ARIZONA_SPD1_SRCNUM_SHIFT 0 /* SPD1_SRCNUM */ | |
4497 | +#define ARIZONA_SPD1_SRCNUM_WIDTH 4 /* SPD1_SRCNUM */ | |
4498 | + | |
4499 | +/* | |
4500 | + * R1475 (0x5C5) - SPD1 TX Channel Status 3 | |
4501 | + */ | |
4502 | +#define ARIZONA_SPD1_ORGSAMP_MASK 0x0F00 /* SPD1_ORGSAMP */ | |
4503 | +#define ARIZONA_SPD1_ORGSAMP_SHIFT 8 /* SPD1_ORGSAMP */ | |
4504 | +#define ARIZONA_SPD1_ORGSAMP_WIDTH 4 /* SPD1_ORGSAMP */ | |
4505 | +#define ARIZONA_SPD1_TXWL_MASK 0x00E0 /* SPD1_TXWL */ | |
4506 | +#define ARIZONA_SPD1_TXWL_SHIFT 5 /* SPD1_TXWL */ | |
4507 | +#define ARIZONA_SPD1_TXWL_WIDTH 3 /* SPD1_TXWL */ | |
4508 | +#define ARIZONA_SPD1_MAXWL 0x0010 /* SPD1_MAXWL */ | |
4509 | +#define ARIZONA_SPD1_MAXWL_MASK 0x0010 /* SPD1_MAXWL */ | |
4510 | +#define ARIZONA_SPD1_MAXWL_SHIFT 4 /* SPD1_MAXWL */ | |
4511 | +#define ARIZONA_SPD1_MAXWL_WIDTH 1 /* SPD1_MAXWL */ | |
4512 | +#define ARIZONA_SPD1_CS31_30_MASK 0x000C /* SPD1_CS31_30 */ | |
4513 | +#define ARIZONA_SPD1_CS31_30_SHIFT 2 /* SPD1_CS31_30 */ | |
4514 | +#define ARIZONA_SPD1_CS31_30_WIDTH 2 /* SPD1_CS31_30 */ | |
4515 | +#define ARIZONA_SPD1_CLKACU_MASK 0x0003 /* SPD1_CLKACU */ | |
4516 | +#define ARIZONA_SPD1_CLKACU_SHIFT 2 /* SPD1_CLKACU */ | |
4517 | +#define ARIZONA_SPD1_CLKACU_WIDTH 0 /* SPD1_CLKACU */ | |
4518 | + | |
4519 | +/* | |
4311 | 4520 | * R1507 (0x5E3) - SLIMbus Framer Ref Gear |
4312 | 4521 | */ |
4313 | 4522 | #define ARIZONA_SLIMCLK_SRC 0x0010 /* SLIMCLK_SRC */ |
... | ... | @@ -4562,6 +4771,13 @@ |
4562 | 4771 | #define ARIZONA_GP_DBTIME_WIDTH 4 /* GP_DBTIME - [15:12] */ |
4563 | 4772 | |
4564 | 4773 | /* |
4774 | + * R3096 (0xC18) - GP Switch 1 | |
4775 | + */ | |
4776 | +#define ARIZONA_SW1_MODE_MASK 0x0003 /* SW1_MODE - [1:0] */ | |
4777 | +#define ARIZONA_SW1_MODE_SHIFT 0 /* SW1_MODE - [1:0] */ | |
4778 | +#define ARIZONA_SW1_MODE_WIDTH 2 /* SW1_MODE - [1:0] */ | |
4779 | + | |
4780 | +/* | |
4565 | 4781 | * R3104 (0xC20) - Misc Pad Ctrl 1 |
4566 | 4782 | */ |
4567 | 4783 | #define ARIZONA_LDO1ENA_PD 0x8000 /* LDO1ENA_PD */ |
... | ... | @@ -6301,6 +6517,10 @@ |
6301 | 6517 | /* |
6302 | 6518 | * R3366 (0xD26) - Interrupt Raw Status 8 |
6303 | 6519 | */ |
6520 | +#define ARIZONA_SPDIF_OVERCLOCKED_STS 0x8000 /* SPDIF_OVERCLOCKED_STS */ | |
6521 | +#define ARIZONA_SPDIF_OVERCLOCKED_STS_MASK 0x8000 /* SPDIF_OVERCLOCKED_STS */ | |
6522 | +#define ARIZONA_SPDIF_OVERCLOCKED_STS_SHIFT 15 /* SPDIF_OVERCLOCKED_STS */ | |
6523 | +#define ARIZONA_SPDIF_OVERCLOCKED_STS_WIDTH 1 /* SPDIF_OVERCLOCKED_STS */ | |
6304 | 6524 | #define ARIZONA_AIF3_UNDERCLOCKED_STS 0x0400 /* AIF3_UNDERCLOCKED_STS */ |
6305 | 6525 | #define ARIZONA_AIF3_UNDERCLOCKED_STS_MASK 0x0400 /* AIF3_UNDERCLOCKED_STS */ |
6306 | 6526 | #define ARIZONA_AIF3_UNDERCLOCKED_STS_SHIFT 10 /* AIF3_UNDERCLOCKED_STS */ |