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Commit 68e488d965a9055c63c0eac4ad1e6568b07e8ee1

Authored by Haojian Zhuang
Committed by Samuel Ortiz
1 parent e47a3bbe4f
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

mfd: Delay to mask tsc irq in max8925 

There're two IRQ pins output from MAX8925. One is PMIC interrupt, the other
is TSC interrupt. But they're sharing one irq chip.

After initializing MAX8925 interrupts, unexpected TSC interrupt may occur and
it can't be cleared if touch driver isn't loaded.

Now move the operation of masking TSC interrupt behind requesting PMIC
interrupt. If touch driver isn't loaded, this interrupt is always masked.

Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com>
Signed-off-by: Samuel Ortiz <sameo@linux.intel.com>

Showing 1 changed file with 5 additions and 2 deletions Side-by-side Diff

drivers/mfd/max8925-core.c
Diff comments   View file @ 68e488d
... ... @@ -508,7 +508,7 @@
508 508 max8925_reg_read(chip->i2c, MAX8925_ON_OFF_IRQ2);
509 509 max8925_reg_read(chip->rtc, MAX8925_RTC_IRQ);
510 510 max8925_reg_read(chip->adc, MAX8925_TSC_IRQ);
511   - /* mask all interrupts */
  511 + /* mask all interrupts except for TSC */
512 512 max8925_reg_write(chip->rtc, MAX8925_ALARM0_CNTL, 0);
513 513 max8925_reg_write(chip->rtc, MAX8925_ALARM1_CNTL, 0);
514 514 max8925_reg_write(chip->i2c, MAX8925_CHG_IRQ1_MASK, 0xff);
... ... @@ -516,7 +516,6 @@
516 516 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ1_MASK, 0xff);
517 517 max8925_reg_write(chip->i2c, MAX8925_ON_OFF_IRQ2_MASK, 0xff);
518 518 max8925_reg_write(chip->rtc, MAX8925_RTC_IRQ_MASK, 0xff);
519   - max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0xff);
520 519  
521 520 mutex_init(&chip->irq_lock);
522 521 chip->core_irq = irq;
523 522  
... ... @@ -547,7 +546,11 @@
547 546 dev_err(chip->dev, "Failed to request core IRQ: %d\n", ret);
548 547 chip->core_irq = 0;
549 548 }
  549 +
550 550 tsc_irq:
  551 + /* mask TSC interrupt */
  552 + max8925_reg_write(chip->adc, MAX8925_TSC_IRQ_MASK, 0x0f);
  553 +
551 554 if (!pdata->tsc_irq) {
552 555 dev_warn(chip->dev, "No interrupt support on TSC IRQ\n");
553 556 return 0;