Commit 6e40262ea43c4b0e3f435b3a083e4461ef921c17
1 parent
2a0d6fb335
Exists in
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genirq: Move IRQ_MASKED to core
Keep status in sync until all users are fixed. Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Showing 7 changed files with 41 additions and 13 deletions Side-by-side Diff
include/linux/irq.h
... | ... | @@ -57,11 +57,11 @@ |
57 | 57 | #define IRQ_WAITING 0x00000400 /* DEPRECATED */ |
58 | 58 | #define IRQ_DISABLED 0x00000800 /* DEPRECATED */ |
59 | 59 | #define IRQ_PENDING 0x00001000 /* DEPRECATED */ |
60 | +#define IRQ_MASKED 0x00002000 /* DEPRECATED */ | |
60 | 61 | #endif |
61 | 62 | |
62 | 63 | |
63 | 64 | #define IRQ_LEVEL 0x00004000 /* IRQ level triggered */ |
64 | -#define IRQ_MASKED 0x00008000 /* IRQ masked - shouldn't be seen again */ | |
65 | 65 | #define IRQ_PER_CPU 0x00010000 /* IRQ is per CPU */ |
66 | 66 | #define IRQ_NOPROBE 0x00020000 /* IRQ is not valid for probing */ |
67 | 67 | #define IRQ_NOREQUEST 0x00040000 /* IRQ cannot be requested */ |
kernel/irq/chip.c
... | ... | @@ -176,6 +176,18 @@ |
176 | 176 | irq_compat_set_disabled(desc); |
177 | 177 | } |
178 | 178 | |
179 | +static void irq_state_clr_masked(struct irq_desc *desc) | |
180 | +{ | |
181 | + desc->istate &= ~IRQS_MASKED; | |
182 | + irq_compat_clr_masked(desc); | |
183 | +} | |
184 | + | |
185 | +static void irq_state_set_masked(struct irq_desc *desc) | |
186 | +{ | |
187 | + desc->istate |= IRQS_MASKED; | |
188 | + irq_compat_set_masked(desc); | |
189 | +} | |
190 | + | |
179 | 191 | int irq_startup(struct irq_desc *desc) |
180 | 192 | { |
181 | 193 | irq_state_clr_disabled(desc); |
... | ... | @@ -183,7 +195,7 @@ |
183 | 195 | |
184 | 196 | if (desc->irq_data.chip->irq_startup) { |
185 | 197 | int ret = desc->irq_data.chip->irq_startup(&desc->irq_data); |
186 | - desc->status &= ~IRQ_MASKED; | |
198 | + irq_state_clr_masked(desc); | |
187 | 199 | return ret; |
188 | 200 | } |
189 | 201 | |
... | ... | @@ -201,7 +213,7 @@ |
201 | 213 | desc->irq_data.chip->irq_disable(&desc->irq_data); |
202 | 214 | else |
203 | 215 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
204 | - desc->status |= IRQ_MASKED; | |
216 | + irq_state_set_masked(desc); | |
205 | 217 | } |
206 | 218 | |
207 | 219 | void irq_enable(struct irq_desc *desc) |
... | ... | @@ -211,7 +223,7 @@ |
211 | 223 | desc->irq_data.chip->irq_enable(&desc->irq_data); |
212 | 224 | else |
213 | 225 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
214 | - desc->status &= ~IRQ_MASKED; | |
226 | + irq_state_clr_masked(desc); | |
215 | 227 | } |
216 | 228 | |
217 | 229 | void irq_disable(struct irq_desc *desc) |
218 | 230 | |
... | ... | @@ -219,8 +231,8 @@ |
219 | 231 | irq_state_set_disabled(desc); |
220 | 232 | if (desc->irq_data.chip->irq_disable) { |
221 | 233 | desc->irq_data.chip->irq_disable(&desc->irq_data); |
222 | - desc->status |= IRQ_MASKED; | |
223 | 234 | } |
235 | + irq_state_set_masked(desc); | |
224 | 236 | } |
225 | 237 | |
226 | 238 | #ifndef CONFIG_GENERIC_HARDIRQS_NO_DEPRECATED |
227 | 239 | |
... | ... | @@ -352,14 +364,14 @@ |
352 | 364 | if (desc->irq_data.chip->irq_ack) |
353 | 365 | desc->irq_data.chip->irq_ack(&desc->irq_data); |
354 | 366 | } |
355 | - desc->status |= IRQ_MASKED; | |
367 | + irq_state_set_masked(desc); | |
356 | 368 | } |
357 | 369 | |
358 | 370 | static inline void mask_irq(struct irq_desc *desc) |
359 | 371 | { |
360 | 372 | if (desc->irq_data.chip->irq_mask) { |
361 | 373 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
362 | - desc->status |= IRQ_MASKED; | |
374 | + irq_state_set_masked(desc); | |
363 | 375 | } |
364 | 376 | } |
365 | 377 | |
... | ... | @@ -367,7 +379,7 @@ |
367 | 379 | { |
368 | 380 | if (desc->irq_data.chip->irq_unmask) { |
369 | 381 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
370 | - desc->status &= ~IRQ_MASKED; | |
382 | + irq_state_clr_masked(desc); | |
371 | 383 | } |
372 | 384 | } |
373 | 385 | |
... | ... | @@ -583,7 +595,7 @@ |
583 | 595 | */ |
584 | 596 | if (unlikely(desc->istate & IRQS_PENDING)) { |
585 | 597 | if (!(desc->istate & IRQS_DISABLED) && |
586 | - (desc->status & IRQ_MASKED)) | |
598 | + (desc->istate & IRQS_MASKED)) | |
587 | 599 | unmask_irq(desc); |
588 | 600 | } |
589 | 601 |
kernel/irq/compat.h
... | ... | @@ -28,6 +28,15 @@ |
28 | 28 | { |
29 | 29 | desc->status &= ~IRQ_PENDING; |
30 | 30 | } |
31 | +static inline void irq_compat_set_masked(struct irq_desc *desc) | |
32 | +{ | |
33 | + desc->status |= IRQ_MASKED; | |
34 | +} | |
35 | + | |
36 | +static inline void irq_compat_clr_masked(struct irq_desc *desc) | |
37 | +{ | |
38 | + desc->status &= ~IRQ_MASKED; | |
39 | +} | |
31 | 40 | #else |
32 | 41 | static inline void irq_compat_set_progress(struct irq_desc *desc) { } |
33 | 42 | static inline void irq_compat_clr_progress(struct irq_desc *desc) { } |
... | ... | @@ -35,5 +44,7 @@ |
35 | 44 | static inline void irq_compat_clr_disabled(struct irq_desc *desc) { } |
36 | 45 | static inline void irq_compat_set_pending(struct irq_desc *desc) { } |
37 | 46 | static inline void irq_compat_clr_pending(struct irq_desc *desc) { } |
47 | +static inline void irq_compat_set_masked(struct irq_desc *desc) { } | |
48 | +static inline void irq_compat_clr_masked(struct irq_desc *desc) { } | |
38 | 49 | #endif |
kernel/irq/internals.h
... | ... | @@ -47,6 +47,7 @@ |
47 | 47 | * IRQS_WAITING - irq is waiting |
48 | 48 | * IRQS_DISABLED - irq is disabled |
49 | 49 | * IRQS_PENDING - irq is pending and replayed later |
50 | + * IRQS_MASKED - irq is masked | |
50 | 51 | */ |
51 | 52 | enum { |
52 | 53 | IRQS_AUTODETECT = 0x00000001, |
... | ... | @@ -58,6 +59,7 @@ |
58 | 59 | IRQS_WAITING = 0x00000080, |
59 | 60 | IRQS_DISABLED = 0x00000100, |
60 | 61 | IRQS_PENDING = 0x00000200, |
62 | + IRQS_MASKED = 0x00000400, | |
61 | 63 | }; |
62 | 64 | |
63 | 65 | #define irq_data_to_desc(data) container_of(data, struct irq_desc, irq_data) |
... | ... | @@ -142,7 +144,6 @@ |
142 | 144 | } |
143 | 145 | |
144 | 146 | P(IRQ_LEVEL); |
145 | - P(IRQ_MASKED); | |
146 | 147 | #ifdef CONFIG_IRQ_PER_CPU |
147 | 148 | P(IRQ_PER_CPU); |
148 | 149 | #endif |
... | ... | @@ -156,6 +157,7 @@ |
156 | 157 | PS(IRQS_WAITING); |
157 | 158 | PS(IRQS_DISABLED); |
158 | 159 | PS(IRQS_PENDING); |
160 | + PS(IRQS_MASKED); | |
159 | 161 | } |
160 | 162 | |
161 | 163 | #undef P |
kernel/irq/manage.c
... | ... | @@ -646,8 +646,9 @@ |
646 | 646 | goto again; |
647 | 647 | } |
648 | 648 | |
649 | - if (!(desc->istate & IRQS_DISABLED) && (desc->status & IRQ_MASKED)) { | |
650 | - desc->status &= ~IRQ_MASKED; | |
649 | + if (!(desc->istate & IRQS_DISABLED) && (desc->istate & IRQS_MASKED)) { | |
650 | + irq_compat_clr_masked(desc); | |
651 | + desc->istate &= ~IRQS_MASKED; | |
651 | 652 | desc->irq_data.chip->irq_unmask(&desc->irq_data); |
652 | 653 | } |
653 | 654 | raw_spin_unlock_irq(&desc->lock); |
kernel/irq/migration.c
... | ... | @@ -69,7 +69,7 @@ |
69 | 69 | * threaded interrupt with ONESHOT set, we can end up with an |
70 | 70 | * interrupt storm. |
71 | 71 | */ |
72 | - masked = desc->status & IRQ_MASKED; | |
72 | + masked = desc->istate & IRQS_MASKED; | |
73 | 73 | if (!masked) |
74 | 74 | desc->irq_data.chip->irq_mask(&desc->irq_data); |
75 | 75 | move_masked_irq(irq); |
kernel/irq/settings.h