Commit 779b0d53ca41873d59225eb776c5d4493a0abd0f

Authored by Cyril Chemparathy
Committed by Kevin Hilman
1 parent bd80894704

Davinci: pinmux - use ioremap()

This patch modifies the pinmux implementation so as to ioremap() the pinmux
register area on first use.

Signed-off-by: Cyril Chemparathy <cyril@ti.com>
Signed-off-by: Kevin Hilman <khilman@deeprootsystems.com>

Showing 8 changed files with 19 additions and 14 deletions Side-by-side Diff

arch/arm/mach-davinci/da830.c
... ... @@ -1191,6 +1191,7 @@
1191 1191 .cpu_clks = da830_clks,
1192 1192 .psc_bases = da830_psc_bases,
1193 1193 .psc_bases_num = ARRAY_SIZE(da830_psc_bases),
  1194 + .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
1194 1195 .pinmux_pins = da830_pins,
1195 1196 .pinmux_pins_num = ARRAY_SIZE(da830_pins),
1196 1197 .intc_base = DA8XX_CP_INTC_BASE,
... ... @@ -1212,8 +1213,6 @@
1212 1213 da8xx_syscfg0_base = ioremap(DA8XX_SYSCFG0_BASE, SZ_4K);
1213 1214 if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"))
1214 1215 return;
1215   -
1216   - davinci_soc_info_da830.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120);
1217 1216  
1218 1217 davinci_common_init(&davinci_soc_info_da830);
1219 1218 }
arch/arm/mach-davinci/da850.c
... ... @@ -1076,6 +1076,7 @@
1076 1076 .cpu_clks = da850_clks,
1077 1077 .psc_bases = da850_psc_bases,
1078 1078 .psc_bases_num = ARRAY_SIZE(da850_psc_bases),
  1079 + .pinmux_base = DA8XX_SYSCFG0_BASE + 0x120,
1079 1080 .pinmux_pins = da850_pins,
1080 1081 .pinmux_pins_num = ARRAY_SIZE(da850_pins),
1081 1082 .intc_base = DA8XX_CP_INTC_BASE,
... ... @@ -1105,8 +1106,6 @@
1105 1106 da8xx_syscfg1_base = ioremap(DA8XX_SYSCFG1_BASE, SZ_4K);
1106 1107 if (WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module"))
1107 1108 return;
1108   -
1109   - davinci_soc_info_da850.pinmux_base = DA8XX_SYSCFG0_VIRT(0x120);
1110 1109  
1111 1110 davinci_common_init(&davinci_soc_info_da850);
1112 1111  
arch/arm/mach-davinci/dm355.c
... ... @@ -844,7 +844,7 @@
844 844 .cpu_clks = dm355_clks,
845 845 .psc_bases = dm355_psc_bases,
846 846 .psc_bases_num = ARRAY_SIZE(dm355_psc_bases),
847   - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
  847 + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
848 848 .pinmux_pins = dm355_pins,
849 849 .pinmux_pins_num = ARRAY_SIZE(dm355_pins),
850 850 .intc_base = DAVINCI_ARM_INTC_BASE,
arch/arm/mach-davinci/dm365.c
... ... @@ -1049,7 +1049,7 @@
1049 1049 .cpu_clks = dm365_clks,
1050 1050 .psc_bases = dm365_psc_bases,
1051 1051 .psc_bases_num = ARRAY_SIZE(dm365_psc_bases),
1052   - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
  1052 + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
1053 1053 .pinmux_pins = dm365_pins,
1054 1054 .pinmux_pins_num = ARRAY_SIZE(dm365_pins),
1055 1055 .intc_base = DAVINCI_ARM_INTC_BASE,
arch/arm/mach-davinci/dm644x.c
... ... @@ -735,7 +735,7 @@
735 735 .cpu_clks = dm644x_clks,
736 736 .psc_bases = dm644x_psc_bases,
737 737 .psc_bases_num = ARRAY_SIZE(dm644x_psc_bases),
738   - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
  738 + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
739 739 .pinmux_pins = dm644x_pins,
740 740 .pinmux_pins_num = ARRAY_SIZE(dm644x_pins),
741 741 .intc_base = DAVINCI_ARM_INTC_BASE,
arch/arm/mach-davinci/dm646x.c
... ... @@ -819,7 +819,7 @@
819 819 .cpu_clks = dm646x_clks,
820 820 .psc_bases = dm646x_psc_bases,
821 821 .psc_bases_num = ARRAY_SIZE(dm646x_psc_bases),
822   - .pinmux_base = IO_ADDRESS(DAVINCI_SYSTEM_MODULE_BASE),
  822 + .pinmux_base = DAVINCI_SYSTEM_MODULE_BASE,
823 823 .pinmux_pins = dm646x_pins,
824 824 .pinmux_pins_num = ARRAY_SIZE(dm646x_pins),
825 825 .intc_base = DAVINCI_ARM_INTC_BASE,
arch/arm/mach-davinci/include/mach/common.h
... ... @@ -51,7 +51,7 @@
51 51 struct clk_lookup *cpu_clks;
52 52 u32 *psc_bases;
53 53 unsigned long psc_bases_num;
54   - void __iomem *pinmux_base;
  54 + u32 pinmux_base;
55 55 const struct mux_config *pinmux_pins;
56 56 unsigned long pinmux_pins_num;
57 57 u32 intc_base;
arch/arm/mach-davinci/mux.c
... ... @@ -22,6 +22,8 @@
22 22 #include <mach/mux.h>
23 23 #include <mach/common.h>
24 24  
  25 +static void __iomem *pinmux_base;
  26 +
25 27 /*
26 28 * Sets the DAVINCI MUX register based on the table
27 29 */
28 30  
29 31  
... ... @@ -29,15 +31,20 @@
29 31 {
30 32 static DEFINE_SPINLOCK(mux_spin_lock);
31 33 struct davinci_soc_info *soc_info = &davinci_soc_info;
32   - void __iomem *base = soc_info->pinmux_base;
33 34 unsigned long flags;
34 35 const struct mux_config *cfg;
35 36 unsigned int reg_orig = 0, reg = 0;
36 37 unsigned int mask, warn = 0;
37 38  
38   - if (!soc_info->pinmux_pins)
39   - BUG();
  39 + if (WARN_ON(!soc_info->pinmux_pins))
  40 + return -ENODEV;
40 41  
  42 + if (!pinmux_base) {
  43 + pinmux_base = ioremap(soc_info->pinmux_base, SZ_4K);
  44 + if (WARN_ON(!pinmux_base))
  45 + return -ENOMEM;
  46 + }
  47 +
41 48 if (index >= soc_info->pinmux_pins_num) {
42 49 printk(KERN_ERR "Invalid pin mux index: %lu (%lu)\n",
43 50 index, soc_info->pinmux_pins_num);
... ... @@ -57,7 +64,7 @@
57 64 unsigned tmp1, tmp2;
58 65  
59 66 spin_lock_irqsave(&mux_spin_lock, flags);
60   - reg_orig = __raw_readl(base + cfg->mux_reg);
  67 + reg_orig = __raw_readl(pinmux_base + cfg->mux_reg);
61 68  
62 69 mask = (cfg->mask << cfg->mask_offset);
63 70 tmp1 = reg_orig & mask;
... ... @@ -69,7 +76,7 @@
69 76 if (tmp1 != tmp2)
70 77 warn = 1;
71 78  
72   - __raw_writel(reg, base + cfg->mux_reg);
  79 + __raw_writel(reg, pinmux_base + cfg->mux_reg);
73 80 spin_unlock_irqrestore(&mux_spin_lock, flags);
74 81 }
75 82