irqchip/gic-v4.1: Add VPE residency callback

Making a VPE resident on GICv4.1 is pretty simple, as it is just a single write to the local redistributor. We just need extra information about which groups to enable, which the KVM code will have to provide. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20191224111055.11836-12-maz@kernel.org

irqchip/gic-v4.1: Add VPE residency callback
Making a VPE resident on GICv4.1 is pretty simple, as it is just a single write to the local redistributor. We just need extra information about which groups to enable, which the KVM code will have to provide. Signed-off-by: Marc Zyngier <maz@kernel.org> Reviewed-by: Zenghui Yu <yuzenghui@huawei.com> Link: https://lore.kernel.org/r/20191224111055.11836-12-maz@kernel.org
Marc Zyngier
1 parent d97c97baa2
Showing 3 changed files with 31 additions and 0 deletions Side-by-side Diff
drivers/irqchip/irq-gic-v3-its.c
include/linux/irqchip/arm-gic-v3.h
include/linux/irqchip/arm-gic-v4.h
@@ -3624,12 +3624,29 @@
 	its_vpe_4_1_send_inv(d);
 }
  
+static void its_vpe_4_1_schedule(struct its_vpe *vpe,
+				 struct its_cmd_info *info)
+{
+	void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
+	u64 val = 0;
+
+	/* Schedule the VPE */
+	val |= GICR_VPENDBASER_Valid;
+	val |= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0;
+	val |= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0;
+	val |= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
+
+	gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
+}
+
 static int its_vpe_4_1_set_vcpu_affinity(struct irq_data *d, void *vcpu_info)
 {
+	struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
 	struct its_cmd_info *info = vcpu_info;
  
 	switch (info->cmd_type) {
 	case SCHEDULE_VPE:
+		its_vpe_4_1_schedule(vpe, info);
 		return 0;
  
 	case DESCHEDULE_VPE:
@@ -328,6 +328,15 @@
 #define GICR_VPENDBASER_Valid		(1ULL << 63)
  
 /*
+ * GICv4.1 VPENDBASER, used for VPE residency. On top of these fields,
+ * also use the above Valid, PendingLast and Dirty.
+ */
+#define GICR_VPENDBASER_4_1_DB		(1ULL << 62)
+#define GICR_VPENDBASER_4_1_VGRP0EN	(1ULL << 59)
+#define GICR_VPENDBASER_4_1_VGRP1EN	(1ULL << 58)
+#define GICR_VPENDBASER_4_1_VPEID	GENMASK_ULL(15, 0)
+
+/*
  * ITS registers, offsets from ITS_base
  */
 #define GITS_CTLR			0x0000
@@ -100,6 +100,11 @@
 	union {
 		struct its_vlpi_map	*map;
 		u8			config;
+		bool			req_db;
+		struct {
+			bool		g0en;
+			bool		g1en;
+		};
 	};
 };
...	...	@@ -3624,12 +3624,29 @@
3624	3624	its_vpe_4_1_send_inv(d);
3625	3625	}
3626	3626
	3627	+static void its_vpe_4_1_schedule(struct its_vpe *vpe,
	3628	+ struct its_cmd_info *info)
	3629	+{
	3630	+ void __iomem *vlpi_base = gic_data_rdist_vlpi_base();
	3631	+ u64 val = 0;
	3632	+
	3633	+ /* Schedule the VPE */
	3634	+ val \|= GICR_VPENDBASER_Valid;
	3635	+ val \|= info->g0en ? GICR_VPENDBASER_4_1_VGRP0EN : 0;
	3636	+ val \|= info->g1en ? GICR_VPENDBASER_4_1_VGRP1EN : 0;
	3637	+ val \|= FIELD_PREP(GICR_VPENDBASER_4_1_VPEID, vpe->vpe_id);
	3638	+
	3639	+ gits_write_vpendbaser(val, vlpi_base + GICR_VPENDBASER);
	3640	+}
	3641	+
3627	3642	static int its_vpe_4_1_set_vcpu_affinity(struct irq_data d, void vcpu_info)
3628	3643	{
	3644	+ struct its_vpe *vpe = irq_data_get_irq_chip_data(d);
3629	3645	struct its_cmd_info *info = vcpu_info;
3630	3646
3631	3647	switch (info->cmd_type) {
3632	3648	case SCHEDULE_VPE:
	3649	+ its_vpe_4_1_schedule(vpe, info);
3633	3650	return 0;
3634	3651
3635	3652	case DESCHEDULE_VPE:
...	...	@@ -328,6 +328,15 @@
328	328	#define GICR_VPENDBASER_Valid (1ULL << 63)
329	329
330	330	/*
	331	+ * GICv4.1 VPENDBASER, used for VPE residency. On top of these fields,
	332	+ * also use the above Valid, PendingLast and Dirty.
	333	+ */
	334	+#define GICR_VPENDBASER_4_1_DB (1ULL << 62)
	335	+#define GICR_VPENDBASER_4_1_VGRP0EN (1ULL << 59)
	336	+#define GICR_VPENDBASER_4_1_VGRP1EN (1ULL << 58)
	337	+#define GICR_VPENDBASER_4_1_VPEID GENMASK_ULL(15, 0)
	338	+
	339	+/*
331	340	* ITS registers, offsets from ITS_base
332	341	*/
333	342	#define GITS_CTLR 0x0000
...	...	@@ -100,6 +100,11 @@
100	100	union {
101	101	struct its_vlpi_map *map;
102	102	u8 config;
	103	+ bool req_db;
	104	+ struct {
	105	+ bool g0en;
	106	+ bool g1en;
	107	+ };
103	108	};
104	109	};
105	110