Commit a7f3f0309b68d8d07a97a54c492802c294bccacd

Authored by Mike Rapoport
Committed by Russell King
1 parent 4adc5fb673

[ARM] 5282/1: pxa: add CM-X255 support

Signed-off-by: Russ Dill <russ.dill@gmail.com>
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 6 changed files with 199 additions and 9 deletions Side-by-side Diff

arch/arm/mach-pxa/Kconfig
... ... @@ -207,9 +207,11 @@
207 207 select PXA930
208 208  
209 209 config MACH_ARMCORE
210   - bool "CompuLab CM-X270 modules"
  210 + bool "CompuLab CM-X255/CM-X270 modules"
211 211 select PXA27x
212 212 select IWMMXT
  213 + select PXA25x
  214 + select PXA_SSP
213 215  
214 216 config MACH_CM_X300
215 217 bool "CompuLab CM-X300 modules"
arch/arm/mach-pxa/Makefile
... ... @@ -53,7 +53,7 @@
53 53 obj-$(CONFIG_MACH_TAVOREVB) += tavorevb.o
54 54 obj-$(CONFIG_MACH_SAAR) += saar.o
55 55  
56   -obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x270.o
  56 +obj-$(CONFIG_MACH_ARMCORE) += cm-x2xx.o cm-x255.o cm-x270.o
57 57 obj-$(CONFIG_MACH_CM_X300) += cm-x300.o
58 58 obj-$(CONFIG_PXA_EZX) += ezx.o
59 59  
arch/arm/mach-pxa/cm-x255.c
  1 +/*
  2 + * linux/arch/arm/mach-pxa/cm-x255.c
  3 + *
  4 + * Copyright (C) 2007, 2008 CompuLab, Ltd.
  5 + * Mike Rapoport <mike@compulab.co.il>
  6 + *
  7 + * This program is free software; you can redistribute it and/or modify
  8 + * it under the terms of the GNU General Public License version 2 as
  9 + * published by the Free Software Foundation.
  10 + */
  11 +
  12 +#include <linux/platform_device.h>
  13 +#include <linux/irq.h>
  14 +#include <linux/gpio.h>
  15 +
  16 +#include <linux/spi/spi.h>
  17 +
  18 +#include <asm/mach/arch.h>
  19 +#include <asm/mach-types.h>
  20 +#include <asm/mach/map.h>
  21 +
  22 +#include <mach/pxa2xx-regs.h>
  23 +#include <mach/mfp-pxa25x.h>
  24 +#include <mach/pxa2xx_spi.h>
  25 +#include <mach/bitfield.h>
  26 +
  27 +#include "generic.h"
  28 +
  29 +static unsigned long cmx255_pin_config[] = {
  30 + /* AC'97 */
  31 + GPIO28_AC97_BITCLK,
  32 + GPIO29_AC97_SDATA_IN_0,
  33 + GPIO30_AC97_SDATA_OUT,
  34 + GPIO31_AC97_SYNC,
  35 +
  36 + /* BTUART */
  37 + GPIO42_BTUART_RXD,
  38 + GPIO43_BTUART_TXD,
  39 + GPIO44_BTUART_CTS,
  40 + GPIO45_BTUART_RTS,
  41 +
  42 + /* STUART */
  43 + GPIO46_STUART_RXD,
  44 + GPIO47_STUART_TXD,
  45 +
  46 + /* LCD */
  47 + GPIO58_LCD_LDD_0,
  48 + GPIO59_LCD_LDD_1,
  49 + GPIO60_LCD_LDD_2,
  50 + GPIO61_LCD_LDD_3,
  51 + GPIO62_LCD_LDD_4,
  52 + GPIO63_LCD_LDD_5,
  53 + GPIO64_LCD_LDD_6,
  54 + GPIO65_LCD_LDD_7,
  55 + GPIO66_LCD_LDD_8,
  56 + GPIO67_LCD_LDD_9,
  57 + GPIO68_LCD_LDD_10,
  58 + GPIO69_LCD_LDD_11,
  59 + GPIO70_LCD_LDD_12,
  60 + GPIO71_LCD_LDD_13,
  61 + GPIO72_LCD_LDD_14,
  62 + GPIO73_LCD_LDD_15,
  63 + GPIO74_LCD_FCLK,
  64 + GPIO75_LCD_LCLK,
  65 + GPIO76_LCD_PCLK,
  66 + GPIO77_LCD_BIAS,
  67 +
  68 + /* SSP1 */
  69 + GPIO23_SSP1_SCLK,
  70 + GPIO24_SSP1_SFRM,
  71 + GPIO25_SSP1_TXD,
  72 + GPIO26_SSP1_RXD,
  73 +
  74 + /* SSP2 */
  75 + GPIO81_SSP2_CLK_OUT,
  76 + GPIO82_SSP2_FRM_OUT,
  77 + GPIO83_SSP2_TXD,
  78 + GPIO84_SSP2_RXD,
  79 +
  80 + /* PC Card */
  81 + GPIO48_nPOE,
  82 + GPIO49_nPWE,
  83 + GPIO50_nPIOR,
  84 + GPIO51_nPIOW,
  85 + GPIO52_nPCE_1,
  86 + GPIO53_nPCE_2,
  87 + GPIO54_nPSKTSEL,
  88 + GPIO55_nPREG,
  89 + GPIO56_nPWAIT,
  90 + GPIO57_nIOIS16,
  91 +
  92 + /* SDRAM and local bus */
  93 + GPIO15_nCS_1,
  94 + GPIO78_nCS_2,
  95 + GPIO79_nCS_3,
  96 + GPIO80_nCS_4,
  97 + GPIO33_nCS_5,
  98 + GPIO18_RDY,
  99 +
  100 + /* GPIO */
  101 + GPIO0_GPIO | WAKEUP_ON_EDGE_BOTH,
  102 + GPIO9_GPIO, /* PC card reset */
  103 +
  104 + /* NAND controls */
  105 + GPIO5_GPIO | MFP_LPM_DRIVE_HIGH, /* NAND CE# */
  106 + GPIO4_GPIO | MFP_LPM_DRIVE_LOW, /* NAND ALE */
  107 + GPIO3_GPIO | MFP_LPM_DRIVE_LOW, /* NAND CLE */
  108 + GPIO10_GPIO, /* NAND Ready/Busy */
  109 +
  110 + /* interrupts */
  111 + GPIO22_GPIO, /* DM9000 interrupt */
  112 +};
  113 +
  114 +#if defined(CONFIG_SPI_PXA2XX)
  115 +static struct pxa2xx_spi_master pxa_ssp_master_info = {
  116 + .num_chipselect = 1,
  117 +};
  118 +
  119 +static struct spi_board_info spi_board_info[] __initdata = {
  120 + [0] = {
  121 + .modalias = "rtc-max6902",
  122 + .max_speed_hz = 1000000,
  123 + .bus_num = 1,
  124 + .chip_select = 0,
  125 + },
  126 +};
  127 +
  128 +static void __init cmx255_init_rtc(void)
  129 +{
  130 + pxa2xx_set_spi_info(1, &pxa_ssp_master_info);
  131 + spi_register_board_info(ARRAY_AND_SIZE(spi_board_info));
  132 +}
  133 +#else
  134 +static inline void cmx255_init_rtc(void) {}
  135 +#endif
  136 +
  137 +void __init cmx255_init(void)
  138 +{
  139 + pxa2xx_mfp_config(ARRAY_AND_SIZE(cmx255_pin_config));
  140 +
  141 + cmx255_init_rtc();
  142 +}
arch/arm/mach-pxa/cm-x2xx-pci.c
... ... @@ -131,7 +131,11 @@
131 131 if (slot == 9)
132 132 return IT8152_PCI_INTA;
133 133  
134   - /* SB-x270 Ethernet */
  134 + /* CM-x255 Onboard Ethernet */
  135 + if (slot == 15)
  136 + return IT8152_PCI_INTC;
  137 +
  138 + /* SB-x2xx Ethernet */
135 139 if (slot == 16)
136 140 return IT8152_PCI_INTA;
137 141  
arch/arm/mach-pxa/cm-x2xx.c
... ... @@ -32,6 +32,7 @@
32 32 #include "generic.h"
33 33 #include "cm-x2xx-pci.h"
34 34  
  35 +extern void cmx255_init(void);
35 36 extern void cmx270_init(void);
36 37  
37 38 /* virtual addresses for statically mapped regions */
38 39  
39 40  
40 41  
41 42  
42 43  
... ... @@ -39,19 +40,43 @@
39 40 #define CMX2XX_IT8152_VIRT (CMX2XX_VIRT_BASE)
40 41  
41 42 /* physical address if local-bus attached devices */
  43 +#define CMX255_DM9000_PHYS_BASE (PXA_CS1_PHYS + (8 << 22))
42 44 #define CMX270_DM9000_PHYS_BASE (PXA_CS1_PHYS + (6 << 22))
43 45  
44 46 /* leds */
  47 +#define CMX255_GPIO_RED (27)
  48 +#define CMX255_GPIO_GREEN (32)
45 49 #define CMX270_GPIO_RED (93)
46 50 #define CMX270_GPIO_GREEN (94)
47 51  
48 52 /* GPIO IRQ usage */
  53 +#define GPIO22_ETHIRQ (22)
49 54 #define GPIO10_ETHIRQ (10)
  55 +#define CMX255_GPIO_IT8152_IRQ (0)
50 56 #define CMX270_GPIO_IT8152_IRQ (22)
51 57  
  58 +#define CMX255_ETHIRQ IRQ_GPIO(GPIO22_ETHIRQ)
52 59 #define CMX270_ETHIRQ IRQ_GPIO(GPIO10_ETHIRQ)
53 60  
54 61 #if defined(CONFIG_DM9000) || defined(CONFIG_DM9000_MODULE)
  62 +static struct resource cmx255_dm9000_resource[] = {
  63 + [0] = {
  64 + .start = CMX255_DM9000_PHYS_BASE,
  65 + .end = CMX255_DM9000_PHYS_BASE + 3,
  66 + .flags = IORESOURCE_MEM,
  67 + },
  68 + [1] = {
  69 + .start = CMX255_DM9000_PHYS_BASE + 4,
  70 + .end = CMX255_DM9000_PHYS_BASE + 4 + 500,
  71 + .flags = IORESOURCE_MEM,
  72 + },
  73 + [2] = {
  74 + .start = CMX255_ETHIRQ,
  75 + .end = CMX255_ETHIRQ,
  76 + .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
  77 + }
  78 +};
  79 +
55 80 static struct resource cmx270_dm9000_resource[] = {
56 81 [0] = {
57 82 .start = CMX270_DM9000_PHYS_BASE,
... ... @@ -85,7 +110,10 @@
85 110  
86 111 static void __init cmx2xx_init_dm9000(void)
87 112 {
88   - cmx2xx_dm9000_device.resource = cmx270_dm9000_resource,
  113 + if (cpu_is_pxa25x())
  114 + cmx2xx_dm9000_device.resource = cmx255_dm9000_resource;
  115 + else
  116 + cmx2xx_dm9000_device.resource = cmx270_dm9000_resource;
89 117 platform_device_register(&cmx2xx_dm9000_device);
90 118 }
91 119 #else
... ... @@ -137,8 +165,13 @@
137 165  
138 166 static void __init cmx2xx_init_leds(void)
139 167 {
140   - cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
141   - cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
  168 + if (cpu_is_pxa25x()) {
  169 + cmx2xx_leds[0].gpio = CMX255_GPIO_RED;
  170 + cmx2xx_leds[1].gpio = CMX255_GPIO_GREEN;
  171 + } else {
  172 + cmx2xx_leds[0].gpio = CMX270_GPIO_RED;
  173 + cmx2xx_leds[1].gpio = CMX270_GPIO_GREEN;
  174 + }
142 175 platform_device_register(&cmx2xx_led_device);
143 176 }
144 177 #else
... ... @@ -437,7 +470,10 @@
437 470 {
438 471 cmx2xx_pm_init();
439 472  
440   - cmx270_init();
  473 + if (cpu_is_pxa25x())
  474 + cmx255_init();
  475 + else
  476 + cmx270_init();
441 477  
442 478 cmx2xx_init_dm9000();
443 479 cmx2xx_init_display();
... ... @@ -450,7 +486,13 @@
450 486 {
451 487 pxa27x_init_irq();
452 488  
453   - cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
  489 + if (cpu_is_pxa25x()) {
  490 + pxa25x_init_irq();
  491 + cmx2xx_pci_init_irq(CMX255_GPIO_IT8152_IRQ);
  492 + } else {
  493 + pxa27x_init_irq();
  494 + cmx2xx_pci_init_irq(CMX270_GPIO_IT8152_IRQ);
  495 + }
454 496 }
455 497  
456 498 #ifdef CONFIG_PCI
drivers/mtd/nand/cmx270_nand.c
... ... @@ -156,7 +156,7 @@
156 156 int mtd_parts_nb = 0;
157 157 int ret;
158 158  
159   - if (!machine_is_armcore())
  159 + if (!(machine_is_armcore() && cpu_is_pxa27x()))
160 160 return -ENODEV;
161 161  
162 162 ret = gpio_request(GPIO_NAND_CS, "NAND CS");