[ARM] 3371/1: ep93xx: gpio support

Patch from Lennert Buytenhek Add support for setting the direction of and getting/setting the value of the 64 GPIO lines. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

[ARM] 3371/1: ep93xx: gpio support
Patch from Lennert Buytenhek Add support for setting the direction of and getting/setting the value of the 64 GPIO lines. Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Lennert Buytenhek · Russell King
1 parent e7736d47a1
Showing 3 changed files with 176 additions and 0 deletions Side-by-side Diff
arch/arm/mach-ep93xx/core.c
include/asm-arm/arch-ep93xx/ep93xx-regs.h
include/asm-arm/arch-ep93xx/gpio.h
@@ -45,6 +45,7 @@
 #include <asm/mach/map.h>
 #include <asm/mach/time.h>
 #include <asm/mach/irq.h>
+#include <asm/arch/gpio.h>
  
 #include <asm/hardware/vic.h>
  
@@ -144,6 +145,73 @@
 	.init		= ep93xx_timer_init,
 	.offset		= ep93xx_gettimeoffset,
 };
+
+
+/*************************************************************************
+ * GPIO handling for EP93xx
+ *************************************************************************/
+static unsigned char data_register_offset[8] = {
+	0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40,
+};
+
+static unsigned char data_direction_register_offset[8] = {
+	0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44,
+};
+
+void gpio_line_config(int line, int direction)
+{
+	unsigned int data_direction_register;
+	unsigned long flags;
+	unsigned char v;
+
+	data_direction_register =
+		EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]);
+
+	local_irq_save(flags);
+	if (direction == GPIO_OUT) {
+		v = __raw_readb(data_direction_register);
+		v |= 1 << (line & 7);
+		__raw_writeb(v, data_direction_register);
+	} else if (direction == GPIO_IN) {
+		v = __raw_readb(data_direction_register);
+		v &= ~(1 << (line & 7));
+		__raw_writeb(v, data_direction_register);
+	}
+	local_irq_restore(flags);
+}
+EXPORT_SYMBOL(gpio_line_config);
+
+int gpio_line_get(int line)
+{
+	unsigned int data_register;
+
+	data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+
+	return !!(__raw_readb(data_register) & (1 << (line & 7)));
+}
+EXPORT_SYMBOL(gpio_line_get);
+
+void gpio_line_set(int line, int value)
+{
+	unsigned int data_register;
+	unsigned long flags;
+	unsigned char v;
+
+	data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
+
+	local_irq_save(flags);
+	if (value == EP93XX_GPIO_HIGH) {
+		v = __raw_readb(data_register);
+		v |= 1 << (line & 7);
+		__raw_writeb(v, data_register);
+	} else if (value == EP93XX_GPIO_LOW) {
+		v = __raw_readb(data_register);
+		v &= ~(1 << (line & 7));
+		__raw_writeb(v, data_register);
+	}
+	local_irq_restore(flags);
+}
+EXPORT_SYMBOL(gpio_line_set);
  
  
 /*************************************************************************
@@ -71,6 +71,7 @@
 #define EP93XX_SECURITY_BASE		(EP93XX_APB_VIRT_BASE + 0x00030000)
  
 #define EP93XX_GPIO_BASE		(EP93XX_APB_VIRT_BASE + 0x00040000)
+#define EP93XX_GPIO_REG(x)		(EP93XX_GPIO_BASE + (x))
  
 #define EP93XX_AAC_BASE			(EP93XX_APB_VIRT_BASE + 0x00080000)
  
+/*
+ * linux/include/asm-arm/arch-ep93xx/gpio.h
+ */
+
+#ifndef __ASM_ARCH_GPIO_H
+#define __ASM_ARCH_GPIO_H
+
+#define GPIO_IN				0
+#define GPIO_OUT			1
+
+#define EP93XX_GPIO_LOW			0
+#define EP93XX_GPIO_HIGH		1
+
+extern void gpio_line_config(int line, int direction);
+extern int  gpio_line_get(int line);
+extern void gpio_line_set(int line, int value);
+
+/* GPIO port A.  */
+#define EP93XX_GPIO_LINE_A(x)		((x) + 0)
+#define EP93XX_GPIO_LINE_EGPIO0		EP93XX_GPIO_LINE_A(0)
+#define EP93XX_GPIO_LINE_EGPIO1		EP93XX_GPIO_LINE_A(1)
+#define EP93XX_GPIO_LINE_EGPIO2		EP93XX_GPIO_LINE_A(2)
+#define EP93XX_GPIO_LINE_EGPIO3		EP93XX_GPIO_LINE_A(3)
+#define EP93XX_GPIO_LINE_EGPIO4		EP93XX_GPIO_LINE_A(4)
+#define EP93XX_GPIO_LINE_EGPIO5		EP93XX_GPIO_LINE_A(5)
+#define EP93XX_GPIO_LINE_EGPIO6		EP93XX_GPIO_LINE_A(6)
+#define EP93XX_GPIO_LINE_EGPIO7		EP93XX_GPIO_LINE_A(7)
+
+/* GPIO port B.  */
+#define EP93XX_GPIO_LINE_B(x)		((x) + 8)
+#define EP93XX_GPIO_LINE_EGPIO8		EP93XX_GPIO_LINE_B(0)
+#define EP93XX_GPIO_LINE_EGPIO9		EP93XX_GPIO_LINE_B(1)
+#define EP93XX_GPIO_LINE_EGPIO10	EP93XX_GPIO_LINE_B(2)
+#define EP93XX_GPIO_LINE_EGPIO11	EP93XX_GPIO_LINE_B(3)
+#define EP93XX_GPIO_LINE_EGPIO12	EP93XX_GPIO_LINE_B(4)
+#define EP93XX_GPIO_LINE_EGPIO13	EP93XX_GPIO_LINE_B(5)
+#define EP93XX_GPIO_LINE_EGPIO14	EP93XX_GPIO_LINE_B(6)
+#define EP93XX_GPIO_LINE_EGPIO15	EP93XX_GPIO_LINE_B(7)
+
+/* GPIO port C.  */
+#define EP93XX_GPIO_LINE_C(x)		((x) + 16)
+#define EP93XX_GPIO_LINE_ROW0		EP93XX_GPIO_LINE_C(0)
+#define EP93XX_GPIO_LINE_ROW1		EP93XX_GPIO_LINE_C(1)
+#define EP93XX_GPIO_LINE_ROW2		EP93XX_GPIO_LINE_C(2)
+#define EP93XX_GPIO_LINE_ROW3		EP93XX_GPIO_LINE_C(3)
+#define EP93XX_GPIO_LINE_ROW4		EP93XX_GPIO_LINE_C(4)
+#define EP93XX_GPIO_LINE_ROW5		EP93XX_GPIO_LINE_C(5)
+#define EP93XX_GPIO_LINE_ROW6		EP93XX_GPIO_LINE_C(6)
+#define EP93XX_GPIO_LINE_ROW7		EP93XX_GPIO_LINE_C(7)
+
+/* GPIO port D.  */
+#define EP93XX_GPIO_LINE_D(x)		((x) + 24)
+#define EP93XX_GPIO_LINE_COL0		EP93XX_GPIO_LINE_D(0)
+#define EP93XX_GPIO_LINE_COL1		EP93XX_GPIO_LINE_D(1)
+#define EP93XX_GPIO_LINE_COL2		EP93XX_GPIO_LINE_D(2)
+#define EP93XX_GPIO_LINE_COL3		EP93XX_GPIO_LINE_D(3)
+#define EP93XX_GPIO_LINE_COL4		EP93XX_GPIO_LINE_D(4)
+#define EP93XX_GPIO_LINE_COL5		EP93XX_GPIO_LINE_D(5)
+#define EP93XX_GPIO_LINE_COL6		EP93XX_GPIO_LINE_D(6)
+#define EP93XX_GPIO_LINE_COL7		EP93XX_GPIO_LINE_D(7)
+
+/* GPIO port E.  */
+#define EP93XX_GPIO_LINE_E(x)		((x) + 32)
+#define EP93XX_GPIO_LINE_GRLED		EP93XX_GPIO_LINE_E(0)
+#define EP93XX_GPIO_LINE_RDLED		EP93XX_GPIO_LINE_E(1)
+#define EP93XX_GPIO_LINE_DIORn		EP93XX_GPIO_LINE_E(2)
+#define EP93XX_GPIO_LINE_IDECS1n	EP93XX_GPIO_LINE_E(3)
+#define EP93XX_GPIO_LINE_IDECS2n	EP93XX_GPIO_LINE_E(4)
+#define EP93XX_GPIO_LINE_IDEDA0		EP93XX_GPIO_LINE_E(5)
+#define EP93XX_GPIO_LINE_IDEDA1		EP93XX_GPIO_LINE_E(6)
+#define EP93XX_GPIO_LINE_IDEDA2		EP93XX_GPIO_LINE_E(7)
+
+/* GPIO port F.  */
+#define EP93XX_GPIO_LINE_F(x)		((x) + 40)
+#define EP93XX_GPIO_LINE_WP		EP93XX_GPIO_LINE_F(0)
+#define EP93XX_GPIO_LINE_MCCD1		EP93XX_GPIO_LINE_F(1)
+#define EP93XX_GPIO_LINE_MCCD2		EP93XX_GPIO_LINE_F(2)
+#define EP93XX_GPIO_LINE_MCBVD1		EP93XX_GPIO_LINE_F(3)
+#define EP93XX_GPIO_LINE_MCBVD2		EP93XX_GPIO_LINE_F(4)
+#define EP93XX_GPIO_LINE_VS1		EP93XX_GPIO_LINE_F(5)
+#define EP93XX_GPIO_LINE_READY		EP93XX_GPIO_LINE_F(6)
+#define EP93XX_GPIO_LINE_VS2		EP93XX_GPIO_LINE_F(7)
+
+/* GPIO port G.  */
+#define EP93XX_GPIO_LINE_G(x)		((x) + 48)
+#define EP93XX_GPIO_LINE_EECLK		EP93XX_GPIO_LINE_G(0)
+#define EP93XX_GPIO_LINE_EEDAT		EP93XX_GPIO_LINE_G(1)
+#define EP93XX_GPIO_LINE_SLA0		EP93XX_GPIO_LINE_G(2)
+#define EP93XX_GPIO_LINE_SLA1		EP93XX_GPIO_LINE_G(3)
+#define EP93XX_GPIO_LINE_DD12		EP93XX_GPIO_LINE_G(4)
+#define EP93XX_GPIO_LINE_DD13		EP93XX_GPIO_LINE_G(5)
+#define EP93XX_GPIO_LINE_DD14		EP93XX_GPIO_LINE_G(6)
+#define EP93XX_GPIO_LINE_DD15		EP93XX_GPIO_LINE_G(7)
+
+/* GPIO port H.  */
+#define EP93XX_GPIO_LINE_H(x)		((x) + 56)
+#define EP93XX_GPIO_LINE_DD0		EP93XX_GPIO_LINE_H(0)
+#define EP93XX_GPIO_LINE_DD1		EP93XX_GPIO_LINE_H(1)
+#define EP93XX_GPIO_LINE_DD2		EP93XX_GPIO_LINE_H(2)
+#define EP93XX_GPIO_LINE_DD3		EP93XX_GPIO_LINE_H(3)
+#define EP93XX_GPIO_LINE_DD4		EP93XX_GPIO_LINE_H(4)
+#define EP93XX_GPIO_LINE_DD5		EP93XX_GPIO_LINE_H(5)
+#define EP93XX_GPIO_LINE_DD6		EP93XX_GPIO_LINE_H(6)
+#define EP93XX_GPIO_LINE_DD7		EP93XX_GPIO_LINE_H(7)
+
+
+#endif
...	...	@@ -45,6 +45,7 @@
45	45	#include <asm/mach/map.h>
46	46	#include <asm/mach/time.h>
47	47	#include <asm/mach/irq.h>
	48	+#include <asm/arch/gpio.h>
48	49
49	50	#include <asm/hardware/vic.h>
50	51
...	...	@@ -144,6 +145,73 @@
144	145	.init = ep93xx_timer_init,
145	146	.offset = ep93xx_gettimeoffset,
146	147	};
	148	+
	149	+
	150	+/*************************************************************************
	151	+ * GPIO handling for EP93xx
	152	+ *************************************************************************/
	153	+static unsigned char data_register_offset[8] = {
	154	+ 0x00, 0x04, 0x08, 0x0c, 0x20, 0x30, 0x38, 0x40,
	155	+};
	156	+
	157	+static unsigned char data_direction_register_offset[8] = {
	158	+ 0x10, 0x14, 0x18, 0x1c, 0x24, 0x34, 0x3c, 0x44,
	159	+};
	160	+
	161	+void gpio_line_config(int line, int direction)
	162	+{
	163	+ unsigned int data_direction_register;
	164	+ unsigned long flags;
	165	+ unsigned char v;
	166	+
	167	+ data_direction_register =
	168	+ EP93XX_GPIO_REG(data_direction_register_offset[line >> 3]);
	169	+
	170	+ local_irq_save(flags);
	171	+ if (direction == GPIO_OUT) {
	172	+ v = __raw_readb(data_direction_register);
	173	+ v \|= 1 << (line & 7);
	174	+ __raw_writeb(v, data_direction_register);
	175	+ } else if (direction == GPIO_IN) {
	176	+ v = __raw_readb(data_direction_register);
	177	+ v &= ~(1 << (line & 7));
	178	+ __raw_writeb(v, data_direction_register);
	179	+ }
	180	+ local_irq_restore(flags);
	181	+}
	182	+EXPORT_SYMBOL(gpio_line_config);
	183	+
	184	+int gpio_line_get(int line)
	185	+{
	186	+ unsigned int data_register;
	187	+
	188	+ data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
	189	+
	190	+ return !!(__raw_readb(data_register) & (1 << (line & 7)));
	191	+}
	192	+EXPORT_SYMBOL(gpio_line_get);
	193	+
	194	+void gpio_line_set(int line, int value)
	195	+{
	196	+ unsigned int data_register;
	197	+ unsigned long flags;
	198	+ unsigned char v;
	199	+
	200	+ data_register = EP93XX_GPIO_REG(data_register_offset[line >> 3]);
	201	+
	202	+ local_irq_save(flags);
	203	+ if (value == EP93XX_GPIO_HIGH) {
	204	+ v = __raw_readb(data_register);
	205	+ v \|= 1 << (line & 7);
	206	+ __raw_writeb(v, data_register);
	207	+ } else if (value == EP93XX_GPIO_LOW) {
	208	+ v = __raw_readb(data_register);
	209	+ v &= ~(1 << (line & 7));
	210	+ __raw_writeb(v, data_register);
	211	+ }
	212	+ local_irq_restore(flags);
	213	+}
	214	+EXPORT_SYMBOL(gpio_line_set);
147	215
148	216
149	217	/*************************************************************************
...	...	@@ -71,6 +71,7 @@
71	71	#define EP93XX_SECURITY_BASE (EP93XX_APB_VIRT_BASE + 0x00030000)
72	72
73	73	#define EP93XX_GPIO_BASE (EP93XX_APB_VIRT_BASE + 0x00040000)
	74	+#define EP93XX_GPIO_REG(x) (EP93XX_GPIO_BASE + (x))
74	75
75	76	#define EP93XX_AAC_BASE (EP93XX_APB_VIRT_BASE + 0x00080000)
76	77
	1	+/*
	2	+ * linux/include/asm-arm/arch-ep93xx/gpio.h
	3	+ */
	4	+
	5	+#ifndef __ASM_ARCH_GPIO_H
	6	+#define __ASM_ARCH_GPIO_H
	7	+
	8	+#define GPIO_IN 0
	9	+#define GPIO_OUT 1
	10	+
	11	+#define EP93XX_GPIO_LOW 0
	12	+#define EP93XX_GPIO_HIGH 1
	13	+
	14	+extern void gpio_line_config(int line, int direction);
	15	+extern int gpio_line_get(int line);
	16	+extern void gpio_line_set(int line, int value);
	17	+
	18	+/* GPIO port A. */
	19	+#define EP93XX_GPIO_LINE_A(x) ((x) + 0)
	20	+#define EP93XX_GPIO_LINE_EGPIO0 EP93XX_GPIO_LINE_A(0)
	21	+#define EP93XX_GPIO_LINE_EGPIO1 EP93XX_GPIO_LINE_A(1)
	22	+#define EP93XX_GPIO_LINE_EGPIO2 EP93XX_GPIO_LINE_A(2)
	23	+#define EP93XX_GPIO_LINE_EGPIO3 EP93XX_GPIO_LINE_A(3)
	24	+#define EP93XX_GPIO_LINE_EGPIO4 EP93XX_GPIO_LINE_A(4)
	25	+#define EP93XX_GPIO_LINE_EGPIO5 EP93XX_GPIO_LINE_A(5)
	26	+#define EP93XX_GPIO_LINE_EGPIO6 EP93XX_GPIO_LINE_A(6)
	27	+#define EP93XX_GPIO_LINE_EGPIO7 EP93XX_GPIO_LINE_A(7)
	28	+
	29	+/* GPIO port B. */
	30	+#define EP93XX_GPIO_LINE_B(x) ((x) + 8)
	31	+#define EP93XX_GPIO_LINE_EGPIO8 EP93XX_GPIO_LINE_B(0)
	32	+#define EP93XX_GPIO_LINE_EGPIO9 EP93XX_GPIO_LINE_B(1)
	33	+#define EP93XX_GPIO_LINE_EGPIO10 EP93XX_GPIO_LINE_B(2)
	34	+#define EP93XX_GPIO_LINE_EGPIO11 EP93XX_GPIO_LINE_B(3)
	35	+#define EP93XX_GPIO_LINE_EGPIO12 EP93XX_GPIO_LINE_B(4)
	36	+#define EP93XX_GPIO_LINE_EGPIO13 EP93XX_GPIO_LINE_B(5)
	37	+#define EP93XX_GPIO_LINE_EGPIO14 EP93XX_GPIO_LINE_B(6)
	38	+#define EP93XX_GPIO_LINE_EGPIO15 EP93XX_GPIO_LINE_B(7)
	39	+
	40	+/* GPIO port C. */
	41	+#define EP93XX_GPIO_LINE_C(x) ((x) + 16)
	42	+#define EP93XX_GPIO_LINE_ROW0 EP93XX_GPIO_LINE_C(0)
	43	+#define EP93XX_GPIO_LINE_ROW1 EP93XX_GPIO_LINE_C(1)
	44	+#define EP93XX_GPIO_LINE_ROW2 EP93XX_GPIO_LINE_C(2)
	45	+#define EP93XX_GPIO_LINE_ROW3 EP93XX_GPIO_LINE_C(3)
	46	+#define EP93XX_GPIO_LINE_ROW4 EP93XX_GPIO_LINE_C(4)
	47	+#define EP93XX_GPIO_LINE_ROW5 EP93XX_GPIO_LINE_C(5)
	48	+#define EP93XX_GPIO_LINE_ROW6 EP93XX_GPIO_LINE_C(6)
	49	+#define EP93XX_GPIO_LINE_ROW7 EP93XX_GPIO_LINE_C(7)
	50	+
	51	+/* GPIO port D. */
	52	+#define EP93XX_GPIO_LINE_D(x) ((x) + 24)
	53	+#define EP93XX_GPIO_LINE_COL0 EP93XX_GPIO_LINE_D(0)
	54	+#define EP93XX_GPIO_LINE_COL1 EP93XX_GPIO_LINE_D(1)
	55	+#define EP93XX_GPIO_LINE_COL2 EP93XX_GPIO_LINE_D(2)
	56	+#define EP93XX_GPIO_LINE_COL3 EP93XX_GPIO_LINE_D(3)
	57	+#define EP93XX_GPIO_LINE_COL4 EP93XX_GPIO_LINE_D(4)
	58	+#define EP93XX_GPIO_LINE_COL5 EP93XX_GPIO_LINE_D(5)
	59	+#define EP93XX_GPIO_LINE_COL6 EP93XX_GPIO_LINE_D(6)
	60	+#define EP93XX_GPIO_LINE_COL7 EP93XX_GPIO_LINE_D(7)
	61	+
	62	+/* GPIO port E. */
	63	+#define EP93XX_GPIO_LINE_E(x) ((x) + 32)
	64	+#define EP93XX_GPIO_LINE_GRLED EP93XX_GPIO_LINE_E(0)
	65	+#define EP93XX_GPIO_LINE_RDLED EP93XX_GPIO_LINE_E(1)
	66	+#define EP93XX_GPIO_LINE_DIORn EP93XX_GPIO_LINE_E(2)
	67	+#define EP93XX_GPIO_LINE_IDECS1n EP93XX_GPIO_LINE_E(3)
	68	+#define EP93XX_GPIO_LINE_IDECS2n EP93XX_GPIO_LINE_E(4)
	69	+#define EP93XX_GPIO_LINE_IDEDA0 EP93XX_GPIO_LINE_E(5)
	70	+#define EP93XX_GPIO_LINE_IDEDA1 EP93XX_GPIO_LINE_E(6)
	71	+#define EP93XX_GPIO_LINE_IDEDA2 EP93XX_GPIO_LINE_E(7)
	72	+
	73	+/* GPIO port F. */
	74	+#define EP93XX_GPIO_LINE_F(x) ((x) + 40)
	75	+#define EP93XX_GPIO_LINE_WP EP93XX_GPIO_LINE_F(0)
	76	+#define EP93XX_GPIO_LINE_MCCD1 EP93XX_GPIO_LINE_F(1)
	77	+#define EP93XX_GPIO_LINE_MCCD2 EP93XX_GPIO_LINE_F(2)
	78	+#define EP93XX_GPIO_LINE_MCBVD1 EP93XX_GPIO_LINE_F(3)
	79	+#define EP93XX_GPIO_LINE_MCBVD2 EP93XX_GPIO_LINE_F(4)
	80	+#define EP93XX_GPIO_LINE_VS1 EP93XX_GPIO_LINE_F(5)
	81	+#define EP93XX_GPIO_LINE_READY EP93XX_GPIO_LINE_F(6)
	82	+#define EP93XX_GPIO_LINE_VS2 EP93XX_GPIO_LINE_F(7)
	83	+
	84	+/* GPIO port G. */
	85	+#define EP93XX_GPIO_LINE_G(x) ((x) + 48)
	86	+#define EP93XX_GPIO_LINE_EECLK EP93XX_GPIO_LINE_G(0)
	87	+#define EP93XX_GPIO_LINE_EEDAT EP93XX_GPIO_LINE_G(1)
	88	+#define EP93XX_GPIO_LINE_SLA0 EP93XX_GPIO_LINE_G(2)
	89	+#define EP93XX_GPIO_LINE_SLA1 EP93XX_GPIO_LINE_G(3)
	90	+#define EP93XX_GPIO_LINE_DD12 EP93XX_GPIO_LINE_G(4)
	91	+#define EP93XX_GPIO_LINE_DD13 EP93XX_GPIO_LINE_G(5)
	92	+#define EP93XX_GPIO_LINE_DD14 EP93XX_GPIO_LINE_G(6)
	93	+#define EP93XX_GPIO_LINE_DD15 EP93XX_GPIO_LINE_G(7)
	94	+
	95	+/* GPIO port H. */
	96	+#define EP93XX_GPIO_LINE_H(x) ((x) + 56)
	97	+#define EP93XX_GPIO_LINE_DD0 EP93XX_GPIO_LINE_H(0)
	98	+#define EP93XX_GPIO_LINE_DD1 EP93XX_GPIO_LINE_H(1)
	99	+#define EP93XX_GPIO_LINE_DD2 EP93XX_GPIO_LINE_H(2)
	100	+#define EP93XX_GPIO_LINE_DD3 EP93XX_GPIO_LINE_H(3)
	101	+#define EP93XX_GPIO_LINE_DD4 EP93XX_GPIO_LINE_H(4)
	102	+#define EP93XX_GPIO_LINE_DD5 EP93XX_GPIO_LINE_H(5)
	103	+#define EP93XX_GPIO_LINE_DD6 EP93XX_GPIO_LINE_H(6)
	104	+#define EP93XX_GPIO_LINE_DD7 EP93XX_GPIO_LINE_H(7)
	105	+
	106	+
	107	+#endif