Eric Lee / smarc-fsl-linux-kernel

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Commit b580b899dd05a007ad232ee49a07b32d91876462

Authored by Russell King
1 parent e745a6676c

ARM: GIC: provide a single initialization function for boot CPU 

Provide gic_init() which initializes the GIC distributor and current
CPU's GIC interface for the boot (or single) CPU.

Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>

Showing 14 changed files with 46 additions and 39 deletions Side-by-side Diff

arch/arm/common/gic.c
Diff comments   View file @ b580b89
... ... @@ -213,8 +213,8 @@
213 213 set_irq_chained_handler(irq, gic_handle_cascade_irq);
214 214 }
215 215  
216   -void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
217   - unsigned int irq_start)
  216 +static void __init gic_dist_init(unsigned int gic_nr, void __iomem *base,
  217 + unsigned int irq_start)
218 218 {
219 219 unsigned int gic_irqs, irq_limit, i;
220 220 u32 cpumask = 1 << smp_processor_id();
... ... @@ -312,6 +312,13 @@
312 312  
313 313 writel(0xf0, base + GIC_CPU_PRIMASK);
314 314 writel(1, base + GIC_CPU_CTRL);
  315 +}
  316 +
  317 +void __init gic_init(unsigned int gic_nr, unsigned int irq_start,
  318 + void __iomem *dist_base, void __iomem *cpu_base)
  319 +{
  320 + gic_dist_init(gic_nr, dist_base, irq_start);
  321 + gic_cpu_init(gic_nr, cpu_base);
315 322 }
316 323  
317 324 #ifdef CONFIG_SMP
arch/arm/include/asm/hardware/gic.h
Diff comments   View file @ b580b89
... ... @@ -33,8 +33,8 @@
33 33 #define GIC_DIST_SOFTINT 0xf00
34 34  
35 35 #ifndef __ASSEMBLY__
36   -void gic_dist_init(unsigned int gic_nr, void __iomem *base, unsigned int irq_start);
37 36 void gic_cpu_init(unsigned int gic_nr, void __iomem *base);
  37 +void gic_init(unsigned int, unsigned int, void __iomem *, void __iomem *);
38 38 void gic_cascade_irq(unsigned int gic_nr, unsigned int irq);
39 39 void gic_raise_softirq(const struct cpumask *mask, unsigned int irq);
40 40 #endif
arch/arm/mach-cns3xxx/core.c
Diff comments   View file @ b580b89
... ... @@ -74,8 +74,8 @@
74 74 void __init cns3xxx_init_irq(void)
75 75 {
76 76 gic_cpu_base_addr = __io(CNS3XXX_TC11MP_GIC_CPU_BASE_VIRT);
77   - gic_dist_init(0, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT), 29);
78   - gic_cpu_init(0, gic_cpu_base_addr);
  77 + gic_init(0, 29, __io(CNS3XXX_TC11MP_GIC_DIST_BASE_VIRT),
  78 + gic_cpu_base_addr);
79 79 }
80 80  
81 81 void cns3xxx_power_off(void)
arch/arm/mach-msm/board-msm8x60.c
Diff comments   View file @ b580b89
... ... @@ -44,9 +44,8 @@
44 44 {
45 45 unsigned int i;
46 46  
47   - gic_dist_init(0, MSM_QGIC_DIST_BASE, GIC_PPI_START);
48 47 gic_cpu_base_addr = (void *)MSM_QGIC_CPU_BASE;
49   - gic_cpu_init(0, MSM_QGIC_CPU_BASE);
  48 + gic_init(0, GIC_PPI_START, MSM_QGIC_DIST_BASE, gic_cpu_base_addr);
50 49  
51 50 /* Edge trigger PPIs except AVS_SVICINT and AVS_SVICINTSWDONE */
52 51 writel(0xFFFFD7FF, MSM_QGIC_DIST_BASE + GIC_DIST_CONFIG + 4);
arch/arm/mach-omap2/omap4-common.c
Diff comments   View file @ b580b89
... ... @@ -35,12 +35,12 @@
35 35 /* Static mapping, never released */
36 36 gic_dist_base_addr = ioremap(OMAP44XX_GIC_DIST_BASE, SZ_4K);
37 37 BUG_ON(!gic_dist_base_addr);
38   - gic_dist_init(0, gic_dist_base_addr, 29);
39 38  
40 39 /* Static mapping, never released */
41 40 gic_cpu_base_addr = ioremap(OMAP44XX_GIC_CPU_BASE, SZ_512);
42 41 BUG_ON(!gic_cpu_base_addr);
43   - gic_cpu_init(0, gic_cpu_base_addr);
  42 +
  43 + gic_init(0, 29, gic_dist_base_addr, gic_cpu_base_addr);
44 44 }
45 45  
46 46 #ifdef CONFIG_CACHE_L2X0
arch/arm/mach-realview/realview_eb.c
Diff comments   View file @ b580b89
... ... @@ -365,20 +365,20 @@
365 365  
366 366 /* core tile GIC, primary */
367 367 gic_cpu_base_addr = __io_address(REALVIEW_EB11MP_GIC_CPU_BASE);
368   - gic_dist_init(0, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE), 29);
369   - gic_cpu_init(0, gic_cpu_base_addr);
  368 + gic_init(0, 29, __io_address(REALVIEW_EB11MP_GIC_DIST_BASE),
  369 + gic_cpu_base_addr);
370 370  
371 371 #ifndef CONFIG_REALVIEW_EB_ARM11MP_REVB
372 372 /* board GIC, secondary */
373   - gic_dist_init(1, __io_address(REALVIEW_EB_GIC_DIST_BASE), 64);
374   - gic_cpu_init(1, __io_address(REALVIEW_EB_GIC_CPU_BASE));
  373 + gic_init(1, 64, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  374 + __io_address(REALVIEW_EB_GIC_CPU_BASE));
375 375 gic_cascade_irq(1, IRQ_EB11MP_EB_IRQ1);
376 376 #endif
377 377 } else {
378 378 /* board GIC, primary */
379 379 gic_cpu_base_addr = __io_address(REALVIEW_EB_GIC_CPU_BASE);
380   - gic_dist_init(0, __io_address(REALVIEW_EB_GIC_DIST_BASE), 29);
381   - gic_cpu_init(0, gic_cpu_base_addr);
  380 + gic_init(0, 29, __io_address(REALVIEW_EB_GIC_DIST_BASE),
  381 + gic_cpu_base_addr);
382 382 }
383 383 }
384 384  
arch/arm/mach-realview/realview_pb1176.c
Diff comments   View file @ b580b89
... ... @@ -305,12 +305,14 @@
305 305 {
306 306 /* ARM1176 DevChip GIC, primary */
307 307 gic_cpu_base_addr = __io_address(REALVIEW_DC1176_GIC_CPU_BASE);
308   - gic_dist_init(0, __io_address(REALVIEW_DC1176_GIC_DIST_BASE), IRQ_DC1176_GIC_START);
309   - gic_cpu_init(0, gic_cpu_base_addr);
  308 + gic_init(0, IRQ_DC1176_GIC_START,
  309 + __io_address(REALVIEW_DC1176_GIC_DIST_BASE),
  310 + gic_cpu_base_addr);
310 311  
311 312 /* board GIC, secondary */
312   - gic_dist_init(1, __io_address(REALVIEW_PB1176_GIC_DIST_BASE), IRQ_PB1176_GIC_START);
313   - gic_cpu_init(1, __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
  313 + gic_init(1, IRQ_PB1176_GIC_START,
  314 + __io_address(REALVIEW_PB1176_GIC_DIST_BASE),
  315 + __io_address(REALVIEW_PB1176_GIC_CPU_BASE));
314 316 gic_cascade_irq(1, IRQ_DC1176_PB_IRQ1);
315 317 }
316 318  
arch/arm/mach-realview/realview_pb11mp.c
Diff comments   View file @ b580b89
... ... @@ -310,12 +310,13 @@
310 310  
311 311 /* ARM11MPCore test chip GIC, primary */
312 312 gic_cpu_base_addr = __io_address(REALVIEW_TC11MP_GIC_CPU_BASE);
313   - gic_dist_init(0, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE), 29);
314   - gic_cpu_init(0, gic_cpu_base_addr);
  313 + gic_init(0, 29, __io_address(REALVIEW_TC11MP_GIC_DIST_BASE),
  314 + gic_cpu_base_addr);
315 315  
316 316 /* board GIC, secondary */
317   - gic_dist_init(1, __io_address(REALVIEW_PB11MP_GIC_DIST_BASE), IRQ_PB11MP_GIC_START);
318   - gic_cpu_init(1, __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
  317 + gic_init(1, IRQ_PB11MP_GIC_START,
  318 + __io_address(REALVIEW_PB11MP_GIC_DIST_BASE),
  319 + __io_address(REALVIEW_PB11MP_GIC_CPU_BASE));
319 320 gic_cascade_irq(1, IRQ_TC11MP_PB_IRQ1);
320 321 }
321 322  
arch/arm/mach-realview/realview_pba8.c
Diff comments   View file @ b580b89
... ... @@ -274,8 +274,9 @@
274 274 {
275 275 /* ARM PB-A8 on-board GIC */
276 276 gic_cpu_base_addr = __io_address(REALVIEW_PBA8_GIC_CPU_BASE);
277   - gic_dist_init(0, __io_address(REALVIEW_PBA8_GIC_DIST_BASE), IRQ_PBA8_GIC_START);
278   - gic_cpu_init(0, __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
  277 + gic_init(0, IRQ_PBA8_GIC_START,
  278 + __io_address(REALVIEW_PBA8_GIC_DIST_BASE),
  279 + __io_address(REALVIEW_PBA8_GIC_CPU_BASE));
279 280 }
280 281  
281 282 static void __init realview_pba8_timer_init(void)
arch/arm/mach-realview/realview_pbx.c
Diff comments   View file @ b580b89
... ... @@ -314,14 +314,13 @@
314 314 /* ARM PBX on-board GIC */
315 315 if (core_tile_pbx11mp() || core_tile_pbxa9mp()) {
316 316 gic_cpu_base_addr = __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE);
317   - gic_dist_init(0, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE),
318   - 29);
319   - gic_cpu_init(0, __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE));
  317 + gic_init(0, 29, __io_address(REALVIEW_PBX_TILE_GIC_DIST_BASE),
  318 + __io_address(REALVIEW_PBX_TILE_GIC_CPU_BASE));
320 319 } else {
321 320 gic_cpu_base_addr = __io_address(REALVIEW_PBX_GIC_CPU_BASE);
322   - gic_dist_init(0, __io_address(REALVIEW_PBX_GIC_DIST_BASE),
323   - IRQ_PBX_GIC_START);
324   - gic_cpu_init(0, __io_address(REALVIEW_PBX_GIC_CPU_BASE));
  321 + gic_init(0, IRQ_PBX_GIC_START,
  322 + __io_address(REALVIEW_PBX_GIC_DIST_BASE),
  323 + __io_address(REALVIEW_PBX_GIC_CPU_BASE));
325 324 }
326 325 }
327 326  
arch/arm/mach-s5pv310/cpu.c
Diff comments   View file @ b580b89
... ... @@ -123,8 +123,7 @@
123 123 int irq;
124 124  
125 125 gic_cpu_base_addr = S5P_VA_GIC_CPU;
126   - gic_dist_init(0, S5P_VA_GIC_DIST, IRQ_LOCALTIMER);
127   - gic_cpu_init(0, S5P_VA_GIC_CPU);
  126 + gic_init(0, IRQ_LOCALTIMER, S5P_VA_GIC_DIST, S5P_VA_GIC_CPU);
128 127  
129 128 for (irq = 0; irq < MAX_COMBINER_NR; irq++) {
130 129 combiner_init(irq, (void __iomem *)S5P_VA_COMBINER(irq),
arch/arm/mach-tegra/irq.c
Diff comments   View file @ b580b89
... ... @@ -94,8 +94,8 @@
94 94 writel(0, ictlr_to_virt(i) + ICTLR_CPU_IEP_CLASS);
95 95 }
96 96  
97   - gic_dist_init(0, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE), 29);
98   - gic_cpu_init(0, IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
  97 + gic_init(0, 29, IO_ADDRESS(TEGRA_ARM_INT_DIST_BASE),
  98 + IO_ADDRESS(TEGRA_ARM_PERIF_BASE + 0x100));
99 99  
100 100 gic = get_irq_chip(29);
101 101 gic_unmask_irq = gic->unmask;
arch/arm/mach-ux500/cpu.c
Diff comments   View file @ b580b89
... ... @@ -61,8 +61,8 @@
61 61  
62 62 void __init ux500_init_irq(void)
63 63 {
64   - gic_dist_init(0, __io_address(UX500_GIC_DIST_BASE), 29);
65   - gic_cpu_init(0, __io_address(UX500_GIC_CPU_BASE));
  64 + gic_init(0, 29, __io_address(UX500_GIC_DIST_BASE),
  65 + __io_address(UX500_GIC_CPU_BASE));
66 66  
67 67 /*
68 68 * Init clocks here so that they are available for system timer
arch/arm/mach-vexpress/ct-ca9x4.c
Diff comments   View file @ b580b89
... ... @@ -65,8 +65,7 @@
65 65 static void __init ct_ca9x4_init_irq(void)
66 66 {
67 67 gic_cpu_base_addr = MMIO_P2V(A9_MPCORE_GIC_CPU);
68   - gic_dist_init(0, MMIO_P2V(A9_MPCORE_GIC_DIST), 29);
69   - gic_cpu_init(0, gic_cpu_base_addr);
  68 + gic_init(0, 29, MMIO_P2V(A9_MPCORE_GIC_DIST), gic_cpu_base_addr);
70 69 }
71 70  
72 71 #if 0