Commit bfe645adf1a79b873b528556523abb46f281a5dc
Committed by
Russell King
1 parent
9e73c84c89
[ARM] msm: dma support for MSM7X00A
Signed-off-by: Brian Swetland <swetland@google.com>
Showing 3 changed files with 365 additions and 1 deletions Side-by-side Diff
arch/arm/mach-msm/Makefile
arch/arm/mach-msm/dma.c
1 | +/* linux/arch/arm/mach-msm/dma.c | |
2 | + * | |
3 | + * Copyright (C) 2007 Google, Inc. | |
4 | + * | |
5 | + * This software is licensed under the terms of the GNU General Public | |
6 | + * License version 2, as published by the Free Software Foundation, and | |
7 | + * may be copied, distributed, and modified under those terms. | |
8 | + * | |
9 | + * This program is distributed in the hope that it will be useful, | |
10 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | + * GNU General Public License for more details. | |
13 | + * | |
14 | + */ | |
15 | + | |
16 | +#include <asm/io.h> | |
17 | +#include <linux/interrupt.h> | |
18 | +#include <asm/arch/dma.h> | |
19 | + | |
20 | +#define MSM_DMOV_CHANNEL_COUNT 16 | |
21 | + | |
22 | +enum { | |
23 | + MSM_DMOV_PRINT_ERRORS = 1, | |
24 | + MSM_DMOV_PRINT_IO = 2, | |
25 | + MSM_DMOV_PRINT_FLOW = 4 | |
26 | +}; | |
27 | + | |
28 | +static DEFINE_SPINLOCK(msm_dmov_lock); | |
29 | +static struct msm_dmov_cmd active_command; | |
30 | +static struct list_head ready_commands[MSM_DMOV_CHANNEL_COUNT]; | |
31 | +static struct list_head active_commands[MSM_DMOV_CHANNEL_COUNT]; | |
32 | +unsigned int msm_dmov_print_mask = MSM_DMOV_PRINT_ERRORS; | |
33 | + | |
34 | +#define MSM_DMOV_DPRINTF(mask, format, args...) \ | |
35 | + do { \ | |
36 | + if ((mask) & msm_dmov_print_mask) \ | |
37 | + printk(KERN_ERR format, args); \ | |
38 | + } while (0) | |
39 | +#define PRINT_ERROR(format, args...) \ | |
40 | + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_ERRORS, format, args); | |
41 | +#define PRINT_IO(format, args...) \ | |
42 | + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_IO, format, args); | |
43 | +#define PRINT_FLOW(format, args...) \ | |
44 | + MSM_DMOV_DPRINTF(MSM_DMOV_PRINT_FLOW, format, args); | |
45 | + | |
46 | +void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd) | |
47 | +{ | |
48 | + unsigned long irq_flags; | |
49 | + unsigned int status; | |
50 | + | |
51 | + spin_lock_irqsave(&msm_dmov_lock, irq_flags); | |
52 | + status = readl(DMOV_STATUS(id)); | |
53 | + if (list_empty(&ready_commands[id]) && | |
54 | + (status & DMOV_STATUS_CMD_PTR_RDY)) { | |
55 | +#if 0 | |
56 | + if (list_empty(&active_commands[id])) { | |
57 | + PRINT_FLOW("msm_dmov_enqueue_cmd(%d), enable interrupt\n", id); | |
58 | + writel(DMOV_CONFIG_IRQ_EN, DMOV_CONFIG(id)); | |
59 | + } | |
60 | +#endif | |
61 | + PRINT_IO("msm_dmov_enqueue_cmd(%d), start command, status %x\n", id, status); | |
62 | + list_add_tail(&cmd->list, &active_commands[id]); | |
63 | + writel(cmd->cmdptr, DMOV_CMD_PTR(id)); | |
64 | + } else { | |
65 | + if (list_empty(&active_commands[id])) | |
66 | + PRINT_ERROR("msm_dmov_enqueue_cmd(%d), error datamover stalled, status %x\n", id, status); | |
67 | + | |
68 | + PRINT_IO("msm_dmov_enqueue_cmd(%d), enqueue command, status %x\n", id, status); | |
69 | + list_add_tail(&cmd->list, &ready_commands[id]); | |
70 | + } | |
71 | + spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); | |
72 | +} | |
73 | + | |
74 | +struct msm_dmov_exec_cmdptr_cmd { | |
75 | + struct msm_dmov_cmd dmov_cmd; | |
76 | + struct completion complete; | |
77 | + unsigned id; | |
78 | + unsigned int result; | |
79 | + unsigned int flush[6]; | |
80 | +}; | |
81 | + | |
82 | +static void dmov_exec_cmdptr_complete_func(struct msm_dmov_cmd *_cmd, unsigned int result) | |
83 | +{ | |
84 | + struct msm_dmov_exec_cmdptr_cmd *cmd = container_of(_cmd, struct msm_dmov_exec_cmdptr_cmd, dmov_cmd); | |
85 | + cmd->result = result; | |
86 | + if (result != 0x80000002) { | |
87 | + cmd->flush[0] = readl(DMOV_FLUSH0(cmd->id)); | |
88 | + cmd->flush[1] = readl(DMOV_FLUSH1(cmd->id)); | |
89 | + cmd->flush[2] = readl(DMOV_FLUSH2(cmd->id)); | |
90 | + cmd->flush[3] = readl(DMOV_FLUSH3(cmd->id)); | |
91 | + cmd->flush[4] = readl(DMOV_FLUSH4(cmd->id)); | |
92 | + cmd->flush[5] = readl(DMOV_FLUSH5(cmd->id)); | |
93 | + } | |
94 | + complete(&cmd->complete); | |
95 | +} | |
96 | + | |
97 | +int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr) | |
98 | +{ | |
99 | + struct msm_dmov_exec_cmdptr_cmd cmd; | |
100 | + | |
101 | + PRINT_FLOW("dmov_exec_cmdptr(%d, %x)\n", id, cmdptr); | |
102 | + | |
103 | + cmd.dmov_cmd.cmdptr = cmdptr; | |
104 | + cmd.dmov_cmd.complete_func = dmov_exec_cmdptr_complete_func; | |
105 | + cmd.id = id; | |
106 | + init_completion(&cmd.complete); | |
107 | + | |
108 | + msm_dmov_enqueue_cmd(id, &cmd.dmov_cmd); | |
109 | + wait_for_completion(&cmd.complete); | |
110 | + | |
111 | + if (cmd.result != 0x80000002) { | |
112 | + PRINT_ERROR("dmov_exec_cmdptr(%d): ERROR, result: %x\n", id, cmd.result); | |
113 | + PRINT_ERROR("dmov_exec_cmdptr(%d): flush: %x %x %x %x\n", | |
114 | + id, cmd.flush[0], cmd.flush[1], cmd.flush[2], cmd.flush[3]); | |
115 | + return -EIO; | |
116 | + } | |
117 | + PRINT_FLOW("dmov_exec_cmdptr(%d, %x) done\n", id, cmdptr); | |
118 | + return 0; | |
119 | +} | |
120 | + | |
121 | + | |
122 | +static irqreturn_t msm_datamover_irq_handler(int irq, void *dev_id) | |
123 | +{ | |
124 | + unsigned int int_status, mask, id; | |
125 | + unsigned long irq_flags; | |
126 | + unsigned int ch_status; | |
127 | + unsigned int ch_result; | |
128 | + struct msm_dmov_cmd *cmd; | |
129 | + | |
130 | + spin_lock_irqsave(&msm_dmov_lock, irq_flags); | |
131 | + | |
132 | + int_status = readl(DMOV_ISR); /* read and clear interrupt */ | |
133 | + PRINT_FLOW("msm_datamover_irq_handler: DMOV_ISR %x\n", int_status); | |
134 | + | |
135 | + while (int_status) { | |
136 | + mask = int_status & -int_status; | |
137 | + id = fls(mask) - 1; | |
138 | + PRINT_FLOW("msm_datamover_irq_handler %08x %08x id %d\n", int_status, mask, id); | |
139 | + int_status &= ~mask; | |
140 | + ch_status = readl(DMOV_STATUS(id)); | |
141 | + if (!(ch_status & DMOV_STATUS_RSLT_VALID)) { | |
142 | + PRINT_FLOW("msm_datamover_irq_handler id %d, result not valid %x\n", id, ch_status); | |
143 | + continue; | |
144 | + } | |
145 | + do { | |
146 | + ch_result = readl(DMOV_RSLT(id)); | |
147 | + if (list_empty(&active_commands[id])) { | |
148 | + PRINT_ERROR("msm_datamover_irq_handler id %d, got result " | |
149 | + "with no active command, status %x, result %x\n", | |
150 | + id, ch_status, ch_result); | |
151 | + cmd = NULL; | |
152 | + } else | |
153 | + cmd = list_entry(active_commands[id].next, typeof(*cmd), list); | |
154 | + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x, result %x\n", id, ch_status, ch_result); | |
155 | + if (ch_result & DMOV_RSLT_DONE) { | |
156 | + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", | |
157 | + id, ch_status); | |
158 | + PRINT_IO("msm_datamover_irq_handler id %d, got result " | |
159 | + "for %p, result %x\n", id, cmd, ch_result); | |
160 | + if (cmd) { | |
161 | + list_del(&cmd->list); | |
162 | + cmd->complete_func(cmd, ch_result); | |
163 | + } | |
164 | + } | |
165 | + if (ch_result & DMOV_RSLT_FLUSH) { | |
166 | + unsigned int flush0 = readl(DMOV_FLUSH0(id)); | |
167 | + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | |
168 | + PRINT_FLOW("msm_datamover_irq_handler id %d, flush, result %x, flush0 %x\n", id, ch_result, flush0); | |
169 | + if (cmd) { | |
170 | + list_del(&cmd->list); | |
171 | + cmd->complete_func(cmd, ch_result); | |
172 | + } | |
173 | + } | |
174 | + if (ch_result & DMOV_RSLT_ERROR) { | |
175 | + unsigned int flush0 = readl(DMOV_FLUSH0(id)); | |
176 | + PRINT_ERROR("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | |
177 | + PRINT_ERROR("msm_datamover_irq_handler id %d, error, result %x, flush0 %x\n", id, ch_result, flush0); | |
178 | + if (cmd) { | |
179 | + list_del(&cmd->list); | |
180 | + cmd->complete_func(cmd, ch_result); | |
181 | + } | |
182 | + /* this does not seem to work, once we get an error */ | |
183 | + /* the datamover will no longer accept commands */ | |
184 | + writel(0, DMOV_FLUSH0(id)); | |
185 | + } | |
186 | + ch_status = readl(DMOV_STATUS(id)); | |
187 | + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | |
188 | + if ((ch_status & DMOV_STATUS_CMD_PTR_RDY) && !list_empty(&ready_commands[id])) { | |
189 | + cmd = list_entry(ready_commands[id].next, typeof(*cmd), list); | |
190 | + list_del(&cmd->list); | |
191 | + list_add_tail(&cmd->list, &active_commands[id]); | |
192 | + PRINT_FLOW("msm_datamover_irq_handler id %d, start command\n", id); | |
193 | + writel(cmd->cmdptr, DMOV_CMD_PTR(id)); | |
194 | + } | |
195 | + } while (ch_status & DMOV_STATUS_RSLT_VALID); | |
196 | + PRINT_FLOW("msm_datamover_irq_handler id %d, status %x\n", id, ch_status); | |
197 | + } | |
198 | + spin_unlock_irqrestore(&msm_dmov_lock, irq_flags); | |
199 | + return IRQ_HANDLED; | |
200 | +} | |
201 | + | |
202 | +static int __init msm_init_datamover(void) | |
203 | +{ | |
204 | + int i; | |
205 | + for (i = 0; i < MSM_DMOV_CHANNEL_COUNT; i++) { | |
206 | + INIT_LIST_HEAD(&ready_commands[i]); | |
207 | + INIT_LIST_HEAD(&active_commands[i]); | |
208 | + writel(DMOV_CONFIG_IRQ_EN | DMOV_CONFIG_FORCE_TOP_PTR_RSLT | DMOV_CONFIG_FORCE_FLUSH_RSLT, DMOV_CONFIG(i)); | |
209 | + } | |
210 | + return request_irq(INT_ADM_AARM, msm_datamover_irq_handler, 0, "msmdatamover", NULL); | |
211 | +} | |
212 | + | |
213 | +arch_initcall(msm_init_datamover); |
include/asm-arm/arch-msm/dma.h
1 | +/* linux/include/asm-arm/arch-msm/dma.h | |
2 | + * | |
3 | + * Copyright (C) 2007 Google, Inc. | |
4 | + * | |
5 | + * This software is licensed under the terms of the GNU General Public | |
6 | + * License version 2, as published by the Free Software Foundation, and | |
7 | + * may be copied, distributed, and modified under those terms. | |
8 | + * | |
9 | + * This program is distributed in the hope that it will be useful, | |
10 | + * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
11 | + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
12 | + * GNU General Public License for more details. | |
13 | + * | |
14 | + */ | |
15 | + | |
16 | +#ifndef __ASM_ARCH_MSM_DMA_H | |
17 | + | |
18 | +#include <linux/list.h> | |
19 | +#include <asm/arch/msm_iomap.h> | |
20 | + | |
21 | +struct msm_dmov_cmd { | |
22 | + struct list_head list; | |
23 | + unsigned int cmdptr; | |
24 | + void (*complete_func)(struct msm_dmov_cmd *cmd, unsigned int result); | |
25 | +/* void (*user_result_func)(struct msm_dmov_cmd *cmd); */ | |
26 | +}; | |
27 | + | |
28 | +void msm_dmov_enqueue_cmd(unsigned id, struct msm_dmov_cmd *cmd); | |
29 | +void msm_dmov_stop_cmd(unsigned id, struct msm_dmov_cmd *cmd); | |
30 | +int msm_dmov_exec_cmd(unsigned id, unsigned int cmdptr); | |
31 | +/* int msm_dmov_exec_cmd_etc(unsigned id, unsigned int cmdptr, int timeout, int interruptible); */ | |
32 | + | |
33 | + | |
34 | + | |
35 | +#define DMOV_SD0(off, ch) (MSM_DMOV_BASE + 0x0000 + (off) + ((ch) << 2)) | |
36 | +#define DMOV_SD1(off, ch) (MSM_DMOV_BASE + 0x0400 + (off) + ((ch) << 2)) | |
37 | +#define DMOV_SD2(off, ch) (MSM_DMOV_BASE + 0x0800 + (off) + ((ch) << 2)) | |
38 | +#define DMOV_SD3(off, ch) (MSM_DMOV_BASE + 0x0C00 + (off) + ((ch) << 2)) | |
39 | + | |
40 | +/* only security domain 3 is available to the ARM11 | |
41 | + * SD0 -> mARM trusted, SD1 -> mARM nontrusted, SD2 -> aDSP, SD3 -> aARM | |
42 | + */ | |
43 | + | |
44 | +#define DMOV_CMD_PTR(ch) DMOV_SD3(0x000, ch) | |
45 | +#define DMOV_CMD_LIST (0 << 29) /* does not work */ | |
46 | +#define DMOV_CMD_PTR_LIST (1 << 29) /* works */ | |
47 | +#define DMOV_CMD_INPUT_CFG (2 << 29) /* untested */ | |
48 | +#define DMOV_CMD_OUTPUT_CFG (3 << 29) /* untested */ | |
49 | +#define DMOV_CMD_ADDR(addr) ((addr) >> 3) | |
50 | + | |
51 | +#define DMOV_RSLT(ch) DMOV_SD3(0x040, ch) | |
52 | +#define DMOV_RSLT_VALID (1 << 31) /* 0 == host has empties result fifo */ | |
53 | +#define DMOV_RSLT_ERROR (1 << 3) | |
54 | +#define DMOV_RSLT_FLUSH (1 << 2) | |
55 | +#define DMOV_RSLT_DONE (1 << 1) /* top pointer done */ | |
56 | +#define DMOV_RSLT_USER (1 << 0) /* command with FR force result */ | |
57 | + | |
58 | +#define DMOV_FLUSH0(ch) DMOV_SD3(0x080, ch) | |
59 | +#define DMOV_FLUSH1(ch) DMOV_SD3(0x0C0, ch) | |
60 | +#define DMOV_FLUSH2(ch) DMOV_SD3(0x100, ch) | |
61 | +#define DMOV_FLUSH3(ch) DMOV_SD3(0x140, ch) | |
62 | +#define DMOV_FLUSH4(ch) DMOV_SD3(0x180, ch) | |
63 | +#define DMOV_FLUSH5(ch) DMOV_SD3(0x1C0, ch) | |
64 | + | |
65 | +#define DMOV_STATUS(ch) DMOV_SD3(0x200, ch) | |
66 | +#define DMOV_STATUS_RSLT_COUNT(n) (((n) >> 29)) | |
67 | +#define DMOV_STATUS_CMD_COUNT(n) (((n) >> 27) & 3) | |
68 | +#define DMOV_STATUS_RSLT_VALID (1 << 1) | |
69 | +#define DMOV_STATUS_CMD_PTR_RDY (1 << 0) | |
70 | + | |
71 | +#define DMOV_ISR DMOV_SD3(0x380, 0) | |
72 | + | |
73 | +#define DMOV_CONFIG(ch) DMOV_SD3(0x300, ch) | |
74 | +#define DMOV_CONFIG_FORCE_TOP_PTR_RSLT (1 << 2) | |
75 | +#define DMOV_CONFIG_FORCE_FLUSH_RSLT (1 << 1) | |
76 | +#define DMOV_CONFIG_IRQ_EN (1 << 0) | |
77 | + | |
78 | +/* channel assignments */ | |
79 | + | |
80 | +#define DMOV_NAND_CHAN 7 | |
81 | +#define DMOV_NAND_CRCI_CMD 5 | |
82 | +#define DMOV_NAND_CRCI_DATA 4 | |
83 | + | |
84 | +#define DMOV_SDC1_CHAN 8 | |
85 | +#define DMOV_SDC1_CRCI 6 | |
86 | + | |
87 | +#define DMOV_SDC2_CHAN 8 | |
88 | +#define DMOV_SDC2_CRCI 7 | |
89 | + | |
90 | +#define DMOV_TSIF_CHAN 10 | |
91 | +#define DMOV_TSIF_CRCI 10 | |
92 | + | |
93 | +#define DMOV_USB_CHAN 11 | |
94 | + | |
95 | +/* no client rate control ifc (eg, ram) */ | |
96 | +#define DMOV_NONE_CRCI 0 | |
97 | + | |
98 | + | |
99 | +/* If the CMD_PTR register has CMD_PTR_LIST selected, the data mover | |
100 | + * is going to walk a list of 32bit pointers as described below. Each | |
101 | + * pointer points to a *array* of dmov_s, etc structs. The last pointer | |
102 | + * in the list is marked with CMD_PTR_LP. The last struct in each array | |
103 | + * is marked with CMD_LC (see below). | |
104 | + */ | |
105 | +#define CMD_PTR_ADDR(addr) ((addr) >> 3) | |
106 | +#define CMD_PTR_LP (1 << 31) /* last pointer */ | |
107 | +#define CMD_PTR_PT (3 << 29) /* ? */ | |
108 | + | |
109 | +/* Single Item Mode */ | |
110 | +typedef struct { | |
111 | + unsigned cmd; | |
112 | + unsigned src; | |
113 | + unsigned dst; | |
114 | + unsigned len; | |
115 | +} dmov_s; | |
116 | + | |
117 | +/* Scatter/Gather Mode */ | |
118 | +typedef struct { | |
119 | + unsigned cmd; | |
120 | + unsigned src_dscr; | |
121 | + unsigned dst_dscr; | |
122 | + unsigned _reserved; | |
123 | +} dmov_sg; | |
124 | + | |
125 | +/* bits for the cmd field of the above structures */ | |
126 | + | |
127 | +#define CMD_LC (1 << 31) /* last command */ | |
128 | +#define CMD_FR (1 << 22) /* force result -- does not work? */ | |
129 | +#define CMD_OCU (1 << 21) /* other channel unblock */ | |
130 | +#define CMD_OCB (1 << 20) /* other channel block */ | |
131 | +#define CMD_TCB (1 << 19) /* ? */ | |
132 | +#define CMD_DAH (1 << 18) /* destination address hold -- does not work?*/ | |
133 | +#define CMD_SAH (1 << 17) /* source address hold -- does not work? */ | |
134 | + | |
135 | +#define CMD_MODE_SINGLE (0 << 0) /* dmov_s structure used */ | |
136 | +#define CMD_MODE_SG (1 << 0) /* untested */ | |
137 | +#define CMD_MODE_IND_SG (2 << 0) /* untested */ | |
138 | +#define CMD_MODE_BOX (3 << 0) /* untested */ | |
139 | + | |
140 | +#define CMD_DST_SWAP_BYTES (1 << 14) /* exchange each byte n with byte n+1 */ | |
141 | +#define CMD_DST_SWAP_SHORTS (1 << 15) /* exchange each short n with short n+1 */ | |
142 | +#define CMD_DST_SWAP_WORDS (1 << 16) /* exchange each word n with word n+1 */ | |
143 | + | |
144 | +#define CMD_SRC_SWAP_BYTES (1 << 11) /* exchange each byte n with byte n+1 */ | |
145 | +#define CMD_SRC_SWAP_SHORTS (1 << 12) /* exchange each short n with short n+1 */ | |
146 | +#define CMD_SRC_SWAP_WORDS (1 << 13) /* exchange each word n with word n+1 */ | |
147 | + | |
148 | +#define CMD_DST_CRCI(n) (((n) & 15) << 7) | |
149 | +#define CMD_SRC_CRCI(n) (((n) & 15) << 3) | |
150 | + | |
151 | +#endif |