Commit c0312b33daa721a92633181fd4fe508484c81a2d

Authored by Paul Mundt
1 parent 6ef9f6fd8e

ARM: mach-shmobile: update for GIC changes.

This fixes up the SMP support to use the refactored GIC APIs.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>

Showing 4 changed files with 9 additions and 11 deletions Side-by-side Diff

arch/arm/mach-shmobile/entry-gic.S
... ... @@ -2,20 +2,18 @@
2 2 * ARM Interrupt demux handler using GIC
3 3 *
4 4 * Copyright (C) 2010 Magnus Damm
5   - * Copyright (C) 2010 Renesas Solutions Corp.
  5 + * Copyright (C) 2011 Paul Mundt
  6 + * Copyright (C) 2010 - 2011 Renesas Solutions Corp.
6 7 *
7 8 * This file is licensed under the terms of the GNU General Public
8 9 * License version 2. This program is licensed "as is" without any
9 10 * warranty of any kind, whether express or implied.
10 11 */
11 12  
  13 +#include <asm/assembler.h>
12 14 #include <asm/entry-macro-multi.S>
13 15 #include <asm/hardware/gic.h>
14 16 #include <asm/hardware/entry-macro-gic.S>
15   -
16   - .macro get_irqnr_preamble, base, tmp
17   - ldr \base, =(0xf0000100)
18   - .endm
19 17  
20 18 arch_irq_handler shmobile_handle_irq_gic
arch/arm/mach-shmobile/include/mach/smp.h
... ... @@ -2,16 +2,16 @@
2 2 #define __MACH_SMP_H
3 3  
4 4 #include <asm/hardware/gic.h>
5   -#include <asm/smp_mpidr.h>
6 5  
7 6 /*
8 7 * We use IRQ1 as the IPI
9 8 */
10   -static inline void smp_cross_call(const struct cpumask *mask)
  9 +static inline void smp_cross_call(const struct cpumask *mask, int ipi)
11 10 {
12 11 #if defined(CONFIG_ARM_GIC)
13   - gic_raise_softirq(mask, 1);
  12 + gic_raise_softirq(mask, ipi);
14 13 #endif
15 14 }
  15 +
16 16 #endif
arch/arm/mach-shmobile/intc-sh73a0.c
... ... @@ -252,10 +252,10 @@
252 252  
253 253 void __init sh73a0_init_irq(void)
254 254 {
  255 + void __iomem *gic_base = __io(0xf0001000);
255 256 void __iomem *intevtsa = ioremap_nocache(0xffd20100, PAGE_SIZE);
256 257  
257   - gic_dist_init(0, __io(0xf0001000), 29);
258   - gic_cpu_init(0, __io(0xf0000100));
  258 + gic_init(0, 29, gic_base, gic_base);
259 259  
260 260 register_intc_controller(&intcs_desc);
261 261  
arch/arm/mach-shmobile/smp-sh73a0.c
... ... @@ -64,7 +64,7 @@
64 64  
65 65 void __cpuinit sh73a0_secondary_init(unsigned int cpu)
66 66 {
67   - gic_cpu_init(0, __io(0xf0000100));
  67 + gic_secondary_init(0);
68 68 }
69 69  
70 70 int __cpuinit sh73a0_boot_secondary(unsigned int cpu)