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Commit c0ad90a32fb60f4129d0e24dfd5fd7128e2e09f2

Authored by Ingo Molnar
Committed by Linus Torvalds
1 parent 096c8131c5
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

[PATCH] genirq: add ->retrigger() irq op to consolidate hw_irq_resend() 

Add ->retrigger() irq op to consolidate hw_irq_resend() implementations.
(Most architectures had it defined to NOP anyway.)

NOTE: ia64 needs testing. i386 and x86_64 tested.

Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>

Showing 21 changed files with 45 additions and 74 deletions Side-by-side Diff

arch/i386/kernel/io_apic.c
Diff comments   View file @ c0ad90a
... ... @@ -2071,6 +2071,13 @@
2071 2071 #endif
2072 2072 #endif
2073 2073  
  2074 +static int ioapic_retrigger(unsigned int irq)
  2075 +{
  2076 + send_IPI_self(IO_APIC_VECTOR(irq));
  2077 +
  2078 + return 1;
  2079 +}
  2080 +
2074 2081 /*
2075 2082 * Level and edge triggered IO-APIC interrupts need different handling,
2076 2083 * so we use two separate IRQ descriptors. Edge triggered IRQs can be
... ... @@ -2090,6 +2097,7 @@
2090 2097 #ifdef CONFIG_SMP
2091 2098 .set_affinity = set_ioapic_affinity,
2092 2099 #endif
  2100 + .retrigger = ioapic_retrigger,
2093 2101 };
2094 2102  
2095 2103 static struct hw_interrupt_type ioapic_level_type __read_mostly = {
... ... @@ -2103,6 +2111,7 @@
2103 2111 #ifdef CONFIG_SMP
2104 2112 .set_affinity = set_ioapic_affinity,
2105 2113 #endif
  2114 + .retrigger = ioapic_retrigger,
2106 2115 };
2107 2116  
2108 2117 static inline void init_IO_APIC_traps(void)
arch/ia64/kernel/irq_lsapic.c
Diff comments   View file @ c0ad90a
... ... @@ -26,6 +26,13 @@
26 26 /* nuthing to do... */
27 27 }
28 28  
  29 +static int lsapic_retrigger(unsigned int irq)
  30 +{
  31 + ia64_resend_irq(irq);
  32 +
  33 + return 1;
  34 +}
  35 +
29 36 struct hw_interrupt_type irq_type_ia64_lsapic = {
30 37 .typename = "LSAPIC",
31 38 .startup = lsapic_noop_startup,
... ... @@ -33,6 +40,7 @@
33 40 .enable = lsapic_noop,
34 41 .disable = lsapic_noop,
35 42 .ack = lsapic_noop,
36   - .end = lsapic_noop
  43 + .end = lsapic_noop,
  44 + .retrigger = lsapic_retrigger,
37 45 };
arch/ia64/kernel/perfmon.c
Diff comments   View file @ c0ad90a
... ... @@ -6165,7 +6165,7 @@
6165 6165 /*
6166 6166 * will replay the PMU interrupt
6167 6167 */
6168   - if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
  6168 + if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
6169 6169  
6170 6170 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
6171 6171 }
... ... @@ -6305,7 +6305,7 @@
6305 6305 /*
6306 6306 * will replay the PMU interrupt
6307 6307 */
6308   - if (need_irq_resend) hw_resend_irq(NULL, IA64_PERFMON_VECTOR);
  6308 + if (need_irq_resend) ia64_resend_irq(IA64_PERFMON_VECTOR);
6309 6309  
6310 6310 pfm_stats[smp_processor_id()].pfm_replay_ovfl_intr_count++;
6311 6311 }
arch/parisc/kernel/irq.c
Diff comments   View file @ c0ad90a
... ... @@ -125,6 +125,10 @@
125 125 #ifdef CONFIG_SMP
126 126 .set_affinity = cpu_set_affinity_irq,
127 127 #endif
  128 + /* XXX: Needs to be written. We managed without it so far, but
  129 + * we really ought to write it.
  130 + */
  131 + .retrigger = NULL,
128 132 };
129 133  
130 134 int show_interrupts(struct seq_file *p, void *v)
... ... @@ -402,13 +406,6 @@
402 406 #endif
403 407 set_eiem(cpu_eiem); /* EIEM : enable all external intr */
404 408  
405   -}
406   -
407   -void hw_resend_irq(struct hw_interrupt_type *type, unsigned int irq)
408   -{
409   - /* XXX: Needs to be written. We managed without it so far, but
410   - * we really ought to write it.
411   - */
412 409 }
413 410  
414 411 void ack_bad_irq(unsigned int irq)
arch/x86_64/kernel/io_apic.c
Diff comments   View file @ c0ad90a
... ... @@ -1618,6 +1618,13 @@
1618 1618 #endif // CONFIG_SMP
1619 1619 #endif // CONFIG_PCI_MSI
1620 1620  
  1621 +static int ioapic_retrigger(unsigned int irq)
  1622 +{
  1623 + send_IPI_self(IO_APIC_VECTOR(irq));
  1624 +
  1625 + return 1;
  1626 +}
  1627 +
1621 1628 /*
1622 1629 * Level and edge triggered IO-APIC interrupts need different handling,
1623 1630 * so we use two separate IRQ descriptors. Edge triggered IRQs can be
... ... @@ -1638,6 +1645,7 @@
1638 1645 #ifdef CONFIG_SMP
1639 1646 .set_affinity = set_ioapic_affinity,
1640 1647 #endif
  1648 + .retrigger = ioapic_retrigger,
1641 1649 };
1642 1650  
1643 1651 static struct hw_interrupt_type ioapic_level_type __read_mostly = {
... ... @@ -1651,6 +1659,7 @@
1651 1659 #ifdef CONFIG_SMP
1652 1660 .set_affinity = set_ioapic_affinity,
1653 1661 #endif
  1662 + .retrigger = ioapic_retrigger,
1654 1663 };
1655 1664  
1656 1665 static inline void init_IO_APIC_traps(void)
include/asm-alpha/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -2,8 +2,6 @@
2 2 #define _ALPHA_HW_IRQ_H
3 3  
4 4  
5   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
6   -
7 5 extern volatile unsigned long irq_err_count;
8 6  
9 7 #ifdef CONFIG_ALPHA_GENERIC
include/asm-cris/hw_irq.h
Diff comments   View file @ c0ad90a
1 1 #ifndef _ASM_HW_IRQ_H
2 2 #define _ASM_HW_IRQ_H
3 3  
4   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
5   -
6 4 #endif
include/asm-i386/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -69,15 +69,5 @@
69 69  
70 70 #define IO_APIC_IRQ(x) (((x) >= 16) || ((1<<(x)) & io_apic_irqs))
71 71  
72   -#if defined(CONFIG_X86_IO_APIC)
73   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
74   -{
75   - if (IO_APIC_IRQ(i))
76   - send_IPI_self(IO_APIC_VECTOR(i));
77   -}
78   -#else
79   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
80   -#endif
81   -
82 72 #endif /* _ASM_HW_IRQ_H */
include/asm-ia64/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -97,8 +97,7 @@
97 97 extern void ia64_send_ipi (int cpu, int vector, int delivery_mode, int redirect);
98 98 extern void register_percpu_irq (ia64_vector vec, struct irqaction *action);
99 99  
100   -static inline void
101   -hw_resend_irq (struct hw_interrupt_type *h, unsigned int vector)
  100 +static inline void ia64_resend_irq(unsigned int vector)
102 101 {
103 102 platform_send_ipi(smp_processor_id(), vector, IA64_IPI_DM_INT, 0);
104 103 }
include/asm-m32r/hw_irq.h
Diff comments   View file @ c0ad90a
1 1 #ifndef _ASM_M32R_HW_IRQ_H
2 2 #define _ASM_M32R_HW_IRQ_H
3 3  
4   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
5   -{
6   - /* Nothing to do */
7   -}
8   -
9 4 #endif /* _ASM_M32R_HW_IRQ_H */
include/asm-mips/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -19,10 +19,10 @@
19 19  
20 20 extern atomic_t irq_err_count;
21 21  
22   -/* This may not be apropriate for all machines, we'll see ... */
23   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
24   -{
25   -}
  22 +/*
  23 + * interrupt-retrigger: NOP for now. This may not be apropriate for all
  24 + * machines, we'll see ...
  25 + */
26 26  
27 27 #endif /* __ASM_HW_IRQ_H */
include/asm-parisc/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -3,16 +3,7 @@
3 3  
4 4 /*
5 5 * linux/include/asm/hw_irq.h
6   - *
7   - * (C) 1992, 1993 Linus Torvalds, (C) 1997 Ingo Molnar
8   - *
9   - * moved some of the old arch/i386/kernel/irq.h to here. VY
10   - *
11   - * IRQ/IPI changes taken from work by Thomas Radke
12   - * <tomsoft@informatik.tu-chemnitz.de>
13 6 */
14   -
15   -extern void hw_resend_irq(struct hw_interrupt_type *, unsigned int);
16 7  
17 8 #endif
include/asm-powerpc/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -102,11 +102,11 @@
102 102 desc->chip->ack(irq); \
103 103 })
104 104  
105   -/* Should we handle this via lost interrupts and IPIs or should we don't care like
106   - * we do now ? --BenH.
  105 +/*
  106 + * interrupt-retrigger: should we handle this via lost interrupts and IPIs
  107 + * or should we not care like we do now ? --BenH.
107 108 */
108 109 struct hw_interrupt_type;
109   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
110 110  
111 111 #endif /* __KERNEL__ */
112 112 #endif /* _ASM_POWERPC_HW_IRQ_H */
include/asm-sh/hw_irq.h
Diff comments   View file @ c0ad90a
1 1 #ifndef __ASM_SH_HW_IRQ_H
2 2 #define __ASM_SH_HW_IRQ_H
3 3  
4   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
5   -{
6   - /* Nothing to do */
7   -}
8   -
9 4 #endif /* __ASM_SH_HW_IRQ_H */
include/asm-sh64/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -11,7 +11,6 @@
11 11 * Copyright (C) 2000, 2001 Paolo Alberelli
12 12 *
13 13 */
14   -static __inline__ void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) { /* Nothing to do */ }
15 14  
16 15 #endif /* __ASM_SH64_HW_IRQ_H */
include/asm-um/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -4,8 +4,5 @@
4 4 #include "asm/irq.h"
5 5 #include "asm/archparam.h"
6 6  
7   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
8   -{}
9   -
10 7 #endif
include/asm-v850/hw_irq.h
Diff comments   View file @ c0ad90a
1 1 #ifndef __V850_HW_IRQ_H__
2 2 #define __V850_HW_IRQ_H__
3 3  
4   -static inline void hw_resend_irq (struct hw_interrupt_type *h, unsigned int i)
5   -{
6   -}
7   -
8 4 #endif /* __V850_HW_IRQ_H__ */
include/asm-x86_64/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -127,15 +127,6 @@
127 127 "push $~(" #nr ") ; " \
128 128 "jmp common_interrupt");
129 129  
130   -#if defined(CONFIG_X86_IO_APIC)
131   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {
132   - if (IO_APIC_IRQ(i))
133   - send_IPI_self(IO_APIC_VECTOR(i));
134   -}
135   -#else
136   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i) {}
137   -#endif
138   -
139 130 #define platform_legacy_irq(irq) ((irq) < 16)
140 131  
141 132 #endif
include/asm-xtensa/hw_irq.h
Diff comments   View file @ c0ad90a
... ... @@ -11,9 +11,5 @@
11 11 #ifndef _XTENSA_HW_IRQ_H
12 12 #define _XTENSA_HW_IRQ_H
13 13  
14   -static inline void hw_resend_irq(struct hw_interrupt_type *h, unsigned int i)
15   -{
16   -}
17   -
18 14 #endif
... ... @@ -53,6 +53,8 @@
53 53 void (*ack)(unsigned int irq);
54 54 void (*end)(unsigned int irq);
55 55 void (*set_affinity)(unsigned int irq, cpumask_t dest);
  56 + int (*retrigger)(unsigned int irq);
  57 +
56 58 /* Currently used only by UML, might disappear one day.*/
57 59 #ifdef CONFIG_IRQ_RELEASE_METHOD
58 60 void (*release)(unsigned int irq, void *dev_id);
... ... @@ -123,7 +123,8 @@
123 123 desc->status = status;
124 124 if ((status & (IRQ_PENDING | IRQ_REPLAY)) == IRQ_PENDING) {
125 125 desc->status = status | IRQ_REPLAY;
126   - hw_resend_irq(desc->chip,irq);
  126 + if (desc->chip && desc->chip->retrigger)
  127 + desc->chip->retrigger(irq);
127 128 }
128 129 desc->chip->enable(irq);
129 130 /* fall-through */