Eric Lee / smarc-fsl-linux-kernel

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Commit c2a641a74850d40756734545c5ffb600fe8df97c

Authored by Paul Kocialkowski
Committed by Maxime Ripard
1 parent 9604320101

ARM: dts: sun7i-a20: Add Video Engine and reserved memory nodes 

This adds nodes for the Video Engine and the associated reserved memory
for the A20. Up to 96 MiB of memory are dedicated to the CMA pool.

The VPU can only map the first 256 MiB of DRAM, so the reserved memory
pool has to be located in that area. Following Allwinner's decision in
downstream software, the last 96 MiB of the first 256 MiB of RAM are
reserved for this purpose.

Signed-off-by: Paul Kocialkowski <paul.kocialkowski@bootlin.com>
Acked-by: Maxime Ripard <maxime.ripard@bootlin.com>
Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>

Showing 1 changed file with 26 additions and 0 deletions Side-by-side Diff

arch/arm/boot/dts/sun7i-a20.dtsi
Diff comments   View file @ c2a641a
... ... @@ -174,6 +174,21 @@
174 174 reg = <0x40000000 0x80000000>;
175 175 };
176 176  
  177 + reserved-memory {
  178 + #address-cells = <1>;
  179 + #size-cells = <1>;
  180 + ranges;
  181 +
  182 + /* Address must be kept in the lower 256 MiBs of DRAM for VE. */
  183 + cma_pool: cma@4a000000 {
  184 + compatible = "shared-dma-pool";
  185 + size = <0x6000000>;
  186 + alloc-ranges = <0x4a000000 0x6000000>;
  187 + reusable;
  188 + linux,cma-default;
  189 + };
  190 + };
  191 +
177 192 timer {
178 193 compatible = "arm,armv7-timer";
179 194 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
... ... @@ -477,6 +492,17 @@
477 492 };
478 493 };
479 494 };
  495 + };
  496 +
  497 + video-codec@1c0e000 {
  498 + compatible = "allwinner,sun7i-a20-video-engine";
  499 + reg = <0x01c0e000 0x1000>;
  500 + clocks = <&ccu CLK_AHB_VE>, <&ccu CLK_VE>,
  501 + <&ccu CLK_DRAM_VE>;
  502 + clock-names = "ahb", "mod", "ram";
  503 + resets = <&ccu RST_VE>;
  504 + interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>;
  505 + allwinner,sram = <&ve_sram 1>;
480 506 };
481 507  
482 508 mmc0: mmc@1c0f000 {