Commit d3ee98cdcd6198ea1cf75c603178acc8a805b69b
Committed by
Vinod Koul
1 parent
96a2af41c7
Exists in
smarc_imx_lf-5.15.y
and in
37 other branches
dmaengine: consolidate initialization of cookies
Provide a common function to initialize a channels cookie values. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk> Tested-by: Linus Walleij <linus.walleij@linaro.org> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Jassi Brar <jassisinghbrar@gmail.com> [imx-sdma.c & mxs-dma.c] Tested-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@linux.intel.com>
Showing 15 changed files with 31 additions and 28 deletions Side-by-side Diff
- drivers/dma/amba-pl08x.c
- drivers/dma/at_hdmac.c
- drivers/dma/coh901318.c
- drivers/dma/dmaengine.h
- drivers/dma/dw_dmac.c
- drivers/dma/ep93xx_dma.c
- drivers/dma/intel_mid_dma.c
- drivers/dma/ipu/ipu_idmac.c
- drivers/dma/mpc512x_dma.c
- drivers/dma/pch_dma.c
- drivers/dma/pl330.c
- drivers/dma/sirf-dma.c
- drivers/dma/ste_dma40.c
- drivers/dma/timb_dma.c
- drivers/dma/txx9dmac.c
drivers/dma/amba-pl08x.c
... | ... | @@ -1709,8 +1709,7 @@ |
1709 | 1709 | chan->name); |
1710 | 1710 | |
1711 | 1711 | chan->chan.device = dmadev; |
1712 | - chan->chan.cookie = 0; | |
1713 | - chan->chan.completed_cookie = 0; | |
1712 | + dma_cookie_init(&chan->chan); | |
1714 | 1713 | |
1715 | 1714 | spin_lock_init(&chan->lock); |
1716 | 1715 | INIT_LIST_HEAD(&chan->pend_list); |
drivers/dma/at_hdmac.c
... | ... | @@ -1103,7 +1103,7 @@ |
1103 | 1103 | spin_lock_irqsave(&atchan->lock, flags); |
1104 | 1104 | atchan->descs_allocated = i; |
1105 | 1105 | list_splice(&tmp_list, &atchan->free_list); |
1106 | - chan->completed_cookie = chan->cookie = 1; | |
1106 | + dma_cookie_init(chan); | |
1107 | 1107 | spin_unlock_irqrestore(&atchan->lock, flags); |
1108 | 1108 | |
1109 | 1109 | /* channel parameters */ |
... | ... | @@ -1303,7 +1303,7 @@ |
1303 | 1303 | struct at_dma_chan *atchan = &atdma->chan[i]; |
1304 | 1304 | |
1305 | 1305 | atchan->chan_common.device = &atdma->dma_common; |
1306 | - atchan->chan_common.cookie = atchan->chan_common.completed_cookie = 1; | |
1306 | + dma_cookie_init(&atchan->chan_common); | |
1307 | 1307 | list_add_tail(&atchan->chan_common.device_node, |
1308 | 1308 | &atdma->dma_common.channels); |
1309 | 1309 |
drivers/dma/coh901318.c
drivers/dma/dmaengine.h
... | ... | @@ -9,6 +9,16 @@ |
9 | 9 | #include <linux/dmaengine.h> |
10 | 10 | |
11 | 11 | /** |
12 | + * dma_cookie_init - initialize the cookies for a DMA channel | |
13 | + * @chan: dma channel to initialize | |
14 | + */ | |
15 | +static inline void dma_cookie_init(struct dma_chan *chan) | |
16 | +{ | |
17 | + chan->cookie = DMA_MIN_COOKIE; | |
18 | + chan->completed_cookie = DMA_MIN_COOKIE; | |
19 | +} | |
20 | + | |
21 | +/** | |
12 | 22 | * dma_cookie_assign - assign a DMA engine cookie to the descriptor |
13 | 23 | * @tx: descriptor needing cookie |
14 | 24 | * |
drivers/dma/dw_dmac.c
... | ... | @@ -1021,7 +1021,7 @@ |
1021 | 1021 | return -EIO; |
1022 | 1022 | } |
1023 | 1023 | |
1024 | - chan->completed_cookie = chan->cookie = 1; | |
1024 | + dma_cookie_init(chan); | |
1025 | 1025 | |
1026 | 1026 | /* |
1027 | 1027 | * NOTE: some controllers may have additional features that we |
... | ... | @@ -1449,7 +1449,7 @@ |
1449 | 1449 | struct dw_dma_chan *dwc = &dw->chan[i]; |
1450 | 1450 | |
1451 | 1451 | dwc->chan.device = &dw->dma; |
1452 | - dwc->chan.cookie = dwc->chan.completed_cookie = 1; | |
1452 | + dma_cookie_init(&dwc->chan); | |
1453 | 1453 | if (pdata->chan_allocation_order == CHAN_ALLOCATION_ASCENDING) |
1454 | 1454 | list_add_tail(&dwc->chan.device_node, |
1455 | 1455 | &dw->dma.channels); |
drivers/dma/ep93xx_dma.c
... | ... | @@ -854,8 +854,7 @@ |
854 | 854 | goto fail_clk_disable; |
855 | 855 | |
856 | 856 | spin_lock_irq(&edmac->lock); |
857 | - edmac->chan.completed_cookie = 1; | |
858 | - edmac->chan.cookie = 1; | |
857 | + dma_cookie_init(&edmac->chan); | |
859 | 858 | ret = edmac->edma->hw_setup(edmac); |
860 | 859 | spin_unlock_irq(&edmac->lock); |
861 | 860 |
drivers/dma/intel_mid_dma.c
... | ... | @@ -867,7 +867,7 @@ |
867 | 867 | pm_runtime_put(&mid->pdev->dev); |
868 | 868 | return -EIO; |
869 | 869 | } |
870 | - chan->completed_cookie = chan->cookie = 1; | |
870 | + dma_cookie_init(chan); | |
871 | 871 | |
872 | 872 | spin_lock_bh(&midc->lock); |
873 | 873 | while (midc->descs_allocated < DESCS_PER_CHANNEL) { |
... | ... | @@ -1100,7 +1100,7 @@ |
1100 | 1100 | struct intel_mid_dma_chan *midch = &dma->ch[i]; |
1101 | 1101 | |
1102 | 1102 | midch->chan.device = &dma->common; |
1103 | - midch->chan.cookie = 1; | |
1103 | + dma_cookie_init(&midch->chan); | |
1104 | 1104 | midch->ch_id = dma->chan_base + i; |
1105 | 1105 | pr_debug("MDMA:Init CH %d, ID %d\n", i, midch->ch_id); |
1106 | 1106 |
drivers/dma/ipu/ipu_idmac.c
... | ... | @@ -1504,8 +1504,7 @@ |
1504 | 1504 | BUG_ON(chan->client_count > 1); |
1505 | 1505 | WARN_ON(ichan->status != IPU_CHANNEL_FREE); |
1506 | 1506 | |
1507 | - chan->cookie = 1; | |
1508 | - chan->completed_cookie = -ENXIO; | |
1507 | + dma_cookie_init(chan); | |
1509 | 1508 | |
1510 | 1509 | ret = ipu_irq_map(chan->chan_id); |
1511 | 1510 | if (ret < 0) |
... | ... | @@ -1633,8 +1632,7 @@ |
1633 | 1632 | snprintf(ichan->eof_name, sizeof(ichan->eof_name), "IDMAC EOF %d", i); |
1634 | 1633 | |
1635 | 1634 | dma_chan->device = &idmac->dma; |
1636 | - dma_chan->cookie = 1; | |
1637 | - dma_chan->completed_cookie = -ENXIO; | |
1635 | + dma_cookie_init(dma_chan); | |
1638 | 1636 | dma_chan->chan_id = i; |
1639 | 1637 | list_add_tail(&dma_chan->device_node, &dma->channels); |
1640 | 1638 | } |
drivers/dma/mpc512x_dma.c
... | ... | @@ -733,8 +733,7 @@ |
733 | 733 | mchan = &mdma->channels[i]; |
734 | 734 | |
735 | 735 | mchan->chan.device = dma; |
736 | - mchan->chan.cookie = 1; | |
737 | - mchan->chan.completed_cookie = mchan->chan.cookie; | |
736 | + dma_cookie_init(&mchan->chan); | |
738 | 737 | |
739 | 738 | INIT_LIST_HEAD(&mchan->free); |
740 | 739 | INIT_LIST_HEAD(&mchan->prepared); |
drivers/dma/pch_dma.c
... | ... | @@ -531,7 +531,7 @@ |
531 | 531 | spin_lock_irq(&pd_chan->lock); |
532 | 532 | list_splice(&tmp_list, &pd_chan->free_list); |
533 | 533 | pd_chan->descs_allocated = i; |
534 | - chan->completed_cookie = chan->cookie = 1; | |
534 | + dma_cookie_init(chan); | |
535 | 535 | spin_unlock_irq(&pd_chan->lock); |
536 | 536 | |
537 | 537 | pdc_enable_irq(chan, 1); |
... | ... | @@ -912,7 +912,7 @@ |
912 | 912 | struct pch_dma_chan *pd_chan = &pd->channels[i]; |
913 | 913 | |
914 | 914 | pd_chan->chan.device = &pd->dma; |
915 | - pd_chan->chan.cookie = 1; | |
915 | + dma_cookie_init(&pd_chan->chan); | |
916 | 916 | |
917 | 917 | pd_chan->membase = ®s->desc[i]; |
918 | 918 |
drivers/dma/pl330.c
drivers/dma/sirf-dma.c
... | ... | @@ -625,8 +625,7 @@ |
625 | 625 | schan = &sdma->channels[i]; |
626 | 626 | |
627 | 627 | schan->chan.device = dma; |
628 | - schan->chan.cookie = 1; | |
629 | - schan->chan.completed_cookie = schan->chan.cookie; | |
628 | + dma_cookie_init(&schan->chan); | |
630 | 629 | |
631 | 630 | INIT_LIST_HEAD(&schan->free); |
632 | 631 | INIT_LIST_HEAD(&schan->prepared); |
drivers/dma/ste_dma40.c
... | ... | @@ -2172,7 +2172,7 @@ |
2172 | 2172 | bool is_free_phy; |
2173 | 2173 | spin_lock_irqsave(&d40c->lock, flags); |
2174 | 2174 | |
2175 | - chan->completed_cookie = chan->cookie = 1; | |
2175 | + dma_cookie_init(chan); | |
2176 | 2176 | |
2177 | 2177 | /* If no dma configuration is set use default configuration (memcpy) */ |
2178 | 2178 | if (!d40c->configured) { |
drivers/dma/timb_dma.c
... | ... | @@ -477,8 +477,7 @@ |
477 | 477 | } |
478 | 478 | |
479 | 479 | spin_lock_bh(&td_chan->lock); |
480 | - chan->completed_cookie = 1; | |
481 | - chan->cookie = 1; | |
480 | + dma_cookie_init(chan); | |
482 | 481 | spin_unlock_bh(&td_chan->lock); |
483 | 482 | |
484 | 483 | return 0; |
... | ... | @@ -755,7 +754,7 @@ |
755 | 754 | } |
756 | 755 | |
757 | 756 | td_chan->chan.device = &td->dma; |
758 | - td_chan->chan.cookie = 1; | |
757 | + dma_cookie_init(&td_chan->chan); | |
759 | 758 | spin_lock_init(&td_chan->lock); |
760 | 759 | INIT_LIST_HEAD(&td_chan->active_list); |
761 | 760 | INIT_LIST_HEAD(&td_chan->queue); |
drivers/dma/txx9dmac.c
... | ... | @@ -1034,7 +1034,7 @@ |
1034 | 1034 | return -EIO; |
1035 | 1035 | } |
1036 | 1036 | |
1037 | - chan->completed_cookie = chan->cookie = 1; | |
1037 | + dma_cookie_init(chan); | |
1038 | 1038 | |
1039 | 1039 | dc->ccr = TXX9_DMA_CCR_IMMCHN | TXX9_DMA_CCR_INTENE | CCR_LE; |
1040 | 1040 | txx9dmac_chan_set_SMPCHN(dc); |
... | ... | @@ -1163,7 +1163,7 @@ |
1163 | 1163 | dc->ddev->chan[ch] = dc; |
1164 | 1164 | dc->chan.device = &dc->dma; |
1165 | 1165 | list_add_tail(&dc->chan.device_node, &dc->chan.device->channels); |
1166 | - dc->chan.cookie = dc->chan.completed_cookie = 1; | |
1166 | + dma_cookie_init(&dc->chan); | |
1167 | 1167 | |
1168 | 1168 | if (is_dmac64(dc)) |
1169 | 1169 | dc->ch_regs = &__txx9dmac_regs(dc->ddev)->CHAN[ch]; |