Commit d5fc0e8dd9b3ddc26374d5334455c38ad84b7fab
Committed by
Sekhar Nori
1 parent
27f12c5bc3
ARM: davinci: Remove redundant/unused parameters for edma
The following parameters are no longer needed by the edma driver since the information can be obtained from the IP's CCCFG register: n_channel, n_region, n_slot and n_tc. Remove the initialization of n_cc as well since in this context it has no meaning. We have separate edma_soc_info struct/eDMA3_CC instance so this member does not make any sense (and the driver no longer uses it). Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com>
Showing 5 changed files with 0 additions and 35 deletions Side-by-side Diff
arch/arm/mach-davinci/devices-da8xx.c
... | ... | @@ -148,11 +148,6 @@ |
148 | 148 | }; |
149 | 149 | |
150 | 150 | static struct edma_soc_info da830_edma_cc0_info = { |
151 | - .n_channel = 32, | |
152 | - .n_region = 4, | |
153 | - .n_slot = 128, | |
154 | - .n_tc = 2, | |
155 | - .n_cc = 1, | |
156 | 151 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
157 | 152 | .default_queue = EVENTQ_1, |
158 | 153 | }; |
159 | 154 | |
... | ... | @@ -163,20 +158,10 @@ |
163 | 158 | |
164 | 159 | static struct edma_soc_info da850_edma_cc_info[] = { |
165 | 160 | { |
166 | - .n_channel = 32, | |
167 | - .n_region = 4, | |
168 | - .n_slot = 128, | |
169 | - .n_tc = 2, | |
170 | - .n_cc = 1, | |
171 | 161 | .queue_priority_mapping = da8xx_queue_priority_mapping, |
172 | 162 | .default_queue = EVENTQ_1, |
173 | 163 | }, |
174 | 164 | { |
175 | - .n_channel = 32, | |
176 | - .n_region = 4, | |
177 | - .n_slot = 128, | |
178 | - .n_tc = 1, | |
179 | - .n_cc = 1, | |
180 | 165 | .queue_priority_mapping = da850_queue_priority_mapping, |
181 | 166 | .default_queue = EVENTQ_0, |
182 | 167 | }, |
arch/arm/mach-davinci/dm355.c
... | ... | @@ -577,11 +577,6 @@ |
577 | 577 | }; |
578 | 578 | |
579 | 579 | static struct edma_soc_info edma_cc0_info = { |
580 | - .n_channel = 64, | |
581 | - .n_region = 4, | |
582 | - .n_slot = 128, | |
583 | - .n_tc = 2, | |
584 | - .n_cc = 1, | |
585 | 580 | .queue_priority_mapping = queue_priority_mapping, |
586 | 581 | .default_queue = EVENTQ_1, |
587 | 582 | }; |
arch/arm/mach-davinci/dm365.c
... | ... | @@ -863,11 +863,6 @@ |
863 | 863 | }; |
864 | 864 | |
865 | 865 | static struct edma_soc_info edma_cc0_info = { |
866 | - .n_channel = 64, | |
867 | - .n_region = 4, | |
868 | - .n_slot = 256, | |
869 | - .n_tc = 4, | |
870 | - .n_cc = 1, | |
871 | 866 | .queue_priority_mapping = dm365_queue_priority_mapping, |
872 | 867 | .default_queue = EVENTQ_3, |
873 | 868 | }; |
arch/arm/mach-davinci/dm644x.c
... | ... | @@ -507,11 +507,6 @@ |
507 | 507 | }; |
508 | 508 | |
509 | 509 | static struct edma_soc_info edma_cc0_info = { |
510 | - .n_channel = 64, | |
511 | - .n_region = 4, | |
512 | - .n_slot = 128, | |
513 | - .n_tc = 2, | |
514 | - .n_cc = 1, | |
515 | 510 | .queue_priority_mapping = queue_priority_mapping, |
516 | 511 | .default_queue = EVENTQ_1, |
517 | 512 | }; |
arch/arm/mach-davinci/dm646x.c
... | ... | @@ -543,11 +543,6 @@ |
543 | 543 | }; |
544 | 544 | |
545 | 545 | static struct edma_soc_info edma_cc0_info = { |
546 | - .n_channel = 64, | |
547 | - .n_region = 6, /* 0-1, 4-7 */ | |
548 | - .n_slot = 512, | |
549 | - .n_tc = 4, | |
550 | - .n_cc = 1, | |
551 | 546 | .queue_priority_mapping = dm646x_queue_priority_mapping, |
552 | 547 | .default_queue = EVENTQ_1, |
553 | 548 | }; |