Commit d9105c2b01eedb620cae96073dde4f760367817f
Committed by
Russell King
1 parent
6d341675f8
Exists in
master
and in
39 other branches
[ARM] 5184/1: Split ucb1400_ts into core and touchscreen
This patch splits ucb1400_ts into ucb1400_ts and ucb1400_core. Since this chip supports more features than only touchscreen, it was necessary to prepare it for feature addition. The previous functionality is preserved by applying this patch. [Build fixes for non-ARM by Stephen Rothwell and Takashi Iwai] Signed-off-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Showing 6 changed files with 412 additions and 248 deletions Side-by-side Diff
drivers/input/touchscreen/Kconfig
... | ... | @@ -220,6 +220,7 @@ |
220 | 220 | config TOUCHSCREEN_UCB1400 |
221 | 221 | tristate "Philips UCB1400 touchscreen" |
222 | 222 | select AC97_BUS |
223 | + depends on UCB1400_CORE | |
223 | 224 | help |
224 | 225 | This enables support for the Philips UCB1400 touchscreen interface. |
225 | 226 | The UCB1400 is an AC97 audio codec. The touchscreen interface |
drivers/input/touchscreen/ucb1400_ts.c
... | ... | @@ -5,6 +5,10 @@ |
5 | 5 | * Created: September 25, 2006 |
6 | 6 | * Copyright: MontaVista Software, Inc. |
7 | 7 | * |
8 | + * Spliting done by: Marek Vasut <marek.vasut@gmail.com> | |
9 | + * If something doesnt work and it worked before spliting, e-mail me, | |
10 | + * dont bother Nicolas please ;-) | |
11 | + * | |
8 | 12 | * This program is free software; you can redistribute it and/or modify |
9 | 13 | * it under the terms of the GNU General Public License version 2 as |
10 | 14 | * published by the Free Software Foundation. |
11 | 15 | |
12 | 16 | |
13 | 17 | |
14 | 18 | |
... | ... | @@ -25,124 +29,16 @@ |
25 | 29 | #include <linux/slab.h> |
26 | 30 | #include <linux/kthread.h> |
27 | 31 | #include <linux/freezer.h> |
32 | +#include <linux/ucb1400.h> | |
28 | 33 | |
29 | -#include <sound/core.h> | |
30 | -#include <sound/ac97_codec.h> | |
31 | - | |
32 | - | |
33 | -/* | |
34 | - * Interesting UCB1400 AC-link registers | |
35 | - */ | |
36 | - | |
37 | -#define UCB_IE_RIS 0x5e | |
38 | -#define UCB_IE_FAL 0x60 | |
39 | -#define UCB_IE_STATUS 0x62 | |
40 | -#define UCB_IE_CLEAR 0x62 | |
41 | -#define UCB_IE_ADC (1 << 11) | |
42 | -#define UCB_IE_TSPX (1 << 12) | |
43 | - | |
44 | -#define UCB_TS_CR 0x64 | |
45 | -#define UCB_TS_CR_TSMX_POW (1 << 0) | |
46 | -#define UCB_TS_CR_TSPX_POW (1 << 1) | |
47 | -#define UCB_TS_CR_TSMY_POW (1 << 2) | |
48 | -#define UCB_TS_CR_TSPY_POW (1 << 3) | |
49 | -#define UCB_TS_CR_TSMX_GND (1 << 4) | |
50 | -#define UCB_TS_CR_TSPX_GND (1 << 5) | |
51 | -#define UCB_TS_CR_TSMY_GND (1 << 6) | |
52 | -#define UCB_TS_CR_TSPY_GND (1 << 7) | |
53 | -#define UCB_TS_CR_MODE_INT (0 << 8) | |
54 | -#define UCB_TS_CR_MODE_PRES (1 << 8) | |
55 | -#define UCB_TS_CR_MODE_POS (2 << 8) | |
56 | -#define UCB_TS_CR_BIAS_ENA (1 << 11) | |
57 | -#define UCB_TS_CR_TSPX_LOW (1 << 12) | |
58 | -#define UCB_TS_CR_TSMX_LOW (1 << 13) | |
59 | - | |
60 | -#define UCB_ADC_CR 0x66 | |
61 | -#define UCB_ADC_SYNC_ENA (1 << 0) | |
62 | -#define UCB_ADC_VREFBYP_CON (1 << 1) | |
63 | -#define UCB_ADC_INP_TSPX (0 << 2) | |
64 | -#define UCB_ADC_INP_TSMX (1 << 2) | |
65 | -#define UCB_ADC_INP_TSPY (2 << 2) | |
66 | -#define UCB_ADC_INP_TSMY (3 << 2) | |
67 | -#define UCB_ADC_INP_AD0 (4 << 2) | |
68 | -#define UCB_ADC_INP_AD1 (5 << 2) | |
69 | -#define UCB_ADC_INP_AD2 (6 << 2) | |
70 | -#define UCB_ADC_INP_AD3 (7 << 2) | |
71 | -#define UCB_ADC_EXT_REF (1 << 5) | |
72 | -#define UCB_ADC_START (1 << 7) | |
73 | -#define UCB_ADC_ENA (1 << 15) | |
74 | - | |
75 | -#define UCB_ADC_DATA 0x68 | |
76 | -#define UCB_ADC_DAT_VALID (1 << 15) | |
77 | -#define UCB_ADC_DAT_VALUE(x) ((x) & 0x3ff) | |
78 | - | |
79 | -#define UCB_ID 0x7e | |
80 | -#define UCB_ID_1400 0x4304 | |
81 | - | |
82 | - | |
83 | -struct ucb1400 { | |
84 | - struct snd_ac97 *ac97; | |
85 | - struct input_dev *ts_idev; | |
86 | - | |
87 | - int irq; | |
88 | - | |
89 | - wait_queue_head_t ts_wait; | |
90 | - struct task_struct *ts_task; | |
91 | - | |
92 | - unsigned int irq_pending; /* not bit field shared */ | |
93 | - unsigned int ts_restart:1; | |
94 | - unsigned int adcsync:1; | |
95 | -}; | |
96 | - | |
97 | 34 | static int adcsync; |
98 | 35 | static int ts_delay = 55; /* us */ |
99 | 36 | static int ts_delay_pressure; /* us */ |
100 | 37 | |
101 | -static inline u16 ucb1400_reg_read(struct ucb1400 *ucb, u16 reg) | |
102 | -{ | |
103 | - return ucb->ac97->bus->ops->read(ucb->ac97, reg); | |
104 | -} | |
105 | - | |
106 | -static inline void ucb1400_reg_write(struct ucb1400 *ucb, u16 reg, u16 val) | |
107 | -{ | |
108 | - ucb->ac97->bus->ops->write(ucb->ac97, reg, val); | |
109 | -} | |
110 | - | |
111 | -static inline void ucb1400_adc_enable(struct ucb1400 *ucb) | |
112 | -{ | |
113 | - ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); | |
114 | -} | |
115 | - | |
116 | -static unsigned int ucb1400_adc_read(struct ucb1400 *ucb, u16 adc_channel) | |
117 | -{ | |
118 | - unsigned int val; | |
119 | - | |
120 | - if (ucb->adcsync) | |
121 | - adc_channel |= UCB_ADC_SYNC_ENA; | |
122 | - | |
123 | - ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel); | |
124 | - ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | UCB_ADC_START); | |
125 | - | |
126 | - for (;;) { | |
127 | - val = ucb1400_reg_read(ucb, UCB_ADC_DATA); | |
128 | - if (val & UCB_ADC_DAT_VALID) | |
129 | - break; | |
130 | - /* yield to other processes */ | |
131 | - schedule_timeout_uninterruptible(1); | |
132 | - } | |
133 | - | |
134 | - return UCB_ADC_DAT_VALUE(val); | |
135 | -} | |
136 | - | |
137 | -static inline void ucb1400_adc_disable(struct ucb1400 *ucb) | |
138 | -{ | |
139 | - ucb1400_reg_write(ucb, UCB_ADC_CR, 0); | |
140 | -} | |
141 | - | |
142 | 38 | /* Switch to interrupt mode. */ |
143 | -static inline void ucb1400_ts_mode_int(struct ucb1400 *ucb) | |
39 | +static inline void ucb1400_ts_mode_int(struct snd_ac97 *ac97) | |
144 | 40 | { |
145 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
41 | + ucb1400_reg_write(ac97, UCB_TS_CR, | |
146 | 42 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
147 | 43 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | |
148 | 44 | UCB_TS_CR_MODE_INT); |
149 | 45 | |
150 | 46 | |
... | ... | @@ -152,14 +48,14 @@ |
152 | 48 | * Switch to pressure mode, and read pressure. We don't need to wait |
153 | 49 | * here, since both plates are being driven. |
154 | 50 | */ |
155 | -static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400 *ucb) | |
51 | +static inline unsigned int ucb1400_ts_read_pressure(struct ucb1400_ts *ucb) | |
156 | 52 | { |
157 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
53 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
158 | 54 | UCB_TS_CR_TSMX_POW | UCB_TS_CR_TSPX_POW | |
159 | 55 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_GND | |
160 | 56 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
161 | 57 | udelay(ts_delay_pressure); |
162 | - return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); | |
58 | + return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); | |
163 | 59 | } |
164 | 60 | |
165 | 61 | /* |
166 | 62 | |
167 | 63 | |
168 | 64 | |
169 | 65 | |
... | ... | @@ -168,21 +64,21 @@ |
168 | 64 | * gives a faster response time. Even so, we need to wait about 55us |
169 | 65 | * for things to stabilise. |
170 | 66 | */ |
171 | -static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400 *ucb) | |
67 | +static inline unsigned int ucb1400_ts_read_xpos(struct ucb1400_ts *ucb) | |
172 | 68 | { |
173 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
69 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
174 | 70 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
175 | 71 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
176 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
72 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
177 | 73 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
178 | 74 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
179 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
75 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
180 | 76 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
181 | 77 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); |
182 | 78 | |
183 | 79 | udelay(ts_delay); |
184 | 80 | |
185 | - return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPY); | |
81 | + return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPY, adcsync); | |
186 | 82 | } |
187 | 83 | |
188 | 84 | /* |
189 | 85 | |
190 | 86 | |
191 | 87 | |
192 | 88 | |
193 | 89 | |
194 | 90 | |
195 | 91 | |
196 | 92 | |
197 | 93 | |
198 | 94 | |
199 | 95 | |
200 | 96 | |
201 | 97 | |
202 | 98 | |
203 | 99 | |
204 | 100 | |
... | ... | @@ -191,63 +87,63 @@ |
191 | 87 | * gives a faster response time. Even so, we need to wait about 55us |
192 | 88 | * for things to stabilise. |
193 | 89 | */ |
194 | -static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400 *ucb) | |
90 | +static inline unsigned int ucb1400_ts_read_ypos(struct ucb1400_ts *ucb) | |
195 | 91 | { |
196 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
92 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
197 | 93 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
198 | 94 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
199 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
95 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
200 | 96 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
201 | 97 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
202 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
98 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
203 | 99 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
204 | 100 | UCB_TS_CR_MODE_POS | UCB_TS_CR_BIAS_ENA); |
205 | 101 | |
206 | 102 | udelay(ts_delay); |
207 | 103 | |
208 | - return ucb1400_adc_read(ucb, UCB_ADC_INP_TSPX); | |
104 | + return ucb1400_adc_read(ucb->ac97, UCB_ADC_INP_TSPX, adcsync); | |
209 | 105 | } |
210 | 106 | |
211 | 107 | /* |
212 | 108 | * Switch to X plate resistance mode. Set MX to ground, PX to |
213 | 109 | * supply. Measure current. |
214 | 110 | */ |
215 | -static inline unsigned int ucb1400_ts_read_xres(struct ucb1400 *ucb) | |
111 | +static inline unsigned int ucb1400_ts_read_xres(struct ucb1400_ts *ucb) | |
216 | 112 | { |
217 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
113 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
218 | 114 | UCB_TS_CR_TSMX_GND | UCB_TS_CR_TSPX_POW | |
219 | 115 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
220 | - return ucb1400_adc_read(ucb, 0); | |
116 | + return ucb1400_adc_read(ucb->ac97, 0, adcsync); | |
221 | 117 | } |
222 | 118 | |
223 | 119 | /* |
224 | 120 | * Switch to Y plate resistance mode. Set MY to ground, PY to |
225 | 121 | * supply. Measure current. |
226 | 122 | */ |
227 | -static inline unsigned int ucb1400_ts_read_yres(struct ucb1400 *ucb) | |
123 | +static inline unsigned int ucb1400_ts_read_yres(struct ucb1400_ts *ucb) | |
228 | 124 | { |
229 | - ucb1400_reg_write(ucb, UCB_TS_CR, | |
125 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, | |
230 | 126 | UCB_TS_CR_TSMY_GND | UCB_TS_CR_TSPY_POW | |
231 | 127 | UCB_TS_CR_MODE_PRES | UCB_TS_CR_BIAS_ENA); |
232 | - return ucb1400_adc_read(ucb, 0); | |
128 | + return ucb1400_adc_read(ucb->ac97, 0, adcsync); | |
233 | 129 | } |
234 | 130 | |
235 | -static inline int ucb1400_ts_pen_down(struct ucb1400 *ucb) | |
131 | +static inline int ucb1400_ts_pen_down(struct snd_ac97 *ac97) | |
236 | 132 | { |
237 | - unsigned short val = ucb1400_reg_read(ucb, UCB_TS_CR); | |
238 | - return (val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW)); | |
133 | + unsigned short val = ucb1400_reg_read(ac97, UCB_TS_CR); | |
134 | + return val & (UCB_TS_CR_TSPX_LOW | UCB_TS_CR_TSMX_LOW); | |
239 | 135 | } |
240 | 136 | |
241 | -static inline void ucb1400_ts_irq_enable(struct ucb1400 *ucb) | |
137 | +static inline void ucb1400_ts_irq_enable(struct snd_ac97 *ac97) | |
242 | 138 | { |
243 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, UCB_IE_TSPX); | |
244 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
245 | - ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_TSPX); | |
139 | + ucb1400_reg_write(ac97, UCB_IE_CLEAR, UCB_IE_TSPX); | |
140 | + ucb1400_reg_write(ac97, UCB_IE_CLEAR, 0); | |
141 | + ucb1400_reg_write(ac97, UCB_IE_FAL, UCB_IE_TSPX); | |
246 | 142 | } |
247 | 143 | |
248 | -static inline void ucb1400_ts_irq_disable(struct ucb1400 *ucb) | |
144 | +static inline void ucb1400_ts_irq_disable(struct snd_ac97 *ac97) | |
249 | 145 | { |
250 | - ucb1400_reg_write(ucb, UCB_IE_FAL, 0); | |
146 | + ucb1400_reg_write(ac97, UCB_IE_FAL, 0); | |
251 | 147 | } |
252 | 148 | |
253 | 149 | static void ucb1400_ts_evt_add(struct input_dev *idev, u16 pressure, u16 x, u16 y) |
254 | 150 | |
255 | 151 | |
256 | 152 | |
257 | 153 | |
... | ... | @@ -264,25 +160,24 @@ |
264 | 160 | input_sync(idev); |
265 | 161 | } |
266 | 162 | |
267 | -static void ucb1400_handle_pending_irq(struct ucb1400 *ucb) | |
163 | +static void ucb1400_handle_pending_irq(struct ucb1400_ts *ucb) | |
268 | 164 | { |
269 | 165 | unsigned int isr; |
270 | 166 | |
271 | - isr = ucb1400_reg_read(ucb, UCB_IE_STATUS); | |
272 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, isr); | |
273 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
167 | + isr = ucb1400_reg_read(ucb->ac97, UCB_IE_STATUS); | |
168 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, isr); | |
169 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
274 | 170 | |
275 | - if (isr & UCB_IE_TSPX) | |
276 | - ucb1400_ts_irq_disable(ucb); | |
277 | - else | |
171 | + if (isr & UCB_IE_TSPX) { | |
172 | + ucb1400_ts_irq_disable(ucb->ac97); | |
173 | + enable_irq(ucb->irq); | |
174 | + } else | |
278 | 175 | printk(KERN_ERR "ucb1400: unexpected IE_STATUS = %#x\n", isr); |
279 | - | |
280 | - enable_irq(ucb->irq); | |
281 | 176 | } |
282 | 177 | |
283 | 178 | static int ucb1400_ts_thread(void *_ucb) |
284 | 179 | { |
285 | - struct ucb1400 *ucb = _ucb; | |
180 | + struct ucb1400_ts *ucb = _ucb; | |
286 | 181 | struct task_struct *tsk = current; |
287 | 182 | int valid = 0; |
288 | 183 | struct sched_param param = { .sched_priority = 1 }; |
289 | 184 | |
290 | 185 | |
291 | 186 | |
... | ... | @@ -301,19 +196,19 @@ |
301 | 196 | ucb1400_handle_pending_irq(ucb); |
302 | 197 | } |
303 | 198 | |
304 | - ucb1400_adc_enable(ucb); | |
199 | + ucb1400_adc_enable(ucb->ac97); | |
305 | 200 | x = ucb1400_ts_read_xpos(ucb); |
306 | 201 | y = ucb1400_ts_read_ypos(ucb); |
307 | 202 | p = ucb1400_ts_read_pressure(ucb); |
308 | - ucb1400_adc_disable(ucb); | |
203 | + ucb1400_adc_disable(ucb->ac97); | |
309 | 204 | |
310 | 205 | /* Switch back to interrupt mode. */ |
311 | - ucb1400_ts_mode_int(ucb); | |
206 | + ucb1400_ts_mode_int(ucb->ac97); | |
312 | 207 | |
313 | 208 | msleep(10); |
314 | 209 | |
315 | - if (ucb1400_ts_pen_down(ucb)) { | |
316 | - ucb1400_ts_irq_enable(ucb); | |
210 | + if (ucb1400_ts_pen_down(ucb->ac97)) { | |
211 | + ucb1400_ts_irq_enable(ucb->ac97); | |
317 | 212 | |
318 | 213 | /* |
319 | 214 | * If we spat out a valid sample set last time, |
... | ... | @@ -332,8 +227,8 @@ |
332 | 227 | } |
333 | 228 | |
334 | 229 | wait_event_freezable_timeout(ucb->ts_wait, |
335 | - ucb->irq_pending || ucb->ts_restart || kthread_should_stop(), | |
336 | - timeout); | |
230 | + ucb->irq_pending || ucb->ts_restart || | |
231 | + kthread_should_stop(), timeout); | |
337 | 232 | } |
338 | 233 | |
339 | 234 | /* Send the "pen off" if we are stopping with the pen still active */ |
... | ... | @@ -356,7 +251,7 @@ |
356 | 251 | */ |
357 | 252 | static irqreturn_t ucb1400_hard_irq(int irqnr, void *devid) |
358 | 253 | { |
359 | - struct ucb1400 *ucb = devid; | |
254 | + struct ucb1400_ts *ucb = devid; | |
360 | 255 | |
361 | 256 | if (irqnr == ucb->irq) { |
362 | 257 | disable_irq(ucb->irq); |
... | ... | @@ -369,7 +264,7 @@ |
369 | 264 | |
370 | 265 | static int ucb1400_ts_open(struct input_dev *idev) |
371 | 266 | { |
372 | - struct ucb1400 *ucb = input_get_drvdata(idev); | |
267 | + struct ucb1400_ts *ucb = input_get_drvdata(idev); | |
373 | 268 | int ret = 0; |
374 | 269 | |
375 | 270 | BUG_ON(ucb->ts_task); |
376 | 271 | |
377 | 272 | |
... | ... | @@ -385,35 +280,15 @@ |
385 | 280 | |
386 | 281 | static void ucb1400_ts_close(struct input_dev *idev) |
387 | 282 | { |
388 | - struct ucb1400 *ucb = input_get_drvdata(idev); | |
283 | + struct ucb1400_ts *ucb = input_get_drvdata(idev); | |
389 | 284 | |
390 | 285 | if (ucb->ts_task) |
391 | 286 | kthread_stop(ucb->ts_task); |
392 | 287 | |
393 | - ucb1400_ts_irq_disable(ucb); | |
394 | - ucb1400_reg_write(ucb, UCB_TS_CR, 0); | |
288 | + ucb1400_ts_irq_disable(ucb->ac97); | |
289 | + ucb1400_reg_write(ucb->ac97, UCB_TS_CR, 0); | |
395 | 290 | } |
396 | 291 | |
397 | -#ifdef CONFIG_PM | |
398 | -static int ucb1400_ts_resume(struct device *dev) | |
399 | -{ | |
400 | - struct ucb1400 *ucb = dev_get_drvdata(dev); | |
401 | - | |
402 | - if (ucb->ts_task) { | |
403 | - /* | |
404 | - * Restart the TS thread to ensure the | |
405 | - * TS interrupt mode is set up again | |
406 | - * after sleep. | |
407 | - */ | |
408 | - ucb->ts_restart = 1; | |
409 | - wake_up(&ucb->ts_wait); | |
410 | - } | |
411 | - return 0; | |
412 | -} | |
413 | -#else | |
414 | -#define ucb1400_ts_resume NULL | |
415 | -#endif | |
416 | - | |
417 | 292 | #ifndef NO_IRQ |
418 | 293 | #define NO_IRQ 0 |
419 | 294 | #endif |
420 | 295 | |
421 | 296 | |
422 | 297 | |
... | ... | @@ -422,25 +297,26 @@ |
422 | 297 | * Try to probe our interrupt, rather than relying on lots of |
423 | 298 | * hard-coded machine dependencies. |
424 | 299 | */ |
425 | -static int ucb1400_detect_irq(struct ucb1400 *ucb) | |
300 | +static int ucb1400_ts_detect_irq(struct ucb1400_ts *ucb) | |
426 | 301 | { |
427 | 302 | unsigned long mask, timeout; |
428 | 303 | |
429 | 304 | mask = probe_irq_on(); |
430 | 305 | |
431 | 306 | /* Enable the ADC interrupt. */ |
432 | - ucb1400_reg_write(ucb, UCB_IE_RIS, UCB_IE_ADC); | |
433 | - ucb1400_reg_write(ucb, UCB_IE_FAL, UCB_IE_ADC); | |
434 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); | |
435 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
307 | + ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, UCB_IE_ADC); | |
308 | + ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, UCB_IE_ADC); | |
309 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | |
310 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
436 | 311 | |
437 | 312 | /* Cause an ADC interrupt. */ |
438 | - ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA); | |
439 | - ucb1400_reg_write(ucb, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); | |
313 | + ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA); | |
314 | + ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, UCB_ADC_ENA | UCB_ADC_START); | |
440 | 315 | |
441 | 316 | /* Wait for the conversion to complete. */ |
442 | 317 | timeout = jiffies + HZ/2; |
443 | - while (!(ucb1400_reg_read(ucb, UCB_ADC_DATA) & UCB_ADC_DAT_VALID)) { | |
318 | + while (!(ucb1400_reg_read(ucb->ac97, UCB_ADC_DATA) & | |
319 | + UCB_ADC_DAT_VALID)) { | |
444 | 320 | cpu_relax(); |
445 | 321 | if (time_after(jiffies, timeout)) { |
446 | 322 | printk(KERN_ERR "ucb1400: timed out in IRQ probe\n"); |
447 | 323 | |
... | ... | @@ -448,13 +324,13 @@ |
448 | 324 | return -ENODEV; |
449 | 325 | } |
450 | 326 | } |
451 | - ucb1400_reg_write(ucb, UCB_ADC_CR, 0); | |
327 | + ucb1400_reg_write(ucb->ac97, UCB_ADC_CR, 0); | |
452 | 328 | |
453 | 329 | /* Disable and clear interrupt. */ |
454 | - ucb1400_reg_write(ucb, UCB_IE_RIS, 0); | |
455 | - ucb1400_reg_write(ucb, UCB_IE_FAL, 0); | |
456 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0xffff); | |
457 | - ucb1400_reg_write(ucb, UCB_IE_CLEAR, 0); | |
330 | + ucb1400_reg_write(ucb->ac97, UCB_IE_RIS, 0); | |
331 | + ucb1400_reg_write(ucb->ac97, UCB_IE_FAL, 0); | |
332 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0xffff); | |
333 | + ucb1400_reg_write(ucb->ac97, UCB_IE_CLEAR, 0); | |
458 | 334 | |
459 | 335 | /* Read triggered interrupt. */ |
460 | 336 | ucb->irq = probe_irq_off(mask); |
461 | 337 | |
462 | 338 | |
463 | 339 | |
464 | 340 | |
465 | 341 | |
... | ... | @@ -464,36 +340,25 @@ |
464 | 340 | return 0; |
465 | 341 | } |
466 | 342 | |
467 | -static int ucb1400_ts_probe(struct device *dev) | |
343 | +static int ucb1400_ts_probe(struct platform_device *dev) | |
468 | 344 | { |
469 | - struct ucb1400 *ucb; | |
470 | - struct input_dev *idev; | |
471 | - int error, id, x_res, y_res; | |
345 | + int error, x_res, y_res; | |
346 | + struct ucb1400_ts *ucb = dev->dev.platform_data; | |
472 | 347 | |
473 | - ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); | |
474 | - idev = input_allocate_device(); | |
475 | - if (!ucb || !idev) { | |
348 | + ucb->ts_idev = input_allocate_device(); | |
349 | + if (!ucb->ts_idev) { | |
476 | 350 | error = -ENOMEM; |
477 | - goto err_free_devs; | |
351 | + goto err; | |
478 | 352 | } |
479 | 353 | |
480 | - ucb->ts_idev = idev; | |
481 | - ucb->adcsync = adcsync; | |
482 | - ucb->ac97 = to_ac97_t(dev); | |
483 | - init_waitqueue_head(&ucb->ts_wait); | |
484 | - | |
485 | - id = ucb1400_reg_read(ucb, UCB_ID); | |
486 | - if (id != UCB_ID_1400) { | |
487 | - error = -ENODEV; | |
488 | - goto err_free_devs; | |
489 | - } | |
490 | - | |
491 | - error = ucb1400_detect_irq(ucb); | |
354 | + error = ucb1400_ts_detect_irq(ucb); | |
492 | 355 | if (error) { |
493 | 356 | printk(KERN_ERR "UCB1400: IRQ probe failed\n"); |
494 | 357 | goto err_free_devs; |
495 | 358 | } |
496 | 359 | |
360 | + init_waitqueue_head(&ucb->ts_wait); | |
361 | + | |
497 | 362 | error = request_irq(ucb->irq, ucb1400_hard_irq, IRQF_TRIGGER_RISING, |
498 | 363 | "UCB1400", ucb); |
499 | 364 | if (error) { |
500 | 365 | |
501 | 366 | |
502 | 367 | |
503 | 368 | |
504 | 369 | |
505 | 370 | |
506 | 371 | |
507 | 372 | |
508 | 373 | |
509 | 374 | |
510 | 375 | |
511 | 376 | |
512 | 377 | |
513 | 378 | |
514 | 379 | |
515 | 380 | |
516 | 381 | |
... | ... | @@ -503,80 +368,101 @@ |
503 | 368 | } |
504 | 369 | printk(KERN_DEBUG "UCB1400: found IRQ %d\n", ucb->irq); |
505 | 370 | |
506 | - input_set_drvdata(idev, ucb); | |
371 | + input_set_drvdata(ucb->ts_idev, ucb); | |
507 | 372 | |
508 | - idev->dev.parent = dev; | |
509 | - idev->name = "UCB1400 touchscreen interface"; | |
510 | - idev->id.vendor = ucb1400_reg_read(ucb, AC97_VENDOR_ID1); | |
511 | - idev->id.product = id; | |
512 | - idev->open = ucb1400_ts_open; | |
513 | - idev->close = ucb1400_ts_close; | |
514 | - idev->evbit[0] = BIT_MASK(EV_ABS); | |
373 | + ucb->ts_idev->dev.parent = &dev->dev; | |
374 | + ucb->ts_idev->name = "UCB1400 touchscreen interface"; | |
375 | + ucb->ts_idev->id.vendor = ucb1400_reg_read(ucb->ac97, | |
376 | + AC97_VENDOR_ID1); | |
377 | + ucb->ts_idev->id.product = ucb->id; | |
378 | + ucb->ts_idev->open = ucb1400_ts_open; | |
379 | + ucb->ts_idev->close = ucb1400_ts_close; | |
380 | + ucb->ts_idev->evbit[0] = BIT_MASK(EV_ABS); | |
515 | 381 | |
516 | - ucb1400_adc_enable(ucb); | |
382 | + ucb1400_adc_enable(ucb->ac97); | |
517 | 383 | x_res = ucb1400_ts_read_xres(ucb); |
518 | 384 | y_res = ucb1400_ts_read_yres(ucb); |
519 | - ucb1400_adc_disable(ucb); | |
385 | + ucb1400_adc_disable(ucb->ac97); | |
520 | 386 | printk(KERN_DEBUG "UCB1400: x/y = %d/%d\n", x_res, y_res); |
521 | 387 | |
522 | - input_set_abs_params(idev, ABS_X, 0, x_res, 0, 0); | |
523 | - input_set_abs_params(idev, ABS_Y, 0, y_res, 0, 0); | |
524 | - input_set_abs_params(idev, ABS_PRESSURE, 0, 0, 0, 0); | |
388 | + input_set_abs_params(ucb->ts_idev, ABS_X, 0, x_res, 0, 0); | |
389 | + input_set_abs_params(ucb->ts_idev, ABS_Y, 0, y_res, 0, 0); | |
390 | + input_set_abs_params(ucb->ts_idev, ABS_PRESSURE, 0, 0, 0, 0); | |
525 | 391 | |
526 | - error = input_register_device(idev); | |
392 | + error = input_register_device(ucb->ts_idev); | |
527 | 393 | if (error) |
528 | 394 | goto err_free_irq; |
529 | 395 | |
530 | - dev_set_drvdata(dev, ucb); | |
531 | 396 | return 0; |
532 | 397 | |
533 | - err_free_irq: | |
398 | +err_free_irq: | |
534 | 399 | free_irq(ucb->irq, ucb); |
535 | - err_free_devs: | |
536 | - input_free_device(idev); | |
537 | - kfree(ucb); | |
400 | +err_free_devs: | |
401 | + input_free_device(ucb->ts_idev); | |
402 | +err: | |
538 | 403 | return error; |
404 | + | |
539 | 405 | } |
540 | 406 | |
541 | -static int ucb1400_ts_remove(struct device *dev) | |
407 | +static int ucb1400_ts_remove(struct platform_device *dev) | |
542 | 408 | { |
543 | - struct ucb1400 *ucb = dev_get_drvdata(dev); | |
409 | + struct ucb1400_ts *ucb = dev->dev.platform_data; | |
544 | 410 | |
545 | 411 | free_irq(ucb->irq, ucb); |
546 | 412 | input_unregister_device(ucb->ts_idev); |
547 | - dev_set_drvdata(dev, NULL); | |
548 | - kfree(ucb); | |
549 | 413 | return 0; |
550 | 414 | } |
551 | 415 | |
552 | -static struct device_driver ucb1400_ts_driver = { | |
553 | - .name = "ucb1400_ts", | |
554 | - .owner = THIS_MODULE, | |
555 | - .bus = &ac97_bus_type, | |
556 | - .probe = ucb1400_ts_probe, | |
557 | - .remove = ucb1400_ts_remove, | |
558 | - .resume = ucb1400_ts_resume, | |
416 | +#ifdef CONFIG_PM | |
417 | +static int ucb1400_ts_resume(struct platform_device *dev) | |
418 | +{ | |
419 | + struct ucb1400_ts *ucb = platform_get_drvdata(dev); | |
420 | + | |
421 | + if (ucb->ts_task) { | |
422 | + /* | |
423 | + * Restart the TS thread to ensure the | |
424 | + * TS interrupt mode is set up again | |
425 | + * after sleep. | |
426 | + */ | |
427 | + ucb->ts_restart = 1; | |
428 | + wake_up(&ucb->ts_wait); | |
429 | + } | |
430 | + return 0; | |
431 | +} | |
432 | +#else | |
433 | +#define ucb1400_ts_resume NULL | |
434 | +#endif | |
435 | + | |
436 | +static struct platform_driver ucb1400_ts_driver = { | |
437 | + .probe = ucb1400_ts_probe, | |
438 | + .remove = ucb1400_ts_remove, | |
439 | + .resume = ucb1400_ts_resume, | |
440 | + .driver = { | |
441 | + .name = "ucb1400_ts", | |
442 | + }, | |
559 | 443 | }; |
560 | 444 | |
561 | 445 | static int __init ucb1400_ts_init(void) |
562 | 446 | { |
563 | - return driver_register(&ucb1400_ts_driver); | |
447 | + return platform_driver_register(&ucb1400_ts_driver); | |
564 | 448 | } |
565 | 449 | |
566 | 450 | static void __exit ucb1400_ts_exit(void) |
567 | 451 | { |
568 | - driver_unregister(&ucb1400_ts_driver); | |
452 | + platform_driver_unregister(&ucb1400_ts_driver); | |
569 | 453 | } |
570 | 454 | |
571 | 455 | module_param(adcsync, bool, 0444); |
572 | 456 | MODULE_PARM_DESC(adcsync, "Synchronize touch readings with ADCSYNC pin."); |
573 | 457 | |
574 | 458 | module_param(ts_delay, int, 0444); |
575 | -MODULE_PARM_DESC(ts_delay, "Delay between panel setup and position read. Default = 55us."); | |
459 | +MODULE_PARM_DESC(ts_delay, "Delay between panel setup and" | |
460 | + " position read. Default = 55us."); | |
576 | 461 | |
577 | 462 | module_param(ts_delay_pressure, int, 0444); |
578 | 463 | MODULE_PARM_DESC(ts_delay_pressure, |
579 | - "delay between panel setup and pressure read. Default = 0us."); | |
464 | + "delay between panel setup and pressure read." | |
465 | + " Default = 0us."); | |
580 | 466 | |
581 | 467 | module_init(ucb1400_ts_init); |
582 | 468 | module_exit(ucb1400_ts_exit); |
drivers/mfd/Kconfig
... | ... | @@ -50,6 +50,15 @@ |
50 | 50 | HTC Magician devices, respectively. Actual functionality is |
51 | 51 | handled by the leds-pasic3 and ds1wm drivers. |
52 | 52 | |
53 | +config UCB1400_CORE | |
54 | + tristate "Philips UCB1400 Core driver" | |
55 | + help | |
56 | + This enables support for the Philips UCB1400 core functions. | |
57 | + The UCB1400 is an AC97 audio codec. | |
58 | + | |
59 | + To compile this driver as a module, choose M here: the | |
60 | + module will be called ucb1400_core. | |
61 | + | |
53 | 62 | config MFD_TC6393XB |
54 | 63 | bool "Support Toshiba TC6393XB" |
55 | 64 | depends on GPIOLIB && ARM |
drivers/mfd/Makefile
drivers/mfd/ucb1400_core.c
1 | +/* | |
2 | + * Core functions for: | |
3 | + * Philips UCB1400 multifunction chip | |
4 | + * | |
5 | + * Based on ucb1400_ts.c: | |
6 | + * Author: Nicolas Pitre | |
7 | + * Created: September 25, 2006 | |
8 | + * Copyright: MontaVista Software, Inc. | |
9 | + * | |
10 | + * Spliting done by: Marek Vasut <marek.vasut@gmail.com> | |
11 | + * If something doesnt work and it worked before spliting, e-mail me, | |
12 | + * dont bother Nicolas please ;-) | |
13 | + * | |
14 | + * This program is free software; you can redistribute it and/or modify | |
15 | + * it under the terms of the GNU General Public License version 2 as | |
16 | + * published by the Free Software Foundation. | |
17 | + * | |
18 | + * This code is heavily based on ucb1x00-*.c copyrighted by Russell King | |
19 | + * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has | |
20 | + * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. | |
21 | + */ | |
22 | + | |
23 | +#include <linux/module.h> | |
24 | +#include <linux/ucb1400.h> | |
25 | + | |
26 | +static int ucb1400_core_probe(struct device *dev) | |
27 | +{ | |
28 | + int err; | |
29 | + struct ucb1400 *ucb; | |
30 | + struct ucb1400_ts ucb_ts; | |
31 | + struct snd_ac97 *ac97; | |
32 | + | |
33 | + memset(&ucb_ts, 0, sizeof(ucb_ts)); | |
34 | + | |
35 | + ucb = kzalloc(sizeof(struct ucb1400), GFP_KERNEL); | |
36 | + if (!ucb) { | |
37 | + err = -ENOMEM; | |
38 | + goto err; | |
39 | + } | |
40 | + | |
41 | + dev_set_drvdata(dev, ucb); | |
42 | + | |
43 | + ac97 = to_ac97_t(dev); | |
44 | + | |
45 | + ucb_ts.id = ucb1400_reg_read(ac97, UCB_ID); | |
46 | + if (ucb_ts.id != UCB_ID_1400) { | |
47 | + err = -ENODEV; | |
48 | + goto err0; | |
49 | + } | |
50 | + | |
51 | + /* TOUCHSCREEN */ | |
52 | + ucb_ts.ac97 = ac97; | |
53 | + ucb->ucb1400_ts = platform_device_alloc("ucb1400_ts", -1); | |
54 | + if (!ucb->ucb1400_ts) { | |
55 | + err = -ENOMEM; | |
56 | + goto err0; | |
57 | + } | |
58 | + err = platform_device_add_data(ucb->ucb1400_ts, &ucb_ts, | |
59 | + sizeof(ucb_ts)); | |
60 | + if (err) | |
61 | + goto err1; | |
62 | + err = platform_device_add(ucb->ucb1400_ts); | |
63 | + if (err) | |
64 | + goto err1; | |
65 | + | |
66 | + return 0; | |
67 | + | |
68 | +err1: | |
69 | + platform_device_put(ucb->ucb1400_ts); | |
70 | +err0: | |
71 | + kfree(ucb); | |
72 | +err: | |
73 | + return err; | |
74 | +} | |
75 | + | |
76 | +static int ucb1400_core_remove(struct device *dev) | |
77 | +{ | |
78 | + struct ucb1400 *ucb = dev_get_drvdata(dev); | |
79 | + | |
80 | + platform_device_unregister(ucb->ucb1400_ts); | |
81 | + kfree(ucb); | |
82 | + return 0; | |
83 | +} | |
84 | + | |
85 | +static struct device_driver ucb1400_core_driver = { | |
86 | + .name = "ucb1400_core", | |
87 | + .bus = &ac97_bus_type, | |
88 | + .probe = ucb1400_core_probe, | |
89 | + .remove = ucb1400_core_remove, | |
90 | +}; | |
91 | + | |
92 | +static int __init ucb1400_core_init(void) | |
93 | +{ | |
94 | + return driver_register(&ucb1400_core_driver); | |
95 | +} | |
96 | + | |
97 | +static void __exit ucb1400_core_exit(void) | |
98 | +{ | |
99 | + driver_unregister(&ucb1400_core_driver); | |
100 | +} | |
101 | + | |
102 | +module_init(ucb1400_core_init); | |
103 | +module_exit(ucb1400_core_exit); | |
104 | + | |
105 | +MODULE_DESCRIPTION("Philips UCB1400 driver"); | |
106 | +MODULE_LICENSE("GPL"); |
include/linux/ucb1400.h
1 | +/* | |
2 | + * Register definitions and functions for: | |
3 | + * Philips UCB1400 driver | |
4 | + * | |
5 | + * Based on ucb1400_ts: | |
6 | + * Author: Nicolas Pitre | |
7 | + * Created: September 25, 2006 | |
8 | + * Copyright: MontaVista Software, Inc. | |
9 | + * | |
10 | + * Spliting done by: Marek Vasut <marek.vasut@gmail.com> | |
11 | + * If something doesnt work and it worked before spliting, e-mail me, | |
12 | + * dont bother Nicolas please ;-) | |
13 | + * | |
14 | + * This program is free software; you can redistribute it and/or modify | |
15 | + * it under the terms of the GNU General Public License version 2 as | |
16 | + * published by the Free Software Foundation. | |
17 | + * | |
18 | + * This code is heavily based on ucb1x00-*.c copyrighted by Russell King | |
19 | + * covering the UCB1100, UCB1200 and UCB1300.. Support for the UCB1400 has | |
20 | + * been made separate from ucb1x00-core/ucb1x00-ts on Russell's request. | |
21 | + */ | |
22 | + | |
23 | +#ifndef _LINUX__UCB1400_H | |
24 | +#define _LINUX__UCB1400_H | |
25 | + | |
26 | +#include <sound/ac97_codec.h> | |
27 | +#include <linux/mutex.h> | |
28 | +#include <linux/platform_device.h> | |
29 | + | |
30 | +/* | |
31 | + * UCB1400 AC-link registers | |
32 | + */ | |
33 | + | |
34 | +#define UCB_IO_DATA 0x5a | |
35 | +#define UCB_IO_DIR 0x5c | |
36 | +#define UCB_IE_RIS 0x5e | |
37 | +#define UCB_IE_FAL 0x60 | |
38 | +#define UCB_IE_STATUS 0x62 | |
39 | +#define UCB_IE_CLEAR 0x62 | |
40 | +#define UCB_IE_ADC (1 << 11) | |
41 | +#define UCB_IE_TSPX (1 << 12) | |
42 | + | |
43 | +#define UCB_TS_CR 0x64 | |
44 | +#define UCB_TS_CR_TSMX_POW (1 << 0) | |
45 | +#define UCB_TS_CR_TSPX_POW (1 << 1) | |
46 | +#define UCB_TS_CR_TSMY_POW (1 << 2) | |
47 | +#define UCB_TS_CR_TSPY_POW (1 << 3) | |
48 | +#define UCB_TS_CR_TSMX_GND (1 << 4) | |
49 | +#define UCB_TS_CR_TSPX_GND (1 << 5) | |
50 | +#define UCB_TS_CR_TSMY_GND (1 << 6) | |
51 | +#define UCB_TS_CR_TSPY_GND (1 << 7) | |
52 | +#define UCB_TS_CR_MODE_INT (0 << 8) | |
53 | +#define UCB_TS_CR_MODE_PRES (1 << 8) | |
54 | +#define UCB_TS_CR_MODE_POS (2 << 8) | |
55 | +#define UCB_TS_CR_BIAS_ENA (1 << 11) | |
56 | +#define UCB_TS_CR_TSPX_LOW (1 << 12) | |
57 | +#define UCB_TS_CR_TSMX_LOW (1 << 13) | |
58 | + | |
59 | +#define UCB_ADC_CR 0x66 | |
60 | +#define UCB_ADC_SYNC_ENA (1 << 0) | |
61 | +#define UCB_ADC_VREFBYP_CON (1 << 1) | |
62 | +#define UCB_ADC_INP_TSPX (0 << 2) | |
63 | +#define UCB_ADC_INP_TSMX (1 << 2) | |
64 | +#define UCB_ADC_INP_TSPY (2 << 2) | |
65 | +#define UCB_ADC_INP_TSMY (3 << 2) | |
66 | +#define UCB_ADC_INP_AD0 (4 << 2) | |
67 | +#define UCB_ADC_INP_AD1 (5 << 2) | |
68 | +#define UCB_ADC_INP_AD2 (6 << 2) | |
69 | +#define UCB_ADC_INP_AD3 (7 << 2) | |
70 | +#define UCB_ADC_EXT_REF (1 << 5) | |
71 | +#define UCB_ADC_START (1 << 7) | |
72 | +#define UCB_ADC_ENA (1 << 15) | |
73 | + | |
74 | +#define UCB_ADC_DATA 0x68 | |
75 | +#define UCB_ADC_DAT_VALID (1 << 15) | |
76 | +#define UCB_ADC_DAT_MASK 0x3ff | |
77 | + | |
78 | +#define UCB_ID 0x7e | |
79 | +#define UCB_ID_1400 0x4304 | |
80 | + | |
81 | +struct ucb1400_ts { | |
82 | + struct input_dev *ts_idev; | |
83 | + struct task_struct *ts_task; | |
84 | + int id; | |
85 | + wait_queue_head_t ts_wait; | |
86 | + unsigned int ts_restart:1; | |
87 | + int irq; | |
88 | + unsigned int irq_pending; /* not bit field shared */ | |
89 | + struct snd_ac97 *ac97; | |
90 | +}; | |
91 | + | |
92 | +struct ucb1400 { | |
93 | + struct platform_device *ucb1400_ts; | |
94 | +}; | |
95 | + | |
96 | +static inline u16 ucb1400_reg_read(struct snd_ac97 *ac97, u16 reg) | |
97 | +{ | |
98 | + return ac97->bus->ops->read(ac97, reg); | |
99 | +} | |
100 | + | |
101 | +static inline void ucb1400_reg_write(struct snd_ac97 *ac97, u16 reg, u16 val) | |
102 | +{ | |
103 | + ac97->bus->ops->write(ac97, reg, val); | |
104 | +} | |
105 | + | |
106 | +static inline u16 ucb1400_gpio_get_value(struct snd_ac97 *ac97, u16 gpio) | |
107 | +{ | |
108 | + return ucb1400_reg_read(ac97, UCB_IO_DATA) & (1 << gpio); | |
109 | +} | |
110 | + | |
111 | +static inline void ucb1400_gpio_set_value(struct snd_ac97 *ac97, u16 gpio, | |
112 | + u16 val) | |
113 | +{ | |
114 | + ucb1400_reg_write(ac97, UCB_IO_DATA, val ? | |
115 | + ucb1400_reg_read(ac97, UCB_IO_DATA) | (1 << gpio) : | |
116 | + ucb1400_reg_read(ac97, UCB_IO_DATA) & ~(1 << gpio)); | |
117 | +} | |
118 | + | |
119 | +static inline u16 ucb1400_gpio_get_direction(struct snd_ac97 *ac97, u16 gpio) | |
120 | +{ | |
121 | + return ucb1400_reg_read(ac97, UCB_IO_DIR) & (1 << gpio); | |
122 | +} | |
123 | + | |
124 | +static inline void ucb1400_gpio_set_direction(struct snd_ac97 *ac97, u16 gpio, | |
125 | + u16 dir) | |
126 | +{ | |
127 | + ucb1400_reg_write(ac97, UCB_IO_DIR, dir ? | |
128 | + ucb1400_reg_read(ac97, UCB_IO_DIR) | (1 << gpio) : | |
129 | + ucb1400_reg_read(ac97, UCB_IO_DIR) & ~(1 << gpio)); | |
130 | +} | |
131 | + | |
132 | +static inline void ucb1400_adc_enable(struct snd_ac97 *ac97) | |
133 | +{ | |
134 | + ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA); | |
135 | +} | |
136 | + | |
137 | +static unsigned int ucb1400_adc_read(struct snd_ac97 *ac97, u16 adc_channel, | |
138 | + int adcsync) | |
139 | +{ | |
140 | + unsigned int val; | |
141 | + | |
142 | + if (adcsync) | |
143 | + adc_channel |= UCB_ADC_SYNC_ENA; | |
144 | + | |
145 | + ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel); | |
146 | + ucb1400_reg_write(ac97, UCB_ADC_CR, UCB_ADC_ENA | adc_channel | | |
147 | + UCB_ADC_START); | |
148 | + | |
149 | + while (!((val = ucb1400_reg_read(ac97, UCB_ADC_DATA)) | |
150 | + & UCB_ADC_DAT_VALID)) | |
151 | + schedule_timeout_uninterruptible(1); | |
152 | + | |
153 | + return val & UCB_ADC_DAT_MASK; | |
154 | +} | |
155 | + | |
156 | +static inline void ucb1400_adc_disable(struct snd_ac97 *ac97) | |
157 | +{ | |
158 | + ucb1400_reg_write(ac97, UCB_ADC_CR, 0); | |
159 | +} | |
160 | + | |
161 | +#endif |