Commit df4f3459c7e2d2c573e38757c2d2e7b57cb49717
Committed by
Tony Lindgren
Tony Lindgren
1 parent
bf59ebbeac
bus: ti-sysc: drop the extra hardreset during init
There seems to be unnecessary extra hardreset line toggling applied during module init. This is unnecessary, as the reset lines are already asserted during boot, and it can cause certain modules to hang (iommus, remoteprocs.) Remove the extra hardreset toggle, and remove the now redundant function to handle this also. Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
Showing 1 changed file with 1 additions and 36 deletions Side-by-side Diff
drivers/bus/ti-sysc.c
| ... | ... | @@ -1522,37 +1522,6 @@ |
| 1522 | 1522 | return error; |
| 1523 | 1523 | } |
| 1524 | 1524 | |
| 1525 | -/** | |
| 1526 | - * sysc_rstctrl_reset_deassert - deassert rstctrl reset | |
| 1527 | - * @ddata: device driver data | |
| 1528 | - * @reset: reset before deassert | |
| 1529 | - * | |
| 1530 | - * A module can have both OCP softreset control and external rstctrl. | |
| 1531 | - * If more complicated rstctrl resets are needed, please handle these | |
| 1532 | - * directly from the child device driver and map only the module reset | |
| 1533 | - * for the parent interconnect target module device. | |
| 1534 | - * | |
| 1535 | - * Automatic reset of the module on init can be skipped with the | |
| 1536 | - * "ti,no-reset-on-init" device tree property. | |
| 1537 | - */ | |
| 1538 | -static int sysc_rstctrl_reset_deassert(struct sysc *ddata, bool reset) | |
| 1539 | -{ | |
| 1540 | - int error; | |
| 1541 | - | |
| 1542 | - if (!ddata->rsts) | |
| 1543 | - return 0; | |
| 1544 | - | |
| 1545 | - if (reset) { | |
| 1546 | - error = reset_control_assert(ddata->rsts); | |
| 1547 | - if (error) | |
| 1548 | - return error; | |
| 1549 | - } | |
| 1550 | - | |
| 1551 | - reset_control_deassert(ddata->rsts); | |
| 1552 | - | |
| 1553 | - return 0; | |
| 1554 | -} | |
| 1555 | - | |
| 1556 | 1525 | /* |
| 1557 | 1526 | * Note that the caller must ensure the interconnect target module is enabled |
| 1558 | 1527 | * before calling reset. Otherwise reset will not complete. |
| ... | ... | @@ -1617,10 +1586,6 @@ |
| 1617 | 1586 | int error = 0; |
| 1618 | 1587 | bool manage_clocks = true; |
| 1619 | 1588 | |
| 1620 | - error = sysc_rstctrl_reset_deassert(ddata, false); | |
| 1621 | - if (error) | |
| 1622 | - return error; | |
| 1623 | - | |
| 1624 | 1589 | if (ddata->cfg.quirks & |
| 1625 | 1590 | (SYSC_QUIRK_NO_IDLE | SYSC_QUIRK_NO_IDLE_ON_INIT)) |
| 1626 | 1591 | manage_clocks = false; |
| ... | ... | @@ -1644,7 +1609,7 @@ |
| 1644 | 1609 | goto err_opt_clocks; |
| 1645 | 1610 | |
| 1646 | 1611 | if (!(ddata->cfg.quirks & SYSC_QUIRK_NO_RESET_ON_INIT)) { |
| 1647 | - error = sysc_rstctrl_reset_deassert(ddata, true); | |
| 1612 | + error = reset_control_deassert(ddata->rsts); | |
| 1648 | 1613 | if (error) |
| 1649 | 1614 | goto err_main_clocks; |
| 1650 | 1615 | } |