fsldma: split apart external pause and request count features

When using the Freescale DMA controller in external control mode, both the request count and external pause bits need to be setup correctly. This was being done with the same function. The 83xx controller lacks the external pause feature, but has a similar feature called external start. This feature requires that the request count bits be setup correctly. Split the function into two parts, to make it possible to use the external start feature on the 83xx controller. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>

fsldma: split apart external pause and request count features
When using the Freescale DMA controller in external control mode, both the request count and external pause bits need to be setup correctly. This was being done with the same function. The 83xx controller lacks the external pause feature, but has a similar feature called external start. This feature requires that the request count bits be setup correctly. Split the function into two parts, to make it possible to use the external start feature on the 83xx controller. Signed-off-by: Ira W. Snyder <iws@ovro.caltech.edu> Signed-off-by: Dan Williams <dan.j.williams@intel.com>
Ira Snyder · Dan Williams
1 parent 162b96e63e
Showing 2 changed files with 31 additions and 17 deletions Side-by-side Diff
drivers/dma/fsldma.c
drivers/dma/fsldma.h
@@ -280,28 +280,40 @@
 }
  
 /**
- * fsl_chan_toggle_ext_pause - Toggle channel external pause status
+ * fsl_chan_set_request_count - Set DMA Request Count for external control
  * @fsl_chan : Freescale DMA channel
- * @size     : Pause control size, 0 for disable external pause control.
- *             The maximum is 1024.
+ * @size     : Number of bytes to transfer in a single request
  *
- * The Freescale DMA channel can be controlled by the external
- * signal DREQ#. The pause control size is how many bytes are allowed
- * to transfer before pausing the channel, after which a new assertion
- * of DREQ# resumes channel operation.
+ * The Freescale DMA channel can be controlled by the external signal DREQ#.
+ * The DMA request count is how many bytes are allowed to transfer before
+ * pausing the channel, after which a new assertion of DREQ# resumes channel
+ * operation.
+ *
+ * A size of 0 disables external pause control. The maximum size is 1024.
  */
-static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int size)
+static void fsl_chan_set_request_count(struct fsl_dma_chan *fsl_chan, int size)
 {
-	if (size > 1024)
-		return;
+	BUG_ON(size > 1024);
+	DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
+		DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32)
+			| ((__ilog2(size) << 24) & 0x0f000000),
+		32);
+}
  
-	if (size) {
-		DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
-			DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32)
-				| ((__ilog2(size) << 24) & 0x0f000000),
-			32);
+/**
+ * fsl_chan_toggle_ext_pause - Toggle channel external pause status
+ * @fsl_chan : Freescale DMA channel
+ * @enable   : 0 is disabled, 1 is enabled.
+ *
+ * The Freescale DMA channel can be controlled by the external signal DREQ#.
+ * The DMA Request Count feature should be used in addition to this feature
+ * to set the number of bytes to transfer before pausing the channel.
+ */
+static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int enable)
+{
+	if (enable)
 		fsl_chan->feature |= FSL_DMA_CHAN_PAUSE_EXT;
-	} else
+	else
 		fsl_chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT;
 }
  
@@ -885,6 +897,7 @@
 		new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
 		new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size;
 		new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size;
+		new_fsl_chan->set_request_count = fsl_chan_set_request_count;
 	}
  
 	spin_lock_init(&new_fsl_chan->desc_lock);
@@ -144,10 +144,11 @@
 	struct tasklet_struct tasklet;
 	u32 feature;
  
-	void (*toggle_ext_pause)(struct fsl_dma_chan *fsl_chan, int size);
+	void (*toggle_ext_pause)(struct fsl_dma_chan *fsl_chan, int enable);
 	void (*toggle_ext_start)(struct fsl_dma_chan *fsl_chan, int enable);
 	void (*set_src_loop_size)(struct fsl_dma_chan *fsl_chan, int size);
 	void (*set_dest_loop_size)(struct fsl_dma_chan *fsl_chan, int size);
+	void (*set_request_count)(struct fsl_dma_chan *fsl_chan, int size);
 };
  
 #define to_fsl_chan(chan) container_of(chan, struct fsl_dma_chan, common)
...	...	@@ -280,28 +280,40 @@
280	280	}
281	281
282	282	/**
283		- * fsl_chan_toggle_ext_pause - Toggle channel external pause status
	283	+ * fsl_chan_set_request_count - Set DMA Request Count for external control
284	284	* @fsl_chan : Freescale DMA channel
285		- * @size : Pause control size, 0 for disable external pause control.
286		- * The maximum is 1024.
	285	+ * @size : Number of bytes to transfer in a single request
287	286	*
288		- * The Freescale DMA channel can be controlled by the external
289		- * signal DREQ#. The pause control size is how many bytes are allowed
290		- * to transfer before pausing the channel, after which a new assertion
291		- * of DREQ# resumes channel operation.
	287	+ * The Freescale DMA channel can be controlled by the external signal DREQ#.
	288	+ * The DMA request count is how many bytes are allowed to transfer before
	289	+ * pausing the channel, after which a new assertion of DREQ# resumes channel
	290	+ * operation.
	291	+ *
	292	+ * A size of 0 disables external pause control. The maximum size is 1024.
292	293	*/
293		-static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int size)
	294	+static void fsl_chan_set_request_count(struct fsl_dma_chan *fsl_chan, int size)
294	295	{
295		- if (size > 1024)
296		- return;
	296	+ BUG_ON(size > 1024);
	297	+ DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
	298	+ DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32)
	299	+ \| ((__ilog2(size) << 24) & 0x0f000000),
	300	+ 32);
	301	+}
297	302
298		- if (size) {
299		- DMA_OUT(fsl_chan, &fsl_chan->reg_base->mr,
300		- DMA_IN(fsl_chan, &fsl_chan->reg_base->mr, 32)
301		- \| ((__ilog2(size) << 24) & 0x0f000000),
302		- 32);
	303	+/**
	304	+ * fsl_chan_toggle_ext_pause - Toggle channel external pause status
	305	+ * @fsl_chan : Freescale DMA channel
	306	+ * @enable : 0 is disabled, 1 is enabled.
	307	+ *
	308	+ * The Freescale DMA channel can be controlled by the external signal DREQ#.
	309	+ * The DMA Request Count feature should be used in addition to this feature
	310	+ * to set the number of bytes to transfer before pausing the channel.
	311	+ */
	312	+static void fsl_chan_toggle_ext_pause(struct fsl_dma_chan *fsl_chan, int enable)
	313	+{
	314	+ if (enable)
303	315	fsl_chan->feature \|= FSL_DMA_CHAN_PAUSE_EXT;
304		- } else
	316	+ else
305	317	fsl_chan->feature &= ~FSL_DMA_CHAN_PAUSE_EXT;
306	318	}
307	319
...	...	@@ -885,6 +897,7 @@
885	897	new_fsl_chan->toggle_ext_start = fsl_chan_toggle_ext_start;
886	898	new_fsl_chan->set_src_loop_size = fsl_chan_set_src_loop_size;
887	899	new_fsl_chan->set_dest_loop_size = fsl_chan_set_dest_loop_size;
	900	+ new_fsl_chan->set_request_count = fsl_chan_set_request_count;
888	901	}
889	902
890	903	spin_lock_init(&new_fsl_chan->desc_lock);
...	...	@@ -144,10 +144,11 @@
144	144	struct tasklet_struct tasklet;
145	145	u32 feature;
146	146
147		- void (toggle_ext_pause)(struct fsl_dma_chan fsl_chan, int size);
	147	+ void (toggle_ext_pause)(struct fsl_dma_chan fsl_chan, int enable);
148	148	void (toggle_ext_start)(struct fsl_dma_chan fsl_chan, int enable);
149	149	void (set_src_loop_size)(struct fsl_dma_chan fsl_chan, int size);
150	150	void (set_dest_loop_size)(struct fsl_dma_chan fsl_chan, int size);
	151	+ void (set_request_count)(struct fsl_dma_chan fsl_chan, int size);
151	152	};
152	153
153	154	#define to_fsl_chan(chan) container_of(chan, struct fsl_dma_chan, common)