Commit e73b49ebd9deeb0ff2cd9ac6fd9c72a433d1e062

Authored by Bhadram Varka
Committed by David S. Miller
1 parent 2f2b1ae24c

stmmac: use of_property_read_u32 instead of read_u8

Numbers in DT are stored in “cells” which are 32-bits
in size. of_property_read_u8 does not work properly
because of endianness problem.

This causes it to always return 0 with little-endian
architectures.

Fix it by using of_property_read_u32() OF API.

Signed-off-by: Bhadram Varka <vbhadram@nvidia.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

Showing 2 changed files with 12 additions and 12 deletions Side-by-side Diff

drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
... ... @@ -168,8 +168,8 @@
168 168 }
169 169  
170 170 /* Processing RX queues common config */
171   - if (of_property_read_u8(rx_node, "snps,rx-queues-to-use",
172   - &plat->rx_queues_to_use))
  171 + if (of_property_read_u32(rx_node, "snps,rx-queues-to-use",
  172 + &plat->rx_queues_to_use))
173 173 plat->rx_queues_to_use = 1;
174 174  
175 175 if (of_property_read_bool(rx_node, "snps,rx-sched-sp"))
... ... @@ -191,8 +191,8 @@
191 191 else
192 192 plat->rx_queues_cfg[queue].mode_to_use = MTL_QUEUE_DCB;
193 193  
194   - if (of_property_read_u8(q_node, "snps,map-to-dma-channel",
195   - &plat->rx_queues_cfg[queue].chan))
  194 + if (of_property_read_u32(q_node, "snps,map-to-dma-channel",
  195 + &plat->rx_queues_cfg[queue].chan))
196 196 plat->rx_queues_cfg[queue].chan = queue;
197 197 /* TODO: Dynamic mapping to be included in the future */
198 198  
... ... @@ -222,8 +222,8 @@
222 222 }
223 223  
224 224 /* Processing TX queues common config */
225   - if (of_property_read_u8(tx_node, "snps,tx-queues-to-use",
226   - &plat->tx_queues_to_use))
  225 + if (of_property_read_u32(tx_node, "snps,tx-queues-to-use",
  226 + &plat->tx_queues_to_use))
227 227 plat->tx_queues_to_use = 1;
228 228  
229 229 if (of_property_read_bool(tx_node, "snps,tx-sched-wrr"))
... ... @@ -244,8 +244,8 @@
244 244 if (queue >= plat->tx_queues_to_use)
245 245 break;
246 246  
247   - if (of_property_read_u8(q_node, "snps,weight",
248   - &plat->tx_queues_cfg[queue].weight))
  247 + if (of_property_read_u32(q_node, "snps,weight",
  248 + &plat->tx_queues_cfg[queue].weight))
249 249 plat->tx_queues_cfg[queue].weight = 0x10 + queue;
250 250  
251 251 if (of_property_read_bool(q_node, "snps,dcb-algorithm")) {
include/linux/stmmac.h
... ... @@ -126,14 +126,14 @@
126 126  
127 127 struct stmmac_rxq_cfg {
128 128 u8 mode_to_use;
129   - u8 chan;
  129 + u32 chan;
130 130 u8 pkt_route;
131 131 bool use_prio;
132 132 u32 prio;
133 133 };
134 134  
135 135 struct stmmac_txq_cfg {
136   - u8 weight;
  136 + u32 weight;
137 137 u8 mode_to_use;
138 138 /* Credit Base Shaper parameters */
139 139 u32 send_slope;
... ... @@ -168,8 +168,8 @@
168 168 int unicast_filter_entries;
169 169 int tx_fifo_size;
170 170 int rx_fifo_size;
171   - u8 rx_queues_to_use;
172   - u8 tx_queues_to_use;
  171 + u32 rx_queues_to_use;
  172 + u32 tx_queues_to_use;
173 173 u8 rx_sched_algorithm;
174 174 u8 tx_sched_algorithm;
175 175 struct stmmac_rxq_cfg rx_queues_cfg[MTL_MAX_RX_QUEUES];