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Commit e85d59df13cf5cce08becb3fd261048e6d870c0d

Authored by Florian Fainelli
Committed by Ralf Baechle
1 parent a2e62f3a85
Exists in master and in 39 other branches 8mp-imx_5.4.70_2.3.0, 8qm-imx_5.4.70_2.3.0, emb_imx_lf-5.15.y, emb_lf-6.1.y, imx_3.0.35_4.1.0, imx_3.10.17_1.0.1_ga, imx_3.10.53_1.1.0_ga, imx_3.14.28_1.0.0_ga, imx_4.1.15_1.0.0_ga, pitx_8mp_lf-5.10.y, rt-smarc-imx_4.1.15_1.0.0_ga, rt_linux_5.15.71, smarc-8m-android-11.0.0_2.0.0, smarc-imx6_4.14.98_2.0.0_ga, smarc-imx6_4.9.88_2.0.0_ga, smarc-imx7_4.14.98_2.0.0_ga, smarc-imx7_4.9.11_1.0.0_ga, smarc-imx7_4.9.88_2.0.0_ga, smarc-imx_3.10.53_1.1.0_ga, smarc-imx_3.14.28_1.0.0_ga, smarc-imx_4.1.15_1.0.0_ga, smarc-imx_4.9.11_1.0.0_ga, smarc-imx_4.9.51_imx8m_ga, smarc-imx_4.9.88_2.0.0_ga, smarc-m6.0.1_2.1.0-ga, smarc-n7.1.2_2.0.0-ga, smarc-rel_imx_4.1.15_1.2.0_ga, smarc_8m_00d0_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.14.78_1.0.0_ga, smarc_8m_imx_4.14.98_2.0.0_ga, smarc_8m_imx_4.19.35_1.1.0, smarc_8mm_imx_4.14.78_1.0.0_ga, smarc_8mm_imx_4.14.98_2.0.0_ga, smarc_8mm_imx_4.19.35_1.1.0, smarc_8mm_imx_5.4.24_2.1.0, smarc_8mp_lf-5.10.y, smarc_8mq_imx_5.4.24_2.1.0, smarc_8mq_lf-5.10.y, smarc_imx_lf-5.15.y

MIPS: BCM63xx: Fix soft-reset lockup on BCM6345 

This patch fixes a lockup on BCM6345 where setting the PLL soft reset bit
will also lock the other blocks including UART.  Instead of setting only
the PLL soft reset bit in the software reset register, set this bit but do
not touch the others.

Signed-off-by: Florian Fainelli <florian@openwrt.org>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

Showing 1 changed file with 3 additions and 1 deletions Side-by-side Diff

arch/mips/bcm63xx/setup.c
Diff comments   View file @ e85d59d
... ... @@ -75,7 +75,9 @@
75 75 bcm6348_a1_reboot();
76 76  
77 77 printk(KERN_INFO "triggering watchdog soft-reset...\n");
78   - bcm_perf_writel(SYS_PLL_SOFT_RESET, PERF_SYS_PLL_CTL_REG);
  78 + reg = bcm_perf_readl(PERF_SYS_PLL_CTL_REG);
  79 + reg |= SYS_PLL_SOFT_RESET;
  80 + bcm_perf_writel(reg, PERF_SYS_PLL_CTL_REG);
79 81 while (1)
80 82 ;
81 83 }